Signal processing method and device for simulating channel attenuation, equipment and medium

Abstract

The invention provides a signal processing method and device for simulating channel attenuation, equipment and a medium. The method comprises the following steps: obtaining a first signal according to a generated data stream; processing the first signal according to the rising time and the falling time to obtain a second signal; and establishing a resistance-capacitance model, and performing corresponding channel attenuation processing on the second signal by using the resistance-capacitance model and the configuration information to obtain an analog signal. According to the method, channel attenuation of different degrees can be simulated and accurate modeling is realized by utilizing a resistance-capacitance model and configuration information capable of being flexibly adjusted, and a generated analog signal can be used as input of a next-stage analog model, so that the authenticity of digital-analog hybrid simulation is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of data processing, and in particular to a signal processing method, device, equipment and medium for simulating channel attenuation. Background Art

[0002] SerDes is the abbreviation of SERializer (serializer) / DESerializer (deserializer). In the development process of high-speed deserializer digital-analog chips, there are some circuits that compensate for channel attenuation, such as CTLE. The input source of these circuits is the signal after channel attenuation. After the attenuated signal is processed by the compensation circuit and subsequent circuits, it is converted into a digital signal and sent to the digital circuit for further processing. In order to better verify the system function, the analog circuit is generally digitally modeled. Introducing digital analog models in digital simulation for hybrid simulation is an important part of ensuring chip quality. Not only is the simulation speed fast, but also the problems in the system can be discovered as early as possible. In this process, how to accurately model the analog circuit and perform collaborative simulation with the digital part is a very difficult and time-consuming task.

[0003] At present, most of this mixed digital-analog simulation uses hardware description languages ​​such as VERILOG to simply simulate circuit functions. Some logic-related functions can be easily implemented by these languages, but some functions, such as current, capacitance, channel attenuation, etc., are very difficult to model accurately, which also reduces the credibility of mixed simulation.

[0004] Therefore, there is an urgent need for a signal processing method, device, equipment and medium for simulating channel attenuation to improve the above problems. Summary of the invention

[0005] The object of the present invention is to provide a signal processing method, device, equipment and medium for simulating channel attenuation, which can achieve accurate modeling and improve the credibility of hybrid simulation.

[0006] In a first aspect, the present invention provides a signal processing method for simulating channel attenuation, comprising: Obtaining a first signal according to the generated data stream; Processing the first signal according to the rise time and fall time to obtain a second signal; A resistance and capacitance model is established, and the resistance and capacitance model and configuration information are used to perform corresponding channel attenuation processing on the second signal to obtain an analog signal.

[0007] The method of the present invention has the following beneficial effects: obtaining a first signal according to a generated data stream; processing the first signal according to a rise time and a fall time to obtain a second signal; establishing a resistor and capacitor model, and using the resistor and capacitor model and configuration information to perform corresponding channel attenuation processing on the second signal to obtain a simulated signal. Using the resistor and capacitor model and the flexibly adjustable configuration information, not only can different degrees of channel attenuation be simulated to achieve accurate modeling, but the generated simulated signal can also be used as an input of the next level simulation model, effectively improving the authenticity of the digital-analog hybrid simulation.

[0008] Optionally, the configuration information includes different capacitance values ​​and / or different resistance values; and / or the resistance and capacitance model is obtained by using EENET modeling.

[0009] Optionally, the performing corresponding channel attenuation processing on the second signal by using the resistance-capacitance model and preset configuration information to obtain an analog signal includes: According to the resistor-capacitor model and the configuration information, a plurality of low-pass filters composed of different capacitors and resistors are generated; Each low-pass filter is used to perform corresponding channel attenuation processing on the second signal to obtain analog signals with different degrees of attenuation.

[0010] Optionally, also include: Using the analog signal as input of the next level analog circuit model, and obtaining a digital signal through parsing the analog circuit model; The digital signal is input into a digital signal processing model for processing to obtain simulation data.

[0011] Optionally, obtaining the first signal according to the generated data stream includes: A corresponding first signal is obtained according to a randomly generated serial digital single-bit data stream.

[0012] Optionally, the processing the first signal according to the rise time and the fall time to obtain the second signal includes: Through interface modeling, the rise time and the fall time are added to the first signal to obtain the second signal.

[0013] Optionally, the step of adding a rise time and a fall time to the first signal through interface modeling to obtain a second signal includes: Calculate the maximum value and the minimum value of the analog signal according to the input first signal; According to the configured rise time and fall time length, as well as the set accuracy, the number of iterations from the minimum value to the maximum value and the step size of each iteration are calculated; The rising time passes through the minimum value by adding one step each time until it reaches the maximum value, and the falling time passes through the maximum value by subtracting one step each time until it reaches the minimum value. The rising time and the falling time are added to the first signal to obtain the second signal.

[0014] In a second aspect, the present invention provides a signal processing device for simulating channel attenuation, the device comprising modules / units for executing any possible design method of the first aspect. These modules / units can be implemented by hardware, or by executing corresponding software implementations through hardware.

[0015] In a third aspect, the present invention provides an electronic device, comprising a memory and a processor, wherein the memory stores a program that can be run on the processor, and when the program is executed by the processor, the electronic device implements a method for executing any possible design of any of the above aspects.

[0016] In a fourth aspect, the present invention provides a readable storage medium, wherein the readable storage medium stores a program, and when the program is executed, it implements any possible design method of any of the above aspects.

[0017] For the beneficial effects of the second to fourth aspects, reference may be made to the description of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic flow chart of a signal processing method for simulating channel attenuation provided by an embodiment of the present invention; Figure 2 A schematic diagram of the structure of a signal processing device for simulating channel attenuation provided by an embodiment of the present invention; Figure 3 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention; Figure 4 A schematic diagram of generating a first signal, a second signal and a simulation signal by modeling provided in an embodiment of the present invention; Figure 5 A schematic diagram of an analog signal with a higher attenuation degree provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0020] In view of the inconvenience of current accurate modeling, the signal processing method for simulating channel attenuation provided by the present invention can achieve accurate modeling and improve the credibility of hybrid simulation. The technical scheme in the embodiment of the present invention is described below in conjunction with the drawings in the embodiment of the present invention. Among them, in the description of the embodiment of the present invention, the terms used in the following embodiments are only for the purpose of describing specific embodiments, and are not intended to be used as limitations on the present invention. As used in the specification of the present invention and the attached claims, the singular expressions "a", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear contrary indication in the context. It should also be understood that in the following embodiments of the present invention, "at least one", "one or more" refers to one or more than two (including two). The term "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist; for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship.

[0021] References to "one embodiment" or "some embodiments" described in this specification mean that one or more embodiments of the present invention include specific features, structures or characteristics described in conjunction with the embodiment. Thus, the statements "in one embodiment", "in some embodiments", "in some other embodiments", and "in some other embodiments" that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways. The term "connected" includes direct and indirect connections, unless otherwise stated. "First" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0022] In the embodiments of the present invention, "exemplarily" or "for example" is used to indicate an example, illustration or description. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of "exemplarily" or "for example" is intended to present the relevant concepts in a specific way.

[0023] like Figure 1 As shown, the present invention provides a signal processing method for simulating channel attenuation, comprising: S101, obtaining a first signal according to a generated data stream.

[0024] In some embodiments, obtaining the first signal according to the generated data stream includes: obtaining the corresponding first signal according to a randomly generated serial digital single-bit data stream.

[0025] S102: Process the first signal according to the rise time and the fall time to obtain a second signal.

[0026] In some embodiments, the processing of the first signal according to the rise time and the fall time to obtain the second signal includes: adding the rise time and the fall time to the first signal through interface modeling to obtain the second signal.

[0027] In some specific embodiments, the interface modeling, adding rise time and fall time to the first signal to obtain the second signal includes: calculating the maximum and minimum values ​​of the analog signal based on the input first signal; calculating the number of iterations from the minimum value to the maximum value and the step size of each iteration based on the configured rise time and fall time lengths, and the set accuracy; the rise time passes through the minimum value by adding a step size each time until the maximum value, and the fall time passes through the maximum value by subtracting a step size each time until the minimum value, and adding the rise time and fall time to the first signal to obtain the second signal.

[0028] S103, establishing a resistance and capacitance model, and performing corresponding channel attenuation processing on the second signal using the resistance and capacitance model and configuration information to obtain an analog signal.

[0029] In some embodiments, the configuration information includes different capacitance values ​​and / or different resistance values; and / or the resistance and capacitance model is modeled using EENET, wherein EENET refers to a model developed by Cadence that includes parameterized resistors, inductors, capacitors, diodes, transistors, and operational amplifiers.

[0030] In some embodiments, the use of the resistor-capacitor model and preset configuration information to perform corresponding channel attenuation processing on the second signal to obtain an analog signal includes: generating a plurality of low-pass filters composed of different capacitors and resistors according to the resistor-capacitor model and configuration information; and using each low-pass filter to perform corresponding channel attenuation processing on the second signal to obtain analog signals with different degrees of attenuation.

[0031] In some embodiments, the method further includes: using the analog signal as the input of the next level analog circuit model, and obtaining a digital signal through parsing the analog circuit model; and inputting the digital signal into a digital signal processing model for processing to obtain simulation data.

[0032] The advantage of this embodiment is that by using EENET modeling, voltage, current and resistance information can be defined at the same time, and resistance and capacitance can be modeled flexibly. It is very convenient to use in the system hardware description language (HDL), and can simulate different degrees of channel attenuation, which is convenient for more accurate establishment of simulation models. The generated simulation signal can also be used as the input of the next level simulation model, effectively improving the authenticity of digital-analog hybrid simulation.

[0033] For ease of understanding, this embodiment further describes the specific implementation process of the above method in combination with a specific application scenario system. Figure 4-5 As shown, the specific steps include: Step a, first randomly generate a serial digital single-bit data stream, and obtain Figure 4 The first signal D is shown.

[0034] Step b, through interface modeling, add the rise time and fall time to the generated digital bit stream to obtain the second signal D_SKEW, making it flexible and configurable. The specific idea is: (1) First, the maximum value and the minimum value of the analog signal are calculated according to the first input signal.

[0035] (2) Based on the configured rise time and fall time length and the set accuracy, calculate the number of iterations from the minimum value to the maximum value and the step size of each iteration.

[0036] (3) The rise time passes through the minimum value by adding one step each time until it reaches the maximum value, and the fall time passes through the maximum value by subtracting one step each time until it reaches the minimum value, such as Figure 4 The second signal D_SKEW is shown.

[0037] Step c, use EENET to model the resistor and capacitor model, and use resistors and capacitors to form a low-pass filter and apply it to D_SKEW, so as to produce Figure 4 The simulated signal D_FILTER is a simulated signal attenuated by the channel. The resistance value of the resistor and the capacitance value of the capacitor in the resistor-capacitor model are both configurable. Combinations of different values ​​can simulate different degrees of attenuation. For example, Figure 5 The analog signal D_FILTER is a more attenuated signal generated after adjusting the resistance and capacitance values.

[0038] Step d: using the analog signal as the input of the next level analog circuit model, and obtaining a digital signal through the analysis of the analog circuit model; inputting the digital signal into a digital signal processing model for processing to obtain simulation data.

[0039] The advantage of this embodiment is that EENET is used to establish a resistor and capacitor model, and it supports flexible adjustment of the rise time and the fall time. It can simulate different degrees of channel attenuation and generate corresponding analog signals as the input of the next-level analog circuit model. Then, through the subsequent analog circuit model, the digital signal is solved and sent to the digital signal processing model for further processing, which effectively improves the authenticity of the digital-analog hybrid simulation. At the same time, this method can also be used as a reference in other analog circuit digital modeling processes.

[0040] like Figure 2As shown, based on the above-mentioned signal processing method for simulating channel attenuation, the present invention provides a signal processing device for simulating channel attenuation, including: an acquisition module 201, used to obtain a first signal according to a generated data stream; a processing module 202, used to process the first signal according to a rise time and a fall time to obtain a second signal; a construction module 203, used to establish a resistance and capacitance model, and use the resistance and capacitance model and configuration information to perform corresponding channel attenuation processing on the second signal to obtain a simulated signal.

[0041] It should be understood that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, which will not be repeated here. In addition, the use of suffixes such as "module", "component" or "unit" used to represent elements is only for the purpose of facilitating the description of the present invention, and has no specific meaning in itself. Therefore, "module", "component" or "unit" can be used in a mixed manner. The terminal can be implemented in various forms. For example, the terminal described in the present invention may include mobile terminals such as mobile phones, tablet computers, laptops, PDAs, portable media players (PMP), navigation devices, wearable devices, smart bracelets, pedometers, and fixed terminals such as digital TVs and desktop computers. The subsequent description will be described by taking the mobile terminal as an example, and those skilled in the art will understand that, in addition to components specifically used for mobile purposes, the construction according to the embodiment of the present invention can also be applied to fixed types of terminals.

[0042] In some other embodiments of the present invention, an electronic device 300 is disclosed. Figure 3 As shown, it may include: one or more processors 301; memory 302; display 303; one or more applications (not shown); and one or more computer programs 304. The above-mentioned components may be connected via one or more communication buses 305. The one or more computer programs 304 are stored in the above-mentioned memory 302 and configured to be executed by the one or more processors 301. The one or more computer programs 304 include instructions, which may be used to execute the following instructions: Figure 1 The various steps in the corresponding embodiments.

[0043] The processor 301 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.

[0044] The memory 302 may be an internal storage unit of the electronic device 300, such as a hard disk or memory of the electronic device 300. The memory 302 may also be an external storage device of the electronic device 300, such as a plug-in hard disk, a smart memory card (SmartMediaCard, SMC), a secure digital (SecureDigital, SD) card, a flash card (FlashCard), etc. equipped on the electronic device 300. Further, the memory 302 may also include both an internal storage unit of the electronic device 300 and an external storage device. The memory 302 is used to store computer programs and other programs and data required by the electronic device. The memory 302 may also be used to temporarily store data that has been output or is to be output.

[0045] The computer program 304 may be divided into one or more modules / units. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions. The instruction segments are used to describe the execution process of the computer program 304 in the electronic device 300 .

[0046] In addition to the above structure, those skilled in the art can understand that Figure 3 It is only an example of the electronic device 300 and does not constitute a limitation of the electronic device 300. The electronic device 300 may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the electronic device may also include input and output devices, network access devices, buses, etc.

[0047] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0048] Based on the above embodiments, the present invention further discloses a computer-readable storage medium storing at least one computer program, which implements the signal processing method for simulating channel attenuation in the above embodiments when executed by a processor.

[0049] A person of ordinary skill in the art can understand that all or part of the steps in the method for implementing the above embodiment can be completed by instructing the processor through a program, and the program can be stored in a computer-readable storage medium, and the storage medium is a non-transitory medium, such as a random access memory, a read-only memory, a flash memory, a hard disk, a solid-state hard disk, a magnetic tape, a floppy disk, an optical disk, and any combination thereof. The above storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a digital video disc (DVD)), or a semiconductor medium (e.g., a solid-state disk (SSD)), etc.

[0050] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0051] In summary, the signal processing method, device, equipment and medium for simulating channel attenuation disclosed in the present invention can not only simulate different degrees of channel attenuation and generate corresponding analog signals, but also serve as the input of the next-level simulation model, effectively improving the authenticity of digital-analog hybrid simulation.

[0052] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A signal processing method for simulating channel attenuation, It is characterized in that include: Obtaining a first signal according to the generated data stream; Processing the first signal according to the rise time and fall time to obtain a second signal; Establishing a resistance and capacitance model, and performing corresponding channel attenuation processing on the second signal using the resistance and capacitance model and configuration information to obtain an analog signal; Calculate the maximum value and the minimum value of the analog signal according to the input first signal; According to the configured rise time and fall time length, as well as the set accuracy, the number of iterations from the minimum value to the maximum value and the step size of each iteration are calculated; The rising time passes through the minimum value by adding one step each time until it reaches the maximum value, and the falling time passes through the maximum value by subtracting one step each time until it reaches the minimum value. The rising time and the falling time are added to the first signal to obtain the second signal.

2. The method according to claim 1, It is characterized in that The configuration information includes different capacitance values ​​and / or different resistance values; and / or the resistance and capacitance model is obtained by using EENET modeling.

3. The method according to claim 1, It is characterized in that The step of performing corresponding channel attenuation processing on the second signal by using the resistance-capacitance model and the preset configuration information to obtain an analog signal includes: According to the resistor-capacitor model and the configuration information, a plurality of low-pass filters composed of different capacitors and resistors are generated; Each low-pass filter is used to perform corresponding channel attenuation processing on the second signal to obtain analog signals with different degrees of attenuation.

4. The method according to claim 1, It is characterized in that Also includes: Using the analog signal as input of the next level analog circuit model, and obtaining a digital signal through parsing the analog circuit model; The digital signal is input into a digital signal processing model for processing to obtain simulation data.

5. The method according to claim 1, It is characterized in that The step of obtaining the first signal according to the generated data stream includes: A corresponding first signal is obtained according to a randomly generated serial digital single-bit data stream.

6. A signal processing device for simulating channel attenuation, used in the method according to any one of claims 1 to 5, It is characterized in that include: An acquisition module, used for obtaining a first signal according to the generated data stream; A processing module, configured to process the first signal according to the rise time and the fall time to obtain a second signal; The construction module is used to establish a resistance and capacitance model, and use the resistance and capacitance model and configuration information to perform corresponding channel attenuation processing on the second signal to obtain an analog signal.

7. An electronic device, It is characterized in that The electronic device comprises a memory and a processor, wherein the memory stores a program executable on the processor, and when the program is executed by the processor, the electronic device implements the method according to any one of claims 1 to 5.

8. A readable storage medium, wherein a program is stored in the readable storage medium. It is characterized in that When the program is executed, the method according to any one of claims 1 to 5 is implemented.

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