Fixed-point data square root rapid solving method and device

Abstract

The invention discloses a fixed-point data square root rapid solving method, which is applied to a processor or a calculator, and comprises the following steps: receiving a calculation instruction which carries a numerical value X of a to-be-calculated square root; performing equivalent transformation on the numerical value X of the square root to be solved to obtain an index part and a basic part; according to the index part, the number of iterations of the basic part for solving the square root result is obtained, and the final square root result is obtained. Only addition and shifting operations are carried out in the whole calculation process, consumed time of an arithmetic unit is short, the real-time performance of MCU operation is good, the capacity of a table lookup array is small, 32-bit numerical values with a large coverage range can be covered, memory resources are greatly saved, and the purpose that the table lookup efficiency is greatly improved without enlarging the length of an original table lookup table is achieved. And under the condition that the table data format of the lookup table is maintained to be 16 bits, the precision of square root calculation can still be ensured, and the time consumption of the MCU for calculating the square root can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a method and device for quickly solving the square root of fixed-point data, a computing device and a computer storage medium. Background Art

[0002] MCU (Micro Controller Unit), also known as "single-chip microcomputer", integrates the central processing unit (CPU), memory (RAM), input / output interface (I / O), etc. into "one IC".

[0003] For fixed-point MCU chips, the numbers involved in numerical calculations are 16-bit or 32-bit integers. However, in many cases, the numbers involved in mathematical calculations are not necessarily integers. Usually, the way fixed-point MCUs handle decimals is for the programmer to determine which of the 16 bits the decimal point of a number is located. This is number calibration.

[0004] Current low-cost fixed-point MCUs used for motor control usually do not have floating-point arithmetic capabilities. Floating-point numerical calculations need to be converted into integer values ​​before they can be used. Among various Q-format calculations, square root calculations consume a lot of MCU computing power, and low-cost MCUs are usually not equipped with fast hardware square root functions.

[0005] The current common practice is to use table lookup or software iteration to obtain approximate results of square roots. The advantage of the table lookup method is its fast calculation speed, but its disadvantage is that the accuracy is limited by the length of the lookup table and it will take up more memory resources, especially for data with relatively large values. More memory is needed to ensure the accuracy and range of the lookup table. The software iteration method obtains the square root result through multiple iterative operations. The disadvantage is that the software iteration operation speed is slow, and the accuracy of the calculation result is proportional to the number of iterations. The higher the accuracy, the more iterations are required and the longer the calculation time is, which seriously affects the real-time performance of motor control.

[0006] Taking 16-bit Q14 data and solving the square root by table lookup as an example, let x=0.25, the corresponding Q14 format is 0.25*2^14=4096, √x=0.5, the corresponding Q14 format is 0.5^2^14=8192.

[0007] Suppose the input range of x is 0~2, the Q14 format value range is 0~2*2^14, the corresponding square root result range is √x=0~√2, and the Q14 format range is 0~√2*2^14.

[0008] Therefore, the specific square root solution method for 16-bit Q14 format data is as follows: Preset a 16-bit integer array with a length of N (N=2^8+1=256+1), the expression is , where i={0,1,2,...,N-2,N-1}. The larger the array, the higher the accuracy. Input the Q14 data X to be solved, and obtain the index value of the lookup table array index=X>>7 by shifting X; Use the index value index to look up the table to get the square root value of X: .

[0009] The advantage of the existing table lookup method for calculating square roots is its fast algorithm speed, but its disadvantage is that the accuracy is proportional to the length of the table. The higher the accuracy, the longer the required table length. If the square root value to be solved is large (for example, a value greater than 16 bits) while maintaining the same accuracy, it is necessary to further lengthen the table and upgrade the storage format of the value to 32 bits, which will require more memory capacity, resulting in an increase in storage and computing costs. Summary of the invention

[0010] One of the purposes of the embodiments of the present invention is to provide a method and apparatus for quickly solving the square root of fixed-point data, a computing device and a storable medium, by improving the original table lookup method without expanding the length of the original table lookup table, maintaining the data format of the table as 16 bits, and at the same time ensuring that the accuracy does not decrease significantly and the calculation time does not increase significantly.

[0011] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a method for quickly solving the square root of fixed-point data, which is applied to a processor or a calculator. The method includes: Receive a calculation instruction, the instruction carrying a value X of a square root to be calculated; Perform an equivalent transformation on the value X whose square root is to be calculated to obtain the exponential part and the base part; According to the exponential part, the number of iterations of the basic part for solving the square root result is obtained, and the square root result obtained by the basic part is left-shifted by the number of bits equal to the number of iterations to obtain the final square root result.

[0012] Preferably, the equivalent transformation is: The equivalent transformed X is the product of the exponential part and the base part Y=X / (2^(2m)). The equivalent transformation expression is: ;

[0013] Among them, m=0,1,2,3..., the exponential part is , the basic part is Y, Y=X / (2^(2m)).

[0014] Preferably, the method further includes: performing an equivalent transformation on the square root to be solved of X: , where is less than a preset value; obtaining an equivalent expression for real-time operation: ; where , Y < preset value, m = 0, 1, 2, 3......, m is the number of iterations.

[0015] Preferably, the number of iterations for obtaining the basic part of the square root result according to the exponent part, and performing a left shift operation with the number of bits equal to the number of iterations on the square root result obtained from the basic part to obtain the final square root result is specifically: pre-setting a 16-bit integer look-up table array of size N; inputting the Q-format data X to be solved, setting Y = X, and initializing the number of iterations m to 0; if Y < preset value, obtaining the index value index for look-up through shifting, where index = Y >> 7, looking up the square root result T[index] of the basic part according to the index value, and performing a left shift operation on the square root result of the basic part to obtain the final result of the square root of the value to be solved T[index] << m, where the T[index] << m shift operation is equivalent to a multiplication operation; if Y >= preset value, incrementing the number of iterations m by 1, i.e., m = m + 1, and performing an iterative reduction process on the corresponding Y, the reduction method is right shifting, and the shift expression is Y = X >> (2m); after iteration, the value of Y shrinks rapidly in multiples until Y < preset value.

[0016] In a second aspect, an embodiment of the present invention further provides a fixed-point data square root fast solving device, and the device includes: a receiving circuit, configured to receive a calculation instruction, and the instruction carries the value X of the square root to be calculated; an equivalent transformation circuit, configured to perform an equivalent transformation on the value X of the square root to be solved, and obtain an exponent part and a basic part; an iterative circuit, configured to obtain the number of iterations for the basic part of the square root result according to the exponent part, and perform a left shift operation with the number of bits equal to the number of iterations on the square root result obtained from the basic part to obtain the final square root result.

[0017] Preferably, the equivalent transformation is specifically: the equivalent transformed X is the product of the exponent part and the basic part Y = X / (2 ^ (2m)), and the equivalent transformation expression is: ;

[0018] where m = 0, 1, 2, 3......, the exponential part is , and the base part is Y, where Y = X / (2^(2m)).

[0019] Preferably, the equivalent transformation further includes: performing an equivalent transformation on the square root of X to be solved: , where is less than a preset value; to obtain an equivalent expression for real-time operation: ; where , Y < preset value, m = 0, 1, 2, 3......, and m is the number of iterations.

[0020] Preferably, the iterative circuit specifically includes a storage circuit, an input circuit, a judgment circuit, and a shift circuit, where: The storage circuit is used to preset and store a 16-bit integer look-up table array of size N; The input circuit is used to input the Q-format data X to be solved, set Y = X, and initialize the number of iterations m to 0; If the judgment circuit determines that Y < preset value, it calculates the look-up index value index through the shift circuit, where index = Y>>7, looks up the square root result T[index] of the base part according to the index value, and performs a left shift operation on the square root result of the base part again to obtain the final result T[index]<<m of the square root of the value to be solved. Among them, the T[index]<<m shift operation is equivalent to a multiplication operation; If the judgment circuit determines that Y >= preset value, it increments the number of iterations m by 1, i.e., m = m + 1, and performs an iterative reduction process on the corresponding Y. The reduction method is to shift Y to the right through the shift circuit, and the shift expression is Y = X>>(2m). After iteration, the value of Y decreases rapidly in multiples until Y < preset value.

[0021] In a third aspect, an embodiment of the present invention further provides a computing device, which includes a processor or calculator and a memory. The memory is used to store a computer program, and the computer program includes program instructions. The processor or calculator is configured to call the program instructions to execute the method described above.

[0022] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor or a computer, the processor or the computer executes the method as described above.

[0023] Compared with the prior art, the method and device for quickly solving the square root of fixed-point data provided by the embodiment of the present invention have at least the following beneficial effects: In the embodiment of the present invention, the value to be squared is equivalent to the product of the exponent part and the base part. The base part is reduced to a preset range by fast shifting and iteration of the value to be squared, and then obtained by looking up the table. The exponent size of the exponent part is the number of iterations, and the base of the exponent is 2. The entire calculation process only involves addition and shift operations, and the operator consumes less time, so the real-time performance of the MCU operation is better. Moreover, the capacity of the lookup table array is small and can cover a large range of 32-bit values, greatly saving memory resources, so that the accuracy of the square root calculation can be guaranteed without expanding the length of the original lookup table and maintaining the table data format of the lookup table as 16 bits, and the time consumption of the MCU calculating the square root can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The preferred implementation modes will be described below in a clear and understandable manner with reference to the accompanying drawings to further illustrate the above-mentioned characteristics, technical features, advantages and implementation methods of the present invention.

[0025] Figure 1 This is a flow chart of a method for quickly solving the square root of fixed-point data according to an embodiment of the present invention; Figure 2 A schematic diagram of a device for quickly solving square roots of fixed-point data according to an embodiment of the present invention; Figure 3 The present invention is a schematic diagram of the structure of a computing device for quickly solving the square root of fixed-point data according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.

[0027] In order to simplify the drawings, only the parts related to the invention are schematically shown in each figure, and they do not represent the actual structure of the product. In addition, in order to simplify the drawings and facilitate understanding, in some figures, only one of the parts with the same structure or function is schematically drawn or marked. In this article, "one" not only means "only one", but also means "more than one".

[0028] The following mainly takes some specific embodiments as examples to describe in detail the implementation of the technical solution of the present invention.

[0029] like Figure 1 As shown, in order to achieve the purpose of the present invention, an embodiment of the present invention provides a method for quickly solving the square root of fixed-point data, comprising the following steps: S1. Receive a calculation instruction, the instruction carrying a value X of a square root to be calculated; S2, perform equivalent transformation on the value X whose square root is to be calculated, and obtain the exponential part and the base part; S3. According to the exponential part, the number of iterations of the basic part of solving the square root result is obtained, and the square root result obtained by the basic part is left-shifted by the number of bits equal to the number of iterations to obtain the final square root result.

[0030] For fixed-point MCU chips, the numbers involved in numerical calculations are 16-bit or 32-bit integers. However, in many cases, the numbers involved in mathematical calculations are not necessarily integers. The usual way for fixed-point MCUs to handle decimals is for the programmer to determine which digit of the 16 or 32 bits the decimal point of a number is located. This is the calibration of the number.

[0031] The following is the conversion relationship between floating-point numbers and fixed-point numbers: The formula for converting a floating point number (x) to a fixed point number is:

[0032] fixed point number Convert to floating point number (x):

[0033] According to the size of the Q value, the calibration of 16-bit values ​​can be divided into Q0 to Q16 formats. For example, the Q14 format of the floating point number 0.5 can be expressed as 0.5*2^14=8192; The Q14 format of the floating point number 1.5 can be expressed as 1.5*2^14=24576; Conversely, the floating-point number corresponding to the Q14 format of the fixed-point number 2048 is 2048 / (2^14)=0.125.

[0034] When the data type is fixed, the larger the Q format, the higher the precision of the floating-point number that can be expressed, but the smaller the range. The floating-point number range that can be expressed by the Q8 format of 16-bit signed integer data is -128≤X≤127.9960938, while the floating-point number range that can be expressed by the Q15 format of 16-bit signed integer data is -1≤X≤0.9999695.

[0035] The principle of a method for quickly solving the square root of fixed-point data in an embodiment of the present invention is: Perform an equivalent transformation on the square root of X to be solved: ,in, Less than the preset value; Get the equivalent expression for real-time operation: ; in, , Y<preset value, m=0,1,2,3......, m is the number of iterations.

[0036] Taking the Q14 format as an example, for a square root value X with a relatively large input range (such as a value greater than 16 bits), X can be equivalent to the following expression: , where m=0,1,2,3...; ,in .

[0037] The purpose of the above equivalent transformation is to make the value whose square root is to be calculated equivalent to the product of the exponential part and the base part, and 32767 is the preset value.

[0038] The size of the base part Y is preset within the 16-bit value. More importantly, Y can be obtained by the shift operation of X. This makes it possible to use a 16-bit lookup table value without increasing the length of the lookup table array when solving for a larger value of √X (the value range is greater than 16 bits). The exponent part The calculation operation can be realized by shifting. The calculation process of the basis part and the exponential part only involves shifting and addition, without time-consuming operations such as division. The whole calculation process is efficient and fast.

[0039] The basis part after the equivalent transformation is obtained by iteratively reducing the square root value to be calculated. The reduction method is to shift the square root value to be calculated to the right. The shift operation is much faster than operations such as division. The number of bits shifted to the right is 2m, and 2m is replaced by a left shift operation, where m is the number of iterations required when Y iterates below a preset threshold.

[0040] The final solution of the square root is equal to the table result of the basic part. Shift left by m bits, and its final result is equivalent to the product of the exponent part and the base part. , replacing multiplication with left shift to improve the operation speed.

[0041] According to the exponent part, obtain the number of iterations for obtaining the base part of the square root result, and perform a left shift operation on the square root result of the base part with the number of bits equal to the number of iterations to obtain the final square root result, specifically as follows: Preset a 16-bit integer lookup table array of size N. Input the Q-format data X to be solved, let Y = X, and initialize the iteration count m to 0. If Y < the preset value, obtain the lookup index value index by shifting, where index = Y >> 7, look up the square root result T[index] of the base part according to the index value, and perform a left shift operation on the square root result of the base part to obtain the final result of the square root of the value to be solved T[index] << m. Among them, the T[index] << m shift operation is equivalent to a multiplication operation; If Y >= the preset value, increment the iteration count m by 1, that is, m = m + 1, and perform an iterative reduction process on the corresponding Y. The reduction method is right shift, and the shift expression is Y = X >> (2m); After iteration, the value of Y shrinks rapidly in multiples until Y < the preset value.

[0042] Taking the data in Q14 format as an example in the embodiments of the present invention, other Q formats are also applicable. The specific implementation steps are as follows: Preset a 16-bit integer lookup table array of size N (N = 2^8 + 1 = 256 + 1). Taking Q14 format as an example, the expression is , where i = {0, 1, 2,..., N - 2, N - 1}. The larger the array, the higher the accuracy; Here, 128 corresponds to the size of the table array for looking up the square root result of the base part (less than 16384). The larger the table data, the higher the accuracy of the lookup result. For example, dividing 16384 (2 to the 14th power) into 128 equal parts, then 32768 (2 to the 15th power) is divided into 256 equal parts. Here, 16383 and 32767 represent the preset values corresponding to different Q formats.

[0043] Input the Q14 format data X to be solved, let Y = X, and initialize the iteration count m to 0. If Y < 32767, obtain the lookup index value index by shifting, where index = Y > > 7; It should be noted that since the Q format exemplified here is Q14 and the pre-designed table array is 256 equally divided Q14 values from 0 to 2, theoretically, there are infinitely many square root results for Q14 from 0 to 2. Now, if the square root results are limited to 256, then Y>>7 can just obtain the corresponding index. For example, when Y = 4096, 4096>>7 = 32, and T

[32] is the square root of Y.

[0044] Look up the square root result T[index] of the basic part according to the index value; Since the values in the index table are pre-designed and there is a positive correlation between the index value and the square root value Y to be calculated, a specific shift operation on Y can just obtain the index value.

[0045] Perform a left shift operation on the square root result of the basic part to obtain the final result of the square root of the value to be calculated, which is T[index]<<m (where the shift operation T[index]<<m is equivalent to a multiplication operation); In other words, the left shift operation to obtain the final result is to use the shift operation to replace the multiplication operation in the exponent part. The shift operation T[index]<<m is equivalent to the multiplication operation, where the left shift expression is: T[index]<<m.

[0046] If Y>=32767, increment the iteration count m by 1, that is, m = m + 1, and perform an iterative reduction process on Y. The reduction method is a right shift, and the shift expression is Y = X>>(2m). Since the operation speed of the shift operation is very fast and the number of shift bits is twice the iteration count m, the 2m multiplication operation can be equivalently replaced by a faster left shift operation m<<1. That is, use the shift operation m<<1 to replace the operation of 2*m, and the two are equivalent.

[0047] After iteration, the value of Y shrinks rapidly in multiples until Y<32767.

[0048] The square root solving process of the technical solution of the embodiment of the present invention enables, in a low-cost MCU application, for the square root table look-up operation of data greater than 16 bits, the numerical type of the look-up table array does not need 32-bit integer data. Only 16-bit integer values and a limited array size are required to implement the square root operation of 32-bit fixed-point values, greatly saving memory size. At the same time, since the iteration process is mainly a shift operation, the iteration process is fast and the real-time performance is strong.

[0049] As Figure 2 shown, the embodiment of the present invention also provides a fixed-point data square root fast solving device, and the device includes: A receiving circuit for receiving a calculation instruction, where the instruction carries a value X for which the square root is to be calculated; An equivalent transformation circuit connected to the receiving circuit for performing an equivalent transformation on the value X for which the square root is to be found to obtain an exponent part and a base part; An iterative circuit connected to the equivalent transformation circuit for obtaining, according to the exponent part, the number of iterations of the base part of the square root result, and performing a left shift operation with the number of bits equal to the number of iterations on the square root result obtained from the base part to obtain the final square root result.

[0050] Preferably, the equivalent transformation is specifically: The equivalent-transformed X is the product of the exponent part and the base part Y = X / (2^(2m)), and the equivalent transformation expression is: , where m = 0, 1, 2, 3......

[0051] Among them, the exponent part is , and the base part is Y, Y = X / (2^(2m)).

[0052] Preferably, the equivalent transformation further includes: performing an equivalent transformation on the square root to be solved for X: , where is less than a preset value; Obtaining an equivalent expression for real-time operation: ; Among them, , Y < preset value, m = 0, 1, 2, 3......, m is the number of iterations.

[0053] Preferably, the iterative circuit specifically includes a storage circuit, an input circuit, a judgment circuit, and a shift circuit, where: The storage circuit is used to preset and store a 16-bit integer look-up table array of size N; The input circuit is used to input the Q-format data X to be solved, set Y = X, and initialize the number of iterations m to 0; The judgment circuit is connected to the input circuit. If it is judged that Y < preset value, then it is shifted by the shift circuit connected to the judgment circuit, and the index value index for look-up is obtained from the storage circuit connected to the shift circuit, where index = Y>>7. The square root result T[index] of the base part is obtained by looking up the table according to the index value, and a left shift operation is performed again on the square root result of the base part to obtain the final result T[index]<<m of the square root of the value to be solved. Among them, the T[index]<<m shift operation is equivalent to a multiplication operation; If the judgment circuit determines that Y>=preset value, the number of iterations m is added by 1, that is, m=m+1, and the corresponding Y is iteratively reduced. The reduction method is that the shift circuit shifts right, and the shift expression is Y=X>>(2m). After iteration, the Y value is rapidly reduced by multiples until Y<preset value.

[0054] In the device embodiment, its implementation method is the same as the method implementation method, and will not be described in detail here.

[0055] Compared with the prior art, the method and device for quickly solving the square root of fixed-point data provided by the embodiment of the present invention have at least the following beneficial effects: In the embodiment of the present invention, the value to be squared is equivalent to the product of the exponent part and the base part. The base part is reduced to a preset range by fast shifting and iteration of the value to be squared, and then obtained by table lookup. The exponent size of the exponent part is the number of iterations, and the base of the exponent is 2. The entire calculation process only involves addition and shift operations, and the operator consumes less time, so the real-time performance of the MCU operation is better. Moreover, the capacity of the lookup table array is small and can cover a large range of 32-bit values, greatly saving memory resources, so that the accuracy of the square root calculation can be guaranteed without expanding the length of the original lookup table and maintaining the table data format of the lookup table as 16 bits, and the time consumption of the MCU calculating the square root can be reduced.

[0056] In a third aspect, an embodiment of the present invention further provides a computing device, which includes a processor or a calculator and a memory, wherein the memory is used to store a computer program, and the computer program includes program instructions, and the processor or calculator is configured to call the program instructions to execute the method as described above.

[0057] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor or a computer, the processor or the computer executes the method as described above.

[0058] like Figure 3As shown, a computing device provided in an embodiment of the present application, the computing device 1000 includes a processor or a calculator (not shown in the figure) 1001 and a memory 1002, and the processor or the calculator 1001 and the memory 1002 can be interconnected through a communication bus 1003. The communication bus 1003 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus 1003 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the memory 1002 is used to store a computer program, and the computer program includes program instructions. The processor 1001 is configured to call the program instructions, and the above program includes a method for executing some or all of the steps in the aforementioned method.

[0059] The processor 1001 may be a general purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the above program.

[0060] The memory 1002 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may exist independently and be connected to the processor via a bus. The memory may also be integrated with the processor.

[0061] The electronic device 1000 may further include a communication module 1004 and a display 1005. The communication module 1004 may be connected to the optical tracking device for communication. The communication module 1004 may be a wireless communication module (eg, a WiFi module, a Bluetooth module, etc.) or a wired communication module.

[0062] In addition, the electronic device 1000 may also include common components such as a communication interface (eg, a USB interface, a microphone interface, etc.), an antenna, etc., which will not be described in detail here.

[0063] An embodiment of the present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any method for quickly solving the square root of fixed-point data as recorded in the above method embodiments.

[0064] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0065] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0066] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0067] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0068] In addition, the functional units in the various embodiments of the application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software program modules.

[0069] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, disk or optical disk and other media that can store program codes.

[0070] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which can include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.

[0071] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

[0072] It should be noted that the above embodiments can be freely combined as needed. The above are only preferred embodiments of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A method for quickly solving the square root of fixed-point data, applied to a processor or a calculator, characterized in that: The method comprises: Receive a calculation instruction, the instruction carrying a value X of a square root to be calculated; Perform an equivalent transformation on the value X whose square root is to be calculated to obtain the exponential part and the base part; According to the exponential part, the number of iterations of the basic part for solving the square root result is obtained, and the square root result obtained by the basic part is left-shifted by the number of bits equal to the number of iterations to obtain the final square root result.

2. The method for quickly solving the square root of fixed-point data as claimed in claim 1, characterized in that: The equivalent transformation is: The equivalent transformed X is the product of the exponential part and the base part Y=X / (2^(2m)). The equivalent transformation expression is: ； Where m=0,1,2,3..., the exponent part is , the basic part is Y, Y=X / (2^(2m)).

3. The method for quickly solving the square root of fixed-point data as claimed in claim 2, characterized in that: The method further includes: performing an equivalent transformation on the square root to be solved of X: ,in, Less than the preset value; Get the equivalent expression for real-time operation: ； in, , Y<preset value, m=0,1,2,3......, m is the number of iterations.

4. The method for quickly solving the square root of fixed-point data as claimed in claim 3, characterized in that: According to the exponential part, the number of iterations of the basic part of solving the square root result is obtained, and the square root result obtained by the basic part is left-shifted by the number of bits equal to the number of iterations to obtain the final square root result: A 16-bit integer lookup table array of size N is preset; Input the Q-format data X to be solved, set Y=X, and initialize the number of iterations m to 0; If Y < the preset value, the index value index for table lookup is obtained by shifting, where index = Y >> 7. The square root result T[index] of the basic part is obtained by looking up the table according to the index value. The left shift operation is performed on the square root result of the basic part to obtain the final result of the square root of the value to be calculated, which is T[index] << m. Among them, the shift operation of T[index] << m is equivalent to a multiplication operation; If Y>=preset value, add 1 to the number of iterations m, that is, m=m+1, and iterate and reduce the corresponding Y by shifting to the right. The shift expression is Y=X>>(2m); After iteration, the Y value decreases rapidly by multiples until Y < the preset value.

5. A device for quickly solving square roots of fixed-point data, characterized in that: The device comprises: A receiving circuit, used for receiving a calculation instruction, wherein the instruction carries a value X of a square root to be calculated; An equivalent transformation circuit, connected to the receiving circuit, for performing an equivalent transformation on the value X whose square root is to be calculated, to obtain an exponential part and a base part; The iterative circuit is connected to the equivalent transformation circuit and is used to obtain the number of iterations of the basic part of solving the square root result according to the exponential part, and perform a left shift operation on the square root result obtained by the basic part with a number of bits equal to the number of iterations to obtain the final square root result.

6. The device for quickly solving the square root of fixed-point data as claimed in claim 5, characterized in that: The equivalent transformation is specifically: The equivalent transformed X is the product of the exponential part and the base part Y=X / (2^(2m)). The equivalent transformation expression is: ； Among them, m=0,1,2,3..., the exponential part is , the basic part is Y, Y=X / (2^(2m)).

7. The device for quickly solving the square root of fixed-point data as claimed in claim 6, characterized in that: The equivalent transformation also includes: performing an equivalent transformation on the square root of X to be solved: ,in, Less than the preset value; Get the equivalent expression for real-time operation: ； in, , Y<preset value, m=0,1,2,3......, m is the number of iterations.

8. The device for quickly solving the square root of fixed-point data as claimed in claim 7, characterized in that: The iterative circuit specifically includes a storage circuit, an input circuit, a judgment circuit, and a shift circuit, wherein: The storage circuit is used to pre-set and store a 16-bit integer lookup table array of size N; The input circuit is used to input the Q format data X to be solved, set Y=X, and initialize the number of iterations m to 0; The judgment circuit is connected to the input circuit. If it is judged that Y < the preset value, then it is shifted by the shift circuit connected to the judgment circuit, and the index value index for table lookup is obtained from the storage circuit connected to the shift circuit, where index = Y>>7. According to the index value, the square root result T[index] of the basic part is obtained by table lookup, and the square root result of the basic part is left-shifted again to obtain the final result of the square root of the value to be obtained T[index]<<m. Among them, the shift operation of T[index]<<m is equivalent to a multiplication operation; If the judgment circuit determines that Y>=preset value, the number of iterations m is added by 1, that is, m=m+1, and the corresponding Y is iteratively reduced. The reduction method is that the shift circuit shifts right, and the shift expression is Y=X>>(2m). After iteration, the Y value is rapidly reduced by multiples until Y<preset value.

9. A computing device, characterized in that The computing device comprises a processor or a calculator and a memory, wherein the memory is used to store a computer program, wherein the computer program comprises program instructions, and the processor or the calculator is configured to call the program instructions to execute the method according to any one of claims 1 to 4.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor or a computer, the processor or the computer executes the method according to any one of claims 1 to 4.

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