Driving substrate, display panel, display module and display device

Abstract

The invention provides a driving substrate, a display panel, a display module and a display device. The display panel comprises a first driving module; a second driving module; the first driving lines are connected with the first driving module and are electrically insulated from the second driving module, and one first driving line surrounds the two sides, in the second direction, of one row of pixel circuit units in the first direction; the second driving lines are connected with the second driving module and are electrically insulated from the first driving module, and one second driving line surrounds the two sides, in the second direction, of one row of pixel circuit units in the first direction; wherein a partial line of one first driving line and a partial line of one second driving line extend between adjacent rows of pixel circuit units; for at least part of two adjacent pixel circuit units in any row, one pixel circuit unit is connected with the first driving line, and the other pixel circuit unit is connected with the second driving line. The uniformity of a display picture is improved; and the frame width is reduced.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a driving substrate, a display panel, a display module and a display device. Background Art

[0002] The display panel includes an organic light emitting diode (OLED) display substrate. The structure of the display panel includes a substrate layer, a pixel circuit unit located on the substrate layer, and a light emitting structure, wherein the pixel circuit unit is used to drive the light emitting structure to emit light. The pixel circuit unit is arranged in an array, and the light emitting structure is arranged in an array. Summary of the invention

[0003] The technical problem to be solved by the present invention is how to improve the uniformity of the display image and reduce the border width.

[0004] In order to solve the above technical problems, the present invention provides a driving substrate, comprising: a pixel circuit, the pixel circuit comprising a plurality of pixel circuit units arranged in an array along a first direction and a second direction, the first direction and the second direction intersecting; a first driving module, located on one side of the pixel circuit along the first direction; a second driving module, located on the other side of the pixel circuit along the first direction; a first driving line, connected to the first driving module and electrically insulated from the second driving module, one of the first driving lines surrounds two sides of a row of the pixel circuit units in the first direction along the second direction; a second driving line, connected to the second driving module and electrically insulated from the first driving module, one of the second driving lines surrounds two sides of a row of the pixel circuit units in the first direction along the second direction; wherein a partial line of the first driving line and a partial line of the second driving line extend between the pixel circuit units in adjacent rows; for at least partially adjacent two pixel circuit units in any row, one of the pixel circuit units is connected to the first driving line, and the other of the pixel circuit units is connected to the second driving line.

[0005] Optionally, for any two adjacent pixel circuit units in any row, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line.

[0006] Optionally, for two adjacent pixel circuit units in the first group of any row, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line; for two adjacent pixel circuit units in the second group of any row, two adjacent pixel circuit units are connected to the first driving line; for two adjacent pixel circuit units in the third group of any row, two adjacent pixel circuit units are connected to the second driving line.

[0007] Optionally, for two pixel circuit units that are at least partially adjacent to each other in the second direction, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line.

[0008] Optionally, a plurality of the first driving lines are arranged along the second direction, and a plurality of the second driving lines are arranged along the second direction; wherein, one row of the pixel circuit units is spaced between adjacent first driving lines; and one row of the pixel circuit units is spaced between adjacent second driving lines.

[0009] Optionally, the multiple first driving lines are respectively the first first driving line to the Mth first driving line arranged in sequence along the second direction; the multiple second driving lines are respectively the first second driving line to the Mth second driving line arranged in sequence along the second direction; M is an integer greater than or equal to 2; wherein, any mth first driving line and mth second driving line surround the pixel circuit unit in the same row, and m is an integer greater than or equal to 1 and less than or equal to M.

[0010] Optionally, the multiple first driving lines are respectively the first first driving line to the Mth first driving line arranged in sequence along the second direction; the multiple second driving lines are respectively the first second driving line to the Mth second driving line arranged in sequence along the second direction; M is an integer greater than or equal to 2; wherein, a row of the pixel circuit units surrounded by any mth first driving line and a row of the pixel circuit units surrounded by the mth second driving line are in adjacent rows.

[0011] Optionally, for any row of the pixel circuit units, a part of the pixel circuit units are connected to the first driving line located on the first side of the pixel circuit unit along the second direction, another part of the pixel circuit units are connected to the first driving line located on the second side of the pixel circuit unit along the second direction, another part of the pixel circuit units are connected to the second driving line located on the first side of the pixel circuit unit, and another part of the pixel circuit units are connected to the second driving line located on the second side of the pixel circuit unit.

[0012] Optionally, any row of the pixel circuit units are connected to the first driving line and the second driving line located on the first side of the pixel circuit units along the second direction, a part of the pixel circuit units are connected to the first driving line, and another part of the pixel circuit units are connected to the second driving line; or, any row of the pixel circuit units are connected to the first driving line and the second driving line located on the second side of the pixel circuit units along the second direction, a part of the pixel circuit units are connected to the first driving line, and another part of the pixel circuit units are connected to the second driving line.

[0013] Optionally, for the pixel circuit units in the same row, a part of the pixel circuit units located in the first area is connected to the first driving line located on one side of the pixel circuit unit along the second direction, another part of the pixel circuit units located in the first area is connected to the second driving line located on one side of the pixel circuit unit along the second direction, a part of the pixel circuit units located in the second area is connected to the first driving line located on the other side of the pixel circuit unit along the second direction, and another part of the pixel circuit units located in the second area is connected to the second driving line located on the other side of the pixel circuit unit.

[0014] Optionally, the pixel circuit unit in the 2k-1th row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, and the pixel circuit unit in the 2kth row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, k is an integer greater than or equal to 1 and less than or equal to M, j is an integer greater than or equal to 1 and less than or equal to M and j is not equal to k.

[0015] Optionally, for a row of pixel circuit units between any s-th first driving line and the s+1-th first driving line, a first portion of the pixel circuit units are electrically connected to the s-th first driving line, a second portion of the pixel circuit units are electrically connected to the s-th second driving line, a third portion of the pixel circuit units are electrically connected to the s+1-th first driving line, and a fourth portion of the pixel circuit units are electrically connected to the s+1-th second driving line, where s is an integer greater than or equal to 1 and less than or equal to M-1.

[0016] Optionally, it also includes: a plurality of scan lines arranged along the first direction and extending along the second direction; wherein the scan lines in the odd columns are electrically connected to part of the pixel circuit units in any 2k-1 row and are electrically insulated from the pixel circuit units in any 2k row, and the scan lines in the even columns are electrically connected to part of the pixel circuit units in any 2k row and are electrically insulated from the pixel circuit units in any 2k-1 row.

[0017] Optionally, the multiple scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N being an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2k-1th row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row; when n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2kth row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the nth column of any 2k-1th row.

[0018] Optionally, it also includes: a plurality of scan lines arranged along the first direction and extending along the second direction; wherein the scan lines in the odd columns are electrically connected to any portion of the pixel circuit units in the 2kth row and are electrically insulated from any pixel circuit units in the 2k-1th row, and the scan lines in the even columns are electrically connected to any portion of the pixel circuit units in the 2k-1th row and are electrically insulated from any pixel circuit units in the 2kth row.

[0019] Optionally, the multiple scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N being an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2kth row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row; when n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the n-1th column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2kth row.

[0020] Optionally, it further includes: a plurality of scan lines arranged along the first direction and extending along the second direction; each of the scan lines is connected to one of the pixel circuit units in each row.

[0021] Optionally, the first driving line is in a closed ring structure; or, the first driving line includes a first sub-line and a second sub-line, the first sub-line and the second sub-line are connected toward the end of the first driving module, and the first sub-line and the second sub-line are disconnected toward the end of the second driving module, the first sub-line is located on one side of a row of pixel circuit units surrounded by the first driving line along the second direction, and the second sub-line is located on the other side of a row of pixel circuit units surrounded by the first driving line along the second direction.

[0022] Optionally, the second driving line is in a closed ring structure; or, the second driving line includes a third sub-line and a fourth sub-line, the third sub-line and the fourth sub-line are connected toward the end of the second driving module, and the third sub-line and the fourth sub-line are disconnected toward the end of the first driving module, the third sub-line is located on one side of a row of pixel circuit units surrounded by the second driving line along the second direction, and the fourth sub-line is located on the other side of a row of pixel circuit units surrounded by the second driving line along the second direction.

[0023] The present application also provides a display panel, comprising the driving substrate of the present application.

[0024] The present application also provides a display module, including the display panel of the present application.

[0025] The present application also provides a display device, comprising the display module of the present application.

[0026] The technical solution of the present invention has the following technical effects:

[0027] The driving substrate, display panel, display module and display device provided by the technical solution of the present invention, for at least partially adjacent two pixel circuit units in any row, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line. When one pixel circuit unit is connected to the first driving module through the proximal end of the first driving line, the other pixel circuit unit is connected to the second driving module through the distal end of the second driving line. When one pixel circuit unit is connected to the first driving module through the distal end of the first driving line, the other pixel circuit unit is connected to the second driving module through the proximal end of the second driving line. In this way, the charging rate of the first driving line to the pixel circuit unit and the charging rate of the second driving line to the pixel circuit unit compensate each other, thereby reducing the probability of horizontal stripes appearing on the edge display screen driven by the driving substrate and improving the uniformity of the display screen. Secondly, one of the first driving lines surrounds two sides of a row of the pixel circuit units in the first direction along the second direction and is connected to the first driving module, and one of the second driving lines surrounds two sides of a row of the pixel circuit units in the first direction along the second direction and is connected to the second driving module, which is beneficial to reducing the number of shift register units in the first driving module and the number of shift register units in the second driving module, so that the width of the border occupied by the first driving module is reduced and the width of the border occupied by the second driving module is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 is a schematic diagram of a driving substrate in an embodiment of the present application;

[0030] Figure 2 is a schematic diagram of a driving substrate in another embodiment of the present application;

[0031] Figure 3 for Figure 1 and Figure 2 A schematic diagram of a screen driven by a driving substrate;

[0032] Figure 4 is a schematic diagram of a driving substrate in another embodiment of the present application;

[0033] Figure 5 is a schematic diagram of a driving substrate in another embodiment of the present application;

[0034] Figure 6 for Figure 4 and Figure 5 A schematic diagram of a screen driven by a driving substrate;

[0035] Figure 7 FIG. 4 is a schematic diagram of a driving substrate in another embodiment of the present application.

[0036] Figure 8 FIG. 4 is a schematic diagram of a driving substrate in another embodiment of the present application. DETAILED DESCRIPTION

[0037] With the development of driving methods and manufacturing processes, display panels have greatly improved production costs and picture quality. With the continuous improvement of product specifications, the size of the left and right borders of the display panel needs to be further optimized. In order to reduce the size of the left and right borders of the display panel, the left and right double-sided drive will be changed to a single-sided drive method to save the border size. However, after switching to single-sided drive, regardless of whether it is an odd-numbered row of pixels or an even-numbered row of pixels, the pixels in each row are connected to the driving module through the gate line, and the distance from the pixel to the driving module along the row direction gradually increases or decreases. The charging rate of the pixel at the near end of the gate line distance driving module is inconsistent with the charging rate of the pixel at the far end of the gate line distance driving module. The pixel connected to the near end of the gate line distance driving module is bright, and the pixel connected to the far end of the gate line distance driving module is dark, thus causing the problem of horizontal stripes on the edge display screen, affecting the display effect.

[0038] On this basis, the present application provides a driving substrate, a display panel, a display module and a display device, which improve the uniformity of the display image and reduce the border width.

[0039] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0041] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0042] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0043] Example 1

[0044] An embodiment of the present invention provides a driving substrate, referring to Figure 1 and Figure 2 ,include:

[0045] A pixel circuit, the pixel circuit comprising a plurality of pixel circuit units 100 arranged in an array along a first direction X and a second direction Y, wherein the first direction X and the second direction Y intersect;

[0046] A first driving module (not shown), located at one side of the pixel circuit along the first direction X;

[0047] A second driving module (not shown), located at the other side of the pixel circuit along the first direction X;

[0048] a first driving line A connected to the first driving module and electrically insulated from the second driving module, wherein the first driving line A surrounds two sides of a row of pixel circuit units 100 in the first direction X along the second direction Y;

[0049] A second driving line B, connected to the second driving module and electrically insulated from the first driving module, wherein one second driving line B surrounds two sides of a row of pixel circuit units in the first direction X along the second direction Y;

[0050] Among them, a partial line of the first driving line A and a partial line of the second driving line B extend between the pixel circuit units 100 in adjacent rows; for two pixel circuit units 100 that are at least partially adjacent in any row, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0051] In this embodiment, for at least partially adjacent two pixel circuit units 100 in any row, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B. When one pixel circuit unit 100 is connected to the first driving module through the proximal end of the first driving line A, the other pixel circuit unit 100 is connected to the second driving module through the distal end of the second driving line B. When one pixel circuit unit 100 is connected to the first driving module through the distal end of the first driving line A, the other pixel circuit unit 100 is connected to the second driving module through the proximal end of the second driving line B. In this way, the charging rate of the first driving line A to the pixel circuit unit 100 and the charging rate of the second driving line B to the pixel circuit unit 100 compensate each other, thereby reducing the probability of horizontal stripes appearing on the edge display screen driven by the driving substrate and improving the uniformity of the display screen. Secondly, one of the first driving lines A surrounds two sides of a row of the pixel circuit units 100 in the first direction X along the second direction Y and is connected to the first driving module, and one of the second driving lines B surrounds two sides of a row of the pixel circuit units in the first direction X along the second direction Y and is connected to the second driving module, which is beneficial to reducing the number of shift register units in the first driving module and the number of shift register units in the second driving module, so that the width of the border occupied by the first driving module is reduced, and the width of the border occupied by the second driving module is reduced.

[0052] The driving substrate includes a main area and an edge area surrounding the main area. The pixel circuit is located in the main area. The first driving module is located in the edge area on one side of the main area along the first direction X, and the second driving module is located in the edge area on the other side of the main area along the first direction X.

[0053] The first driving module includes a plurality of cascaded first shift register units, each of which is connected to a first driving line A in a one-to-one correspondence. The second driving module includes a plurality of cascaded second shift register units, each of which is connected to a second driving line B in a one-to-one correspondence.

[0054] In one embodiment, reference Figure 1 and Figure 2 , the first driving line A is a closed ring structure.

[0055] In another embodiment, the first driving line includes a first sub-line and a second sub-line, the first sub-line and the second sub-line are connected toward the end of the first driving module, the first sub-line and the second sub-line are disconnected toward the end of the second driving module, the first sub-line is located on one side of a row of pixel circuit units surrounded by the first driving line along the second direction, and the second sub-line is located on the other side of the row of pixel circuit units surrounded by the first driving line along the second direction.

[0056] In one embodiment, reference Figure 1 and Figure 2 , the second driving line is a closed ring structure.

[0057] In another embodiment, the second driving line includes a third sub-line and a fourth sub-line, the third sub-line and the fourth sub-line are connected toward the end of the second driving module, the third sub-line and the fourth sub-line are disconnected toward the end of the first driving module, the third sub-line is located on one side of a row of pixel circuit units surrounded by the second driving line along the second direction, and the fourth sub-line is located on the other side of a row of pixel circuit units surrounded by the second driving line along the second direction.

[0058] In one embodiment, reference Figure 1 and Figure 2 For any two adjacent pixel circuit units in any row, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0059] In one embodiment, reference Figure 1 and Figure 2 For two pixel circuit units 100 at least partially adjacent to each other in the second direction Y, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B. Exemplarily, for two pixel circuit units 100 arbitrarily adjacent to each other in the second direction Y, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0060] In one embodiment, reference Figure 1 and Figure 2 , multiple first driving lines A are arranged along the second direction Y, and multiple second driving lines B are arranged along the second direction Y; wherein, one row of the pixel circuit units 100 is spaced between adjacent first driving lines A; and one row of the pixel circuit units 100 is spaced between adjacent second driving lines B.

[0061] In one embodiment, reference Figure 1 and Figure 2 , the multiple first driving lines A are respectively the first first driving line to the Mth first driving line arranged in sequence along the second direction Y; the multiple second driving lines are respectively the first second driving line to the Mth second driving line arranged in sequence along the second direction; M is an integer greater than or equal to 2; wherein, any mth first driving line and mth second driving line surround the pixel circuit unit in the same row, and m is an integer greater than or equal to 1 and less than or equal to M.

[0062] It should be noted that the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in odd rows, or the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in even rows.

[0063] refer to Figure 1 , the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in an even row, and M is equal to 2 as an example, the plurality of the first driving lines A are respectively the first first driving line A1 and the second first driving line A2, the plurality of the second driving lines B are respectively the first second driving line B1 and the second second driving line B2, the first first driving line A1 and the first second driving line B1 surround the pixel circuit units 100 in the same row, exemplarily, the first first driving line A1 and the first second driving line B1 surround the pixel circuit units 100 in the second row, the second first driving line A2 and the second second driving line B2 surround the pixel circuit units 100 in the same row, and exemplarily, the second first driving line A2 and the second second driving line B2 surround the pixel circuit units 100 in the fourth row. Reference Figure 2 , the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in odd rows, and taking M equal to 3 as an example, the plurality of first driving lines A are respectively the first first driving line A1, the second first driving line A2 and the third first driving line A3, the plurality of second driving lines B are respectively the first second driving line B1, the second second driving line B2 and the third second driving line B3, the first first driving line A1 and the first second driving line B1 surround the pixel circuit units 100 in the same row, exemplarily, the first first driving line A1 and the first second driving line B1 surround the pixel circuit units 100 in the first row, the second first driving line A2 and the second second driving line B2 surround the pixel circuit units 100 in the same row, exemplarily, the second first driving line A2 and the second second driving line B2 surround the pixel circuit units 100 in the third row, the third first driving line A3 and the third second driving line B3 surround the pixel circuit units 100 in the same row, and exemplarily, the third first driving line A3 and the third second driving line B3 surround the pixel circuit units 100 in the fifth row.

[0064] In one embodiment, for any row of pixel circuit units 100, a portion of the pixel circuit units 100 is connected to the first driving line A located at the first side of the pixel circuit unit 100 along the second direction Y, another portion of the pixel circuit units 100 is connected to the first driving line A located at the second side of the pixel circuit unit 100 along the second direction Y, another portion of the pixel circuit units 100 is connected to the second driving line B located at the first side of the pixel circuit unit 100, and another portion of the pixel circuit units 100 is connected to the second driving line B located at the second side of the pixel circuit unit 100. Figure 2, for any pixel circuit unit 100 in the 2k1-1th row, the pixel circuit unit 100 in the first column of the 2k1-1th row, the pixel circuit unit 100 in the fifth column of the 2k1-1th row, and the pixel circuit unit 100 in the ninth column of the 2k1-1th row are connected to the k1th second driving line B located on the second side of the pixel circuit unit 100 along the second direction Y, and the pixel circuit unit 100 in the second column of the 2k1-1th row, the pixel circuit unit 100 in the sixth column of the 2k1-1th row, and the pixel circuit unit 100 in the tenth column of the 2k1-1th row are connected to the pixel circuit unit 100 along the second direction Y. The pixel circuit unit 100 in the third column of the 2k1-1th row, the pixel circuit unit 100 in the seventh column of the 2k1-1th row, and the pixel circuit unit 100 in the eleventh column of the 2k1-1th row are connected to the k1th second driving line B located on the first side of the pixel circuit unit 100 along the second direction Y, and the pixel circuit unit 100 in the fourth column of the 2k1-1th row, the pixel circuit unit 100 in the eighth column of the 2k1-1th row, and the pixel circuit unit 100 in the twelfth column of the 2k1-1th row are connected to the k1th second driving line B located on the first side of the pixel circuit unit 100 along the second direction Y. for any pixel circuit unit 100 in the 2k1th row, the pixel circuit unit 100 in the first column of the 2k1th row, the pixel circuit unit 100 in the fifth column of the 2k1th row, and the pixel circuit unit 100 in the ninth column of the 2k1th row are located on the first side of the pixel circuit unit 100 along the second direction Y connected to the k1th first driving line A, and the pixel circuit unit 100 in the second column of the 2k1th row, the pixel circuit unit 100 in the sixth column of the 2k1th row, and the pixel circuit unit 100 in the tenth column of the 2k1th row are located on the first side of the pixel circuit unit 100 along the second direction Y connected to the k1th first driving line A. The pixel circuit units 100 in the third column of the 2k1th row, the pixel circuit units 100 in the seventh column of the 2k1th row, and the pixel circuit units 100 in the eleventh column of the 2k1th row are connected to the k1+1th first driving line A located at the second side of the pixel circuit units 100 along the second direction Y, and the pixel circuit units 100 in the fourth column of the 2k1th row, the pixel circuit units 100 in the eighth column of the 2k1th row, and the pixel circuit units 100 in the twelfth column of the 2k1th row are connected to the k1+1th second driving line B located at the second side of the pixel circuit units 100 along the second direction Y. Wherein, k1 is an integer greater than or equal to 1 and less than or equal to M-1.

[0065] In another embodiment, any one row of the pixel circuit units is connected to the first drive line and the second drive line located on the first side of the pixel circuit unit along the second direction, a part of the pixel circuit units is connected to the first drive line, and another part of the pixel circuit units is connected to the second drive line; or, any one row of the pixel circuit units is connected to the first drive line and the second drive line located on the second side of the pixel circuit unit along the second direction, a part of the pixel circuit units is connected to the first drive line, and another part of the pixel circuit units is connected to the second drive line. Figure 1 , the pixel circuit units 100 in any row are connected to the first driving line A and the second driving line A on the second side of the pixel circuit units 100 along the second direction Y, a part of the pixel circuit units 100 are connected to the first driving line A, and another part of the pixel circuit units 100 are connected to the second driving line B.

[0066] In one embodiment, the pixel circuit unit in the 2k-1th row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, and the pixel circuit unit in the 2kth row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, k is an integer greater than or equal to 1 and less than or equal to M, j is an integer greater than or equal to 1 and less than or equal to M, and j is not equal to k. Reference Figure 1 The pixel circuit units 100 in the first row are electrically connected to the first first driving line A and the first second driving line B and are electrically insulated from the second first driving line A and the second second driving line B, the pixel circuit units 100 in the second row are electrically connected to the first first driving line A and the first second driving line B and are electrically insulated from the second first driving line A and the second second driving line B, the pixel circuit units 100 in the third row are electrically connected to the second first driving line A and the second second driving line B and are electrically insulated from the first first driving line A and the first second driving line B, and the pixel circuit units 100 in the fourth row are electrically connected to the second first driving line A and the second second driving line B and are electrically insulated from the first first driving line A and the first second driving line B.

[0067] In one embodiment, for a row of pixel circuit units between any sth first driving line and s+1th first driving line, a first portion of the pixel circuit units is electrically connected to the sth first driving line, a second portion of the pixel circuit units is electrically connected to the sth second driving line, a third portion of the pixel circuit units is electrically connected to the s+1th first driving line, and a fourth portion of the pixel circuit units is electrically connected to the s+1th second driving line, where s is an integer greater than or equal to 1 and less than or equal to M-1. Reference Figure 2, for the second row of pixel circuit units 100 between the first first driving line A1 and the second first driving line A2, the pixel circuit units 100 in the second row and the first column, the pixel circuit units 100 in the second row and the fifth column, and the pixel circuit units 100 in the second row and the ninth column are electrically connected to the first first driving line A1, the pixel circuit units 100 in the second row and the second column, the pixel circuit units 100 in the second row and the sixth column, and the pixel circuit units 100 in the second row and the tenth column are electrically connected to the first second driving line B1, the pixel circuit units 100 in the second row and the third column, the pixel circuit units 100 in the second row and the seventh column, and the pixel circuit units 100 in the second row and the eleventh column are electrically connected to the second first driving line A2, and the pixel circuit units 100 in the second row and the fourth column, the pixel circuit units 100 in the second row and the eighth column, and the pixel circuit units 100 in the second row and the twelfth column are electrically connected to the second second driving line B2 ; For the fourth row of pixel circuit units 100 between the second first driving line A1 and the third first driving line A2, the pixel circuit units 100 in the fourth row and the first column, the pixel circuit units 100 in the fourth row and the fifth column, and the pixel circuit units 100 in the fourth row and the ninth column are electrically connected to the second first driving line A1, the pixel circuit units 100 in the fourth row and the second column, the pixel circuit units 100 in the fourth row and the sixth column, and the pixel circuit units 100 in the fourth row and the tenth column are electrically connected to the second second driving line B1, the pixel circuit units 100 in the fourth row and the third column, the pixel circuit units 100 in the fourth row and the seventh column, and the pixel circuit units 100 in the fourth row and the eleventh column are electrically connected to the third first driving line A2, and the pixel circuit units 100 in the fourth row and the fourth column, the pixel circuit units 100 in the fourth row and the eighth column, and the pixel circuit units 100 in the fourth row and the twelfth column are electrically connected to the third second driving line B2.

[0068] In one embodiment, reference Figure 1 and Figure 2 , further comprising: a plurality of scan lines arranged along the first direction X and extending along the second direction Y; wherein the scan lines in odd columns are electrically connected to part of the pixel circuit units in any 2k-1 row and are electrically insulated from the pixel circuit units in any 2k row, and the scan lines in even columns are electrically connected to part of the pixel circuit units in any 2k row and are electrically insulated from the pixel circuit units in any 2k-1 row. In one embodiment, reference Figure 1 and Figure 2, the plurality of scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N is an integer greater than or equal to 3, the first scan line is electrically connected to the pixel circuit unit in the first column of any 2k-1th row, when n is an even number greater than or equal to 2 and less than N, any nth scan line is connected to the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the n-1th column of any 2kth row; when n is an odd number greater than 1 and less than N, any nth scan line is connected to the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the n-1th column of any 2k-1th row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row.

[0069] Select reference Figure 1A detailed description is given, N takes 13 as an example, the first scan line D1 electrically connects the pixel circuit unit 100 in the first row and the first column and the pixel circuit unit 100 in the third row and the first column and is electrically insulated from the pixel circuit unit 100 in the second row and the pixel circuit unit 100 in the fourth row, the thirteenth scan line D3 electrically connects the pixel circuit unit 100 in the first row and the twelfth column and the pixel circuit unit 100 in the third row and the twelfth column and is electrically insulated from the pixel circuit unit 100 in the second row and the pixel circuit unit 100 in the fourth row, the second scan line D2 electrically connects the pixel circuit unit 100 in the second row and the first column, the pixel circuit unit 100 in the second row and the second column, the pixel circuit unit 100 in the fourth row and the first column and the pixel circuit unit 100 in the fourth row and the second column, The second scan line D2 is electrically insulated from the pixel circuit units 100 in the first row and the pixel circuit units 100 in the third row, the third scan line D3 is electrically connected to the pixel circuit units 100 in the first row and the second column, the pixel circuit units 100 in the first row and the third column, the pixel circuit units 100 in the third row and the second column, and the third scan line D3 is electrically insulated from the pixel circuit units 100 in the second row and the pixel circuit units 100 in the fourth row, the fourth scan line D4 is electrically connected to the pixel circuit units 100 in the second row and the third column, the pixel circuit units 100 in the second row and the fourth column, and the fourth scan line D4 is electrically connected to the pixel circuit units 100 in the first row and the third column, the pixel circuit units 100 in the second row and the fourth column, and the fourth scan line D4 is electrically connected to the pixel circuit units 100 in the first row and the third column, the pixel circuit units 100 in the second row and the fourth column, and the fourth scan line D4 is electrically connected to the pixel circuit units 100 in the first row and the third column, the pixel circuit units 100 in the second row and the fourth column, and the fourth scan line D4 is electrically connected to the pixel circuit units 100 in the first row and the third column, the pixel circuit units 100 in the first ... third column, the pixel circuit units 100 in the third row and the The pixel circuit unit 100 is electrically insulated from the pixel circuit unit 100 in the third row, the fifth scan line D5 is electrically connected to the pixel circuit unit 100 in the first row and the fourth column, the pixel circuit unit 100 in the first row and the fifth column, the pixel circuit unit 100 in the third row and the fourth column, and the fifth scan line D5 is electrically insulated from the pixel circuit unit 100 in the second row and the pixel circuit unit 100 in the fourth row, the sixth scan line D6 is electrically connected to the pixel circuit unit 100 in the second row and the fifth column, the pixel circuit unit 100 in the second row and the sixth column, the pixel circuit unit 100 in the fourth row and the fifth column, and the sixth scan line D6 is electrically connected to the pixel circuit unit 100 in the first row and the third row The pixel circuit units 100 of the first row and the sixth column are electrically insulated, the seventh scan line D7 is electrically connected to the pixel circuit units 100 of the first row and the sixth column, the pixel circuit units 100 of the first row and the seventh column, the pixel circuit units 100 of the third row and the seventh column, and the seventh scan line D7 is electrically insulated from the pixel circuit units 100 of the second row and the pixel circuit units 100 of the fourth row, the eighth scan line D8 is electrically connected to the pixel circuit units 100 of the second row and the seventh column, the pixel circuit units 100 of the second row and the eighth column, the pixel circuit units 100 of the fourth row and the seventh column, and the eighth scan line D8 is electrically insulated from the pixel circuit units 100 of the first row and the pixel circuit units 100 of the third row,The ninth scan line D9 electrically connects the pixel circuit unit 100 in the first row and the eighth column, the pixel circuit unit 100 in the first row and the ninth column, the pixel circuit unit 100 in the third row and the eighth column, and the ninth scan line D9 is electrically insulated from the pixel circuit unit 100 in the second row and the pixel circuit unit 100 in the fourth row. The tenth scan line D10 electrically connects the pixel circuit unit 100 in the second row and the ninth column, the pixel circuit unit 100 in the second row and the tenth column, the pixel circuit unit 100 in the fourth row and the ninth column, and the tenth scan line D10 is electrically insulated from the pixel circuit unit 100 in the first row and the pixel circuit unit 100 in the third row. The eleventh scan line D11 electrically connects the pixel circuit unit 100 in the first row and the tenth column, the pixel circuit unit 100 in the first row and the eleventh column, the pixel circuit unit 100 in the third row and the ninth column, and the ninth scan line D9 is electrically insulated from the pixel circuit unit 100 in the second row and the fourth row. The pixel circuit unit 100 in the third row and the tenth column and the pixel circuit unit 100 in the third row and the eleventh column, and the eleventh scanning line D11 is electrically insulated from the pixel circuit unit 100 in the second row and the pixel circuit unit 100 in the fourth row, the twelfth scanning line D12 is electrically connected to the pixel circuit unit 100 in the second row and the eleventh column, the pixel circuit unit 100 in the second row and the twelfth column, the pixel circuit unit 100 in the fourth row and the twelfth column, and the twelfth scanning line D12 is electrically insulated from the pixel circuit unit 100 in the first row and the pixel circuit unit 100 in the third row, and the thirteenth scanning line D13 is electrically connected to the pixel circuit unit 100 in the first row and the twelfth column, the pixel circuit unit 100 in the first row and the thirteenth column, the pixel circuit unit 100 in the third row and the thirteenth column. ,

[0070] In another embodiment, it also includes: a plurality of scan lines arranged along the first direction and extending along the second direction; wherein the scan lines in the odd columns are electrically connected to any part of the pixel circuit units in the 2kth row and are electrically insulated from any pixel circuit units in the 2k-1th row, and the scan lines in the even columns are electrically connected to any part of the pixel circuit units in the 2k-1th row and are electrically insulated from any pixel circuit units in the 2kth row. In one embodiment, the plurality of scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N being an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2kth row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row; when n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the n-1th column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2kth row.

[0071] Figure 3 for Figure 1 and Figure 2 Schematic diagram of the screen displayed by the driving substrate. It can be seen that the "bright" pixels and the "dark" pixels are arranged alternately along the first direction, and the "bright" pixels and the "dark" pixels are arranged alternately along the second direction, so that the brightness uniformity of the entire screen is improved.

[0072] Example 2

[0073] In this embodiment, reference Figure 4 and Figure 5, the driving substrate comprises: a pixel circuit, the pixel circuit comprises a plurality of pixel circuit units 100 arranged in an array along a first direction X and a second direction Y, the first direction X and the second direction Y intersecting; a first driving module (not shown), located on one side of the pixel circuit along the first direction X; a second driving module (not shown), located on the other side of the pixel circuit along the first direction X; a first driving line A, connected to the first driving module and electrically insulated from the second driving module, one of the first driving lines A surrounds two sides of a row of the pixel circuit units 100 in the first direction X along the second direction Y; a second driving line B, connected to the second driving module and electrically insulated from the first driving module, one of the second driving lines B surrounds two sides of a row of the pixel circuit units in the first direction X along the second direction Y; wherein a partial line of the first driving line A and a partial line of the second driving line B extend between the pixel circuit units 100 in adjacent rows; for at least partially adjacent two pixel circuit units 100 in any row, one of the pixel circuit units 100 is connected to the first driving line A, and the other of the pixel circuit units 100 is connected to the second driving line B;

[0074] The driving substrate includes a main area and an edge area surrounding the main area. The pixel circuit is located in the main area. The first driving module is located in the edge area on one side of the main area along the first direction X, and the second driving module is located in the edge area on the other side of the main area along the first direction X.

[0075] The first driving module includes a plurality of cascaded first shift register units, each of which is connected to a first driving line A in a one-to-one correspondence. The second driving module includes a plurality of cascaded second shift register units, each of which is connected to a second driving line B in a one-to-one correspondence.

[0076] The structural description of the first driving line A and the structural description of the second driving line B refer to Embodiment 1 and will not be described in detail.

[0077] In one embodiment, reference Figure 4 and Figure 5 For two pixel circuit units 100 that are partially adjacent to each other in the second direction Y, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0078] In one embodiment, reference Figure 4 and Figure 5, the multiple first driving lines A are respectively the first first driving line to the Mth first driving line arranged in sequence along the second direction Y; the multiple second driving lines B are respectively the first second driving line to the Mth second driving line arranged in sequence along the second direction Y; M is an integer greater than or equal to 2; wherein, any mth first driving line and mth second driving line surround the pixel circuit unit in the same row, and m is an integer greater than or equal to 1 and less than or equal to M. Figure 4 and Figure 5 In the example, M equals 2.

[0079] It should be noted that the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in odd rows, or the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in even rows. Figure 4 In the example, the pixel circuit unit surrounded by any m-th first driving line and m-th second driving line is located in an even-numbered row. Figure 5 In the example, the pixel circuit unit surrounded by any m-th first driving line and m-th second driving line is located in an odd row. It should be noted that: Figure 4 It may also be that: the pixel circuit units surrounded by any m-th first driving line and the m-th second driving line are located in odd rows, Figure 5 It may also be that: the pixel circuit units surrounded by any m-th first driving line and m-th second driving line are located in an even-numbered row.

[0080] In one embodiment, reference Figure 4 and Figure 5 , multiple first driving lines A are arranged along the second direction Y, and multiple second driving lines B are arranged along the second direction Y; wherein, one row of the pixel circuit units 100 is spaced between adjacent first driving lines A; and one row of the pixel circuit units 100 is spaced between adjacent second driving lines B.

[0081] The difference between this embodiment and embodiment 1 is that: Figure 4 and Figure 5 For any row of two adjacent pixel circuit units 100 in the first group, one pixel circuit unit 100 is connected to the first drive line A, and the other pixel circuit unit 100 is connected to the second drive line B; for any row of two adjacent pixel circuit units 100 in the second group, the two adjacent pixel circuit units 100 are connected to the first drive line 100; for any row of two adjacent pixel circuit units 100 in the third group, the two adjacent pixel circuit units 100 are connected to the second drive line B. Reference Figure 4The pixel circuit unit 100 in the first row and the first column and the pixel circuit unit 100 in the first row and the second column are the third group of adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the first row and the second column and the pixel circuit unit 100 in the first row and the third column are the first group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the first row and the third column and the pixel circuit unit 100 in the first row and the fourth column are the second group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the first row and the fourth column and the pixel circuit unit 100 in the first row and the fifth column are the first group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the first row and the pixel circuit unit 100 in the first row and the sixth column are the third group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the first row and ... 0 is the first group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the seventh column of the first row and the pixel circuit unit 100 in the eighth column of the first row are the second group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the eighth column of the first row and the pixel circuit unit 100 in the ninth column of the first row are the first group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the ninth column of the first row and the pixel circuit unit 100 in the tenth column of the first row are the third group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the tenth column of the first row and the pixel circuit unit 100 in the eleventh column of the first row are the first group of two adjacent pixel circuit units 100 in the first row, the pixel circuit unit 100 in the eleventh column of the first row and the pixel circuit unit 100 in the twelfth column of the first row are the second group of two adjacent pixel circuit units 100 in the first row, Figure 4 The remaining lines will not be described in detail. Figure 4 and Figure 5 In the embodiment, a first group of adjacent pixel circuit units and a second group of adjacent pixel circuit units share a pixel circuit unit, and a first group of adjacent pixel circuit units and the first to third groups of adjacent pixel circuit units share a pixel circuit unit.

[0082] refer to Figure 4 , any row of the pixel circuit units 100 is connected to the first driving line A and the second driving line B located on the second side of the pixel circuit units 100 along the second direction Y, a part of the pixel circuit units 100 is connected to the first driving line A, and another part of the pixel circuit units 100 is connected to the second driving line B.

[0083] It should be noted that, in other embodiments, any row of the pixel circuit units 100 may be connected to the first driving line and the second driving line located on the first side of the pixel circuit units along the second direction, a part of the pixel circuit units may be connected to the first driving line, and another part of the pixel circuit units may be connected to the second driving line.

[0084] refer to Figure 5 For any row of the pixel circuit units 100, a portion of the pixel circuit units 100 are connected to the first driving line A located on the first side of the pixel circuit unit 100 along the second direction Y, another portion of the pixel circuit units 100 are connected to the first driving line A located on the second side of the pixel circuit unit 100 along the second direction Y, another portion of the pixel circuit units 100 are connected to the second driving line B located on the first side of the pixel circuit unit 100, and another portion of the pixel circuit units 100 are connected to the second driving line B located on the second side of the pixel circuit unit 100.

[0085] refer to Figure 4 , the pixel circuit unit 100 in the 2k-1th row is electrically connected to the kth first driving line A and the kth second driving line B and is electrically insulated from the jth first driving line and the jth second driving line, the pixel circuit unit in the 2kth row is electrically connected to the kth first driving line A and the kth second driving line B and is electrically insulated from the jth first driving line and the jth second driving line, k is an integer greater than or equal to 1 and less than or equal to M, j is an integer greater than or equal to 1 and less than or equal to M and j is not equal to k.

[0086] refer to Figure 5 For a row of pixel circuit units between any s-th first driving line and the s+1-th first driving line, a first portion of the pixel circuit units 100 are electrically connected to the s-th first driving line, a second portion of the pixel circuit units are electrically connected to the s-th second driving line, a third portion of the pixel circuit units are electrically connected to the s+1-th first driving line, and a fourth portion of the pixel circuit units are electrically connected to the s+1-th second driving line, where s is an integer greater than or equal to 1 and less than or equal to M-1.

[0087] In this embodiment, reference Figure 4 and Figure 5, the driving substrate also includes: a plurality of scan lines arranged along the first direction and extending along the second direction; wherein the scan lines in the odd columns are electrically connected to part of the pixel circuit units in any 2k-1th row and are electrically insulated from the pixel circuit units in any 2kth row, and the scan lines in the even columns are electrically connected to part of the pixel circuit units in any 2kth row and are electrically insulated from the pixel circuit units in any 2k-1th row. The multiple scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N being an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2k-1th row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row; when n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2kth row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the nth column of any 2k-1th row.

[0088] In other embodiments, the scan lines in odd columns are electrically connected to any part of the pixel circuit units in the 2kth row and are electrically insulated from any pixel circuit units in the 2k-1th row, and the scan lines in even columns are electrically connected to any part of the pixel circuit units in the 2k-1th row and are electrically insulated from any pixel circuit units in the 2kth row. The multiple scan lines include a first scan line to an Nth scan line arranged in sequence along the first direction, N being an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2kth row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row; when n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2k-1th row and the pixel circuit unit in the nth column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2k-1th row; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in the n-1th column of any 2kth row and the pixel circuit unit in the nth column of any 2kth row.

[0089] Figure 6 for Figure 4 and Figure 5 As shown in the schematic diagram of the screen driven by the driving substrate, it can be seen that a pair of "bright" pixels and a pair of "dark" pixels are alternately arranged along the first direction X, so that the brightness uniformity of the entire screen is improved.

[0090] Example 3

[0091] The difference between this embodiment and embodiment 1 and embodiment 2 is that: Figure 7 , the plurality of first driving lines A are respectively the first first driving line to the Mth first driving line arranged in sequence along the second direction Y; the plurality of second driving lines B are respectively the first second driving line to the Mth second driving line arranged in sequence along the second direction Y; M is an integer greater than or equal to 2; wherein, a row of the pixel circuit units surrounded by any mth first driving line and a row of the pixel circuit units surrounded by any mth second driving line are in adjacent rows.

[0092] In this embodiment, reference Figure 7 , any row of pixel circuit units surrounded by the mth first driving line is located in an odd row, and any row of pixel circuit units surrounded by the mth second driving line is located in an even row. In other embodiments, it may be that any row of pixel circuit units surrounded by the mth first driving line is located in an even row, and any row of pixel circuit units surrounded by the mth second driving line is located in an odd row.

[0093] In this embodiment, reference Figure 7 For any two adjacent pixel circuit units 100 in any row, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0094] It should be noted that, in other embodiments, it may also be that: for the first group of two adjacent pixel circuit units in any row, one pixel circuit unit is connected to the first drive line, and the other pixel circuit unit is connected to the second drive line; for the second group of two adjacent pixel circuit units in any row, the two adjacent pixel circuit units are connected to the first drive line; for the third group of two adjacent pixel circuit units in any row, the two adjacent pixel circuit units are connected to the second drive line.

[0095] In this embodiment, reference Figure 7 For two pixel circuit units 100 at least partially adjacent to each other in the second direction Y, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B. Exemplarily, for two pixel circuit units 100 arbitrarily adjacent to each other in the second direction Y, one pixel circuit unit 100 is connected to the first driving line A, and the other pixel circuit unit 100 is connected to the second driving line B.

[0096] In this embodiment, reference Figure 7 , a row of pixel circuit units surrounded by any m-th first driving line is located in odd rows, and a row of pixel circuit units surrounded by any m-th second driving line is located in even rows; for any row of pixel circuit units 100, a part of the pixel circuit units 100 is connected to the first driving line A located on the first side of the pixel circuit unit 100 along the second direction Y, and another part of the pixel circuit units 100 is connected to the second driving line B located on the second side of the pixel circuit unit 100 along the second direction Y.

[0097] In other embodiments, a row of pixel circuit units surrounded by any m-th first driving line is located in an even row, and a row of pixel circuit units surrounded by any m-th second driving line is located in an odd row; for any row of pixel circuit units 100, a portion of the pixel circuit units 100 is connected to the second driving line B located on the first side of the pixel circuit unit 100 along the second direction Y, and another portion of the pixel circuit units 100 is connected to the first driving line A located on the second side of the pixel circuit unit 100 along the second direction Y.

[0098] In this embodiment, reference Figure 7 , the pixel circuit unit in the 2k-1th row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, the pixel circuit unit in the 2kth row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, k is an integer greater than or equal to 1 and less than or equal to M, j is an integer greater than or equal to 1 and less than or equal to M and j is not equal to k.

[0099] In other embodiments, it may be that: for a row of pixel circuit units between any s-th first driving line and the s+1-th first driving line, a first portion of the pixel circuit units are electrically connected to the s-th first driving line, a second portion of the pixel circuit units are electrically connected to the s-th second driving line, a third portion of the pixel circuit units are electrically connected to the s+1-th first driving line, and a fourth portion of the pixel circuit units are electrically connected to the s+1-th second driving line, where s is an integer greater than or equal to 1 and less than or equal to M-1.

[0100] In this embodiment, reference Figure 7 , further comprising: a plurality of scan lines arranged along the first direction and extending along the second direction; each of the scan lines is connected to one of the pixel circuit units in each row.

[0101] In the present embodiment, a row of pixel circuit units surrounded by any m-th first driving line and a row of pixel circuit units surrounded by any m-th second driving line are in adjacent rows, each of the scanning lines is connected to one of the pixel circuit units in each row, and the columns of the scanning lines are consistent with the columns of the pixel units connected to the scanning lines, so the voltage change on the scanning lines is relatively small, and the back-end data transmission algorithm can be appropriately simplified.

[0102] Example 4

[0103] In one embodiment, reference Figure 8 , the pixel circuit includes a first zone Z1 and a second zone Z2 arranged along the first direction X; for the pixel circuit units 100 in the same row, a portion of the pixel circuit units 100 located in the first zone Z1 is connected to the first driving line A located on one side of the pixel circuit unit Z1 along the second direction Y, another portion of the pixel circuit unit 100 located in the first zone Z1 is connected to the second driving line B located on one side of the pixel circuit unit 100 along the second direction Y, a portion of the pixel circuit unit 100 located in the second zone Z2 is connected to the first driving line A located on the other side of the pixel circuit unit 100 along the second direction Y, and another portion of the pixel circuit unit located in the second zone is connected to the second driving line B located on the other side of the pixel circuit unit along the second direction.

[0104] In this embodiment, a plurality of the first driving lines A are arranged along the second direction Y, and a plurality of the second driving lines B are arranged along the second direction Y; wherein, a row of the pixel circuit units 100 is spaced apart between adjacent first driving lines A; and a row of the pixel circuit units 100 is spaced apart between adjacent second driving lines B.

[0105] In this embodiment, the plurality of first driving lines A are respectively the first first driving line to the Mth first driving line sequentially arranged along the second direction Y; the plurality of second driving lines B are respectively the first second driving line to the Mth second driving line sequentially arranged along the second direction; M is an integer greater than or equal to 2; wherein any mth first driving line and any mth second driving line surround the same row of pixel circuit units 100, and m is an integer greater than or equal to 1 and less than or equal to M. In other embodiments, it may be that: any row of pixel circuit units surrounded by the mth first driving line and any row of pixel circuit units 100 surrounded by the mth second driving line are in adjacent rows.

[0106] In this embodiment, it also includes: a plurality of scan lines arranged along the first direction and extending along the second direction; the scan lines in the odd columns are electrically connected to part of the pixel circuit units in any 2k-1 row and are electrically insulated from the pixel circuit units in any 2k row, and the scan lines in the even columns are electrically connected to part of the pixel circuit units in any 2k row and are electrically insulated from the pixel circuit units in any 2k-1 row. In other embodiments, the scan lines in the odd columns are electrically connected to part of the pixel circuit units in any 2k row and are electrically insulated from the pixel circuit units in any 2k-1 row, and the scan lines in the even columns are electrically connected to part of the pixel circuit units in any 2k-1 row and are electrically insulated from the pixel circuit units in any 2k row.

[0107] Another embodiment of the present application further provides a display panel, comprising the driving substrate provided in the above embodiment.

[0108] The display panel may be an organic light emitting diode (OLED) display panel or a liquid crystal display panel.

[0109] Another embodiment of the present application further provides a display module, including: the display panel provided in the above embodiment.

[0110] Another embodiment of the present application further provides a display device, including: the display module provided by the above embodiment.

[0111] Since the principle of solving the problem of the display device is similar to that of the aforementioned display module, the implementation of the display module in the display device can refer to the implementation of the aforementioned display module, and the repeated parts will not be repeated. The display device can be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function. The other essential components of the display device should be understood by ordinary technicians in the field, and will not be repeated here, nor should they be used as a limitation to the present invention.

[0112] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.

Claims

1. A driving substrate, characterized in that: include: A pixel circuit, the pixel circuit comprising a plurality of pixel circuit units arranged in an array along a first direction and a second direction, wherein the first direction and the second direction intersect; A first driving module, located at one side of the pixel circuit along the first direction; A second driving module, located at the other side of the pixel circuit along the first direction; a first driving line connected to the first driving module and electrically insulated from the second driving module, wherein one of the first driving lines surrounds two sides of a row of pixel circuit units in the first direction along the second direction; A second driving line, connected to the second driving module and electrically insulated from the first driving module, wherein one of the second driving lines surrounds two sides of a row of the pixel circuit units in the first direction along the second direction; Among them, a partial line of the first driving line and a partial line of the second driving line extend between the pixel circuit units in adjacent rows; for two pixel circuit units that are at least partially adjacent in any row, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line.

2. The driving substrate according to claim 1, characterized in that: For any two adjacent pixel circuit units in any row, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line.

3. The driving substrate according to claim 1, characterized in that: For the first group of two adjacent pixel circuit units in any row, one pixel circuit unit is connected to the first drive line, and the other pixel circuit unit is connected to the second drive line; for the second group of two adjacent pixel circuit units in any row, the two adjacent pixel circuit units are connected to the first drive line; for the third group of two adjacent pixel circuit units in any row, the two adjacent pixel circuit units are connected to the second drive line.

4. The driving substrate according to claim 1, characterized in that: For two pixel circuit units that are at least partially adjacent to each other in the second direction, one pixel circuit unit is connected to the first driving line, and the other pixel circuit unit is connected to the second driving line.

5. The driving substrate according to claim 1, characterized in that: A plurality of the first driving lines are arranged along the second direction, and a plurality of the second driving lines are arranged along the second direction; Among them, one row of the pixel circuit units is spaced between adjacent first driving lines; and one row of the pixel circuit units is spaced between adjacent second driving lines.

6. The driving substrate according to claim 5, characterized in that: The plurality of first driving lines are respectively the first first driving line to the Mth first driving line sequentially arranged along the second direction; the plurality of second driving lines are respectively the first second driving line to the Mth second driving line sequentially arranged along the second direction; M is an integer greater than or equal to 2; Wherein, any m-th first driving line and any m-th second driving line surround the pixel circuit units in the same row, and m is an integer greater than or equal to 1 and less than or equal to M.

7. The driving substrate according to claim 5, characterized in that: The plurality of first driving lines are respectively the first first driving line to the Mth first driving line sequentially arranged along the second direction; the plurality of second driving lines are respectively the first second driving line to the Mth second driving line sequentially arranged along the second direction; M is an integer greater than or equal to 2; Wherein, a row of pixel circuit units surrounded by any m-th first driving line and a row of pixel circuit units surrounded by any m-th second driving line are in adjacent rows.

8. The driving substrate according to claim 1, characterized in that: For any row of the pixel circuit units, a part of the pixel circuit units are connected to the first driving line located on the first side of the pixel circuit unit along the second direction, another part of the pixel circuit units are connected to the first driving line located on the second side of the pixel circuit unit along the second direction, another part of the pixel circuit units are connected to the second driving line located on the first side of the pixel circuit unit, and another part of the pixel circuit units are connected to the second driving line located on the second side of the pixel circuit unit.

9. The driving substrate according to claim 1, characterized in that: Any row of the pixel circuit units is connected to the first driving line and the second driving line located at the first side of the pixel circuit units along the second direction, a part of the pixel circuit units is connected to the first driving line, and another part of the pixel circuit units is connected to the second driving line; Alternatively, any row of the pixel circuit units is connected to the first driving line and the second driving line located on the second side of the pixel circuit units along the second direction, a part of the pixel circuit units is connected to the first driving line, and another part of the pixel circuit units is connected to the second driving line.

10. The driving substrate according to claim 1, characterized in that: The pixel circuit includes a first area and a second area arranged along the first direction; For the pixel circuit units in the same row, a part of the pixel circuit units located in the first area is connected to the first driving line located on one side of the pixel circuit unit along the second direction, another part of the pixel circuit units located in the first area is connected to the second driving line located on one side of the pixel circuit unit along the second direction, a part of the pixel circuit units located in the second area is connected to the first driving line located on the other side of the pixel circuit unit along the second direction, and another part of the pixel circuit units located in the second area is connected to the second driving line located on the other side of the pixel circuit unit.

11. The driving substrate according to claim 6 or 7, characterized in that: The pixel circuit unit in the 2k-1th row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, and the pixel circuit unit in the 2kth row is electrically connected to the kth first driving line and the kth second driving line and is electrically insulated from the jth first driving line and the jth second driving line, k is an integer greater than or equal to 1 and less than or equal to M, j is an integer greater than or equal to 1 and less than or equal to M and j is not equal to k.

12. The driving substrate according to claim 6 or 7, characterized in that: For a row of pixel circuit units between any s-th first driving line and the s+1-th first driving line, a first portion of the pixel circuit units are electrically connected to the s-th first driving line, a second portion of the pixel circuit units are electrically connected to the s-th second driving line, a third portion of the pixel circuit units are electrically connected to the s+1-th first driving line, and a fourth portion of the pixel circuit units are electrically connected to the s+1-th second driving line, where s is an integer greater than or equal to 1 and less than or equal to M-1.

13. The driving substrate according to claim 6, characterized in that: Also includes: a plurality of scanning lines arranged along the first direction and extending along the second direction; Among them, the scan lines in the odd columns are electrically connected to part of the pixel circuit units in any 2k-1 row and are electrically insulated from the pixel circuit units in any 2k row, and the scan lines in the even columns are electrically connected to part of the pixel circuit units in any 2k row and are electrically insulated from the pixel circuit units in any 2k-1 row.

14. The driving substrate according to claim 13, characterized in that: The plurality of scan lines include a first scan line to an Nth scan line sequentially arranged along the first direction, where N is an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2k-1th row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row; When n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in any 2kth row and n-1th column and the pixel circuit unit in any 2kth row and nth column; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in any 2k-1th row and n-1th column and the pixel circuit unit in any 2k-1th row and nth column.

15. The driving substrate according to claim 6, characterized in that: Also includes: a plurality of scanning lines arranged along the first direction and extending along the second direction; Among them, the scan lines in the odd columns are electrically connected to any part of the pixel circuit units in the 2kth row and are electrically insulated from any pixel circuit units in the 2k-1th row, and the scan lines in the even columns are electrically connected to any part of the pixel circuit units in the 2k-1th row and are electrically insulated from any pixel circuit units in the 2kth row.

16. The driving substrate according to claim 15, characterized in that: The plurality of scan lines include a first scan line to an Nth scan line sequentially arranged along the first direction, where N is an integer greater than or equal to 3; the first scan line is electrically connected to the pixel circuit unit in the first column of any 2kth row; when N is an odd number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2kth row, and when N is an even number, the Nth scan line is electrically connected to the pixel circuit unit in the N-1th column of any 2k-1th row; When n is an even number greater than or equal to 2 and less than N, any nth scan line connects the pixel circuit unit in any 2k-1th row and n-1th column and the pixel circuit unit in any 2k-1th row and nth column; when n is an odd number greater than 1 and less than N, any nth scan line connects the pixel circuit unit in any 2kth row and n-1th column and the pixel circuit unit in any 2kth row and nth column.

17. The driving substrate according to claim 7, characterized in that: Also includes: A plurality of scan lines are arranged along the first direction and extend along the second direction; each of the scan lines is connected to one of the pixel circuit units in each row.

18. The driving substrate according to claim 1, characterized in that: The first driving line is in a closed ring structure; or, the first driving line includes a first sub-line and a second sub-line, the first sub-line and the second sub-line are connected toward the end of the first driving module, and the first sub-line and the second sub-line are disconnected toward the end of the second driving module, the first sub-line is located on one side of a row of pixel circuit units surrounded by the first driving line along the second direction, and the second sub-line is located on the other side of a row of pixel circuit units surrounded by the first driving line along the second direction.

19. The driving substrate according to claim 1, characterized in that: The second driving line is in a closed ring structure; or, the second driving line includes a third sub-line and a fourth sub-line, the third sub-line and the fourth sub-line are connected toward the end of the second driving module, and the third sub-line and the fourth sub-line are disconnected toward the end of the first driving module, the third sub-line is located on one side of a row of pixel circuit units surrounded by the second driving line along the second direction, and the fourth sub-line is located on the other side of a row of pixel circuit units surrounded by the second driving line along the second direction.

20. A display panel, characterized in that: It comprises the driving substrate as claimed in any one of claims 1 to 19.

21. A display module, characterized in that: Comprising the display panel as claimed in claim 20.

22. A display device, characterized in that: include: The display module as claimed in claim 21.

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