Method for forming trench structure, method for removing by-product in trench and wafer bearing device
By using inclined surface and rotational etching technology in the wafer carrier device, combined with the variable step-down plasma etching process, the problem of high trench side wall roughness in traditional etching solutions is solved, and lithium niobate light modulation is optimized device performance.
Patent Information
- Application Number
- CN202411178822.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2044-08-26
AI Technical Summary
Traditional trench etching schemes are difficult to obtain a good trench structure, resulting in high side wall roughness of lithium niobate light modulators, affecting device performance.
A wafer carrier device is adopted, and the bottom surface of the wafer groove is an inclined surface relative to the horizontal plane. Combined with rotary etching technology and a variable step-down plasma etching process, the etching effect of the trench side wall and bottom surface is optimized.
It effectively reduces the roughness of the side wall of the groove, reduces the micro groove phenomenon, and improves the smoothness and performance of the groove structure.
Smart Images

Figure CN119132945A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor process technology, and in particular to a method for forming a groove structure, removing by-products in the groove, and a wafer carrying device. Background Art
[0002] The demand for some semiconductor devices is increasing day by day. For example, the demand for lithium niobate optical modulators in optical modules is increasing rapidly, but its processing cost is still high, making it difficult to be widely used. The core limitation of its mass production is the etching process. Since the boiling point of Li halogen compounds in the etching by-products of lithium niobate chips is above 1000°C, they are difficult to volatilize and deposit on the crystal surface, seriously affecting the roughness of the side wall after etching.
[0003] In semiconductor devices such as lithium niobate optical modulators, the waveguide loss of optical modulation is mainly related to the sidewall roughness and the sidewall angle. The greater the roughness, the greater the waveguide loss. It can be seen that in this type of semiconductor device, the groove roughness has an important impact on the device performance. In the prior art, some schemes use Cl (chlorine) and F (fluorine) groups to etch wafers of materials such as lithium niobate. After etching, the sidewall roughness is obvious. Although other schemes have improved the surface smoothness of the relevant wafers to a certain extent, the groove sidewall angle is low and it is impossible to form an effective structural pattern (such as an optical waveguide pattern), which is still easy to affect the performance of the resulting device. It can be seen that the traditional groove etching scheme is difficult to obtain a groove structure with good performance. Summary of the invention
[0004] In view of this, the present application provides a method for forming a groove structure, removing by-products in the groove, and a wafer carrier to solve the problem that it is difficult to obtain a groove structure with better performance with a traditional groove etching scheme.
[0005] The present application provides a wafer carrier, which comprises at least one wafer slot for carrying a wafer, wherein the bottom surface of each wafer slot is an inclined surface relative to a horizontal plane, and the inclination angle of the inclined surface relative to the horizontal plane is an acute angle.
[0006] Optionally, the inclination angle is 3-10°.
[0007] Optionally, the depth of the wafer groove is 0.2-0.8 mm.
[0008] Optionally, the wafer carrying device is a tray; the thickness of the tray is 1-5 mm, and the remaining thickness of the tray at the bottom surface of the wafer slot is greater than or equal to 0.6 mm.
[0009] The present application also provides a method for removing byproducts in a groove, which is used for a wafer having a groove pattern, and the method comprises:
[0010] Placing the wafer with the groove pattern on a wafer carrier, wherein the wafer carrier is any of the above-mentioned wafer carriers;
[0011] Performing a first etching on the wafer;
[0012] Rotating the wafer by a preset angle;
[0013] The wafer is subjected to a second etching process.
[0014] Optionally, the preset angle is an integer multiple of 180°.
[0015] Optionally, etching gases used in the first etching and the second etching include at least one of Ar, He and N2.
[0016] Optionally, the process parameters of the first etching and the second etching include: an etching pressure in a range of 1-4 mTorr.
[0017] Optionally, process parameters of the first etching and the second etching include: an upper RF power ranges from 200-500W, and a lower RF power ranges from 20-200W.
[0018] Optionally, the process parameters of the first etching and the second etching include: an etching time ranges from 30 to 60 seconds.
[0019] The present application also provides a method for forming a trench structure, the method comprising:
[0020] Etching grooves on the surface of the wafer;
[0021] Any of the above methods for removing byproducts in the trench is used to remove the byproducts on the sidewalls of the trench.
[0022] Optionally, etching the groove on the surface of the wafer includes: introducing an etching gas into a process chamber; loading radio frequency power into the process chamber under a first chamber pressure to generate plasma; while maintaining an ignition state, gradually depressurizing the process chamber to reduce the chamber pressure to a second chamber pressure, wherein the second chamber pressure is less than the first chamber pressure; and etching the wafer to form a groove.
[0023] Optionally, the pressure of the first chamber is 10-50 mTorr, the pressure of the second chamber is 1-5 mTorr, and the gradual pressure reduction time is 3-10 s.
[0024] In the above-mentioned method for forming a groove structure, removing by-products in the groove and the wafer carrying device of the present application, the bottom surface of the wafer groove is an inclined surface relative to the horizontal plane. After placing the wafer with the groove in the above-mentioned wafer groove, the wafer is in an inclined state. The stripe protrusions formed on the side walls of the grooves during the process of etching to form the grooves can be better bombarded by the etching gas. The top of the stripe protrusion has a fast etching rate under the bombardment of the etching gas, and the bottom of the stripe protrusion has a slow etching rate. The surface undulation degree after etching is reduced, thereby reducing the height difference of the stripe protrusions and reducing the roughness of the side walls of the grooves. For the bottom surface of the groove, the micro-grooves formed in the process of etching to form the grooves have a low etching rate at the bottom of the micro-grooves due to the change in the bombardment angle of the etching gas, and it is difficult for reflective particles to enter the micro-grooves for a second time, which can alleviate the micro-groove phenomenon and will not be aggravated for a second time. It can be seen that the present application can optimize the performance of the resulting groove-related structure from many aspects. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0026] Figure 1 is a schematic diagram of the trench sidewall of a conventional etching scheme;
[0027] Figure 2 is a top view of a wafer carrier device in one embodiment of the present application;
[0028] Figure 3 is a schematic diagram of an inclined surface of an embodiment of the present application;
[0029] Figure 4 is a schematic diagram of a wafer carried by a wafer carrying device in one embodiment of the present application;
[0030] Figure 5 is a schematic diagram of a tray according to an embodiment of the present application;
[0031] Figure 6 This is a schematic diagram of a method for removing byproducts in a groove in one embodiment of the present application;
[0032] Figure 7 is a schematic flow chart of a method for forming a trench structure in one embodiment of the present application;
[0033] Figure 8 is a schematic diagram of a process chamber according to an embodiment of the present application;
[0034] Fig. 9 This is a schematic diagram of plasma bombardment during conventional etching;
[0035] Fig.10 Schematic diagram of plasma bombardment and trench sidewall during modification etching in one embodiment of the present application;
[0036] Fig.11 This is a schematic diagram of the results after etching a lithium niobate wafer using a traditional method;
[0037] Fig.12 It is a schematic diagram of the result after etching a lithium niobate wafer using the method of forming a groove structure of the present application. DETAILED DESCRIPTION
[0038] The technical solutions in the embodiments of the present application are clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.
[0039] In a conventional trench etching scheme, the wafer is usually placed horizontally in a process chamber and plasma is used to etch the wafer to form a trench on the wafer surface. Figure 1 As shown in (a) and (b), due to the influence of factors such as residual by-products, a similar Figure 1 The stripe (b) shown in FIG. 1 is a protrusion, and the cross section of the protrusion is, for example, a triangle, which makes the sidewall roughness of the groove higher. In addition, inert gas such as Ar is used to physically bombard the groove to remove byproducts, such as Figure 1 As shown in (a), Ar ions will rebound at the corners of the trench to form secondary etching, exacerbating the subtrench defects. In addition, conventional physical bombardment mainly cleans the byproducts at the bottom of the trench. Due to the low angle between the trench sidewall and the etching direction, it is unable to effectively clean the sidewall byproducts, and may even aggravate the stripe protrusions on the trench sidewall, further reducing the smoothness of the trench sidewall.
[0040] Based on the above problems, the first aspect of the present application provides a wafer carrier, the wafer carrier includes at least one wafer slot for carrying a wafer. In some examples, the wafer slot may also be referred to as a wafer slot. The wafer carrier may include only one wafer slot, for example Figure 2 The wafer carrier shown in (a) may be a carrier seat or the like for a single wafer slot; the wafer carrier may also include a plurality of wafer slots, for example Figure 2 The wafer carrying device shown in (b) may be a tray or the like including a plurality of symmetrically distributed wafer slots. Figure 3As shown, the bottom surface of each wafer groove is an inclined surface relative to the horizontal plane, and the inclination angle of the inclined surface relative to the horizontal plane is an acute angle. After the wafer with grooves is placed in the above wafer groove, the wafer is in an inclined state, and its posture can be referred to Figure 4 As shown, in the chip Figure 4 In the inclined state shown in (a), the contact area between the side wall of the groove and the etching gas becomes larger. Figure 4 In the inclined state shown in (b), the contact area between the other side wall of the groove and the etching gas becomes larger, so that after the first etching of the wafer in the above-mentioned wafer carrier, the wafer is rotated so that the other side wall of the groove faces the incident direction of the etching gas, and then the wafer is etched for the second time to achieve inclined etching based on the above-mentioned wafer carrier. In the above-mentioned inclined etching process, the stripe protrusions on the side wall of the groove can be better bombarded by the etching gas, and the angle between the etching direction corresponding to the etching gas and the stripe protrusions increases. The top of the stripe protrusion has a fast etching rate under the bombardment of the etching gas, and the bottom of the stripe protrusion has a slow etching rate, which reduces the height difference of the stripe protrusions. After etching, the surface undulation of the side wall of the groove is reduced, that is, the roughness of the side wall of the groove is reduced. For the bottom surface of the groove, the micro-groove formed in the process of etching the groove has a low etching rate at the bottom of the micro-groove due to the change in the bombardment angle of the etching gas, and it is difficult for reflective particles to enter the micro-groove for a second time, which can alleviate the micro-groove phenomenon and will not be aggravated for a second time.
[0041] Optionally, the size of the wafer slot is in the range of 2-6 inches to be compatible with wafers of 6 inches or less.
[0042] In some embodiments, the inclination angle of the inclined surface can be determined based on the angle between the side wall of the groove to be etched and the bottom surface of the groove. The smaller the angle between the side wall of the groove and the bottom surface of the groove, the smaller the inclination angle of the inclined surface. The larger the angle between the side wall of the groove and the bottom surface of the groove, the larger the inclination angle of the inclined surface, so as to ensure the stability of the wafer placed in the wafer groove on the basis of making the contact area between the etching gas and the side wall of the groove as large as possible. Specifically, the inclination angle of the inclined surface ranges from 3 to 10°. For example, if the angle between the side wall of the groove and the bottom surface of the groove is 65°, the inclination angle of the inclined surface can be 3° or 4°. If the angle between the side wall of the groove and the bottom surface of the groove is 80°, the inclination angle of the inclined surface can be 9° or 10°, and so on. The inclination angle within the range of 3 to 10° can also better stabilize the wafer placed in the wafer groove while expanding the contact area between the etching gas and the corresponding wafer groove side wall, and prevent the wafer from sliding when it is in a tilted state.
[0043] Optionally, the depth of the wafer groove is 0.2-0.8 mm, which may refer to the maximum depth of the wafer groove (such as the depth of the lowest point of the bottom surface of the wafer groove). The depth within this range can enable the inclined wafer groove to better stabilize the wafer.
[0044] In some examples, the wafer carrier is a tray, which may have only one wafer slot or multiple wafer slots. Figure 5 The symmetrical distribution shown, Figure 5 In the figure, (a) is a top view of the tray, and (b) is a longitudinal cross-sectional view. The diameter of the tray can range from 210 to 220 mm, and it can be designed in an 8-inch size to be applied to the etching process of wafers of 6 inches and below. In other examples, the wafer carrier can be a carrier base in the process chamber.
[0045] Optionally, the thickness of the tray is 1-5 mm, which can provide a relatively stable carrier. The remaining thickness of the tray at the bottom of the wafer slot is greater than or equal to 0.6 mm, which can reduce the probability of fragmentation at the wafer slot.
[0046] Optionally, based on the advantages of Si (silicon) such as good thermal conductivity and low price, the tray is a Si tray, so as to conduct heat in time during the etching process, prevent the chip from breaking due to thermal stress, and facilitate mass production.
[0047] In the above wafer carrier device, the bottom surface of the wafer groove is an inclined surface relative to the horizontal plane. After the wafer with grooves is placed in the above wafer groove, the wafer is in an inclined state, and the stripe protrusions on the side walls of the grooves can be better bombarded by the etching gas. The top of the stripe protrusion has a fast etching rate under the bombardment of the etching gas, and the bottom of the stripe protrusion has a slow etching rate, thereby reducing the height difference of the stripe protrusions and reducing the roughness of the groove side walls; for the bottom surface of the groove, the micro-grooves formed in the process of etching to form the grooves have a low etching rate at the bottom of the micro-grooves due to the change in the bombardment angle of the etching gas, and it is difficult for reflective particles to enter the micro-grooves for a second time, which can reduce the micro-groove phenomenon and will not aggravate it for a second time; it can be seen that based on the above wafer carrier device, the inclined etching of the wafer with grooves can optimize the performance of the resulting groove-related structure from many aspects.
[0048] A second aspect of the present application provides a method for removing byproducts in a groove, which is used for a wafer having a groove pattern. Figure 6 As shown, the method for removing by-products in the trench includes steps S110 to S140.
[0049] S110, placing a wafer with a groove pattern on a wafer carrier. The wafer carrier is the wafer carrier described in any of the above embodiments, and the wafer carried by the wafer carrier can refer to Figure 4 As shown in (a) or (b), the wafer is in a tilted state, and one side wall of the groove can face the injected etching gas to a certain extent, and the contact area between the etching gas and the side wall becomes larger.
[0050] Optionally, when the wafer carrier is a tray, the robot can transfer the tray carrying the wafer to a carrier base in the process chamber; when the wafer carrier is a carrier base, the robot can grab the wafer and extend it into the process chamber, and the pin needle (ejector pin) rises so that the robot can release the wafer onto the pin needle. After the robot releases the wafer, it withdraws, and the pin needle carrying the wafer descends so that the wafer falls into the wafer slot of the carrier base.
[0051] S120, performing a first etching on the wafer to remove byproducts on a side wall of the groove facing the injection direction of the etching gas. In an optional implementation, the first etching is mainly physical bombardment.
[0052] S130, rotating the wafer at a preset angle so that the other side wall of the groove faces the injected etching gas to a certain extent. Optionally, if the groove pattern (such as the bottom surface pattern or the top view pattern, etc.) is a relatively regular shape such as a rectangle or a long strip, the preset angle is an integer multiple of 180°, so that after rotating the wafer according to the preset angle, the wafer can be rotated from Figure 4 The posture shown in (a) rotates to Figure 4 The posture shown in (b) is when the chip is in Figure 4 In the posture shown in (a), the byproducts on the sidewall of one side of the groove are removed, and the wafer is in Figure 4 In the posture shown in (b), the byproducts on the sidewall on the other side of the trench are removed.
[0053] Specifically, the process of rotating the wafer by a preset angle includes: taking out the wafer carrier from the process chamber, rotating the wafer by the preset angle, and then transferring the rotated wafer carrier into the process chamber.
[0054] S140, performing a second etching on the wafer to remove byproducts on the other side wall of the trench.
[0055] The above-mentioned method for removing by-products in the groove performs inclined etching on the wafer to increase the contact area between the etching gas and the etched groove side wall, and the stripe protrusions on the groove side wall can be better bombarded by the etching gas. The top of the stripe protrusion has a fast etching rate under the bombardment of the etching gas, and the bottom of the stripe protrusion has a slow etching rate, thereby reducing the height difference of the stripe protrusion and reducing the roughness of the groove side wall; for the bottom surface of the groove, the micro-groove formed in the process of etching the groove has a low etching rate at the bottom of the micro-groove due to the change in the bombardment angle of the etching gas, and it is difficult for reflective particles to enter the micro-groove a second time, which can reduce the micro-groove phenomenon and will not aggravate it a second time.
[0056] Optionally, the etching gas used in the first etching and the second etching is a physical etching gas, which includes at least one of an inert gas and N2 (nitrogen), wherein the inert gas may include gases such as Ar (argon) and He (helium); for example, the physical etching gas may use Ar, so that the corresponding plasma has a higher etching efficiency, and for another example, the physical etching gas may use N2, so that the corresponding plasma has a higher etching accuracy, and for another example, the physical etching gas may use a mixed gas of Ar and N2 to take into account both etching efficiency and etching accuracy. When the by-products in the groove are removed by physical bombardment, the etching speed is low (for example, the Ar etching rate is between 5-15nm / min), and the wafer is only slightly etched in the process of cleaning the by-products on the sidewalls of the grooves, for example, the etching depth for the sidewalls of the grooves can be controlled within 10nm, and the bottom surface Ra (roughness) can be reduced by 1-3nm. Such low-speed etching will not change the original structure of the wafer and will not cause damage to the wafer.
[0057] Specifically, the processes and parameters used in the first etching and the second etching are the same. For example, both etching processes may include: introducing physical etching gas into the process chamber, loading radio frequency power into the process chamber, ionizing the physical etching gas to generate corresponding plasma to etch the wafer. The process parameters of the first etching and the second etching include: the upper radio frequency power (SRF) ranges from 200-500w, the lower radio frequency power (BRF) ranges from 20-200w; and / or, the etching time ranges from 30-60s; wherein the etching time can be determined according to the target depth of the groove, and the etching time can be relatively long when the target depth is large. For example, if the target depth is less than or equal to 300nm, the etching time can be set to 50s or 60s, etc. If the target depth is greater than 300nm, the etching time can be relatively extended according to the incremental increase of the target depth.
[0058] Furthermore, the process parameters of the first etching and the second etching may also include: the etching pressure ranges from 1 to 4 mTorr. The etching pressure within this range can provide a low-pressure etching environment, which is suitable for etching wafers made of materials such as lithium niobate. Etching such wafers in a low-pressure environment can quickly dissociate by-products generated during the etching process, which helps to discharge the by-products.
[0059] In some embodiments, a heat transfer medium such as pump oil is applied to the bottom of the wafer to improve the thermal conductivity during the etching process. After placing the wafer with the groove pattern on the wafer carrier, the method for removing the byproducts in the groove may further include: introducing the wafer carrier into the process chamber, electrostatically adsorbing the wafer carrier, and introducing He (helium) at the bottom of the wafer carrier for uniform heating to prepare a uniform and stable chamber environment in advance.
[0060] The above-mentioned method for removing by-products in the groove is to place a wafer with a groove pattern on a wafer supporting device with an inclined wafer groove and then introduce it into the process chamber, so that the wafer is in a tilted state in the process chamber, and one side wall of the groove can face the injected etching gas, and the contact area between the etching gas and the side wall becomes larger. When the wafer is subjected to the first etching, the by-products on the side wall of the groove can be effectively removed, and then the wafer is rotated by a preset angle so that the other side wall of the groove faces the injected etching gas. When the wafer is subjected to the second etching, the by-products on the other side wall of the groove can be effectively removed. The above-mentioned two etchings can effectively reduce the roughness of the groove side wall and weaken the micro-groove defects at the bottom of the groove. It can be seen that the above-mentioned method for removing by-products in the groove can optimize the groove performance in the wafer from many aspects.
[0061] The third aspect of the present application provides a method for forming a trench structure, referring to Figure 7 As shown, the method for forming the trench structure includes steps S210 and S220.
[0062] S210, etching to form grooves on the surface of the wafer.
[0063] S220, modifying the trench using the method for removing byproducts in the trench described in any of the above embodiments to remove byproducts on the sidewalls of the trench.
[0064] Specifically, etching a groove on the surface of a wafer includes: introducing an etching gas into a process chamber; loading radio frequency power into the process chamber at a first chamber pressure to generate plasma; while maintaining an ignition state, gradually reducing the pressure of the process chamber to reduce the chamber pressure to a second chamber pressure, wherein the second chamber pressure is less than the first chamber pressure; and etching the wafer to form a groove.
[0065] The process chamber may include a plasma process chamber using an ICP coil, wherein the ICP coil may be a three-dimensional structure, for example, Figure 8 As shown, the three-dimensional ICP coil used here can make the by-products generated in the subsequent etching process deposited on the inner wall of the chamber, which has little effect on the feeding of RF power and can avoid the etching instability caused by the interference of by-products of the planar coil. The three-dimensional ICP coil can be a belt structure with 1 turn, 3 turns or 5 turns. In some examples, the process chamber when forming the groove and the process chamber when modifying the groove are different process chambers. In some examples, the process chamber when forming the groove and the process chamber when modifying the groove are the same process chamber, and the process chamber can use different wafer carriers when forming the groove and modifying the groove.
[0066] Specifically, the etching gas used to form the groove may include a chemical etching gas and an auxiliary etching gas. Optionally, the chemical etching gas is a halogen chemical etching gas, which may be any one of CF4 (carbon tetrafluoride), CHF3 (trifluoromethane), BCl3 (boron trichloride) and Cl2 (chlorine). Optionally, the auxiliary etching gas may be a physical bombardment gas including Ar.
[0067] The first chamber pressure is 10-50mTorr. The chamber pressure within this range enables the process chamber to meet the ignition conditions and the plasma source can be successfully ignited. The second chamber pressure is 1-5mTorr to provide a low-pressure etching environment, quickly dissociate the by-products in the etching process, and facilitate the discharge of the by-products. The gradual depressurization time is 3-10s, which makes the pressure change in the process chamber smoother and avoids the RF extinguishing phenomenon caused by excessive pressure drop.
[0068] Optionally, the above-mentioned process of introducing etching gas into the process chamber and loading RF power into the process chamber under the first chamber pressure includes: introducing chemical etching gas into the process chamber at a first flow rate and introducing auxiliary etching gas at a second flow rate; adjusting the gas pressure in the process chamber to the first chamber pressure, loading upper RF power for ignition, and loading lower RF power to assist ignition. The second flow rate is 5-20 times the first flow rate, for example, the range of the first flow rate can be 2-7sccm, and the range of the second flow rate can be 10-150sccm. Here, the upper RF power and the lower RF power are loaded at the same time, and the ignition is assisted by the lower RF power, which can make the ignition link more reliable. During the ignition process, the upper RF power can be 300-1200w.
[0069] Optionally, the process chamber is provided with a PV valve for adjusting the internal air pressure; the PV valve can be used to lower the air pressure in the process chamber according to a preset opening. Optionally, the preset opening of the PV valve can be determined according to the gas volume, and its value range can be 200-400, so that the air pressure in the process chamber can be gradually lowered to 1-5mTorr within the progressive pressure reduction time, and the progressive pressure reduction can be achieved, which can effectively avoid the RF quenching phenomenon when the air pressure in the process chamber drops below 5mTorr (such as 1-2mTorr), so as to achieve stable ultra-low pressure etching of the wafer in the process chamber, and can quickly dissociate by-products during etching, and promote the discharge of by-products.
[0070] Optionally, the radio frequency power when forming the groove includes: a lower radio frequency power of 50-500W, and the lower radio frequency power is less than 80% of the upper radio frequency power.
[0071] In some examples, during the process of forming the groove structure, a detection system such as LEP (laser inline detection system) or IEP (coherent light inline detection system) can be used to monitor the etching depth. Specifically, the etching depth when forming the groove is 70%-90% of the target depth of the groove, so as to reserve part of the depth for consumption in the modification etching process; the modification etching process can continue to etch 10%-30% of the target depth at the bottom of the groove, and on the basis of completing the etching of the remaining depth, it can also weaken the micro-groove defects at the bottom of the groove.
[0072] In some examples, the above method of forming a groove structure is described in detail by taking etching of lithium niobate wafer as an example. A waveguide device can be formed by etching a lithium niobate wafer using the above method of forming a groove structure, wherein the ridges between the resulting grooves can be used as waveguide wires of the waveguide device. When forming the grooves, BCl3 is used as a chemical etching gas, and Ar is used as an auxiliary etching gas. The corresponding process formula can be referred to as shown in Table 1. The initialization step in Table 1 represents the initialization stabilization process before ignition. In the pressure control method, Pressure represents direct adjustment to the target pressure, and Position represents gradual adjustment to the target pressure. In the process of forming the grooves, Figure 1 As shown, the trench sidewall will form a similar Figure 1 The stripes shown in (b) are raised, and micro-groove defects are easily formed at the bottom of the groove.
[0073] Table 1
[0074] step initialization ignition Qihui Stable Etching Duration(s) 5 5 5 20 Air pressure (mTorr) 20 20 / 3 SRF(w) 0 200 470 470 BRF(w) 0 20 0 150 Ar(sccm) 50 50 50 50 <![CDATA[BCl3(sccm)]]> 4 4 4 4 Pressure control method Pressure Pressure Position Pressure PV valve opening 0 0 300 0
[0075] The modification etching process can adopt the process formula shown in Table 2. The etching gas in Table 2 includes Ar. The initialization step represents the initialization stabilization process before ignition. In the pressure control method, Pressure represents direct adjustment to the target pressure, and Position represents gradual adjustment to the target pressure.
[0076] Table 2
[0077] step initialization ignition Qihui Stable Etching Duration(s) 5 5 5 20 Air pressure (mTorr) 20 20 / 2 SRF(w) 0 200 400 200 BRF(w) 0 20 0 20 Ar(Sccm) 50 50 30 30 <![CDATA[N2(Sccm)]]> 0 0 0 0 Pressure control method Pressure Pressure Position Pressure PV valve opening 0 0 200 0
[0078] The inventors also conducted a comparative analysis of the method of placing the wafer into an inclined wafer groove for inclined etching during the modification etching of the present application and the method of placing the wafer into a horizontal wafer groove for conventional etching. The analysis process is as follows:
[0079] In conventional etching methods, secondary etching is easily formed due to the rebound of etching gas (such as Ar) at the corners of the grooves, which may aggravate the groove effect of the micro grooves and aggravate the micro groove problem at the bottom of the grooves. Fig. 9In the conventional etching method, the etching gas bombardment mainly cleans the by-products at the bottom of the groove, while the contact area between the groove sidewall and the corresponding plasma is small, and the plasma cannot effectively clean the by-products on the sidewall, and may even aggravate the sidewall stripes. It can be seen that the conventional etching method is difficult to reduce the roughness of the groove sidewall, but it is easy to increase the roughness there.
[0080] In the inclined etching method, the contact area between the trench sidewall and the corresponding plasma becomes larger, and the stripes on the trench sidewall can be better bombarded by the etching gas, such as Fig.10 As shown in (a), the angle between the etching direction and the stripe protrusion on the groove sidewall increases, which can more effectively etch the stripe protrusion. The top of the stripe protrusion has a fast etching rate under the bombardment of the etching gas, and the bottom of the stripe protrusion has a slow etching rate. After etching, the surface undulation degree is reduced, as shown in FIG. Fig.10 As shown in (b), the roughness of the groove sidewall can be reduced; for the bottom surface of the groove, the micro-grooves formed in the process of etching the grooves have a low etching rate at the bottom of the micro-grooves due to the change in the bombardment angle of the etching gas, and it is difficult for the reflective particles to enter the micro-grooves for a second time, which can reduce the micro-grooves phenomenon and will not be aggravated for a second time. In addition, for lithium niobate wafers, the LN bond energy is very strong, and Ar bombardment etching is used, and the etching rate is low (between 5-15nm / min). In the process of cleaning the byproducts of the groove sidewalls and optimizing the roughness of the groove bottom surface, only the original structure of the wafer is slightly etched. For example, the etching depth of the groove sidewalls can be controlled within 10nm, and the bottom surface roughness is reduced by 1-3nm. Such low-speed etching will not change other structures of the lithium niobate wafer and will not cause related structural damage.
[0081] In addition, the inventor observed the results of the two methods of etching the lithium niobate wafer to form grooves in a traditional manner and etching the surface of the lithium niobate wafer to form grooves and then modifying the lithium niobate wafer with grooves by an inclined etching method to form grooves. It was found that after etching the lithium niobate wafer in a traditional manner, obvious by-products remained on the sidewalls of the grooves, such as Fig.11 As shown in (a), the bottom surface of the groove is relatively rough, with slight micro grooves, such as Fig.11 By using the method for forming a groove structure provided by the present application, a groove is first etched on the surface of a lithium niobate wafer to form a groove, and then two inclined etchings are used to clean the byproducts on the sidewalls of the groove. After the etching is completed, the byproducts on the sidewalls of the groove are significantly reduced, as shown in FIG. Fig.12 As shown in (a), the angle between the groove sidewall and the bottom surface does not change significantly, the angle is greater than 60°, and the micro-groove problem at the bottom does not increase, and is alleviated to a certain extent. Fig.12 As shown in (b).
[0082] It can be seen that the method for forming a groove structure provided in the present application can effectively clean the by-products of the groove sidewalls and optimize their roughness. It can also weaken the defects of the groove bottom surface, maintain the angle between the groove sidewalls and the bottom surface, and avoid damage to other related structures, thereby improving the performance of the resulting chip product.
[0083] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding of this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the functions in the exemplary implementation of this specification shown herein.
[0084] That is, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.
[0085] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0086] In this application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or more advantageous than other embodiments. In order to enable any technician in the field to implement and use the present application, the present application provides the above description. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.
Claims
1. A wafer carrier, characterized in that: The wafer carrying device comprises at least one wafer slot for carrying a wafer, the bottom surface of each wafer slot is an inclined surface relative to a horizontal plane, and the inclination angle of the inclined surface relative to the horizontal plane is an acute angle.
2. The etching method according to claim 1, characterized in that: The inclination angle is 3-10°.
3. The wafer carrier device according to claim 1, characterized in that: The depth of the wafer groove is 0.2-0.8 mm.
4. The wafer carrier device according to claim 1, characterized in that: The wafer carrying device is a tray; the thickness of the tray is 1-5 mm, and the remaining thickness of the tray on the bottom surface of the wafer slot is greater than or equal to 0.6 mm.
5. A method for removing byproducts in a groove, for use in a wafer having a groove pattern, characterized in that: The method comprises: Placing the wafer having the groove pattern on a wafer carrier, wherein the wafer carrier is the wafer carrier according to any one of claims 1 to 4; Performing a first etching on the wafer; Rotating the wafer by a preset angle; The wafer is subjected to a second etching process.
6. The method for removing byproducts in a groove according to claim 5, characterized in that: The preset angle is an integer multiple of 180°.
7. The method for removing byproducts in a groove according to claim 5, characterized in that: The etching gas used in the first etching and the second etching includes at least one of Ar, He and N2.
8. The method for removing byproducts in a groove according to claim 5, characterized in that: The process parameters of the first etching and the second etching include: an etching pressure ranging from 1 to 4 mTorr; and / or an upper RF power ranging from 200 to 500 W, and a lower RF power ranging from 20 to 200 W; and / or an etching time ranging from 30 to 60 s.
9. A method for forming a trench structure, characterized in that: The method comprises: Etching grooves on the surface of the wafer; The byproducts on the sidewalls of the trench are removed by using the method for removing byproducts in the trench as described in any one of claims 5 to 8.
10. The method for forming a trench structure according to claim 9, characterized in that: The etching of the grooves on the surface of the wafer comprises: introducing etching gas into the process chamber; Applying radio frequency power to the process chamber at a first chamber pressure to generate plasma; While maintaining the ignition state, gradually reducing the pressure of the process chamber to reduce the chamber pressure to a second chamber pressure, wherein the second chamber pressure is less than the first chamber pressure; The wafer is etched to form trenches.
11. The method for forming a trench structure according to claim 10, wherein: The pressure of the first chamber is 10-50 mTorr, the pressure of the second chamber is 1-5 mTorr, and the gradual pressure reduction time is 3-10 s.
Citation Information
Patent Citations
Dry etching method
JP1998022262A
Forming method of contact hole and dry etching device
JP2006073562A
Dry etching method or the like
JP2008041744A
Method of manufacturing semiconductor device
JP2009141307A
Plasma process apparatus
KR1020000050250A
