Method for preparing P-type tungsten diselenide field effect transistor through SbSx
By growing SbSx modified film on tungsten diselenide field effect transistor, combined with mechanical peeling method and hydrothermal reaction method, the polarity regulation problem of tungsten diselenide field effect transistor in the prior art is solved, and the P-type of the device is realized Characteristic transformation and polarity regulation promote their application in integrated circuits.
Patent Information
- Application Number
- CN202411317800.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-20
- Publication Date
- 2024-12-13
AI Technical Summary
The prior art is difficult to realize the polarity regulation of tungsten diselenide field effect transistors, which limits its practical application in integrated circuits.
The SbSx modified film was used to grow on the surface of the tungsten diselenide channel material, and the P-type tungsten diselenide field effect transistor was prepared by mechanical peeling method and hydrothermal reaction method, combining silicon dioxide gate dielectric and source and drain electrodes to realize the device's Polarity regulation.
Through the spin coating of SbSx film, the hole concentration in the device is increased, resulting in the Fermi energy level approaching the valence band, and the device is transformed from bipolar to P type, realizing the polarity regulation of WSe2 field effect transistors, promoting its Applications in integrated circuits.
Smart Images
Figure CN119132967A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor devices, and more specifically, relates to a method for x The invention discloses a method for preparing a P-type tungsten diselenide field effect transistor. Background Art
[0002] Tungsten diselenide (WSe2) has suitable mobility, band gap and adjustable physical properties, and has good application potential in post-Moore logic devices. Achieving polarity control of WSe2 field effect transistors (FETs) at extreme performance is the key to promoting its practical application. Summary of the invention
[0003] The technical problem solved by the present invention is to provide a method for preparing a SbS x A method for preparing a P-type tungsten diselenide field effect transistor is provided to solve the problems mentioned in the above background technology.
[0004] The present invention provides a method of using SbS x A method for preparing a P-type tungsten diselenide field effect transistor, comprising: a p-type doped silicon substrate, a silicon dioxide gate dielectric arranged on the p-type doped silicon substrate, a tungsten diselenide channel material arranged on the silicon dioxide gate dielectric, a source-drain electrode arranged on the surface of the tungsten diselenide channel material, and a SbS x Modified film.
[0005] Furthermore, the thickness of the silicon dioxide gate dielectric is 100-300 nanometers.
[0006] Furthermore, the thickness of the above-mentioned tungsten diselenide channel material is 1.4-5 nanometers.
[0007] Furthermore, the source-drain electrodes on the surface of the channel material include a bottom contact metal and an upper metal.
[0008] The bottom contact metal material is one of nickel, platinum and chromium.
[0009] The upper metal material is one of gold, silver, platinum, titanium, aluminum, copper or iron.
[0010] Furthermore, the bottom contact metal material is chromium with a thickness of 10-30 nanometers, and the upper metal material is gold with a thickness of 30-60 nanometers.
[0011] Furthermore, the above-mentioned SbS x The method for preparing a P-type tungsten diselenide field effect transistor adopts a mechanical stripping method to transfer the above-mentioned tungsten diselenide channel material above a p-type doped silicon substrate with a 300-nanometer silicon dioxide gate dielectric.
[0012] Furthermore, the method for preparing the field effect transistor comprises using a coating machine to spin coat a layer of polymethyl methacrylate on the silicon wafer.
[0013] Furthermore, in the above-mentioned method for preparing the field effect transistor, the condition parameters of the coating machine are: 0.05 ml of polymethyl methacrylate, the forward rotation speed of the coating machine is 400-600 rpm, and the rear rotation speed is 2000-3000 rpm.
[0014] Furthermore, in the above method for preparing the field effect transistor, after the coating is completed, a heating table is used to dry and solidify the polymethyl methacrylate, the heating parameters are 100-200 degrees Celsius, and the heating time is 5-10 minutes.
[0015] Furthermore, the method for preparing the field effect transistor adopts electron beam lithography technology to pattern the substrate, and the electron beam exposure parameters are: electron beam dose 100-200 picoules / square centimeter, exposure time 4-5 minutes.
[0016] Furthermore, in the method for preparing the field effect transistor, the substrate is developed to reveal the electrode pattern formed by electron beam lithography.
[0017] Furthermore, in the method for preparing the field effect transistor, the substrate is subjected to vacuum thermal evaporation coating to perform electrode metallization, and the material of the electrode layer includes a bottom contact metal and an upper metal: the bottom contact metal is 20 nanometers of chromium, and the upper metal is 50 nanometers of gold.
[0018] Furthermore, in the method for preparing the field effect transistor, acetone is used to peel off the polymethyl methacrylate layer of the device.
[0019] Furthermore, the method for preparing the field effect transistor adopts a hydrothermal reaction method to grow SbS on the surface of the tungsten diselenide channel material. x Modified film.
[0020] Furthermore, in the preparation method of the above-mentioned field effect transistor, the condition parameters of the hydrothermal reaction method are: 0.5-1 g of sodium thiosulfate pentahydrate, 0.2-0.5 g of potassium antimony tartrate hemihydrate, 30-50 ml of deionized water, growth temperature of 100-200 degrees Celsius, growth time of 10-20 minutes, annealing temperature of 300-400 degrees Celsius, and annealing time of 10-20 minutes.
[0021] In general, the above technical solutions conceived by the present invention can achieve the following beneficial effects: Generally, the Fermi level of WSe2 is in the middle of the gap. xFor the film, Sb is the main acceptor, which increases the hole concentration and makes the film show p-type characteristics. x When the film is spin-coated on WSe2FET, SbS x The holes in the film are transported to the channel of the device through charge transfer, the hole concentration in the device channel increases, the WSe2 Fermi level approaches the valence band, and the device changes from bipolar to p-type.
[0022] In summary, the SbS x The method for preparing P-type tungsten diselenide field effect transistor can realize the polarity regulation of WSe2 field effect transistors (FETs), which can promote its practical application in integrated circuits.
[0023] Figure 1 It is a schematic diagram of the structure of the field effect transistor of the present invention.
[0024] Figure 2 The SbS obtained in the embodiment of the present invention x Scanning electron microscope image of the fabricated P-type tungsten diselenide field-effect transistor.
[0025] The present invention is further illustrated by specific examples below. These examples are exemplary and are intended to illustrate the problem and explain the present invention, but are not limiting.
[0026] A SbS x Preparation method of P-type tungsten diselenide field effect transistor. Figure 1 As shown, on a p-type doped silicon substrate with a 300-nanometer silicon dioxide gate dielectric, a 1.4-nanometer thick tungsten diselenide is transferred on the substrate by mechanical stripping. After the transfer, a layer of polymethyl methacrylate is evenly spin-coated on the substrate, and then the electrode is patterned by electron beam lithography, and the electrode is metallized by development and vacuum evaporation to obtain the tungsten diselenide field effect transistor.
[0027] The transistor preparation stage includes the following steps.
[0028] 1) Select a p-type doped silicon substrate with a 300-nanometer silicon dioxide gate dielectric, cut the substrate into a specified size, put the substrate into an ultrasonic cleaner, clean the substrate with deionized water, and then put it into a vacuum drying oven for drying.
[0029] 2) Using mechanical exfoliation, the tungsten diselenide crystal powder was exfoliated into a two-dimensional material with a thickness of 1.4 nanometers.
[0030] 3) Using a polydimethylsiloxane film, the two-dimensional material of step 3) is transferred to a dry substrate.
[0031] 4) Place the substrate into a coating machine and evenly spin coat a layer of polymethyl methacrylate solution.
[0032] Specifically, in the solution used in step 4), the ratio of polymethyl methacrylate to isopropanol is 1:1.
[0033] Specifically, in step 4), the parameters of the coating machine are: 0.05 ml of polymethyl methacrylate, the forward rotation speed of the coating machine is 400 rpm, and the rear rotation speed is 2000 rpm.
[0034] 5) The polymethyl methacrylate was dried and cured using a heating table at 100 degrees Celsius for 10 minutes.
[0035] 6) Electron beam lithography is used to photolithography the polymethyl methacrylate film to achieve patterning of transistor electrodes.
[0036] Specifically, the condition parameters of step 6) electron beam lithography are: grating 50 microns, voltage 10 kilovolts, electron beam dose 200 picoliters per square centimeter, and exposure time 4 minutes.
[0037] 7) The obtained substrate is subjected to a developing treatment in a developing solution to expose the electrode pattern formed by electron beam lithography.
[0038] Specifically, the ratio of methyl isobutyl ketone to isopropyl alcohol in the developer used in step 7) is 2:1.
[0039] 8) The obtained substrate is placed in a thermal evaporation apparatus, and the chromium rod and the evaporation boat containing gold are placed in the apparatus respectively to perform electrode metallization.
[0040] To further illustrate, the material of the electrode layer includes a bottom contact metal and an upper metal: the bottom contact metal is 20 nanometers of chromium, and the upper metal is 50 nanometers of gold.
[0041] 9) The substrate is placed in acetone, and the polymethyl methacrylate layer and the electrode layer deposited thereon are peeled off to obtain a tungsten diselenide field effect transistor device.
[0042] 10) Place the above device in a hydrothermal reactor to grow SbS on the surface of the tungsten diselenide channel material. x Modified film.
[0043] Specifically, the SbS used in step 10) x The solution is: 0.2 g of potassium antimony tartrate hemihydrate is first dissolved in 50 ml of deionized water, and then 0.5 g of sodium thiosulfate pentahydrate is added.
[0044] Specifically, the hydrothermal reaction condition parameters used in step 10) are: growth temperature 200 degrees Celsius, growth time 20 minutes, annealing temperature 300 degrees Celsius, annealing time 20 minutes.
[0045] 11) Send the above devices to the testing room for electrical, optical and reliability tests.
[0046] The above embodiments are exemplary, and their purpose is to illustrate the technical concept and features of the present invention so that people familiar with this field can understand the content of the present invention and implement it, and they cannot limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.
Claims
1. A method through SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that include: A p-type doped silicon substrate, a silicon dioxide gate dielectric disposed on the p-type doped silicon substrate, a tungsten diselenide channel material disposed on the silicon dioxide gate dielectric, a source-drain electrode disposed on the surface of the tungsten diselenide channel material, and a SbS x Modified film.
2. A method according to claim 1 wherein SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that: Tungsten diselenide channel material transferred over a p-type doped silicon substrate with a 300nm silicon dioxide gate dielectric.
3. A method according to claim 1 wherein SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that: The silicon dioxide layer has a thickness of 100-300 nanometers.
4. The method according to claim 1, wherein the SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that: The thickness of the tungsten diselenide channel material is 1.4-5 nanometers.
5. The method according to claim 1, wherein the SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that: The bottom contact metal material is chromium with a thickness of 10-30 nanometers, and the upper metal material is gold with a thickness of 30-60 nanometers.
6. The method according to claim 1, wherein the SbS x A method for preparing a P-type tungsten diselenide field effect transistor, characterized in that: The SbS on the surface of the tungsten diselenide channel material x The film is modified by a hydrothermal reaction method.
7. A method through SbS x A method for preparing a P-type tungsten diselenide field effect transistor, used to produce the field effect transistor of claim 1, characterized in that: The following steps are involved: Select a p-type doped silicon substrate with a 300-nanometer silicon dioxide gate dielectric, and cut the substrate into a specified size; Put the substrate into an ultrasonic cleaning machine and clean the substrate with deionized water; The cleaned substrate is sent into a vacuum drying oven for drying; Using mechanical exfoliation, tungsten diselenide crystal powder was exfoliated into a two-dimensional material with a thickness of 1.4 nanometers; Using polydimethylsiloxane film, the 2D material was transferred to a dry substrate; Put the substrate into a coating machine, evenly spin-coat a layer of polymethyl methacrylate solution and heat to cure; The polymethyl methacrylate film was photolithographically processed using electron beam lithography; The obtained substrate is subjected to a developing process in a developing solution to expose the electrode pattern formed by electron beam lithography; The obtained substrate is placed in a thermal evaporation apparatus, and a chromium rod and an evaporation boat containing gold are placed in the apparatus respectively to perform electrode metallization; The substrate is placed in acetone, and the polymethyl methacrylate layer and the electrode layer deposited thereon are peeled off to obtain a tungsten diselenide field effect transistor device.
8. A method through SbS x Preparation method for preparing P-type tungsten diselenide field effect transistor, used to produce SbS of claim 7 x The modified film is characterized by: The following steps are involved: Placing the device for producing claim 5 into a hydrothermal reaction vessel; Dissolve 0.2 g of potassium antimony tartrate hemihydrate in 50 ml of deionized water, then add 0.5 g of sodium thiosulfate pentahydrate to prepare SbS x Solution; The hydrothermal reaction condition parameters are: growth temperature 200 degrees Celsius, growth time 20 minutes; After the growth is completed, the device is taken out, rinsed with deionized water, and placed on a heating table for annealing at a temperature of 300 degrees Celsius for 20 minutes.