Manufacturing method of light-emitting diode chip
By using sputtering coating method, atomic layer deposition method and plasma enhanced chemical vapor deposition method in the light emitting diode chip, combined with high-energy ion beam carbonized photoresist to form nano-scale mountain-like texture, the light emitting efficiency and anti-static ability of the light emitting diode are solved. The problem of this problem is to achieve efficient and low-cost processes and is suitable for industrial applications.
Patent Information
- Application Number
- CN202411082584.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-08
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2044-08-08
AI Technical Summary
How to further improve the luminous efficiency of light emitting diodes to meet the needs of high-end applications, while improving antistatic capabilities, and the process needs to be simple and low-cost, and compatible with traditional manufacturing processes.
The ITO layer was made by sputtering coating method, Al2O3 layer was grown by atomic layer deposition method, and the SiNx layer was deposited by plasma-enhanced chemical vapor deposition method. The nano-scale mountain-like texture was formed by carbonized photoresist with high-energy ion beams, reducing Fresnel reflection and Inner total reflection increases scattering effect, and finally, nano-scale mountain-like texture is formed on the surface of the SiNx layer to improve light efficiency.
It effectively improves the light output efficiency and anti-static ability of LED devices, avoids the use of nano-level lithography, has simple process, low cost, is compatible with traditional manufacturing processes, and is suitable for industrial applications.
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Figure CN119133337A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor chip manufacturing, and more specifically, to a method for manufacturing a light emitting diode chip. Background Art
[0002] Light-Emitting Diode (LED) is a semiconductor electronic device that converts electrical energy into light energy. LED is widely used in lighting, mobile phone / TV backlight display, sterilization and disinfection due to its low operating voltage, small operating current, good impact and vibration resistance, high reliability, long life, and green environmental protection.
[0003] With the vigorous development of the third generation semiconductor technology, semiconductor LED lighting has become the focus of social development with its advantages of energy saving, environmental protection, high brightness and long life. In recent years, the performance of LED has been greatly improved and the production cost has been continuously reduced, which has made outstanding contributions to the entry of semiconductor lighting into thousands of households. However, in order to accelerate the sterilization and disinfection, mobile phone / TV backlight display and other high-end applications, LED devices need to further improve the light efficiency. How to further improve the light efficiency of LED chips is a hot topic in this field.
[0004] Therefore, improving the luminous efficiency of light-emitting diodes is an urgent problem to be solved in this field. Summary of the invention
[0005] The purpose of the present invention is to provide a method for manufacturing a light emitting diode chip to improve the light extraction efficiency of LED devices and to improve the antistatic ability of LED devices. The technical solution does not require nano-scale photolithography, has a simple process, low cost, and is compatible with traditional manufacturing processes, and is suitable for industrial applications.
[0006] The present invention discloses a method for manufacturing a light emitting diode chip, which is characterized by comprising the following steps:
[0007] Step 1: Using a sputtering coating method to form an ITO layer on the epitaxial wafer;
[0008] Step 2: growing an Al2O3 layer on the ITO layer using an atomic layer deposition method to improve the light transmittance of the material layer;
[0009] Step 3: Deposit SiN on the Al2O3 layer using plasma enhanced chemical vapor deposition x The SiN layer is used as a passivation layer to reduce the leakage current of the device and prevent the device from oxidation failure. x During the deposition process of the SiN layer, the flow ratio of SiH4 to NH3 is gradually increased to improve the x The density and uniformity of the membrane material;
[0010] Step 4: In SiN x Spin-coating a positive photoresist mask layer on the layer;
[0011] Step 5: bombarding the photoresist mask layer with a high-energy ion beam of ion beam etching to carbonize the photoresist mask layer, and forming a nanoscale mountain-like texture on the surface of the photoresist mask layer after carbonization;
[0012] Step 6: Etch SiN using dry etching method x The passivation layer and the carbonized photoresist mask layer covering it are used to transfer the nanoscale mountain texture pattern on the surface of the carbonized photoresist mask layer to the SiN x Layer surface, on SiN x The layer surface is distributed to form a nanoscale mountain-like texture;
[0013] Step 7: selectively etching the epitaxial wafer to the n-GaN layer by ICP etching;
[0014] Step 8: Deposit p-type and n-type metal electrodes, and finally obtain an LED device with a nanoscale mountain-like texture on the surface. The nanoscale mountain-like texture increases the scattering effect on the surface of the LED device to reduce the internal Fresnel reflection and the total internal reflection of the top interface, thereby improving the light output efficiency of the LED device.
[0015] Furthermore, the thickness of the ITO layer in step 1 is 100-300 nm.
[0016] Furthermore, the thickness of the Al2O3 layer in step 2 is 5-20nm.
[0017] Furthermore, the deposition of SiN in step 3 x Layer, further:
[0018] The temperature was controlled at 200-300℃, the RF power was 50-70W, the flow ratio of SiH4 to NH3 was gradually increased from 1:2 to 2:1, the N2 gas flow rate was 800-1200sccm, and 1-2um thick SiN was deposited on the Al2O3 layer. x layer, where X ranges from 0.05-1.
[0019] Furthermore, the thickness of the positive photoresist mask layer in step four is 1-3 um.
[0020] Furthermore, the nanoscale mountain-like texture in step five is further as follows: the distance between two adjacent mountain-like textures is 200-1200nm.
[0021] Furthermore, in step 6, the SiN xThe surface of the layer is distributed to form nanoscale mountain-like textures, and further: the distance between two adjacent mountain-like textures is 200-900nm, and the height of the mountain-like texture is 200-700nm.
[0022] Compared with the prior art, the method for preparing a light emitting diode chip of the present invention achieves the following beneficial effects:
[0023] 1. Compared with growing SiN directly on the ITO layer x The present invention first grows an Al2O3 layer on the ITO layer and then grows a SiN x The layer can improve the light transmittance of the material layer and enhance the light extraction efficiency of the LED. This is because SiH4 gas is used to deposit SiN on ITO by PECVD. x When the Al2O3 layer is grown on the ITO layer, the H-containing free radicals will reduce the In2O3 to metallic In on the film surface, resulting in a decrease in the transmittance of the ITO layer in the visible light range. The present application can avoid the problem of decreased transmittance by growing an Al2O3 layer on the ITO layer.
[0024] 2. Through SiN x During the deposition process of the SiN layer, the flow ratio of SiH4 to NH3 is gradually increased, which can improve the x The density and uniformity of the film material improves the SiN x The refractive index of the film makes SiN x The refractive index of the film layer is close to that of the ITO layer, thereby reducing the total internal reflection of light and reducing the photons emitted from the active area from the ITO layer to the SiN x The light loss of the layer is reduced, so that the light extraction efficiency of the LED device is improved.
[0025] 3. The technical solution of the method of the present invention is to use high-energy ions to bombard the photoresist to carbonize and form a nano-texture as a mask pattern to directly x The passivation layer is dry-etched to form a nano-scale mountain-like texture on the surface of the LED. The nano-scale mountain-like texture can increase the scattering effect on the surface of the LED device to reduce the internal Fresnel reflection and the internal total reflection of the top interface, thereby improving the light output efficiency of the LED device. Since the nano-texture is realized on the surface passivation layer of the LED device, this new self-mask surface roughening solution causes less damage to the device and is conducive to improving the anti-static ability of the LED device.
[0026] 4. The technical solution of this application does not require nanoscale lithography, has a simple process, low cost, and is compatible with traditional manufacturing processes, making it very suitable for industrial applications.
[0027] Of course, any product implementing the present invention does not necessarily need to achieve all of the technical effects described above at the same time.
[0028] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
[0030] Figure 1 The figure shows step 1 of the light emitting diode of the embodiment of the present application.
[0031] Figure 2 The figure shows step 2 of the light emitting diode of the embodiment of the present application.
[0032] Figure 3 The figure shows step 3 of the light emitting diode of the embodiment of the present application.
[0033] Figure 4 The figure shows step 4 of the light emitting diode of the embodiment of the present application.
[0034] Figure 5 This is step five of the light emitting diode of the embodiment of the present application.
[0035] Figure 6 This is step six of the light emitting diode of the embodiment of the present application.
[0036] Figure 7 Shown are steps 7 to 8 of the light emitting diode of the embodiment of the present application.
[0037] Illustration: 1. Epitaxial wafer, 2. ITO layer, 3. Al2O3 layer, 4. SiN x layer, 5, photoresist mask layer, 6, P-type metal electrode, 7, N-type metal electrode. DETAILED DESCRIPTION
[0038] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.
[0039] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
[0040] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.
[0041] In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.
[0042] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.
[0043] The method for preparing the light emitting diode chip described in this embodiment comprises the following steps:
[0044] Step 101: A 100-300 nm thick ITO layer 2 is formed on the epitaxial wafer 1 by a sputtering coating method to enhance current spreading.
[0045] Step 102: grow an Al2O3 layer 3 with a thickness of 5-20 nm on the ITO layer 2 by using an atomic layer deposition method to improve the light transmittance of the material layer and enhance the light extraction efficiency of the LED.
[0046] Step 103: Deposit 1-2 μm thick SiN on the Al2O3 layer 3 using a plasma enhanced chemical vapor deposition method. x Layer 4 is used as a passivation layer to reduce the leakage current of the device and prevent the device from oxidation failure. The SiN x Layer 4, further:
[0047] The temperature was controlled at 200-300℃, the RF power was 50-70W, the flow ratio of SiH4 to NH3 was gradually increased from 1:2 to 2:1, the N2 gas flow rate was 800-1200sccm, and 1-2um thick SiN was deposited on the Al2O3 layer 3. x Layer 4, where X ranges from 0.05-1.
[0048] By controlling SiN x During the deposition of layer 4, the flow ratio of SiH4 to NH3 gradually increased to improve the SiN x The density and uniformity of the film material improves the SiN x The refractive index of the film 4 makes SiN x The refractive index of the film layer 4 is close to that of the ITO layer 2, thereby reducing the total internal reflection of light to reduce the photons emitted from the active area from the ITO layer 2 to the SiN x The light loss of layer 4 improves the light extraction efficiency of the LED device.
[0049] Step 104: In SiN x A 1-3 um thick positive photoresist mask layer 5 is spin-coated on the layer 4.
[0050] Step 105, bombarding the photoresist mask layer 5 with a high-energy ion beam of ion beam etching to carbonize the photoresist mask layer 5, and forming a nanoscale mountain-like texture on the surface of the photoresist mask layer 5 after carbonization, wherein the distance between two adjacent mountain-like textures is 200-1200nm;
[0051] Step 106: Etch SiN using a dry etching method x The carbonized photoresist mask layer 5 is formed on the SiN layer 4 to transfer the nanometer-scale mountain-shaped texture pattern on the surface of the carbonized photoresist mask layer to the SiN x Layer surface, on SiN x The surface of the layer is distributed to form a nanoscale mountain texture, where the distance between two adjacent mountain textures is 200-900nm, and the height of the mountain texture is 200-700nm. This nanoscale mountain texture can reduce the internal Fresnel reflection and the internal total reflection of the top interface by increasing the scattering effect on the surface of the LED device, thereby improving the light extraction efficiency.
[0052] Step 107: selectively etch the epitaxial wafer to the n-GaN layer by ICP etching to form a step.
[0053] Step 108 , depositing a p-type metal electrode 6 and an n-type metal electrode 7 , and finally obtaining an LED device having a nanoscale mountain-like texture on the surface.
[0054] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that the above embodiments may be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.
Claims
1. A method for manufacturing a light emitting diode chip, comprising the following steps: Step 1: Using a sputtering coating method to form an ITO layer on the epitaxial wafer; Step 2: growing an Al2O3 layer on the ITO layer using an atomic layer deposition method; Step 3: Deposit SiN on the Al2O3 layer using plasma enhanced chemical vapor deposition x layer as a passivation layer, where SiN x During the layer deposition process, the flow ratio of SiH4 and NH3 is controlled to increase gradually; Step 4: In SiN x Spin-coating a positive photoresist mask layer on the layer; Step 5: bombarding the photoresist mask layer with a high-energy ion beam of ion beam etching to carbonize the photoresist mask layer, and forming a nanoscale mountain-like texture on the surface of the photoresist mask layer after carbonization; Step 6: Etch SiN using dry etching method x The passivation layer and the carbonized photoresist mask layer covering it are used to transfer the nanoscale mountain texture pattern on the surface of the carbonized photoresist mask layer to the SiN x Layer surface, on SiN x The layer surface is distributed to form a nanoscale mountain-like texture; Step 7: Etch the epitaxial wafer to the n-GaN layer to form a step by ICP etching; Step 8: Deposit p-type and n-type metal electrodes, and finally obtain an LED device with a nanoscale mountain-like texture on the surface.
2. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: The thickness of the ITO layer in step 1 is 100-300 nm.
3. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: The thickness of the Al2O3 layer in step 2 is 5-20nm.
4. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: The step 3 of depositing SiN x Layer, further: The temperature was controlled at 200-300℃, the RF power was 50-70W, the flow ratio of SiH4 to NH3 was gradually increased from 1:2 to 2:1, the N2 gas flow rate was 800-1200sccm, and 1-2um thick SiN was deposited on the Al2O3 layer. x layer, where X ranges from 0.05-1.
5. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: The thickness of the positive photoresist mask layer in step 4 is 1-3 um.
6. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: The nanoscale mountain-like texture in step five is further characterized in that the distance between two adjacent mountain-like textures is 200-1200 nm.
7. The method for manufacturing a light emitting diode chip according to claim 1, characterized in that: Step 6 of the SiN x The surface of the layer is distributed to form nanoscale mountain-like textures, and further: the distance between two adjacent mountain-like textures is 200-900nm, and the height of the mountain-like texture is 200-700nm.
Citation Information
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