Semiconductor device
Through multi-layer structure design and metal oxide optimization, the problem of channel length and electrical characteristics control of micro transistors in the prior art is solved, and a micro transistor with low power consumption and high reliability is realized, which is suitable for high-definition display devices.
Patent Information
- Application Number
- CN202380037713.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-05-27
- Filing Date
- 2023-05-12
- Publication Date
- 2024-12-13
Smart Images

Figure CN119137749A_ABST
Abstract
Description
Technical Field
[0001] One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the same. One embodiment of the present invention relates to a transistor and a method for manufacturing the same. One embodiment of the present invention relates to a display device including a semiconductor device.
[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. As an example of the technical field of one embodiment of the present invention, a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input device (e.g., a touch sensor), an input-output device (e.g., a touch panel), and a driving method or a manufacturing method of the above-mentioned device can be cited.
[0003] Note that in this specification, etc., a semiconductor device refers to a device that utilizes semiconductor characteristics, a circuit including a semiconductor element (transistor, diode, photodiode, etc.), and a device including the circuit. In addition, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, as examples of semiconductor devices, there are integrated circuits, chips with integrated circuits, and electronic components that contain chips in packages. In addition, storage devices, display devices, light-emitting devices, lighting devices, and electronic devices themselves are semiconductor devices, and sometimes all include semiconductor devices. Background Art
[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, in display devices, by reducing the occupied area of transistors, the pixel size can be reduced, thereby improving the definition. Therefore, micro transistors are required.
[0005] As devices requiring a high-definition display apparatus, for example, devices for virtual reality (VR: Virtual Reality), augmented reality (AR: Augmented Reality), alternative reality (SR: Substitutional Reality), and mixed reality (MR: Mixed Reality) are being actively developed.
[0006] As a display device, for example, a light emitting device including an organic EL (Electro Luminescence) element or a light emitting diode (LED: Light Emitting Diode) has been developed.
[0007] Patent Document 1 discloses a high-definition display device using an organic EL element. [Prior technical literature] [Patent Document]
[0008] [Patent Document 1] International Patent Application Publication No. 2016 / 038508 Summary of the invention Technical problem to be solved by the invention
[0009] One of the purposes of one embodiment of the present invention is to provide a micro transistor. One of the purposes of one embodiment of the present invention is to provide a transistor with a short channel length. One of the purposes of one embodiment of the present invention is to provide a transistor with a large on-state current. One of the purposes of one embodiment of the present invention is to provide a transistor with a small off-state current. One of the purposes of one embodiment of the present invention is to provide a transistor with good electrical characteristics. One of the purposes of one embodiment of the present invention is to provide a semiconductor device with a small footprint. One of the purposes of one embodiment of the present invention is to provide a semiconductor device with low wiring resistance. One of the purposes of one embodiment of the present invention is to provide a semiconductor device or display device with low power consumption. One of the purposes of one embodiment of the present invention is to provide a transistor, semiconductor device or display device with high reliability. One of the purposes of one embodiment of the present invention is to provide a high-definition display device. One of the purposes of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device or display device with high productivity. One of the purposes of one embodiment of the present invention is to provide a novel transistor, semiconductor device, display device or method for manufacturing them.
[0010] Note that the description of these objectives does not prevent the existence of other objectives. One embodiment of the present invention does not need to achieve all of the above objectives. Objectives other than the above objectives can be extracted from the description of the specification, drawings, and claims. Solutions to technical problems
[0011] One embodiment of the present invention is a semiconductor device, comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The first insulating layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer. The second insulating layer is disposed on the second semiconductor layer. The third conductive layer is disposed on the second insulating layer. The conductivity of the first semiconductor layer is different from the conductivity of the second semiconductor layer.
[0012] One embodiment of the present invention is a semiconductor device, comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The first insulating layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer. The second insulating layer is disposed on the second semiconductor layer. The third conductive layer is disposed on the second insulating layer. The conductivity of the first semiconductor layer is higher than the conductivity of the second semiconductor layer.
[0013] One embodiment of the present invention is a semiconductor device, comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The first insulating layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer. The second insulating layer is disposed on the second semiconductor layer. The third conductive layer is disposed on the second insulating layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The band gap of the first metal oxide is smaller than the band gap of the second metal oxide.
[0014] One embodiment of the present invention is a semiconductor device, comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The first insulating layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer. The second insulating layer is disposed on the second semiconductor layer. The third conductive layer is disposed on the second insulating layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The first metal oxide includes indium. The second metal oxide includes indium and an element M. The element M is one or more of gallium, aluminum, and tin. The content of the element M contained in the first metal oxide is lower than the content of the element M contained in the second metal oxide.
[0015] One embodiment of the present invention is a semiconductor device, comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The first insulating layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer. The second insulating layer is disposed on the second semiconductor layer. The third conductive layer is disposed on the second insulating layer. The first semiconductor layer and the second semiconductor layer each contain a metal oxide. The crystallinity of the first semiconductor layer is lower than that of the second semiconductor layer.
[0016] In the above semiconductor device, it is preferred that the first conductive layer and the second conductive layer each include an oxide conductor.
[0017] In the semiconductor device, the first insulating layer preferably includes a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer. The fourth insulating layer preferably includes oxygen. The third insulating layer and the fifth insulating layer preferably each include nitrogen.
[0018] In the semiconductor device, the first insulating layer preferably includes a third insulating layer, a fourth insulating layer on the third insulating layer, a fifth insulating layer on the fourth insulating layer, and a sixth insulating layer on the fifth insulating layer. The fifth insulating layer preferably contains oxygen. The third insulating layer, the fourth insulating layer, and the sixth insulating layer preferably contain nitrogen, respectively. The third insulating layer preferably includes a region whose hydrogen content is higher than that of the fourth insulating layer.
[0019] The semiconductor device preferably further includes a fourth conductive layer. The fourth conductive layer preferably includes a region in contact with the top surface of the first conductive layer. The first insulating layer preferably includes a region in contact with the top surface of the first conductive layer and the top surface and side surface of the fourth conductive layer. The fourth conductive layer preferably includes a region overlapping with the third conductive layer via the first insulating layer, the first semiconductor layer, the second semiconductor layer, and the second insulating layer. The conductivity of the fourth conductive layer is preferably higher than the conductivity of the first conductive layer. Effects of the Invention
[0020] According to one embodiment of the present invention, a micro transistor can be provided. According to one embodiment of the present invention, a transistor with a short channel length can be provided. According to one embodiment of the present invention, a transistor with a large on-state current can be provided. According to one embodiment of the present invention, a transistor with a small off-state current can be provided. According to one embodiment of the present invention, a transistor with good electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with a small footprint can be provided. According to one embodiment of the present invention, a semiconductor device with low wiring resistance can be provided. According to one embodiment of the present invention, a semiconductor device or a display device with low power consumption can be provided. According to one embodiment of the present invention, a transistor, a semiconductor device or a display device with high reliability can be provided. According to one embodiment of the present invention, a high-definition display device can be provided. According to one embodiment of the present invention, a method for manufacturing a semiconductor device or a display device with high productivity can be provided. According to one embodiment of the present invention, a novel transistor, a semiconductor device, a display device or a method for manufacturing them can be provided.
[0021] Note that the description of these effects does not prevent the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1A is a plan view showing an example of a semiconductor device. Figure 1B and Figure 1C is a cross-sectional view showing an example of a semiconductor device. FIG. 2A to FIG. 2D It is a perspective view showing an example of a semiconductor device. Figure 3A is a plan view showing an example of a semiconductor device. Figure 3B is a cross-sectional view showing an example of a semiconductor device. FIG. 4A to FIG. 4C is a cross-sectional view showing an example of a semiconductor device. Figure 5A and Figure 5B is a cross-sectional view showing an example of a semiconductor device. Fig. 6A and Figure 6B is a cross-sectional view showing an example of a semiconductor device. Fig. 7A and Figure 7B is a cross-sectional view showing an example of a semiconductor device. Fig. 8A and Figure 8B is a cross-sectional view showing an example of a semiconductor device. Fig. 9is a cross-sectional view showing an example of a semiconductor device. Fig. 10A is a plan view showing an example of a semiconductor device. Fig. 10B is a cross-sectional view showing an example of a semiconductor device. Fig.11A and Fig. 11B is a cross-sectional view showing an example of a semiconductor device. FIG. 12A to FIG. 12D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIG. 13A to FIG. 13C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIG. 14A to FIG. 14C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. Fig.15A and Fig. 15B is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. Fig.16 It is a perspective view showing an example of a display device. Fig.17 is a cross-sectional view showing an example of a display device. Fig.18 is a cross-sectional view showing an example of a display device. Fig.19 is a cross-sectional view showing an example of a display device. FIG. 20A to FIG. 20C is a cross-sectional view showing an example of a display device. Fig.21 is a cross-sectional view showing an example of a display device. Fig. 22 is a cross-sectional view showing an example of a display device. Fig.23 is a cross-sectional view showing an example of a display device. FIG. 24A to FIG. 24F This is a cross-sectional view showing an example of a method for manufacturing a display device. FIG. 25A to FIG. 25D is a diagram showing an example of an electronic device. FIG. 26A to FIG. 26F is a diagram showing an example of an electronic device. FIG. 27A to FIG. 27G is a diagram showing an example of an electronic device. Fig.28A and Fig.28B is a graph showing Id-Vg characteristics of a transistor. Fig.29A and Fig.29B is a graph showing Id-Vg characteristics of a transistor. Modes for Carrying Out the Invention
[0023] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the mode and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.
[0024] Note that in the invention structure described below, the same symbol is shared in different drawings to show the same part or part with the same function, and repeated description is omitted. In addition, when representing a part with the same function, the same hatching is sometimes used without adding a special reference numeral.
[0025] In addition, for ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent its actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.
[0026] Note that in this specification, etc., ordinal numbers such as "first" and "second" are added for convenience, but they do not limit the number of components or the order of components (for example, the order of processes or the order of stacking). In addition, the ordinal numbers added to components in one part of this specification may not be consistent with the ordinal numbers added to the components in other parts of this specification or claims.
[0027] In addition, depending on the situation or state, the "film" and the "layer" may be interchanged. For example, the "conductive layer" may be replaced with the "conductive film". Also, the "insulating film" may be replaced with the "insulating layer".
[0028] A transistor is a type of semiconductor element and can realize functions of amplifying current or voltage, controlling switching operations of conduction or non-conduction, etc. The transistor in this specification includes IGFET (Insulated Gate Field Effect Transistor) and thin film transistor (TFT: Thin Film Transistor).
[0029] The functions of "source" and "drain" may be interchanged when transistors with different polarities are used or when the current direction of a circuit changes. Therefore, in this specification, "source" and "drain" may be interchanged.
[0030] In this specification, "electrical connection" includes connection through "an element having some kind of electrical function". Here, "an element having some kind of electrical function" is not particularly limited as long as it can transmit and receive electrical signals between the connected objects. For example, "an element having some kind of electrical function" includes switching elements such as transistors, resistor elements, coils, capacitor elements, and other elements having various functions in addition to electrodes and wiring.
[0031] In addition, in this specification, unless otherwise specified, the off-state current refers to the leakage current between the source and the drain when the transistor is in the off state (also called the non-conducting state or the blocking state). In an n-channel transistor, the off state refers to the voltage V between the gate and the source. gs Below the threshold voltage V th (In a p-channel transistor, V gs Higher than V th ) status.
[0032] In this specification, etc., "the top surface shapes are roughly consistent" means that at least a portion of the edges of each layer in the stack overlap. For example, it includes the case where the upper layer and the lower layer are processed by the same mask pattern or a portion of the same mask pattern. However, in reality, there are cases where the edges do not overlap, and sometimes the upper layer is located on the inside of the lower layer or the upper layer is located on the outside of the lower layer. In this case, it can also be said that "the top surface shapes are roughly consistent". When the top surface shapes are consistent or roughly consistent, it can also be said that the ends are aligned or roughly aligned.
[0033] In this specification, etc., a tapered shape refers to a shape in which at least a portion of the side surface of a constituent element is inclined relative to the substrate surface or the formed surface. For example, it is preferred to have a region in which the angle (also referred to as a taper angle) formed by the inclined side surface and the substrate surface or the formed surface is less than 90 degrees. Here, the side surface, substrate surface, and formed surface of the constituent element do not necessarily have to be completely flat, and may also be a substantially planar shape with a slight curvature or a substantially planar shape with fine concave-convex shapes.
[0034] In this specification, etc., a device manufactured using a metal mask or FMM (Fine Metal Mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification, etc., a device manufactured without using a metal mask or FMM is sometimes referred to as a device having an MML (Metal Mask Less) structure.
[0035] In this specification, etc., a structure in which light-emitting layers are separately manufactured in light-emitting elements (also called light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure can optimize the materials and structures of each light-emitting element, the freedom of choice of materials and structures is increased, and it is easy to achieve improved brightness and reliability.
[0036] In this specification, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer is sometimes referred to as a "carrier injection layer", a hole transport layer or an electron transport layer is sometimes referred to as a "carrier transport layer", and a hole blocking layer or an electron blocking layer is sometimes referred to as a "carrier blocking layer". Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer are sometimes not clearly distinguishable based on their cross-sectional shape or characteristics. In addition, sometimes one layer has the functions of two or three of a carrier injection layer, a carrier transport layer, and a carrier blocking layer.
[0037] In this specification, etc., a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as the layer included in the EL layer (also referred to as a functional layer), a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer) and a carrier blocking layer (hole blocking layer and electron blocking layer) can be cited. In this specification, etc., a light-receiving element (also referred to as a light-receiving device) includes at least an active layer used as a photoelectric conversion layer between a pair of electrodes. In this specification, etc., one of a pair of electrodes is sometimes referred to as a pixel electrode, and the other is referred to as a common electrode.
[0038] In this specification, etc., the sacrificial layer (also referred to as a mask layer) is located at least above the light-emitting layer (more specifically, a layer processed into an island shape among the layers constituting the EL layer) and has a function of protecting the light-emitting layer during the manufacturing process.
[0039] In this specification and the like, disconnection refers to a phenomenon in which a layer, a film, or an electrode is disconnected due to the shape of a formed surface (for example, a step, etc.).
[0040] (Implementation Method 1) In this embodiment, a semiconductor device which is one embodiment of the present invention is described with reference to FIGS. 1 to 11 .
[0041] <Structural Example 1> A transistor that can be used in a semiconductor device according to one embodiment of the present invention will be described. Figure 1A A top view of transistor 100 is shown. Figure 1B Shown along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 1CA cross-sectional view along the dot-dash line B1-B2 is shown. Figure 1A In the diagram, a portion of the components of the transistor 100 (such as the gate insulating layer) is omitted. Figure 1A Similarly, some components are omitted in the following drawings.
[0042] FIG. 2A to FIG. 2D 1 shows a perspective view of transistor 100. Note that Figure 2B Shown along Figure 2A The cross section of the dotted line C1-C2 is shown. Figure 2C Shown in perspective Figure 2A The insulating layer shown in FIG. 1 is shown with its outline shown in dotted lines. Figure 2D Shown in perspective Figure 2B The insulating layer is shown with its outline shown in dotted lines.
[0043] The transistor 100 is provided on a substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 is used as a gate electrode (also referred to as a first gate electrode). A portion of the insulating layer 106 is used as a gate insulating layer (also referred to as a first gate insulating layer). The conductive layer 112a is used as one of the source electrode and the drain electrode, and the conductive layer 112b is used as the other of the source electrode and the drain electrode. In the semiconductor layer 108, the entire region where the gate insulating layer overlaps the gate electrode between the source electrode and the drain electrode is used as a channel formation region. In addition, in the semiconductor layer 108, the region in contact with the source electrode is used as a source region, and the region in contact with the drain electrode is used as a drain region.
[0044] A conductive layer 112a is provided on the substrate 102, an insulating layer 110 is provided on the conductive layer 112a, and a conductive layer 112b is provided on the insulating layer 110. The insulating layer 110 includes a region sandwiched between the conductive layer 112a and the conductive layer 112b. The conductive layer 112a includes a region overlapping with the conductive layer 112b via the insulating layer 110. The insulating layer 110 includes an opening 141 that reaches the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141. The conductive layer 112b includes an opening 143 in a region overlapping with the conductive layer 112a. The opening 143 is provided in a region overlapping with the opening 141.
[0045] The semiconductor layer 108 is provided so as to cover the opening 141 and the opening 143. The semiconductor layer 108 includes a region in contact with the top surface and the side surface of the conductive layer 112b, the side surface of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 is electrically connected to the conductive layer 112a through the opening 141 and the opening 143. The semiconductor layer 108 has a shape along the top surface and the side surface of the conductive layer 112b, the side surface of the insulating layer 110, and the top surface of the conductive layer 112a.
[0046] The insulating layer 106 serving as a gate insulating layer of the transistor 100 is provided so as to cover the opening 141 and the opening 143. The insulating layer 106 is provided on the semiconductor layer 108, the conductive layer 112 b, and the insulating layer 110. The insulating layer 106 includes a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface and side surfaces of the conductive layer 112 b, and the top surface of the insulating layer 110. The insulating layer 106 has a shape along the top surface of the insulating layer 110, the top surface and side surfaces of the conductive layer 112 b, the top surface and side surfaces of the semiconductor layer 108, and the top surface of the conductive layer 112 a.
[0047] The conductive layer 104 serving as a gate electrode of the transistor 100 is provided over the insulating layer 106 and includes a region in contact with the top surface of the insulating layer 106. The conductive layer 104 includes a region overlapping the semiconductor layer 108 via the insulating layer 106. The conductive layer 104 has a shape along the shape of the top surface of the insulating layer 106.
[0048] Transistor 100 is a so-called top-gate transistor having a gate electrode above semiconductor layer 108. Furthermore, since the bottom surface of semiconductor layer 108 is in contact with the source electrode and the drain electrode, it can be said to be a TGBC (Top Gate Bottom Contact) type transistor. In addition, in transistor 100, the heights of the source electrode and the drain electrode relative to the surface of the substrate 102 on which the surface is formed are different from each other, and the drain current flows in a direction perpendicular to or approximately perpendicular to the surface of the substrate 102. It can also be said that in transistor 100, the drain current can flow in the longitudinal direction or the approximately longitudinal direction. Therefore, a transistor of one embodiment of the present invention can be said to be a vertical channel transistor or a VFET (Vertical Field Effect Transistor).
[0049] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length smaller than the limiting resolution of an exposure device used to manufacture the transistor can be manufactured with high precision. In addition, the unevenness of characteristics between the plurality of transistors 100 can be reduced. Therefore, the operation of the semiconductor device including the transistor 100 is stable and the reliability can be improved. In addition, when the unevenness of characteristics is reduced, the freedom of circuit design is improved, and the operating voltage of the semiconductor device can also be reduced. Thus, the power consumption of the semiconductor device can be reduced.
[0050] Since the source electrode, the semiconductor layer, and the drain electrode can be overlapped, the occupied area of the transistor of one embodiment of the present invention can be made much smaller than that of a so-called planar transistor in which the semiconductor layer is arranged in a planar shape.
[0051] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can all be used as wirings, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wirings, the occupied area of the transistor 100 and the wirings can be reduced. Therefore, the occupied area of the circuit can be reduced to realize a small semiconductor device.
[0052] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be realized. In addition, for example, when a semiconductor device according to one embodiment of the present invention is used in a drive circuit (for example, one or both of a gate line drive circuit and a source line drive circuit) of a display device, the area occupied by the drive circuit can be reduced, so a display device with a narrow frame can be realized.
[0053] Notice, Figure 1A The example in which the semiconductor layer 108, the insulating layer 106 and the conductive layer 104 cover the opening 141 and the opening 143 is shown in the figure, but one embodiment of the present invention is not limited to this. In addition, the structure may also be as follows: the insulating layer 110, the conductive layer 112b and the conductive layer 112a form a step, and the semiconductor layer 108, the insulating layer 106 and the conductive layer 104 are arranged along the step.
[0054] [Semiconductor layer 108] The semiconductor layer 108 preferably has a stacked structure. Figure 1B , etc. show a structure in which the semiconductor layer 108 has a stacked-layer structure of a semiconductor layer 108 a and a semiconductor layer 108 b on the semiconductor layer 108 a .
[0055] The electrical conductivity of the material used for the semiconductor layer 108 a is preferably different from the electrical conductivity of the material used for the semiconductor layer 108 b .
[0056] For example, the semiconductor layer 108a may use a material having a higher conductivity than the semiconductor layer 108b. By using a material having a high conductivity for the semiconductor layer 108a in contact with the conductive layer 112a and the conductive layer 112b serving as the source electrode and the drain electrode, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, and a transistor having a large on-state current can be realized.
[0057] Here, when a material with high conductivity is used for the semiconductor layer 108b provided on one side of the conductive layer 104 used as the gate electrode, the threshold voltage of the transistor sometimes drifts, and the drain current (hereinafter, also referred to as the cut-off current) flowing when the gate voltage is 0V increases. Specifically, when the transistor 100 is an n-channel transistor, the threshold voltage sometimes becomes lower, and when the transistor 100 is a p-channel transistor, the threshold voltage sometimes becomes higher. Therefore, the semiconductor layer 108b preferably uses a material whose conductivity is lower than that of the semiconductor layer 108a. Thus, the threshold voltage can be increased when the transistor 100 is an n-channel transistor and the threshold voltage can be reduced when the transistor 100 is a p-channel transistor, and a transistor with a small cut-off current can be realized. Note that sometimes the case where the cut-off current is small is recorded as normally closed.
[0058] As described above, the semiconductor layer 108 has a stacked structure and the semiconductor layer 108a uses a material having higher conductivity than the semiconductor layer 108b, so that a normally-off transistor with large on-state current can be realized. Therefore, a semiconductor device with low power consumption and high performance can be realized.
[0059] Note that the carrier concentration of the semiconductor layer 108a is preferably higher than the carrier concentration of the semiconductor layer 108b. By increasing the carrier concentration of the semiconductor layer 108a and increasing the conductivity, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, so that a transistor with a large on-state current can be realized. By reducing the carrier concentration of the semiconductor layer 108b and reducing the conductivity, a normally-off transistor can be realized.
[0060] Here, an example is shown in which the semiconductor layer 108a uses a material having a higher conductivity than the semiconductor layer 108b, but one embodiment of the present invention is not limited to this. The semiconductor layer 108a may also use a material having a lower conductivity than the semiconductor layer 108b. The carrier concentration of the semiconductor layer 108a may be lower than the carrier concentration of the semiconductor layer 108b.
[0061] There is no particular limitation on the semiconductor material used for the semiconductor layer 108a and the semiconductor layer 108b. For example, a semiconductor composed of a single element or a compound semiconductor can be used. Examples of semiconductors composed of a single element include silicon or germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. In addition, examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may also contain impurities as dopants.
[0062] There is no particular limitation on the crystallinity of the semiconductor material used for the semiconductor layer 108a and the semiconductor layer 108b, and an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than a single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part thereof) can be used. When a single crystal semiconductor or a crystalline semiconductor is used, it is preferred because it can suppress the degradation of transistor characteristics.
[0063] Both the semiconductor layer 108a and the semiconductor layer 108b preferably include a metal oxide (also referred to as an oxide semiconductor) having semiconductor characteristics.
[0064] The band gap of the first metal oxide used for the semiconductor layer 108a and the second metal oxide used for the semiconductor layer 108b are both preferably 2.0 eV or more, and more preferably 2.5 eV or more.
[0065] The band gap of the first metal oxide used for the semiconductor layer 108a is preferably different from the band gap of the second metal oxide used for the semiconductor layer 108b. For example, the difference between the band gaps of the first metal oxide and the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and further preferably 0.3 eV or more.
[0066] The band gap of the first metal oxide used for the semiconductor layer 108a can be smaller than the band gap of the second metal oxide used for the semiconductor layer 108b. As a result, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, so that a transistor with a large on-state current can be realized. In addition, the threshold voltage can be increased when the transistor 100 is an n-channel transistor and the threshold voltage can be reduced when the transistor 100 is a p-channel transistor, so that a normally-off transistor can be realized.
[0067] Here, an example is shown in which the band gap of the first metal oxide is smaller than the band gap of the second metal oxide, but one embodiment of the present invention is not limited thereto. The band gap of the first metal oxide may be larger than the band gap of the second metal oxide.
[0068] As the first metal oxide and the second metal oxide, for example, indium oxide, gallium oxide and zinc oxide can be cited. The metal oxide preferably contains at least indium or zinc. In addition, the metal oxide preferably contains two or three selected from indium, element M and zinc. Element M is a metal element or a semi-metal element with a high bond energy with oxygen, for example, a metal element or a semi-metal element with a higher bond energy with oxygen than indium. As element M, specifically, aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium and antimony can be cited. The element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin and yttrium, and further preferably gallium. Note that in this specification, etc., metal elements and semi-metal elements are sometimes collectively referred to as "metal elements", and the "metal elements" recorded in this specification, etc. sometimes include semi-metal elements.
[0069] The first metal oxide and the second metal oxide may be, for example, indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO) or the like. ), indium aluminum zinc oxide (In-Al-Zn oxide, also recorded as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also recorded as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also recorded as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also recorded as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also recorded as IGAZO, IGZAO or IAGZO), etc. Alternatively, indium tin oxide, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. containing silicon can be used.
[0070] When the ratio of the number of atoms of indium to the total number of atoms of all metal elements in the metal oxide is increased, the field effect mobility of the transistor can be increased, and a transistor with a large on-state current can be realized.
[0071] Note that the metal oxide may also replace indium or contain one or more metal elements with a large period number in addition to indium. There is a tendency that the greater the orbital overlap of the metal element, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number, the field effect mobility of the transistor can sometimes be improved. As metal elements with a large period number, metal elements belonging to the 5th period and metal elements belonging to the 6th period can be cited. As the metal element, specifically, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium are called light rare earth elements.
[0072] The metal oxide may also contain one or more non-metallic elements. When the metal oxide contains non-metallic elements, the field effect mobility of the transistor may be improved by increasing the carrier concentration or narrowing the band gap. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.
[0073] When the ratio of the number of zinc atoms to the total number of atoms of all metal elements in the metal oxide is increased, the metal oxide has high crystallinity and diffusion of impurities in the metal oxide can be suppressed. Therefore, the variation of the electrical characteristics of the transistor is suppressed and the reliability can be improved.
[0074] When the ratio of the number of atoms of the element M in the metal oxide relative to the sum of the number of atoms of all metal elements is increased, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, the generation of carriers due to oxygen vacancies is suppressed, and a transistor with a small off-state current can be formed. In addition, the variation of the electrical characteristics of the transistor is suppressed and the reliability can be improved.
[0075] The electrical characteristics and reliability of the transistor differ depending on the composition of the metal oxide used for the semiconductor layer 108a and the semiconductor layer 108b. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be achieved.
[0076] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of the element M. Examples of the atomic ratio of the metal elements in such an In-M-Zn oxide include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=5:2:5, and compositions in the vicinity thereof. In addition, the vicinity composition includes a range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current or field effect mobility of the transistor can be increased.
[0077] The atomic ratio of In in the In-M-Zn oxide may be smaller than the atomic ratio of the element M. Examples of atomic ratios of metal elements in such an In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions near these. By increasing the ratio of the number of atoms of M in the metal oxide, the generation of oxygen vacancies can be suppressed.
[0078] Note that when a plurality of metal elements are included as the element M, the total of the ratios of the number of atoms of the metal elements may be the ratio of the number of atoms of the element M.
[0079] In this specification, etc., the ratio of the number of atoms of indium to the total number of atoms of all metal elements contained may be described as the content rate of indium. The same applies to other metal elements.
[0080] As described above, the band gap of the first metal oxide used for the semiconductor layer 108a can be smaller than the band gap of the second metal oxide used for the semiconductor layer 108b. The composition of the first metal oxide is preferably different from the composition of the second metal oxide. By making the composition of the first metal oxide different from that of the second metal oxide, the band gap can be controlled. For example, the content of the element M of the first metal oxide is preferably lower than the content of the element M of the second metal oxide. Specifically, when the first metal oxide and the second metal oxide are In-M-Zn oxide, the first metal oxide can be a composition of In:M:Zn=1:1:1 [atomic number ratio] or a composition near it, and the second metal oxide can be a composition of In:M:Zn=1:3:2 [atomic number ratio] or a composition near it. As the element M, it is particularly preferred to use one or more of gallium, aluminum and tin.
[0081] The first metal oxide may also have a structure that does not include the element M. For example, the first metal oxide used for the semiconductor layer 108a may be an In-Zn oxide, and the second metal oxide used for the semiconductor layer 108b may be an In-M-Zn oxide. Specifically, the first metal oxide may be an In-Zn oxide, and the second metal oxide may be an In-Ga-Zn oxide. Furthermore, specifically, the first metal oxide may have a composition of In:Zn=1:1 [atomic ratio] or a composition close thereto, and the second metal oxide may have a composition of In:Ga:Zn=1:1:1 [atomic ratio] or a composition close thereto.
[0082] Here, an example is shown in which the content of the element M of the first metal oxide is lower than the content of the element M of the second metal oxide, but one embodiment of the present invention is not limited to this. The content of the element M of the first metal oxide may also be higher than the content of the element M of the second metal oxide. Note that the composition of the first metal oxide may be different from that of the second metal oxide, and the content of elements other than the element M of the first metal oxide and the second metal oxide may also be different.
[0083] In the analysis of the composition of the first metal oxide used for the semiconductor layer 108a and the composition of the second metal oxide used for the semiconductor layer 108b, for example, energy dispersive X-ray analysis (EDX: Energy Dispersive X-ray Spectrometry), X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectrometry), inductively coupled plasma mass spectrometry (ICP-MS: Inductively Coupled Plasma-Mass Spectrometry) or inductively coupled plasma atomic emission spectrometry (ICP-AES: Inductively Coupled Plasma-Atomic Emission Spectrometry) can be used. Alternatively, a plurality of the above methods can be combined for analysis. Note that the actual content of an element with a low content is sometimes different from the content obtained by analysis due to the influence of the analysis accuracy. For example, when the content of element M is low, the content of element M obtained by analysis is sometimes lower than the actual content.
[0084] The metal oxide can be formed by sputtering or atomic layer deposition (ALD) as appropriate. Note that when the metal oxide is formed by sputtering, the composition of the metal oxide after formation is sometimes different from the composition of the sputtering target. In particular, the zinc content in the metal oxide after formation is sometimes reduced to about 50% of that in the sputtering target.
[0085] The semiconductor layer 108a and the semiconductor layer 108b preferably include a crystalline metal oxide. Examples of the structure of the crystalline metal oxide include a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a nanocrystalline (nc: nano-crystal) structure. By using a crystalline metal oxide for the semiconductor layer 108, the defect state density in the semiconductor layer 108 can be reduced, thereby realizing a semiconductor device with high reliability.
[0086] By using a metal oxide with high crystallinity in the semiconductor layer, the defect state density in the semiconductor layer can be reduced. On the other hand, by using a metal oxide with low crystallinity, a transistor capable of passing a large current can be realized.
[0087] When a metal oxide is formed by sputtering, the higher the substrate temperature during formation, the more crystalline metal oxide can be formed. The substrate temperature during formation can be adjusted, for example, according to the temperature of the stage on which the substrate is placed during formation. In addition, the higher the flow rate ratio of the oxygen gas relative to the entire deposition gas used during formation (hereinafter also referred to as the oxygen flow rate ratio) or the oxygen partial pressure in the processing chamber of the deposition device, the more crystalline metal oxide can be formed.
[0088] The composition of the first metal oxide used for the semiconductor layer 108a may also be the same or substantially the same as the composition of the second metal oxide used for the semiconductor layer 108b. By adopting the same composition, since, for example, the same sputtering target can be used for formation, the manufacturing cost can be reduced. Here, the crystallinity of the semiconductor layer 108a is preferably different from the crystallinity of the semiconductor layer 108b. For example, the crystallinity of the semiconductor layer 108a may be lower than the crystallinity of the semiconductor layer 108b. By making the crystallinity of the semiconductor layer 108a lower than the crystallinity of the semiconductor layer 108b, the conductivity of the semiconductor layer 108a can be improved. Thus, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, so a transistor with a large on-state current can be realized. On the other hand, by making the crystallinity of the semiconductor layer 108b higher than the crystallinity of the semiconductor layer 108a, the conductivity of the semiconductor layer 108b can be reduced. Thus, a normally closed transistor can be realized. Furthermore, by providing the semiconductor layer 108b with high crystallinity on one side of the insulating layer 106, damage to the semiconductor layer 108 during formation of the insulating layer 106 can be reduced. Thus, by making the crystallinity of the semiconductor layer 108a lower than that of the semiconductor layer 108b, a normally-off transistor with a large on-state current can be realized. Therefore, a semiconductor device with low power consumption and high performance can be realized.
[0089] For example, the semiconductor layer 108a may have a microcrystalline (nc) structure, and the semiconductor layer 108b may have a CAAC structure. Alternatively, both the semiconductor layer 108a and the semiconductor layer 108b may have a microcrystalline (nc) structure, and the crystallinity of the semiconductor layer 108a may be lower than that of the semiconductor layer 108b.
[0090] Here, an example is shown in which the crystallinity of the semiconductor layer 108a is lower than that of the semiconductor layer 108b, but one embodiment of the present invention is not limited to this. The crystallinity of the semiconductor layer 108a may be higher than that of the semiconductor layer 108b. By improving the crystallinity of the semiconductor layer 108a in contact with the conductive layer 112a and the conductive layer 112b, it is possible to suppress the diffusion of components contained in the conductive layer 112a and the conductive layer 112b to the semiconductor layer 108b provided on the side of the conductive layer 104 serving as the gate electrode. As a result, the variation of the electrical characteristics of the transistor is suppressed, and the reliability can be improved.
[0091] The crystallinity of the semiconductor layer 108a and the semiconductor layer 108b can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscope (TEM), or electron diffraction (ED), or a combination of a plurality of the above methods.
[0092] Note that when the composition of the first metal oxide is the same as or substantially the same as the composition of the second metal oxide, the boundary (interface) between the semiconductor layer 108a and the semiconductor layer 108b may not be clearly confirmed.
[0093] The thickness of the semiconductor layer 108 is preferably greater than 3 nm and less than 200 nm, preferably greater than 3 nm and less than 100 nm, more preferably greater than 5 nm and less than 100 nm, more preferably greater than 10 nm and less than 100 nm, more preferably greater than 10 nm and less than 70 nm, more preferably greater than 15 nm and less than 70 nm, more preferably greater than 15 nm and less than 50 nm, more preferably greater than 20 nm and less than 50 nm.
[0094] The thickness of each layer constituting the semiconductor layer 108 (here, the semiconductor layer 108a and the semiconductor layer 108b) may be determined so that the thickness of the semiconductor layer 108 is within the above-mentioned range. The thickness of the semiconductor layer 108a may be determined so that the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b are within a desired range. In addition, the thickness of the semiconductor layer 108b may be determined so that the threshold voltage of the transistor is within a desired range. Note that the thickness of the semiconductor layer 108a may be the same as or different from the thickness of the semiconductor layer 108b.
[0095] When an oxide semiconductor is used for the semiconductor layer 108, hydrogen in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, thereby forming an oxygen vacancy (V) in the oxide semiconductor. O In addition, sometimes hydrogen enters the defect in the oxygen vacancy (hereinafter referred to as V O H) is used as a donor to generate electrons as carriers. In addition, sometimes electrons as carriers are generated due to the bonding of a portion of hydrogen to oxygen bonded to metal atoms. Therefore, transistors using oxide semiconductors containing a large amount of hydrogen tend to have a normally-on characteristic. In addition, because the hydrogen in the oxide semiconductor is easily moved due to heat, electric field, etc., when the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.
[0096] When an oxide semiconductor is used as the semiconductor layer 108, it is preferable to minimize the V O H to make it high purity intrinsic or substantially high purity intrinsic. In order to obtain this V O For an oxide semiconductor with sufficiently reduced H, it is important to: remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment); and supply oxygen to the oxide semiconductor to repair oxygen vacancies. O An oxide semiconductor in which impurities such as H are sufficiently reduced is used for a channel formation region of a transistor to impart stable electrical characteristics. Note that a process of supplying oxygen to an oxide semiconductor to repair oxygen vacancies is sometimes referred to as an oxidation treatment.
[0097] When an oxide semiconductor is used as the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region serving as a channel formation region is preferably 1×10 18 cm -3 Below, more preferably below 1×10 17 cm -3 , and more preferably less than 1×10 16 cm -3 , more preferably less than 1×10 13 cm -3, and more preferably less than 1×10 12 cm -3 Note that there is no limitation on the lower limit of the carrier concentration of the oxide semiconductor in the region serving as the channel formation region, and it may be, for example, 1×10 -9 cm -3 In the semiconductor layer 108 b provided on the side of the conductive layer 104 functioning as a gate electrode, the carrier concentration of a region functioning as a channel formation region is particularly preferably low, and the carrier concentration is preferably within the above range.
[0098] Compared with transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have a very high field effect mobility. In addition, the off-state current of the OS transistor is extremely small, and the charge stored in the capacitor connected in series with the transistor can be maintained for a long period of time. In addition, by using OS transistors, the power consumption of semiconductor devices can be reduced.
[0099] OS transistors have little change in electrical characteristics due to exposure to radiation, that is, they have high tolerance to radiation, so they can be appropriately used in environments where radiation may be incident. OS transistors can also be said to have high reliability with respect to radiation. For example, OS transistors can be appropriately used in pixel circuits of flat-panel detectors for X-rays. In addition, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton radiation, and neutron radiation).
[0100] Examples of silicon that can be used for the semiconductor layer 108 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon).
[0101] A transistor using amorphous silicon as the semiconductor layer 108 can be formed on a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon as the semiconductor layer 108 has high field effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon as the semiconductor layer 108 has higher field effect mobility than a transistor using amorphous silicon and can operate at high speed.
[0102] The semiconductor layer 108 may also include a layered material used as a semiconductor. A layered material is a general term for a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked by bonds such as van der Waals bonds that are weaker than covalent bonds and ionic bonds. The layered material has high conductivity in a unit layer, that is, has high two-dimensional conductivity. By using a material used as a semiconductor and having high two-dimensional conductivity in a channel formation region, a transistor with a large on-state current can be provided.
[0103] As the above-mentioned layered material, for example, graphene, silicene, chalcogenides, etc. can be cited. Chalcogenides are compounds containing oxygen group elements (belonging to group 16 elements). In addition, as chalcogenides, transition metal chalcogenides, group 13 chalcogenides, etc. can be cited. As transition metal chalcogenides that can be used as semiconductor layers of transistors, specifically molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc. can be cited.
[0104] Figure 1B The semiconductor layer 108 has an example of a two-layer structure of the semiconductor layer 108a and the semiconductor layer 108b, but one embodiment of the present invention is not limited to this. The semiconductor layer 108 may have a stacked structure of three or more layers. Note that the semiconductor layer 108 may have a single-layer structure.
[0105] [Opening 141 and opening 143] There is no limitation on the top surface shape of the opening 141 and the opening 143, for example, they may be circular, elliptical, triangular, quadrilateral (including rectangle, rhombus, square), pentagonal or other polygons, or the corners of these polygons may be rounded. The polygon may also be a concave polygon (a polygon with at least one internal angle exceeding 180 degrees) or a convex polygon (a polygon with internal angles less than 180 degrees). Figure 1A As shown in FIG. 1 , the top surface shapes of the openings 141 and 143 are preferably circular. The top surface shape of the openings is circular, so that the processing accuracy when forming the openings can be improved, and fine openings can be formed. Note that in this specification, etc., the circular shape is not limited to a perfect circle.
[0106] In this specification, the top surface shape of opening 141 refers to the shape of the top surface end of insulating layer 110 on the opening 141 side. Also, the top surface shape of opening 143 refers to the shape of the bottom surface end of conductive layer 112b on the opening 143 side.
[0107] like Figure 1A As shown in FIG. 1 and FIG. 2 , the top surface shape of the opening 141 and the top surface shape of the opening 143 can be made consistent or substantially consistent. Figure 1B and Figure 1C As shown in FIG. 1 , the bottom surface end of the conductive layer 112b on the side of the opening 143 is preferably consistent or substantially consistent with the top surface end of the insulating layer 110 on the side of the opening 141. The bottom surface of the conductive layer 112b refers to the surface on the side of the insulating layer 110. The top surface of the insulating layer 110 refers to the surface on the side of the conductive layer 112b.
[0108] In addition, the top surface shape of the opening 141 may be different from the top surface shape of the opening 143. In addition, when the top surfaces of the openings 141 and 143 are circular, the openings 141 and 143 may be concentric circles or not.
[0109] Reference Figure 3A and Figure 3B The channel length and channel width of transistor 100 are described.
[0110] In the semiconductor layer 108, the area in contact with the conductive layer 112a is used as one of the source region and the drain region, the area in contact with the conductive layer 112b is used as the other of the source region and the drain region, and the area between the source region and the drain region is used as a channel formation region.
[0111] The channel length of transistor 100 is the distance between the source region and the drain region. Figure 3B The dotted double arrow in FIG. 1 represents a channel length L100 of the transistor 100. The channel length L100 can be said to be the shortest distance between a region of the semiconductor layer 108 that contacts the conductive layer 112a and a region that contacts the conductive layer 112b in a cross section.
[0112] The channel length L100 of the transistor 100 is equivalent to the length of the side surface of the opening 141 side of the insulating layer 110 when viewed from a cross section. That is, the channel length L100 is determined by the thickness T110 of the insulating layer 110 and the angle θ110 formed by the side surface of the opening 141 side of the insulating layer 110 and the formed surface of the insulating layer 110 (here, the top surface of the conductive layer 112a). Therefore, for example, the channel length L100 can be set to a value smaller than the limiting resolution of the exposure device, and a fine transistor can be realized. Specifically, a transistor with an extremely small channel length that cannot be realized by the exposure device used in the mass production of conventional flat panel displays (for example, a minimum line width of about 2μm or 1.5μm) can be realized. In addition, a transistor with a channel length of less than 10nm can be realized without using a very expensive exposure device used in the most advanced LSI technology.
[0113] The channel length L100 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 may be set to be 100 nm or more and 1 μm or less.
[0114] By reducing the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, when a semiconductor device of one embodiment of the present invention is used in a large display device or a high-definition display device, the signal delay of each wiring can be reduced when the number of wirings increases, thereby suppressing display unevenness. In addition, since the area occupied by the circuit can be reduced, the frame of the display device can be reduced.
[0115] By adjusting the thickness T110 and the angle θ110 of the insulating layer 110, the channel length L100 can be controlled. Figure 3B In FIG. 1 , a double-pointed arrow indicates a thickness T110 of the insulating layer 110 .
[0116] The thickness T110 of the insulating layer 110 can be, for example, greater than 10 nm, greater than 50 nm, greater than 100 nm, greater than 150 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm or greater than 500 nm and less than 3 μm, less than 2.5 μm, less than 2 μm, less than 1.5 μm, less than 1.2 μm or less than 1 μm.
[0117] The side surface of the opening 141 of the insulating layer 110 preferably has a tapered shape. The angle θ110 formed by the side surface of the opening 141 of the insulating layer 110 and the formed surface of the insulating layer 110 (here, the top surface of the conductive layer 112a) is preferably 90 degrees or less. By reducing the angle θ110, the coverage of the layer (for example, the semiconductor layer 108) provided on the insulating layer 110 can be improved. In addition, the smaller the angle θ110 is, the larger the channel length L100 can be, and the larger the angle θ110 is, the smaller the channel length L100 can be.
[0118] The angle θ110 may be, for example, greater than 30 degrees, greater than 35 degrees, greater than 40 degrees, greater than 45 degrees, greater than 50 degrees, greater than 55 degrees, greater than 60 degrees, greater than 65 degrees, or greater than 70 degrees and less than 90 degrees, less than 85 degrees, or less than 80 degrees.
[0119] exist Figure 3A and Figure 3BThe double-pointed arrow in FIG. 1 represents the width D143 of the opening 143 . Figure 3A An example is shown in which the top surface shape of the opening 141 and the opening 143 is circular. In this case, the width D143 is equivalent to the diameter of the circle, and the channel width W100 of the transistor 100 is equivalent to the length of the circumference of the circle. That is, the channel width W100 is π×D143. In this way, when the top surface shape of the opening 141 and the opening 143 is circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.
[0120] Note that the diameter of the opening 141 and the diameter of the opening 143 are sometimes different. In addition, the inner diameter of the opening 141 and the inner diameter of the opening 143 sometimes change in the depth direction. As the diameter of the opening, for example, the average value of the diameter of the highest position, the diameter of the lowest position, and the diameter of the position of the middle point of the insulating layer 110 (or the insulating layer 110b) when viewed from the cross section can be used. Alternatively, as the diameter of the opening, for example, any of the diameter of the highest position, the diameter of the lowest position, and the diameter of the position of the middle point of the insulating layer 110 (or the insulating layer 110b) when viewed from the cross section can be used.
[0121] When the opening 143 is formed by photolithography, the width D143 of the opening 143 is greater than the limiting resolution of the exposure device. The width D143 may be, for example, greater than 200 nm, greater than 300 nm, greater than 400 nm, or greater than 500 nm and less than 5 μm, less than 4.5 μm, less than 4 μm, less than 3.5 μm, less than 3 μm, less than 2.5 μm, less than 2 μm, less than 1.5 μm, or less than 1 μm.
[0122] [Insulating layer 110] The insulating layer 110 may have a single-layer structure or a stacked-layer structure of two or more layers. The insulating layer 110 preferably has one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of oxynitrides include silicon oxynitride and aluminum oxynitride.
[0123] Note that in this specification and the like, an oxynitride refers to a material containing more oxygen than nitrogen in its composition, and an oxynitride refers to a material containing more nitrogen than oxygen in its composition.
[0124] The insulating layer 110 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used as the semiconductor layer 108, in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110, at least a portion of the region in contact with the semiconductor layer 108 of the insulating layer 110 uses one or more of an oxide and an oxynitride. Specifically, the region in contact with the channel formation region of the semiconductor layer 108 in the insulating layer 110 preferably uses one or more of an oxide and an oxynitride.
[0125] The insulating layer 110b in contact with the channel formation region of the semiconductor layer 108 is preferably made of any one or more of the above-mentioned oxides and oxynitrides. Specifically, the insulating layer 110b is preferably made of one or both of silicon oxide and silicon oxynitride.
[0126] The insulating layer 110b is preferably a film that releases oxygen by heating. Since the insulating layer 110b releases oxygen due to heat applied in the manufacturing process of the transistor 100, oxygen can be supplied to the semiconductor layer 108. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, especially to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be realized.
[0127] For example, oxygen can be supplied to the insulating layer 110 b by performing a heat treatment in an oxygen-containing atmosphere or performing a plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied by forming an oxide film on the top surface of the insulating layer 110 b by sputtering in an oxygen-containing atmosphere. The oxide film can then be removed. In Embodiment 2 described later, an example of forming a metal oxide layer 149 to supply oxygen to the insulating layer 110 b will be shown.
[0128] The insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method. In particular, when the sputtering method is used, it is not necessary to use a hydrogen-containing gas as a deposition gas, thereby achieving a film with a very low hydrogen content. Therefore, the semiconductor layer 108 can be suppressed from being supplied with hydrogen to achieve stabilization of the electrical characteristics of the transistor 100.
[0129] The thickness of the insulating layer 110 b can be determined within the range of the thickness of the insulating layer 110 (thickness T110 ).
[0130] It is preferable that a film that does not diffuse oxygen easily is used for the insulating layer 110a and the insulating layer 110c. Thus, it is possible to prevent the oxygen in the insulating layer 110b from passing through the substrate 102 side through the insulating layer 110a and the insulating layer 106 side through the insulating layer 110c due to heating. In other words, by sandwiching the insulating layer 110b above and below with the insulating layer 110a and the insulating layer 110c that do not diffuse oxygen easily, the oxygen in the insulating layer 110b can be confined. Thus, oxygen can be effectively supplied to the semiconductor layer 108.
[0131] The insulating layer 110a and the insulating layer 110c are preferably made of a film into which hydrogen is not easily diffused. Thus, diffusion of hydrogen from the outside of the transistor through the insulating layer 110a or the insulating layer 110c into the semiconductor layer 108 can be suppressed.
[0132] The insulating layer 110a and the insulating layer 110c preferably use any one or more of the above-mentioned oxides, nitrides, oxynitrides, and oxynitrides, and preferably use any one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. In particular, silicon nitride and silicon nitride oxide have the characteristics of less release of impurities (for example, water and hydrogen) from themselves and less penetration of oxygen and hydrogen, respectively, and therefore can be appropriately used as the insulating layer 110a and the insulating layer 110c.
[0133] The conductive layer 112a and the conductive layer 112b are oxidized due to oxygen contained in the insulating layer 110b, and the resistance sometimes increases. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, it is possible to suppress the conductive layer 112a from being oxidized and the resistance from increasing. Similarly, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, it is possible to suppress the conductive layer 112b from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 is increased, and oxygen vacancies in the semiconductor layer 108 can be reduced.
[0134] The thickness of the insulating layer 110a and the insulating layer 110c is preferably 5 nm or more and 100 nm or less, more preferably 5 nm or more and 70 nm or less, more preferably 10 nm or more and 70 nm or less, more preferably 10 nm or more and 50 nm or less, more preferably 20 nm or more and 50 nm or less, and more preferably 20 nm or more and 40 nm or less. By making the thickness of the insulating layer 110a and the insulating layer 110c within the above range, oxygen vacancies in the semiconductor layer 108, especially in the channel formation region, can be reduced.
[0135] For example, silicon nitride is preferably used for the insulating layer 110 a and the insulating layer 110 c , and silicon oxynitride is preferably used for the insulating layer 110 b .
[0136] One or both of the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c in the semiconductor layer 108 may have a higher carrier concentration and lower resistance than the channel formation region. In other words, sometimes the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c in the semiconductor layer 108 are used as a source region or a drain region. In this case, the effective channel length of the transistor 100 is shorter than the above-mentioned channel length L100.
[0137] For example, by using a material that releases impurities (eg, water or hydrogen) for the insulating layer 110a, the semiconductor layer 108 in a region in contact with the insulating layer 110a can be used as a source region or a drain region. The same applies to the insulating layer 110c.
[0138] [Conductive layer 112a, conductive layer 112b, conductive layer 104] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may have a single-layer structure or a stacked-layer structure of two or more layers. As materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals as components can be cited. A low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be appropriately used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104. Among them, copper or aluminum is particularly advantageous in mass productivity and is therefore preferred.
[0139] Metal oxides (also referred to as oxide conductors) can be used for the conductive layers 112a, 112b, and 104. Examples of oxide conductors (OC) include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also referred to as ITSO), zinc oxide to which gallium is added, and In-Ga-Zn oxide. In particular, an oxide conductor containing indium is preferably used because it has high conductivity.
[0140] Oxygen vacancies are formed in metal oxides having semiconductor properties, and hydrogen is added to the oxygen vacancies to form donor levels near the conduction band. As a result, the conductivity of the metal oxide increases, and the metal oxide becomes a conductor. The metal oxide that becomes a conductor can be called an oxide conductor.
[0141] The conductive layers 112a, 112b, and 104 may have a stacked-layer structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.
[0142] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) may be applied as the conductive layer 112a, the conductive layer 112b and the conductive layer 104. By using the Cu-X alloy film, processing can be performed by a wet etching method, thereby reducing manufacturing costs.
[0143] Note that materials used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may all be the same or at least a part thereof may be different.
[0144] The conductive layer 112a and the conductive layer 112b both have a region in contact with the semiconductor layer 108. When an oxide semiconductor is used as the semiconductor layer 108, there is a concern that when an easily oxidized metal (e.g., aluminum) is used as the conductive layer 112a or the conductive layer 112b, an insulating oxide (e.g., aluminum oxide) is formed between the conductive layer 112a or the conductive layer 112b and the semiconductor layer 108, thereby hindering conduction therebetween. Therefore, the conductive layer 112a and the conductive layer 112b preferably use a conductive material that is not easily oxidized, a conductive material that maintains low resistance even when oxidized, or an oxide conductive material.
[0145] As the conductive layer 112a and the conductive layer 112b, for example, titanium, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, and oxide containing lanthanum and nickel are preferably used. These materials are preferred because they are conductive materials that are not easily oxidized or conductive materials that maintain low resistance even if oxidized. Note that when the conductive layer 112a or the conductive layer 112b has a stacked structure, at least the layer in contact with the semiconductor layer 108 is preferably made of a conductive material that is not easily oxidized.
[0146] The conductive layer 112a and the conductive layer 112b can use the above-mentioned oxide conductors. Specifically, oxide conductors such as indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, and zinc oxide added with gallium can be used.
[0147] A nitride conductor may be used for the conductive layer 112a and the conductive layer 112b. Examples of the nitride conductor include tantalum nitride and titanium nitride.
[0148] Figure 1BThe conductive layer 112a has a stacked structure of a conductive layer 112a_1 and a conductive layer 112a_2 on the conductive layer 112a_1. Figure 3B As shown, the conductive layer 112a_2 includes an opening 145 in which the conductive layer 112a_1 is exposed. The conductive layer 112a_1 includes a region in contact with the semiconductor layer 108 in the opening 145. The conductive layer 112a_2 preferably does not include a region in contact with the semiconductor layer 108.
[0149] Here, when a conductive material that is not easily oxidized is used as the conductive layer 112a and the conductive layer 112b, the resistance may become high. Since the conductive layer 112a and the conductive layer 112b are used as wiring, the resistance is preferably low. In addition, when the conductive layer 112a or the conductive layer 112b contained in the semiconductor layer 108 is oxidized, oxygen vacancies (V O ) and V O H increases. Therefore, the conductive layer 112a_1 including the region in contact with the semiconductor layer 108 uses a conductive material that is not easily oxidized, and the conductive layer 112a_2 not including the region in contact with the semiconductor layer 108 uses a material with high conductivity (low resistivity), thereby reducing the resistance of the conductive layer 112a. Furthermore, the oxygen vacancies (V O ) and V O H increases.
[0150] When the channel length L is less than 100, the oxygen vacancies (V O ) and V O The influence of H on the electrical characteristics and reliability is particularly great. By using a conductive material that is not easily oxidized for the conductive layer 112a_1, oxygen vacancies (V O ) and V O H increases. Therefore, a transistor with a short channel length having good electrical characteristics and high reliability can be realized.
[0151] The conductive layer 112a_1 preferably uses one or more of an oxide conductor and a nitride conductor as appropriate. The conductive layer 112a_2 preferably uses a material having a higher conductivity (lower resistivity) than the conductive layer 112a_1. The conductive layer 112a_2 may, for example, appropriately use one or more of copper, aluminum, titanium, tungsten, and molybdenum, or an alloy having one or more of the above metals as components. Specifically, the conductive layer 112a_1 may appropriately use In-Sn-Si oxide (ITSO), and the conductive layer 112a_2 may appropriately use tungsten.
[0152] Note that the structure of the conductive layer 112a can be appropriately used for other conductive layers. Figure 4AIn the transistor 100A shown, the conductive layer 112b may have a stacked structure of a conductive layer 112b_1 and a conductive layer 112b_2 on the conductive layer 112b_1. The conductive layer 112b_1 may use a material that can be used for the conductive layer 112a_1. The conductive layer 112b_2 may use a material that can be used for the conductive layer 112a_2. The semiconductor layer 108 preferably includes a region in contact with the conductive layer 112b_1, and preferably does not include a region in contact with the conductive layer 112b_2.
[0153] Or, if Figure 4B As in the transistor 100B shown in FIG. 1 , the conductive layer 112a may also have a stacked structure of a conductive layer 112a_2 and a conductive layer 112a_1 on the conductive layer 112a_2. The conductive layer 112a_1 includes a region in contact with the semiconductor layer 108. As described above, the conductive layer 112a_1 having a region in contact with the semiconductor layer 108 is preferably made of a conductive material that is not easily oxidized. The conductive layer 112a_2 is preferably made of a material with high conductivity (low resistivity). By adopting such a structure, the resistance of the conductive layer 112a can be reduced.
[0154] Note that the structures of the conductive layers 112a and 112b may be determined according to the required wiring resistance. When the length of the wiring (for example, the conductive layer 112a) is short and the wiring resistance required for the conductive layer 112a is high, such as Figure 4C In the transistor 100C shown, the conductive layer 112a may also have a single-layer structure and use a conductive material that is not easily oxidized. On the other hand, when the length of the wiring (e.g., the conductive layer 112a) is long and the required wiring resistance is low, the conductive layer 112a preferably uses a stacked structure of a conductive material that is not easily oxidized and a material with high conductivity (low resistivity).
[0155] [Insulating layer 106] The insulating layer 106 may have a single-layer structure or a stacked-layer structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. The insulating layer 106 may use a material that can be used for the insulating layer 110.
[0156] The insulating layer 106 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, at least one of the films constituting the insulating layer 106 that is in contact with the semiconductor layer 108 is preferably made of the above-mentioned oxide and oxynitride. In addition, the insulating layer 106 is preferably made of a film that releases oxygen by heating.
[0157] Specifically, when the insulating layer 106 has a single-layer structure, the insulating layer 106 is preferably made of silicon oxide or silicon oxynitride.
[0158] The insulating layer 106 may have a stacked-layer structure of a first insulating film on the side in contact with the semiconductor layer 108 and a second insulating film on the side in contact with the conductive layer 104. The first insulating film may be made of an oxide or an oxynitride, for example, preferably silicon oxide or silicon oxynitride. The second insulating film may be made of a nitride or an oxynitride, for example, preferably silicon nitride or silicon oxynitride.
[0159] Silicon nitride and silicon nitride oxide have characteristics of rarely releasing impurities (for example, water and hydrogen) and not easily allowing oxygen and hydrogen to pass through, and thus can be suitably used as the insulating layer 106. Since diffusion of impurities from the insulating layer 106 to the semiconductor layer 108 is suppressed, good electrical characteristics of the transistor can be achieved and reliability can be improved.
[0160] Note that in a micro transistor, when the thickness of the gate insulating layer is small, the leakage current sometimes increases. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve low voltage when the transistor is operating while maintaining the physical thickness. As high-k materials that can be used for the insulating layer 106, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium can be cited.
[0161] [Substrate 102] Although there is no particular limitation on the material of the substrate 102, it is at least required to have heat resistance sufficient to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate or polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102. In addition, a semiconductor element may be provided on the substrate 102. Note that the shape of the semiconductor substrate and the insulating substrate may be circular or angular.
[0162] As the substrate 102, a flexible substrate may be used, and the transistor 100 and the like may be directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. By providing a peeling layer, a part or all of the semiconductor device may be manufactured on the peeling layer, and then it may be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like may also be transferred to a substrate with low heat resistance or a flexible substrate.
[0163] The following describes a structural example in which a part of the structure is different from the structural example 1 described above. The following description of the parts that overlap with the structural example 1 described above is sometimes omitted. In addition, in the drawings shown below, the same hatching is used for parts having the same functions as those of the structural example 1 described above, and sometimes no reference numerals are attached.
[0164] <Structure Example 2> Figure 5A and Figure 5B A cross-sectional view of a transistor 100D that can be used in a semiconductor device according to one embodiment of the present invention is shown. Figure 1A . Figure 5A It is along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 5B It is a cross-sectional view along the cut surface along the dashed line B1 - B2 .
[0165] Transistor 100D and Figure 1B The main difference of the transistor 100 shown is that the semiconductor layer 108 includes a semiconductor layer 108 c .
[0166] The semiconductor layer 108 has a three-layer structure of a semiconductor layer 108a, a semiconductor layer 108c on the semiconductor layer 108a, and a semiconductor layer 108b on the semiconductor layer 108c. The semiconductor layer 108c is disposed between the semiconductor layer 108a and the semiconductor layer 108b.
[0167] The semiconductor layer 108c can use the materials described above for the semiconductor layer 108. The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c can use the same material or different materials.
[0168] The electrical conductivity of the material used for the semiconductor layer 108c is preferably different from the electrical conductivity of the material used for the semiconductor layer 108a. The electrical conductivity of the material used for the semiconductor layer 108c is preferably different from the electrical conductivity of the material used for the semiconductor layer 108b.
[0169] For example, the semiconductor layer 108a may use a material having a higher conductivity than the semiconductor layer 108c. By using a material having a high conductivity for the semiconductor layer 108a that contacts the conductive layer 112a and the conductive layer 112b, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, and a transistor with a large on-state current can be realized. In addition, the semiconductor layer 108b may use a material having a lower conductivity than the semiconductor layer 108c. Thus, a normally-off transistor can be realized.
[0170] Note that the semiconductor layer 108a may be made of a material having lower conductivity than the semiconductor layer 108c, or the semiconductor layer 108b may be made of a material having higher conductivity than the semiconductor layer 108c.
[0171] The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c preferably all include a metal oxide (oxide semiconductor).
[0172] The band gap of the third metal oxide used for the semiconductor layer 108c is preferably 2.0 eV or more, and more preferably 2.5 eV or more.
[0173] The band gap of the third metal oxide used for the semiconductor layer 108c is preferably different from the band gap of the first metal oxide used for the semiconductor layer 108a. The band gap of the third metal oxide used for the semiconductor layer 108c is preferably different from the band gap of the second metal oxide used for the semiconductor layer 108b.
[0174] For example, the band gap of the first metal oxide used for the semiconductor layer 108a may be smaller than the band gap of the third metal oxide used for the semiconductor layer 108c. Thus, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b may be reduced, and a transistor with a large on-state current may be realized. In addition, the band gap of the second metal oxide used for the semiconductor layer 108b may be larger than the band gap of the third metal oxide used for the semiconductor layer 108c. Thus, a normally-off transistor may be realized.
[0175] Note that the band gap of the first metal oxide may be larger than the band gap of the third metal oxide. The band gap of the second metal oxide may be smaller than the band gap of the third metal oxide.
[0176] The band gap can be controlled by being different from the composition of the first metal oxide to the third metal oxide. The composition of the third metal oxide is preferably different from the composition of the first metal oxide. The composition of the third metal oxide is preferably different from the composition of the second metal oxide. For example, the content of the element M of the third metal oxide may be higher than the content of the element M of the first metal oxide. The content of the element M of the third metal oxide may be lower than the content of the element M of the second metal oxide.
[0177] The content of the element M in the third metal oxide may be lower than the content of the element M in the first metal oxide. The content of the element M in the third metal oxide may be higher than the content of the element M in the second metal oxide.
[0178] The compositions of the first metal oxide to the third metal oxide may also be the same or substantially the same. By adopting the same composition, since, for example, the same sputtering target can be used for formation, the manufacturing cost can be reduced. Here, the crystallinity of the semiconductor layer 108c is preferably different from the crystallinity of the semiconductor layer 108a. The crystallinity of the semiconductor layer 108c is preferably different from the crystallinity of the semiconductor layer 108b. For example, the crystallinity of the semiconductor layer 108a is preferably lower than the crystallinity of the semiconductor layer 108c. Thus, by reducing the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b, a transistor with a large on-state current can be realized. On the other hand, the crystallinity of the semiconductor layer 108b is preferably higher than the crystallinity of the semiconductor layer 108c. Therefore, a normally closed transistor can be realized.
[0179] Note that the crystallinity of the semiconductor layer 108c may be lower than that of the semiconductor layer 108a. The crystallinity of the semiconductor layer 108c may be higher than that of the semiconductor layer 108b.
[0180] Figure 5A and Figure 5B An example is shown in which the ends of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c are aligned or approximately aligned. The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c can be formed using the same resist mask. By using the same resist mask, the process can be simplified. Thus, the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c having approximately the same top surface shape can be formed. Note that the ends of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c may not be aligned.
[0181] <Structure Example 3> Fig. 6A and Figure 6B A cross-sectional view of a transistor 100E that can be used in a semiconductor device according to one embodiment of the present invention is shown. Figure 1A . Fig. 6A It is along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 6B It is a cross-sectional view along the cut surface along the dashed line B1 - B2 .
[0182] Transistor 100E and Figure 1B The transistor 100 shown in FIG. 1 is mainly different in that the thickness of the conductive layer 112 a_1 in a region in contact with the bottom surface of the semiconductor layer 108 is different from the thickness in a region not in contact with the semiconductor layer 108 .
[0183] like Fig. 6AAs shown in , etc., the thickness of the conductive layer 112 a_1 in a region in contact with the bottom surface of the semiconductor layer 108 is preferably thinner than the thickness of a region not in contact with the semiconductor layer 108 .
[0184] Fig. 7A and Figure 7B Show Fig. 6A Magnified image of . Fig. 7A 104 is shown from the formed surface of the conductive layer 112a_1 (here, the top surface of the substrate 102) to the lowest position of the bottom surface of the conductive layer 104. In addition, the height H112a from the formed surface of the conductive layer 112a_1 (here, the top surface of the substrate 102) to the highest position of the region where the conductive layer 112a_1 contacts the semiconductor layer 108 is shown. Fig. 7A As shown, the height H104 to the lowest position of the bottom surface of the conductive layer 104 is equal to or substantially equal to the height H112a to the highest position of the region where the conductive layer 112a_1 contacts the semiconductor layer 108. Alternatively, Figure 7B As shown, the height H104 is lower than the height H112a. By making the height H104 from the lowest position of the bottom surface of the conductive layer 104 equal to or lower than the height H112a from the highest position of the region where the conductive layer 112a_1 contacts the semiconductor layer 108, the electric field of the gate electrode in the channel formation region near the conductive layer 112a can be enhanced, thereby increasing the on-state current of the transistor 100E.
[0185] By making the height H104 of the lowest position of the bottom surface of the conductive layer 104 equal to or lower than the height H112a of the highest position of the region where the conductive layer 112a_1 contacts the semiconductor layer 108, the electric field applied to the gate electrode in the channel formation region can be further made uniform. Here, when the electric field applied to the gate electrode in the channel formation region is made non-uniform, the electrical characteristics when the conductive layer 112a is used as the source electrode and the conductive layer 112b is used as the drain electrode are sometimes different from the electrical characteristics when the conductive layer 112a is used as the drain electrode and the conductive layer 112b is used as the source electrode. By further making the electric field applied to the gate electrode in the channel formation region of the transistor 100E uniform, the respective electrical characteristics can be made equal. Therefore, the transistor 100E can be appropriately used in a circuit structure in which the source and the drain are replaced.
[0186] Note that the thickness of the conductive layer 112a (specifically, the conductive layer 112a_1) may be appropriately adjusted so that the height H104 is equal to or lower than the height H112a.
[0187] <Structure Example 4> Fig. 8A and Figure 8B A cross-sectional view of a transistor 100F that can be used in a semiconductor device according to one embodiment of the present invention is shown. Figure 1A . Fig. 8A It is along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 8B It is a cross-sectional view taken along the dashed line B1 - B2 .
[0188] Transistor 100F and Figure 1B The main difference between the transistor 100 shown in FIG. 1 and FIG. 2 is that the insulating layer 110 includes an insulating layer 110 d .
[0189] The insulating layer 110 includes an insulating layer 110 d , an insulating layer 110 a on the insulating layer 110 d , an insulating layer 110 b on the insulating layer 110 a , and an insulating layer 110 c on the insulating layer 110 b .
[0190] The insulating layer 110d includes a region in contact with the semiconductor layer 108 and the conductive layer 112a. The insulating layer 110d preferably includes a region having a higher hydrogen content than the insulating layer 110a. Similarly, the insulating layer 110d preferably includes a region having a higher hydrogen content than the insulating layer 110b. The insulating layer 110d preferably includes a region having a higher hydrogen content than the insulating layer 110c. Furthermore, it is preferred that hydrogen is released from the insulating layer 110d itself by heat applied during the process.
[0191] The hydrogen content of the insulating layer 110 a , the insulating layer 110 b , the insulating layer 110 c , and the insulating layer 110 d can be analyzed by using, for example, secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry).
[0192] Fig. 9 Show Fig. 8A . By providing the insulating layer 110d, hydrogen is supplied from the insulating layer 110d to the region in contact with the insulating layer 110d in the semiconductor layer 108, and the resistance of the region is reduced. This region (hereinafter, also referred to as the low resistance region) can be used as a source region or a drain region. By providing a low resistance region on the side of the conductive layer 112a of the semiconductor layer 108, the distance from the source region to the gate electrode and the distance from the drain region to the gate electrode can be further made uniform. Thus, the electric field applied to the gate electrode in the channel formation region can be further made uniform.
[0193] The insulating layer 110d can use the materials that can be used for the insulating layer 110. In particular, the insulating layer 110d can appropriately use the materials that can be used for the insulating layer 110a and the insulating layer 110c. For example, the insulating layer 110d is preferably made of any one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. Note that the insulating layer 110a, the insulating layer 110c, and the insulating layer 110d may be made of the same material or different materials.
[0194] The hydrogen content in the deposition gas used to form the insulating layer 110d is preferably greater than that in the deposition gas used to form the insulating layer 110a. Specifically, when the insulating layer 110 is formed by the PECVD method, the ratio of the flow rate of the ammonia gas to the entire deposition gas used to form the insulating layer 110d (hereinafter, also referred to as the ammonia flow ratio) is higher than the ammonia flow ratio of the deposition gas used to form the insulating layer 110a. By forming the insulating layer 110d under the condition of a high ammonia flow ratio, the hydrogen content in the insulating layer 110d can be increased. In addition, the amount of hydrogen released from the insulating layer 110d itself can be increased by applying heat to the insulating layer 110d. Similarly, the hydrogen content in the deposition gas used to form the insulating layer 110d is greater than that in the deposition gas used to form the insulating layer 110c. Specifically, the ammonia flow ratio of the deposition gas used to form the insulating layer 110d is preferably higher than the ammonia flow ratio of the deposition gas used to form the insulating layer 110c.
[0195] Here, the insulating layer 110a and the insulating layer 110c preferably release less hydrogen from themselves and are not easy to permeate hydrogen. On the other hand, the insulating layer 110d preferably releases more hydrogen from itself. By making the deposition conditions of the insulating layer 110a and the insulating layer 110c different from the deposition conditions of the insulating layer 110d, the amount of hydrogen released can be adjusted. Specifically, any one or more of the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow ratio, deposition temperature and the distance between the substrate and the electrode during formation between the insulating layer 110a and the insulating layer 110c and the insulating layer 110d can be different. For example, by making the deposition power density of the insulating layer 110d smaller than the deposition power density of the insulating layer 110a and the insulating layer 110c, the hydrogen content in the insulating layer 110d can be made greater than the hydrogen content in the insulating layer 110a and the insulating layer 110c. Thus, the amount of hydrogen released from the insulating layer 110d itself can be increased by applying heat to the insulating layer 110d.
[0196] By providing an insulating layer 110a that is not easily permeable to hydrogen between the insulating layer 110d and the insulating layer 110b, it is possible to suppress the diffusion of hydrogen released from the insulating layer 110d into the insulating layer 110b. Thus, it is possible to suppress the diffusion of hydrogen into the channel formation region of the semiconductor layer 108 through the insulating layer 110b, and a transistor with good electrical characteristics and high reliability can be realized.
[0197] The film density of the insulating layer 110a is preferably higher than the film density of the insulating layer 110d. The film density can be evaluated, for example, using Rutherford Backscattering Spectrometry (RBS) or X-ray Reflection (XRR). In addition, the difference in film density can sometimes be evaluated from a cross-sectional transmission electron microscope (TEM) image. In TEM observation, the transmission electron (TE) image is darker (darker) when the film density is high, and the transmission electron (TE) image is lighter (brighter) when the film density is low. Therefore, in the transmission electron (TE) image, the insulating layer 110a sometimes appears as a darker (darker) image compared to the insulating layer 110d. Note that even if the insulating layer 110a and the insulating layer 110d use the same material, the film density is different, so sometimes these boundaries can be observed as different contrasts in the cross-sectional TEM image.
[0198] <Structural Example 5> Fig. 10A A top view of a transistor 100G that can be used in a semiconductor device according to one embodiment of the present invention is shown. Fig. 10B The transistor 100G is shown along Fig. 10A A cross-sectional view along the dashed line A1-A2 is shown.
[0199] Transistor 100G with Figure 4C The transistor 100C shown mainly differs in that a conductive layer 103 is included between the conductive layer 112 a and the insulating layer 110 .
[0200] The conductive layer 103 is provided on and in contact with the conductive layer 112a. The conductive layer 103 is provided with an opening 148 that reaches the conductive layer 112a. There is no particular limitation on the top surface shape of the opening 148. Note that the top surface shape of the opening 148 refers to the shape of the top surface end portion of the conductive layer 103 on the opening 148 side or the shape of the bottom surface end portion.
[0201] The insulating layer 110 is disposed on the substrate 102, the conductive layer 112a, and the conductive layer 103. The insulating layer 110 is provided to cover a portion of the opening 148. The insulating layer 110 is in contact with the conductive layer 112a through the opening 148. The insulating layer 110 is provided with an opening 141 inside the opening 148 and reaching the conductive layer 112a.
[0202] like Fig. 10BAs shown, the thickness T103 of the conductive layer 103 can be said to be the shortest distance from the top surface of the conductive layer 112a to the top surface of the conductive layer 103. The thickness T103 of the conductive layer 103 is longer than the distance L11 which is the shortest distance from the top surface of the conductive layer 112a to the bottom surface of the conductive layer 104 inside the opening 141. In addition, it can also be said that the bottom surface of the conductive layer 104 inside the opening 141 is located closer to the lower side (the substrate 102 side) than the top surface of the conductive layer 103 when viewed from a cross section. As a result, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via the insulating layer 110. In other words, the conductive layer 103 includes a region that overlaps with the conductive layer 104 via the insulating layer 110, the semiconductor layer 108, and the insulating layer 106. As a result, the conductive layer 103 can be used as a back gate electrode (also known as a second gate electrode) of the transistor 100G. In this case, the insulating layer 110 is used as a back gate insulating layer (also referred to as a second gate insulating layer) of the transistor 100D.
[0203] By providing the back gate electrode in the transistor 100G, the potential on the back channel side of the semiconductor layer 108 can be fixed. Therefore, the saturation property of the Id-Vd characteristic of the transistor 100G can be improved.
[0204] Note that in this specification and the like, a state in which a change in current in a saturation region of Id-Vd characteristics of a transistor is small (the slope is small) may be described as “high saturation”.
[0205] The conductive layer 103 and the conductive layer 112a that are in contact with each other are supplied with the same potential. The conductive layer 103 used as the back gate electrode is preferably supplied with a potential that is lower than the source potential and the drain potential. Therefore, it is preferred that when the transistor 100G is an n-channel transistor, the conductive layer 112a is used as a source electrode and the conductive layer 112b is used as a drain electrode. In addition, it is preferred that when the transistor 100G is a p-channel transistor, the conductive layer 112a is used as a drain electrode and the conductive layer 112b is used as a source electrode.
[0206] Generally speaking, when the channel length is short, the saturation in the Id-Vd characteristic of the transistor tends to decrease, but since the transistor 100G includes the back gate electrode, high saturation can be achieved.
[0207] The thickness T103 of the conductive layer 103 is preferably 0.5 times or more, more preferably 1.0 times or more, and further preferably more than 1.0 times the channel length L100. Thus, the region of the semiconductor layer 108 that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via the insulating layer 110 can be expanded. Therefore, the electric field on the back channel side of the semiconductor layer 108 can be more reliably controlled.
[0208] The transistor 100G has a region in which the conductive layer 103, the insulating layer 110, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are stacked in this order in one direction without any other layers therebetween. As this direction, a direction perpendicular to the channel length L100 can be cited. By expanding this region, the electric field on the back channel side of the semiconductor layer 108 can be more reliably controlled.
[0209] The shortest distance L12 between the conductive layer 103 and the semiconductor layer 108 is preferably smaller than the channel length L100, more preferably 0.5 times or less, and further preferably 0.1 times or less. The closer the distance between the conductive layer 103 and the semiconductor layer 108 is, the higher the saturation of the Id-Vd characteristic of the transistor 100G can be.
[0210] <Structural Example 6> Fig.11A and Fig. 11B A cross-sectional view of a transistor 100H that can be used in a semiconductor device according to one embodiment of the present invention is shown. Figure 1A . Fig.11A It is along Figure 1A The cross-sectional view along the dotted line A1-A2 shown in FIG. Fig. 11B It is a cross-sectional view along the cut surface along the dashed line B1 - B2 .
[0211] Transistor 100H with Figure 1B The main difference between the transistor 100 shown in FIG. 1 and FIG. 2 is that the insulating layer 106 has a stacked structure.
[0212] The insulating layer 106 includes an insulating layer 106a and an insulating layer 106b on the insulating layer 106a. The insulating layer 106a and the insulating layer 106b can use the materials that can be used for the insulating layer 106 described above. Note that although an example in which the insulating layer 106 has a two-layer stacked structure is shown here, one embodiment of the present invention is not limited to this. The insulating layer 106 may have a stacked structure of three or more layers.
[0213] The insulating layer 106a preferably uses an aluminum oxide film. As a method for forming the aluminum oxide film, for example, an ALD method, a sputtering method using an aluminum oxide target, and a reactive sputtering method using an aluminum target can be cited. By using the ALD method, a dense film with few cracks and pinholes can be formed, so it is preferred. By using the sputtering method, productivity is high, so it is preferred. In addition, for example, after forming an aluminum film with a thickness of 0.1 nm or more and 5 nm or less, the aluminum film is oxidized to form an aluminum oxide film.
[0214] By using an aluminum oxide film for the insulating layer 106a in contact with the semiconductor layer 108, aluminum will be present at the interface between the insulating layer 106 and the semiconductor layer 108 and in the vicinity thereof. Specifically, aluminum will be present at the interface between the insulating layer 106 and the semiconductor layer 108a and in the vicinity thereof, and at the interface between the insulating layer 106 and the semiconductor layer 108b and in the vicinity thereof. In addition, aluminum will enter the semiconductor layer 108. For example, when IGZO is used for the semiconductor layer 108b, aluminum sometimes enters the surface and vicinity of the surface of IGZO, and a part of the semiconductor layer 108b includes IGZAO. As a result, the semiconductor layer 108b has a stacked structure of IGZO and IGZAO in appearance, and its band gap becomes wider than the IGZO single-layer structure, in other words, it becomes a wide-gap semiconductor layer 108b. By expanding the band gap of the semiconductor layer 108b, the off-state current of the transistor can be reduced. In addition, the region of the semiconductor layer 108a in contact with the insulating layer 106 sometimes becomes a structure including IGZAO.
[0215] The insulating layer 106b is preferably made of, for example, a silicon oxynitride film. The silicon oxynitride film can be formed by, for example, a PECVD method.
[0216] This embodiment mode can be appropriately combined with other embodiment modes. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be appropriately combined.
[0217] (Implementation Method 2) In this embodiment, refer to FIG. 12A to FIG. 15B A method for manufacturing a display device according to one embodiment of the present invention will be described. Note that regarding materials and formation methods of each component, parts that are the same as those described in Embodiment 1 may be omitted.
[0218] FIG. 12A to FIG. 15B Shown side by side along Figure 1A Shown are a cross-sectional view along the dot-dash line A1 - A2 and a cross-sectional view along the dot-dash line B1 - B2 .
[0219] Thin films (insulating films, semiconductor films, and conductive films, etc.) constituting semiconductor devices can be formed by sputtering, chemical vapor deposition (CVD: Chemical Vapor Deposition) method, vacuum evaporation method, pulsed laser deposition (PLD: Pulsed Laser Deposition) method, ALD method, etc. CVD methods include PECVD method and thermal CVD method, etc. In addition, as one of the thermal CVD methods, there is metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method.
[0220] Thin films (insulating films, semiconductor films, and conductive films, etc.) that constitute semiconductor devices can be formed using wet deposition methods such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, or doctor knife coating.
[0221] When processing a thin film constituting a semiconductor device, photolithography or the like can be used. Alternatively, the thin film can be processed by nanoimprinting, sandblasting, lift-off, etc. In addition, an island-shaped thin film can be directly formed by a deposition method using a shadow mask such as a metal mask.
[0222] There are two typical photolithography methods. One is to form a resist mask on a thin film to be processed, process the thin film by etching, etc., and remove the resist mask. The other is to deposit a photosensitive thin film, then expose and develop it, and process the thin film into a desired shape.
[0223] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser or ArF laser, etc. can also be used. In addition, liquid immersion exposure technology can also be used for exposure. In addition, as the light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays can also be used. In addition, instead of the light used for exposure, an electron beam can also be used. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.
[0224] As a method for etching the thin film, a dry etching method, a wet etching method, a sand blast method, or the like can be used.
[0225] First, a first conductive film to be the conductive layer 112a_1 and a second conductive film to be the conductive layer 112a_2 are formed on the substrate 102, and these are processed to form the conductive layer 112a_1 and the conductive layer 112a_2A ( Fig. 12A ). The conductive layer 112a_2A later becomes the conductive layer 112a_2. The first conductive film and the second conductive film can be formed by, for example, sputtering as appropriate. The first conductive film and the second conductive film can be processed by one or both of a wet etching method and a dry etching method.
[0226] Next, a portion of the conductive layer 112a_2A is removed to form a conductive layer 112a_2 ( Fig. 12B). Thus, a conductive layer 112a is formed which functions as one of a source electrode and a drain electrode of the transistor 100. The opening 145 can be formed by one or both of a wet etching method and a dry etching method.
[0227] Note that although the example in which the opening 145 is formed after the conductive layer 112a_2A is formed is shown here, one embodiment of the present invention is not limited to this. After the opening 145 is formed in the second conductive film, the second conductive film may be processed into the conductive layer 112a_2.
[0228] Next, an insulating film 110af to be the insulating layer 110a and an insulating film 110bf to be the insulating layer 110b are formed on the conductive layer 112a. Fig. 12C ).
[0229] When forming the insulating film 110af and the insulating film 110bf, for example, a sputtering method or a PECVD method is preferably used. After forming the insulating film 110af, it is preferable to continuously form the insulating film 110bf in a vacuum so that the surface of the insulating film 110af is not exposed to the atmosphere. By continuously forming the insulating film 110af and the insulating film 110bf, it is possible to suppress impurities from the atmosphere from adhering to the surface of the insulating film 110af. Examples of such impurities include water and organic matter.
[0230] The substrate temperature when forming the insulating film 110af and the insulating film 110bf is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, more preferably 250° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 400° C. or lower, and more preferably 350° C. or higher and 400° C. or lower. By setting the substrate temperature when forming the insulating film 110af and the insulating film 110bf within the above range, the release of impurities (for example, water and hydrogen) from the insulating film 110af and the insulating film 110bf themselves can be reduced, thereby suppressing the diffusion of impurities into the semiconductor layer 108. Therefore, a transistor having good electrical characteristics and high reliability can be realized.
[0231] Note that since the insulating film 110af and the insulating film 110bf are formed first and then the semiconductor layer 108 is formed, there is no concern that oxygen will be released from the semiconductor layer 108 due to heat applied when the insulating film 110af and the insulating film 110bf are formed.
[0232] After the insulating film 110bf is formed, oxygen may also be supplied to the insulating film 110bf. As a method for supplying oxygen, for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment may be used. As a plasma treatment, a device for plasma-forming an oxygen gas with a high-frequency power may be appropriately used. As a device for plasma-forming a gas with a high-frequency power, for example, a PECVD device, a plasma etching device, and a plasma ashing device may be cited. The plasma treatment is preferably carried out in an oxygen-containing atmosphere. For example, the plasma treatment is preferably carried out in an atmosphere containing one or more of oxygen, nitrous oxide (N2O), nitrogen dioxide (NO2), carbon monoxide, and carbon dioxide. Fig.12D The supply of oxygen to the insulating film 110bf is schematically indicated by arrows.
[0233] Note that the plasma treatment may be continuously performed in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere. For example, when a PECVD device is used to form the insulating film 110bf, the plasma treatment is preferably performed using the PECVD device. This can improve productivity.
[0234] Next, it is preferred that a metal oxide layer 149 ( Fig.13A ). By forming the metal oxide layer 149, oxygen can be supplied to the insulating film 110bf.
[0235] There is no limitation on the conductivity of the metal oxide layer 149. The metal oxide layer 149 may be made of at least one of an insulating film, a semiconductor film, and a conductive film. The metal oxide layer 149 may be made of, for example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO).
[0236] As the metal oxide layer 149, an oxide material containing one or more elements that are the same as those of the semiconductor layer 108 is preferably used. In particular, an oxide semiconductor material that can be used for the semiconductor layer 108 is preferably used.
[0237] When forming the metal oxide layer 149, the higher the oxygen flow rate ratio of the deposition gas introduced into the processing chamber of the deposition device or the oxygen partial pressure in the processing chamber, the greater the amount of oxygen supplied to the insulating film 110bf. The oxygen flow rate ratio or the oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% or more and 100% or less, more preferably 80% or more and 100% or less, and further preferably 90% or more and 100% or less. In particular, it is preferred to set the oxygen flow rate ratio to 100% to make the oxygen partial pressure as close to 100% as possible.
[0238] Thus, by forming the metal oxide layer 149 by sputtering in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf while preventing oxygen from being separated from the insulating film 110bf when the metal oxide layer 149 is formed. As a result, a large amount of oxygen can be enclosed in the insulating film 110bf. Furthermore, a large amount of oxygen can be supplied to the semiconductor layer 108 by the subsequent heat treatment. As a result, oxygen vacancies and V in the semiconductor layer 108 can be reduced. O H, and a transistor with good electrical characteristics and high reliability can be realized.
[0239] It is preferable to perform heat treatment after forming the metal oxide layer 149. By performing heat treatment after forming the metal oxide layer 149, oxygen can be efficiently supplied from the metal oxide layer 149 to the insulating film 110bf.
[0240] The temperature of the heat treatment is preferably 150° C. or higher and lower than the strain point of the substrate, more preferably 200° C. or higher and 450° C. or lower, more preferably 250° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 400° C. or lower, and more preferably 350° C. or higher and 400° C. or lower. The heat treatment may be performed in an atmosphere containing one or more of a noble gas, nitrogen, and oxygen. As a nitrogen-containing atmosphere or an oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may also be used. Note that the content of hydrogen or oxygen in the atmosphere is preferably as small as possible. As the atmosphere, a high-purity gas having a dew point of -60° C. or lower, preferably -100° C. or lower is preferably used. By using an atmosphere containing as little hydrogen, water, or the like as possible, it is possible to prevent hydrogen, water, or the like from being absorbed by the insulating film 110af and the insulating film 110bf or the like as much as possible. For the heat treatment, an oven, a rapid thermal annealing (RTA: Rapid Thermal Annealing) device, or the like may be used. By using an RTA device, the heat treatment time may be shortened.
[0241] After the metal oxide layer 149 is formed or after the above-mentioned heat treatment, oxygen may be supplied to the insulating film 110bf through the metal oxide layer 149. As a method for supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment may be used. For the plasma treatment, the above description may be referred to, so the detailed description thereof is omitted.
[0242] Next, the metal oxide layer 149 is removed. Although there is no particular limitation on the method for removing the metal oxide layer 149, a wet etching method can be appropriately used. By using the wet etching method, it is possible to suppress the insulating film 110bf from being etched when removing the metal oxide layer 149. Therefore, it is possible to suppress the thickness of the insulating film 110bf from being reduced, and the thickness of the insulating layer 110b can be made uniform.
[0243] The oxygen supply treatment of the insulating film 110bf is not limited to the above method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, etc. are supplied to the insulating film 110bf by ion doping, ion implantation, plasma treatment, etc. In addition, after a film for inhibiting oxygen detachment is formed on the insulating film 110bf, oxygen is supplied to the insulating film 110bf through the film. It is preferred to remove the film after supplying oxygen. As the above-mentioned film for inhibiting oxygen detachment, a conductive film or semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt or tungsten can be used.
[0244] Next, an insulating film 110cf (which becomes the insulating layer 110c) is formed on the insulating film 110bf. Fig. 13B ). Since the formation of the insulating film 110cf can refer to the description of the formation of the insulating film 110af and the insulating film 110bf, detailed description is omitted. Thus, the insulating film 110f having a stacked structure of the insulating film 110af, the insulating film 110bf and the insulating film 110cf is formed. The insulating film 110f will later become the insulating layer 110.
[0245] Next, a conductive film 112bf ( Fig. 13C ) The conductive film 112bf can be formed by, for example, sputtering as appropriate.
[0246] Next, the conductive film 112bf is processed to form a conductive layer 112B ( Fig.14A ). The conductive layer 112B is to be the conductive layer 112b later. The conductive layer 112B can be formed by, for example, a wet etching method as appropriate.
[0247] Next, a portion of the conductive layer 112B is removed to form a conductive layer 112b including an opening 143. The opening 143 is provided in a region overlapping the opening 145. The conductive layer 112b may be formed using one or both of a wet etching method and a dry etching method. In particular, a wet etching method may be appropriately used.
[0248] Next, a portion of the insulating film 110f is removed to form the insulating layer 110 ( Fig. 14B ). The opening 141 is provided in a region overlapping the opening 143. In addition, the opening 141 is provided in a region overlapping the opening 145, and the conductive layer 112a_1 is exposed by forming the opening 141. When forming the insulating layer 110, one or both of a wet etching method and a dry etching method can be used. In particular, the dry etching method can be appropriately used.
[0249] The opening 141 can be formed, for example, using a resist mask for forming the opening 143. Specifically, a resist mask is formed on the conductive layer 112B, a portion of the conductive layer 112B is removed using the resist mask to form the opening 143, and a portion of the insulating film 110f can be removed using the resist mask to form the opening 141. The opening 143 can also be formed using a resist mask different from the resist mask used for forming the opening 141.
[0250] Note that when or after the opening 141 is formed, a portion of the conductive layer 112a (specifically, the conductive layer 112a_1) in a region overlapping with the opening 141 may be removed. Fig. 7A and Figure 7B The structure shown.
[0251] Next, a metal oxide film 108f ( Fig. 14C Here, as the metal oxide film 108f, a metal oxide film 108af that becomes the semiconductor layer 108a and a metal oxide film 108bf that becomes the semiconductor layer 108b are stacked. The metal oxide film 108f is provided in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
[0252] The metal oxide film 108af and the metal oxide film 108bf are preferably formed by a sputtering method using a metal oxide target. Alternatively, the metal oxide film 108af and the metal oxide film 108bf are preferably formed by an ALD method. After the metal oxide film 108af is formed, the metal oxide film 108bf is preferably continuously formed in a manner that does not expose the surface of the metal oxide film 108af to the atmosphere. By continuously forming the metal oxide film 108af and the metal oxide film 108bf, it is possible to suppress the attachment of impurities from the atmosphere to the surface of the metal oxide film 108af. As such impurities, water and organic matter can be cited, for example. Note that the device for forming the metal oxide film 108af may be different from the device for forming the metal oxide film 108bf. In addition, the method for forming the metal oxide film 108af may be different from the method for forming the metal oxide film 108bf.
[0253] The metal oxide film 108af and the metal oxide film 108bf are preferably dense films with as few defects as possible. In addition, the metal oxide film 108af and the metal oxide film 108bf are preferably high-purity films in which impurities containing hydrogen elements are reduced as much as possible. In particular, a crystalline metal oxide film is preferably used as the metal oxide film 108af and the metal oxide film 108bf.
[0254] When the metal oxide film 108af and the metal oxide film 108bf are formed, an oxygen gas is preferably used. In particular, by using an oxygen gas when forming the metal oxide film 108af, oxygen can be appropriately supplied to the insulating layer 110. For example, when an oxide or an oxynitride is used for the insulating layer 110b, oxygen can be appropriately supplied to the insulating layer 110b.
[0255] By supplying oxygen to the insulating layer 110 b, oxygen can be supplied to the semiconductor layer 108 in a subsequent step, thereby reducing oxygen vacancies in the semiconductor layer 108 and V O H.
[0256] When forming the metal oxide film 108af and the metal oxide film 108bf, oxygen gas and an inert gas (for example, helium gas, argon gas, xenon gas, etc.) may also be mixed. Note that the higher the oxygen flow rate ratio or oxygen partial pressure of the deposition gas when forming the metal oxide film, the higher the crystallinity of the metal oxide film can be, and a transistor with high reliability can be realized. On the other hand, the lower the oxygen flow rate ratio or oxygen partial pressure, the lower the crystallinity of the metal oxide film, and a transistor with a large on-state current can be realized. Note that the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108af may be made the same as or different from the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108bf. By making the oxygen flow rate ratio or oxygen partial pressure different, the crystallinity of the metal oxide film 108af can be made different from the crystallinity of the metal oxide film 108bf.
[0257] The oxygen flow rate or oxygen partial pressure when forming the metal oxide film 108af is preferably lower than that when forming the metal oxide film 108bf. Thus, the crystallinity of the metal oxide film 108af forming the semiconductor layer 108a can be lower than that of the metal oxide film 108bf forming the semiconductor layer 108b.
[0258] When the substrate temperature is high when the metal oxide film is formed, a metal oxide film with higher crystallinity and a denser structure can be formed. On the other hand, as the substrate temperature becomes lower, a metal oxide film with lower crystallinity and a higher conductivity can be formed. Note that the substrate temperature when the metal oxide film 108af is formed may be the same as or different from the substrate temperature when the metal oxide film 108bf is formed. By making the substrate temperature different, the crystallinity of the metal oxide film 108af can be made different from the crystallinity of the metal oxide film 108bf.
[0259] The substrate temperature when forming the metal oxide film 108af and the metal oxide film 108bf is preferably higher than room temperature and lower than 250° C., more preferably higher than room temperature and lower than 200° C., and further preferably higher than room temperature and lower than 140° C. For example, the substrate temperature is preferably higher than room temperature and lower than 140° C., thereby improving productivity. In addition, by setting the substrate temperature to room temperature or forming the metal oxide film without heating the substrate, crystallinity can be reduced.
[0260] When the substrate temperatures when the metal oxide film 108af and the metal oxide film 108bf are formed are different, the substrate temperature when the metal oxide film 108af is formed is preferably lower than the substrate temperature when the metal oxide film 108bf is formed.
[0261] Here, by using the same sputtering target when forming the metal oxide film 108af and the metal oxide film 108bf, the manufacturing cost can be reduced. Furthermore, by forming the metal oxide film 108af at the same substrate temperature as the metal oxide film 108bf, the metal oxide film 108af and the metal oxide film 108bf can be formed with high productivity using the same processing chamber. For example, it is preferred to continuously form the metal oxide film 108af and the metal oxide film 108bf in the same processing chamber using the same sputtering target. At this time, at the same substrate temperature, the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108af is preferably lower than the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108bf. Thus, the metal oxide film 108af and the metal oxide film 108bf with different crystallinity can be formed with high productivity.
[0262] When the ALD method is used, it is preferred to use a deposition method such as a thermal ALD method or PEALD (Plasma Enhanced ALD). The thermal ALD method is preferred because it has extremely high step coverage. In addition, the PEALD method is preferred because it not only has high step coverage but also allows low-temperature deposition.
[0263] The metal oxide film can be formed by, for example, an ALD method using a precursor containing constituent metal elements and an oxidant.
[0264] For example, when forming In-Ga-Zn oxide, three precursors including a precursor containing indium, a precursor containing gallium, and a precursor containing zinc may be used. Alternatively, two precursors including a precursor containing indium and a precursor containing gallium and zinc may be used.
[0265] Examples of the precursor containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedione)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.
[0266] Examples of the precursor containing gallium include trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamide)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedione)gallium, dimethyl gallium chloride, and diethyl gallium chloride.
[0267] Examples of the precursor containing zinc include dimethyl zinc, diethyl zinc, bis(2,2,6,6-tetramethyl-3,5-heptanedione) zinc, and zinc chloride.
[0268] Examples of the oxidizing agent include ozone, oxygen, and water.
[0269] As a method of controlling the composition of the obtained film, one or more of the type of source gas, the flow rate ratio of the source gas, the time for the source gas to flow, and the order in which the source gas flows can be adjusted. By adjusting these, the composition of the metal oxide film 108af and the metal oxide film 108bf can be made different. In addition, by adjusting these, a film with a continuously changing composition can be formed. The composition of one or both of the metal oxide film 108af and the metal oxide film 108bf can also be continuously changed.
[0270] For example, the gallium content in the precursor used to form the metal oxide film 108af is preferably lower than that in the precursor used to form the metal oxide film 108bf. Alternatively, a precursor not containing gallium may be used when forming the metal oxide film 108af, and a precursor containing gallium may be used when forming the metal oxide film 108bf. Note that, here, gallium is cited as the element M, but one embodiment of the present invention is not limited to this. Any one or more of the above elements M may be used instead of gallium or in addition to gallium.
[0271] Before depositing the metal oxide film 108f (specifically, the metal oxide film 108af), it is preferred to perform at least one of a treatment for removing water, hydrogen, organic matter, etc. adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen to the insulating layer 110. For example, a heat treatment may be performed at a temperature of 70° C. to 200° C. in a reduced pressure atmosphere. Alternatively, a plasma treatment may be performed in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied to the insulating layer 110 by performing a plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (N2O). When a plasma treatment containing nitrous oxide gas is performed, organic matter on the surface of the insulating layer 110 can be appropriately removed and oxygen can be supplied to the insulating layer 110. Preferably, after such a treatment, the metal oxide film 108f is continuously deposited in a manner that does not expose the surface of the insulating layer 110 to the atmosphere.
[0272] Next, the metal oxide film 108f is processed into an island shape to form a semiconductor layer 108 ( Fig.15A ).
[0273] The semiconductor layer 108 can be formed by one or both of a wet etching method and a dry etching method, for example, preferably by a wet etching method. At this time, sometimes a portion of the conductive layer 112b in a region that does not overlap with the semiconductor layer 108 is etched to reduce the thickness. Similarly, sometimes a portion of the insulating layer 110 in a region that does not overlap with both the semiconductor layer 108 and the conductive layer 112b is etched to reduce the thickness. For example, sometimes the insulating layer 110c in the insulating layer 110 disappears due to etching, exposing the surface of the insulating layer 110b. Note that in the etching of the metal oxide film 108f, by using a material with a high selectivity as the insulating layer 110c, the thickness of the insulating layer 110c can be suppressed from being reduced.
[0274] It is preferable to perform heat treatment after the metal oxide film 108f is deposited or after the metal oxide film 108f is processed into the semiconductor layer 108. By heat treatment, hydrogen or water contained in the metal oxide film 108f or the semiconductor layer 108 or adsorbed on the surface of the metal oxide film 108f or the semiconductor layer 108 can be removed. In addition, by heat treatment, the film quality of the metal oxide film 108f or the semiconductor layer 108 is sometimes improved (for example, defects are reduced or crystallinity is improved). It is preferable to perform heat treatment before processing the semiconductor layer 108.
[0275] By heat treatment, oxygen can be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108. In this case, it is more preferable to perform heat treatment before processing into the semiconductor layer 108. The heat treatment can be referred to the above description, and thus detailed description is omitted.
[0276] Note that this heat treatment is not necessarily required. It is also possible not to perform heat treatment in this process and use the heat treatment performed in a later process as the heat treatment in this process. Sometimes, a process at a high temperature in a later process (for example, a deposition process) can be used as the heat treatment in this process.
[0277] Next, the insulating layer 106 is formed so as to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. Fig. 15B ) The insulating layer 106 is preferably formed by, for example, a PECVD method or an ALD method.
[0278] When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 is preferably used as a barrier film for suppressing diffusion of oxygen. By providing the insulating layer 106 with a function of suppressing diffusion of oxygen, it is possible to suppress diffusion of oxygen from the upper side of the insulating layer 106 to the conductive layer 104 and oxidation of the conductive layer 104. As a result, a transistor having good electrical characteristics and high reliability can be achieved.
[0279] Note that in this specification, etc., a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties may be referred to as a barrier insulating layer. In this specification, etc., barrier properties refer to one or both of a function of suppressing diffusion of a corresponding substance (also referred to as low permeability) and a function of capturing or fixing (also referred to as gettering) a corresponding substance.
[0280] By raising the temperature when forming the insulating layer 106 used as a gate insulating layer, an insulating layer with fewer defects can be formed. However, when the temperature when forming the insulating layer 106 is high, oxygen is released from the semiconductor layer 108, and oxygen vacancies in the semiconductor layer 108 and V O H increases. The substrate temperature when forming the insulating layer 106 is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., more preferably 300° C. to 450° C., more preferably 300° C. to 400° C. By setting the substrate temperature when forming the insulating layer 106 within the above range, it is possible to reduce defects in the insulating layer 106 while suppressing the release of oxygen from the semiconductor layer 108. Therefore, a transistor having good electrical characteristics and high reliability can be realized.
[0281] The surface of the semiconductor layer 108 may be subjected to plasma treatment before forming the insulating layer 106. By this plasma treatment, impurities such as water adsorbed on the surface of the semiconductor layer 108 can be reduced. Therefore, impurities in the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, so a transistor with high reliability can be realized. In particular, it is preferable to perform plasma treatment when the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like. The plasma treatment and the deposition of the insulating layer 106 are preferably performed continuously without being exposed to the atmosphere.
[0282] Next, a conductive layer 104 is formed on the insulating layer 106 ( Figure 1A and Figure 1B The conductive film to be the conductive layer 104 is preferably formed by, for example, a sputtering method or an ALD method. A resist mask is formed over the conductive film by a photolithography step, and then the conductive film is processed, thereby forming an island-shaped conductive layer 104 serving as a gate electrode.
[0283] Through the above steps, a semiconductor device according to one embodiment of the present invention can be manufactured.
[0284] This embodiment mode can be combined with other embodiment modes as appropriate.
[0285] (Implementation 3) In this embodiment, refer to Fig.16 A display device according to one embodiment of the present invention is described through FIG. 24 .
[0286] The display device of this embodiment mode may be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment mode may be used as a display portion of the following devices: electronic devices with large screens such as television devices, desktop or notebook computers, displays for computers, etc., digital signage, large-scale game machines such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game machines; portable information terminals; and sound reproduction devices.
[0287] The display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as a display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type devices, and a display unit of wearable devices that can be worn on the head such as VR devices such as head-mounted displays (HMDs) and glasses-type AR devices.
[0288] A semiconductor device of one embodiment of the present invention can be used in a display device or a module including the display device. As a module including the display device, there can be cited a module in which the display device is equipped with a connector such as a flexible printed circuit (FPC) or TCP (Tape Carrier Package), a module in which an integrated circuit (IC) is installed by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.
[0289] <Display Device 50A> Fig.16 It is a perspective view of the display device 50A.
[0290] The display device 50A has a structure in which a substrate 152 and a substrate 151 are bonded together. Fig.16 In FIG. 1 , the substrate 152 is indicated by a dotted line.
[0291] The display device 50A includes a display portion 162 , a connection portion 140 , a circuit portion 164 , wiring 165 , and the like. Fig.16 The example in which the display device 50A is mounted with the IC 173 and the FPC 172 is shown. Fig.16 The structure shown is called a display module including the display device 50A, IC and FPC.
[0292] The connection portion 140 is disposed outside the display portion 162. The connection portion 140 may be disposed along one side or multiple sides of the display portion 162. There may also be one or more connection portions 140. Fig.16 The example in which the connection part 140 is provided so as to surround the four sides of the display part is shown. In the connection part 140, the common electrode of the display element is electrically connected to the conductive layer, and a potential can be supplied to the common electrode.
[0293] The circuit unit 164 includes, for example, a scanning line driving circuit (also referred to as a gate driver). Alternatively, the circuit unit 164 may include both a scanning line driving circuit and a signal line driving circuit (also referred to as a source driver).
[0294] The wiring 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the wiring 165 from the outside through the FPC 172 or are input to the wiring 165 from the IC 173.
[0295] Fig.16An example of providing IC 173 on substrate 151 by COG method or COF method is shown. As IC 173, for example, an IC including one or both of a scanning line driving circuit and a signal line driving circuit can be used. Note that the display device 50A and the display module do not necessarily have to be provided with an IC. Alternatively, the IC can be mounted on an FPC by COF method or the like.
[0296] The transistor of one embodiment of the present invention can be used for, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.
[0297] For example, when a transistor of one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced and a high-definition display device can be realized. In addition, for example, when a transistor of one embodiment of the present invention is used in a drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the area occupied by the drive circuit can be reduced and a display device with a narrow frame can be realized. In addition, a transistor of one embodiment of the present invention has good electrical characteristics, and by using the semiconductor device in a display device, the reliability of the display device can be improved.
[0298] The display unit 162 is an image display region in the display device 50A, and includes a plurality of pixels 210 arranged periodically. Fig.16 An enlarged view of one pixel 210 is shown in FIG.
[0299] There is no particular limitation on the arrangement of pixels in the display device of this embodiment, and various methods can be used. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.
[0300] Fig.16 The pixel 210 shown includes a sub-pixel 11R that exhibits red light, a sub-pixel 11G that exhibits green light, and a sub-pixel 11B that exhibits blue light.
[0301] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit for controlling driving of the display element.
[0302] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements of shutter mode or light interference mode, display elements using microcapsule mode, electrophoresis mode, electrowetting mode or electronic powder fluid (registered trademark) mode, etc. can also be used. In addition, QLED (Quantum-dot LED) using light source and color conversion technology using quantum dot materials can also be used.
[0303] Examples of display devices using a liquid crystal element include a transmissive display device, a reflective display device, and a semi-transmissive display device.
[0304] As the light emitting element, for example, there can be mentioned self-luminous light emitting elements such as LED, OLED (Organic LED), semiconductor laser, etc. As the LED, for example, a small LED, a micro LED, etc. can be used.
[0305] Examples of the light-emitting substance contained in the light-emitting element include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (TADF materials), and inorganic compounds (quantum dot materials, etc.).
[0306] The light emitting element may emit light of infrared, red, green, blue, cyan, magenta, yellow or white, etc. In addition, when the light emitting element has a microcavity structure, the color purity can be further improved.
[0307] Of a pair of electrodes included in the light emitting element, one electrode is used as an anode and the other electrode is used as a cathode.
[0308] In this embodiment, description is mainly given by taking the case where a light-emitting element is used as a display element as an example.
[0309] A display device according to one embodiment of the present invention may also adopt any of the following structures: a top emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom emission type that emits light to one side of a substrate on which a light-emitting element is formed, or a dual emission type that emits light to both sides.
[0310] Fig.17An example of a cross section of a portion of the region including the FPC 172 , a portion of the circuit portion 164 , a portion of the display portion 162 , a portion of the connection portion 140 , and a portion of the region including the end portion of the display device 50A is shown.
[0311] Fig.17 The display device 50A shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, etc. between substrates 151 and 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.
[0312] The display device 50A adopts an SBS structure. In the SBS structure, the material and structure of each light emitting element can be optimized separately, the degree of freedom in selecting materials and structures is increased, and it becomes easy to improve brightness and reliability.
[0313] The display device 50A adopts a top emission type. In the top emission type, transistors and the like can be arranged so as to overlap with the light emitting region of the light emitting element, so that the aperture ratio of the pixel can be further increased compared with the bottom emission type.
[0314] The transistors 205D, 205R, 205G, and 205B are all formed over the substrate 151. These transistors can be manufactured using the same material and the same process.
[0315] In this embodiment, an example of using OS transistors as transistors 205D, 205R, 205G, and 205B is shown. As transistors 205D, 205R, 205G, and 205B, transistors of one embodiment of the present invention can be used. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include transistors of one embodiment of the present invention. By using a transistor of one embodiment of the present invention in the display unit 162, the pixel size can be reduced and the definition can be improved. In addition, by using a transistor of one embodiment of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced and the frame can be narrowed. For the transistor of one embodiment of the present invention, reference can be made to the description of the above embodiment.
[0316] Specifically, transistors 205D, 205R, 205G, and 205B all include a conductive layer 104 used as a gate, an insulating layer 106 used as a gate insulating layer, a conductive layer 112a and a conductive layer 112b used as a source or a drain, a semiconductor layer 108, and an insulating layer 110 (insulating layers 110a, 110b, and 110c). Here, a plurality of layers obtained by processing the same conductive film are given the same hatching. The insulating layer 110 is located between the conductive layer 112a and the conductive layer 112b. The insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.
[0317] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the transistor of one embodiment of the present invention and a transistor of another structure may be combined.
[0318] The display device of this embodiment may include, for example, any one or more of a planar transistor, a staggered transistor, and an inversely staggered transistor. The transistor included in the display device of this embodiment has any one of a top-gate structure and a bottom-gate structure. Alternatively, gate electrodes may be provided above and below the semiconductor layer forming the channel.
[0319] The display device of this embodiment may include a transistor using silicon for a channel formation region (Si transistor).
[0320] Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor including LTPS in a semiconductor layer (hereinafter also referred to as LTPS transistor) can be used. LTPS transistors have high field effect mobility and good frequency characteristics.
[0321] When the luminous brightness of the light-emitting element included in the pixel circuit is increased, the amount of current flowing through the light-emitting element needs to be increased. To this end, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Because the source-drain withstand voltage of the OS transistor is higher than that of the Si transistor, a high voltage can be applied to the source-drain of the OS transistor. Thus, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased to improve the luminous brightness of the light-emitting element.
[0322] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting element can be controlled. As a result, the number of grayscales of the pixel circuit can be increased.
[0323] Regarding the saturation of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the EL element are uneven, a stable current can flow through the light-emitting element. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is changed, the source-drain current remains almost unchanged, so the light-emitting brightness of the light-emitting element can be stabilized.
[0324] The transistor included in the circuit portion 164 and the transistor included in the display portion 162 may have the same structure or different structures. The plurality of transistors included in the circuit portion 164 may have the same structure or two or more different structures. Similarly, the plurality of transistors included in the display portion 162 may have the same structure or two or more different structures.
[0325] All transistors included in the display portion 162 may be OS transistors, all transistors included in the display portion 162 may be Si transistors, some transistors included in the display portion 162 may be OS transistors and the remaining transistors may be Si transistors.
[0326] For example, by using both LTPS transistors and OS transistors in the display portion 162, a display device with low power consumption and high driving capability can be realized. In addition, a structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO. As a more preferred example, a structure in which an OS transistor is used as a transistor used as a switch for controlling conduction / non-conduction between wirings and an LTPS transistor is used as a transistor for controlling current can be cited.
[0327] For example, one of the transistors included in the display unit 162 is used as a transistor for controlling the current flowing through the light-emitting element and may also be referred to as a driving transistor. One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as the driving transistor. Thus, the current flowing through the light-emitting element in the pixel circuit can be increased.
[0328] On the other hand, one of the other transistors included in the display unit 162 is used as a switch for controlling the selection and non-selection of pixels, and may also be referred to as a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and the drain is electrically connected to the source line (signal line). The selection transistor is preferably an OS transistor. Therefore, even if the frame rate is significantly reduced (for example, below 1fps), the grayscale of the pixel can be maintained, thereby reducing power consumption by stopping the driver when displaying a static image.
[0329] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218 .
[0330] The insulating layer 218 is preferably used as a protective layer of the transistor. The insulating layer 218 is preferably made of a material that does not easily diffuse impurities such as water and hydrogen. Thus, the insulating layer 218 can be used as a barrier film. By adopting this structure, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the display device.
[0331] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Specific examples of the materials are as described above.
[0332] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable. As materials that can be used for the organic insulating film, for example, acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimide amide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins can be used. In addition, the insulating layer 235 can also adopt a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. As a result, when processing the pixel electrodes 111R, 111G, 111B, etc., it is possible to suppress the formation of recesses in the insulating layer 235. Alternatively, recesses can be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.
[0333] The light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235 .
[0334] The light emitting element 130R includes a pixel electrode 111R on the insulating layer 235 , an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Fig.17 The light emitting element 130R shown emits red light (R). The EL layer 113R includes a light emitting layer that emits red light.
[0335] The light emitting element 130G includes a pixel electrode 111G on the insulating layer 235 , an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Fig.17 The light emitting element 130G shown emits green light (G). The EL layer 113G includes a light emitting layer that emits green light.
[0336] The light-emitting element 130B includes a pixel electrode 111B on the insulating layer 235 , an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Fig.17 The light emitting element 130B shown emits blue light (B). The EL layer 113B includes a light emitting layer that emits blue light.
[0337] Note that Fig.17 EL layers 113R, 113G, and 113B are shown as having the same thickness, but the present invention is not limited thereto. The thickness of each film of EL layers 113R, 113G, and 113B may be different. For example, it is preferable to set the film thickness corresponding to the optical path length of light emitted by EL layers 113R, 113G, and 113B. Thus, a microcavity structure can be realized to improve the color purity of light emitted from each light-emitting element.
[0338] The pixel electrode 111R is electrically connected to the conductive layer 112b included in the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b included in the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b included in the transistor 205B.
[0339] Each end of the pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 is used as a partition wall (also called a bank, a dam, or a spacer). The insulating layer 237 can be set to a single-layer structure or a stacked-layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the insulating layer 237 can use a material that can be used for the insulating layer 218 and a material that can be used for the insulating layer 235. The insulating layer 237 can electrically insulate the pixel electrode from the common electrode. In addition, the insulating layer 237 can electrically insulate the light-emitting elements adjacent to each other.
[0340] The common electrode 115 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to the conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and the same process as the pixel electrodes 111R, 111G, and 111B.
[0341] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. In addition, a conductive film that reflects visible light is preferably used as the electrode on the side that does not extract light.
[0342] The electrode on the side that does not extract light may also be a conductive film that transmits visible light. In this case, it is preferable to configure the electrode between the reflective layer and the EL layer. In other words, the light emitted by the EL layer can also be reflected by the reflective layer and extracted from the display device.
[0343] As the material for forming a pair of electrodes of the light-emitting element, metals, alloys, conductive compounds and mixtures thereof can be appropriately used. As the material, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium and neodymium and alloys appropriately combined therewith can be cited. In addition, as the material, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide) and In-W-Zn oxide can be cited. In addition, as the material, silver-containing alloys, such as aluminum alloys (aluminum alloys) such as aluminum, nickel and lanthanum alloys (Al-Ni-La), silver and magnesium alloys and silver, palladium and copper alloys (also referred to as Ag-Pd-Cu, APC) can be cited. In addition, examples of the material include elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (e.g., lithium, cesium, calcium, and strontium), rare earth metals such as europium and ytterbium, alloys of appropriately combined elements, and graphene.
[0344] The light-emitting element preferably adopts a microcavity resonator (microcavity) structure. Therefore, one of a pair of electrodes included in the light-emitting element preferably includes an electrode that is transmissive and reflective to visible light (semi-transmissive-semi-reflective electrode), and the other preferably includes an electrode that is reflective to visible light (reflective electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting element can be enhanced.
[0345] The light transmittance of the transparent electrode is 40% or more. For example, an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as a transparent electrode of a light-emitting element. The reflectivity of the semi-transmissive-semi-reflective electrode to visible light is 10% or more and 95% or less, preferably 30% or more and 80% or less. The reflectivity of the reflective electrode to visible light is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.
[0346] The EL layers 113R, 113G, and 113B are all arranged in an island shape. Fig.17In the embodiment, the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113G, the ends of the adjacent EL layers 113G overlap with the ends of the EL layers 113B, and the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113B. Fig.17 As shown in FIG. 1 , when an island-shaped EL layer is deposited using a high-definition metal mask, the ends of adjacent EL layers may overlap each other, but the present invention is not limited to this. That is, adjacent EL layers may not overlap each other but may be separated. In addition, in a display device, there may be both overlapping portions of adjacent EL layers and separated portions of adjacent EL layers not overlapping each other.
[0347] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer contains one or more light-emitting substances. As the light-emitting substance, a substance that emits light in a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. In addition, as the light-emitting substance, a substance that emits near-infrared light can also be used.
[0348] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.
[0349] The light-emitting layer may contain one or more organic compounds (host material, auxiliary material, etc.) in addition to the light-emitting substance (guest material). As one or more organic compounds, one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) may be used. In addition, as one or more organic compounds, a bipolar substance (a substance with high electron transport properties and hole transport properties) or a TADF material may also be used.
[0350] For example, the light-emitting layer preferably includes a combination of a phosphorescent material, a hole transport material that easily forms an exciplex, and an electron transport material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) utilizing energy transfer from the exciplex to the luminescent substance (phosphorescent material) can be efficiently obtained. In addition, by selecting a combination of light whose wavelength overlaps with the absorption band on the lowest energy side of the luminescent substance as the exciplex, energy transfer can be smoothed, thereby efficiently obtaining light emission. By adopting the above structure, high efficiency, low voltage drive, and long life of the light-emitting element can be achieved at the same time.
[0351] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer). In addition, the EL layer may also include one or both of a bipolar material and a TADF material.
[0352] The light emitting element may use a low molecular weight compound or a high molecular weight compound, and may further contain an inorganic compound. The layers constituting the light emitting element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.
[0353] The light-emitting element can adopt a single structure (a structure with only one light-emitting unit) or a series structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The series structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting a series structure, a light-emitting element that can emit light with high brightness can be realized. In addition, the series structure can improve reliability because it can reduce the current required to obtain the same brightness compared to the single structure. In addition, the series structure can also be called a stacked structure.
[0354] exist Fig.17 When a tandem-structured light-emitting element is used, it is preferred that the EL layer 113R include a plurality of light-emitting units emitting red light, the EL layer 113G include a plurality of light-emitting units emitting green light, and the EL layer 113B include a plurality of light-emitting units emitting blue light.
[0355] A protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 142. The substrate 152 is provided with a light shielding layer 117. As a seal for the light emitting element, for example, a solid sealing structure or a hollow sealing structure can be adopted. Fig.17 In the embodiment, the space between the substrate 152 and the substrate 151 is filled with the adhesive layer 142, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure in which the space is filled with an inert gas (nitrogen or argon, etc.) can also be adopted. In this case, the adhesive layer 142 can also be arranged in a manner that does not overlap with the light-emitting element. In addition, a resin different from the adhesive layer 142 arranged in a frame shape can also be used to fill the space.
[0356] The protective layer 131 is provided at least in the display portion 162, and is preferably provided in a manner covering the entire display portion 162. The protective layer 131 is preferably provided in a manner covering the connection portion 140 and the circuit portion 164 in addition to the display portion 162. In addition, the protective layer 131 is preferably provided in a manner extending to the end of the display device 50A. On the other hand, in order to electrically connect the FPC 172 and the conductive layer 166, there is a portion in the connection portion 204 where the protective layer 131 is not provided.
[0357] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.
[0358] The protective layer 131 may have a single layer structure or a stacked layer structure of two or more layers. There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film may be used.
[0359] When the protective layer 131 includes an inorganic film, degradation of the light emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing impurities (moisture, oxygen, etc.) from entering the light emitting element, thereby improving the reliability of the display device.
[0360] As the protective layer 131, for example, an inorganic insulating film containing oxide, nitride, oxynitride, oxynitride, or the like can be used. Specific examples of the above materials are as described above. In particular, the protective layer 131 preferably includes a nitride or an oxynitride, and more preferably includes a nitride.
[0361] An inorganic film including ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may be used as the protective layer 131. The inorganic film preferably has a high resistance, and more specifically, the inorganic film preferably has a resistance higher than that of the common electrode 115. The inorganic film may further include nitrogen.
[0362] When light emitted from the light emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high visible light transmittance. For example, ITO, IGZO, and alumina are inorganic materials with high visible light transmittance and are therefore preferred.
[0363] As the protective layer 131, for example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using this stacked structure, impurities (water, oxygen, etc.) can be suppressed from entering the EL layer.
[0364] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of the organic film that can be used for the protective layer 131 include an organic insulating film that can be used for the insulating layer 235 .
[0365] A connection portion 204 is provided in a region where the substrate 151 and the substrate 152 do not overlap. In the connection portion 204, the wiring 165 is electrically connected to the FPC 172 through the conductive layer 166 and the connection layer 242. The conductive layer 166 is shown as an example of a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The conductive layer 166 is exposed on the top surface of the connection portion 204. Therefore, the connection portion 204 can be electrically connected to the FPC 172 through the connection layer 242.
[0366] The display device 50A is a top emission type. Light emitted by the light emitting element is emitted to the substrate 152 side. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B are made of a material that reflects visible light, and the counter electrode (common electrode 115) is made of a material that transmits visible light.
[0367] A light shielding layer 117 is preferably provided on a surface of the substrate 152 on the substrate 151 side. The light shielding layer 117 can be provided between adjacent light emitting elements, in the connection portion 140, the circuit portion 164, and the like.
[0368] Alternatively, a coloring layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When the color filter is provided so as to overlap with the light-emitting element, the color purity of light emitted from the pixel can be improved.
[0369] In addition, various optical components can be arranged on the outside of the substrate 152 (the surface on the opposite side of the substrate 151). As optical components, for example, polarizers, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflection layers, and light-focusing films (condensing films) can be cited. In addition, surface protective layers such as antistatic films that inhibit the adhesion of dust, water-repellent films that are not easily soiled, hard coatings that inhibit damage during use, and impact-absorbing layers can also be arranged on the outside of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x Layer), which can prevent the surface from being dirty or damaged, is preferred. In addition, DLC (diamond-like carbon), aluminum oxide (AlO x ), polyester materials or polycarbonate materials, etc. In addition, as the surface protection layer, it is preferred to use a material with high transmittance to visible light. In addition, the surface protection layer is preferably made of a material with high hardness.
[0370] Glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. can be used for the substrate 151 and the substrate 152, respectively. A material that transmits the light is used for the substrate on the side where the light is taken out from the light-emitting element. By using a flexible material for the substrate 151 and the substrate 152, the flexibility of the display device can be improved, thereby realizing a flexible display. A polarizing plate can also be used as at least one of the substrate 151 and the substrate 152.
[0371] As the substrate 151 and the substrate 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyether sulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers, etc. In addition, glass having a thickness that allows flexibility can be used as at least one of the substrates 151 and 152.
[0372] When a circular polarizer is overlapped on a display device, it is preferred to use a substrate with high optical isotropy as the substrate included in the display device. The substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). As films with high optical isotropy, triacetyl cellulose (TAC, also called triacetyl cellulose) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic resin films can be cited.
[0373] As the adhesive layer 142, various curing adhesives such as light curing adhesives such as ultraviolet curing adhesives, reaction curing adhesives, heat curing adhesives, anaerobic adhesives, etc. can be used. As these adhesives, epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. can be cited. In particular, it is preferred to use materials with low moisture permeability such as epoxy resins. In addition, two-liquid mixed resins can also be used. In addition, adhesive sheets, etc. can also be used.
[0374] As the connection layer 242 , an anisotropic conductive film (ACF: Anisotropic Conductive Film), anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.
[0375] <Display device 50B> Fig.18 The main difference between the display device 50B shown and the display device 50A is that in the former, a light-emitting element including an EL layer 113 shared by the light-emitting elements and a coloring layer (color filter, etc.) are used in the sub-pixels of each color. Note that in the description of the display device described later, the description of the same parts as the display device described previously is sometimes omitted.
[0376] Fig.18 The display device 50B shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light, etc. between the substrate 151 and the substrate 152.
[0377] The light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50B through the coloring layer 132R.
[0378] The light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50B through the coloring layer 132G.
[0379] The light emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50B through the coloring layer 132B.
[0380] The light emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115. Compared with a structure in which each sub-pixel of each color is provided with a different EL layer, a structure in which each sub-pixel of each color shares the EL layer 113 can reduce the number of manufacturing steps.
[0381] For example, Fig.18 The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.
[0382] The white light-emitting element preferably includes two or more light-emitting layers. In the case of using two light-emitting layers to obtain white light, the light-emitting layers can be selected in such a way that the light-emitting colors of the two light-emitting layers are in a complementary color relationship. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary color relationship, a structure in which the light-emitting element as a whole emits white light can be obtained. In addition, in the case of using three or more light-emitting layers to obtain white light, the light-emitting colors of the three or more light-emitting layers are combined to obtain a structure in which the light-emitting element as a whole emits white light.
[0383] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a longer wavelength than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.
[0384] The light-emitting element emitting white light preferably adopts a series structure. Specifically, it can be: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red light and green light and a light-emitting unit emitting blue light; a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light, and a light-emitting unit emitting blue light in sequence; or a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and red light, and a light-emitting unit emitting blue light in sequence, etc. For example, as the number of layers and color sequence of the light-emitting unit, there can be cited a two-stage structure in which B and Y are stacked from the anode side, a two-stage structure in which B and the light-emitting unit X are stacked, a three-stage structure in which B, Y and B are stacked, and a three-stage structure in which B, X and B are stacked. As the number of layers and color sequence of the light-emitting layer in the light-emitting unit X, there can be adopted a two-stage structure in which R and Y are stacked from the anode side, a two-stage structure in which R and G are stacked, a two-stage structure in which G and R are stacked, a three-stage structure in which G, R and G are stacked, or a three-stage structure in which R, G and R are stacked. In addition, another layer may be provided between two light-emitting layers.
[0385] Or, for example Fig.18The light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer on the light-emitting element 130R and the substrate 152, and to provide a coloring layer 132G between the color conversion layer on the light-emitting element 130G and the substrate 152. A portion of the light emitted by the light-emitting element is sometimes transmitted without being converted by the color conversion layer. By extracting the light that has passed through the color conversion layer through the coloring layer, the coloring layer can absorb light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.
[0386] <Display Device 50C> Fig.19 The main difference between the illustrated display device 50C and the display device 50B is that the former is a bottom emission type display device.
[0387] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.
[0388] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.19 The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, and a transistor 205B are provided on the insulating layer 153. In addition, a coloring layer 132R (not shown), a coloring layer 132G, and a coloring layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the coloring layers 132R (not shown), the coloring layer 132G, and the coloring layer 132B.
[0389] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113 , and a common electrode 115 .
[0390] The light emitting element 130B overlapping the colored layer 132B includes a pixel electrode 111B, an EL layer 113 , and a common electrode 115 .
[0391] The pixel electrodes 111G and 111B are each made of a material having high visible light transmittance. The common electrode 115 is preferably made of a material that reflects visible light. Since a metal with low resistance or the like can be used for the common electrode 115 in a bottom emission display device, a voltage drop caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
[0392] A transistor according to one embodiment of the present invention can be miniaturized and have a reduced occupied area, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission structure display device.
[0393] <Display Device 50D> Fig. 20A The main difference between the display device 50D shown and the display device 50A is that the former includes a light receiving element 130S.
[0394] The display device 50D includes a light-emitting element and a light-receiving element in a pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be installed in the display device using the organic EL element.
[0395] In the display device 50D in which pixels include a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so the display device can detect the contact or approach of an object while displaying an image. Therefore, the display unit 162 has one or both of a camera function and a sensing function in addition to an image display function. For example, instead of displaying an image in all sub-pixels included in the display device 50D, a part of the sub-pixels can be used as a light source to emit light, another part of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display an image.
[0396] Therefore, it is not necessary to separately provide a light receiving unit and a light source with the display device 50D, and the number of components of the electronic device can be reduced. For example, it is not necessary to separately provide a biometric device installed in the electronic device or an electrostatic capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, an electronic device with reduced manufacturing cost can be provided.
[0397] When the light receiving element is used for the image sensor, the display device 50D can capture images using the light receiving element. For example, the image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes, artery shapes) or faces.
[0398] The light receiving element can be used for a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a floating sensor, a floating touch sensor, a non-touch sensor), etc. A touch sensor can detect an object when the object (a finger, a hand, a pen, etc.) directly contacts the display device. In addition, a non-contact sensor can detect the object even if the object does not contact the display device.
[0399] The light emitting element 130S includes a pixel electrode 111S on the insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from the outside of the display device 50D.
[0400] The pixel electrode 111S is electrically connected to the conductive layer 112 b included in the transistor 205S through an opening provided in the insulating layer 106 , the insulating layer 218 , and the insulating layer 235 .
[0401] The end portion of the pixel electrode 111S is covered with the insulating layer 237 .
[0402] The common electrode 115 is a continuous film shared by the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140 .
[0403] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. As the semiconductor, inorganic semiconductors such as silicon and organic semiconductors including organic compounds can be cited. In this embodiment, an example of using an organic semiconductor as a semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum evaporation method), and the manufacturing equipment can be used together, so it is preferred.
[0404] The functional layer 113S may also include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) as a layer other than the active layer. In addition, without limitation thereto, a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, or an electron blocking material may also be included. As a layer other than the active layer included in the light-receiving element, for example, the above-mentioned material that can be used for the light-emitting element can be used.
[0405] The light receiving element may use a low molecular weight compound or a high molecular weight compound, and may also contain an inorganic compound. The layer constituting the light receiving element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.
[0406] Fig. 20B and Fig. 20C The display device 50D shown includes a layer 353 having a light receiving element, a circuit layer 355 , and a layer 357 having a light emitting element between a substrate 151 and a substrate 152 .
[0407] The layer 353 includes, for example, the light receiving element 130S. The layer 357 includes, for example, the light emitting elements 130R, 130G, and 130B.
[0408] The circuit layer 355 includes a circuit for driving the light-receiving element and a circuit for driving the light-emitting element. The circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, one or more switches, transistors, capacitors, resistors, wirings, terminals, etc. may be provided in the circuit layer 355.
[0409] Fig. 20B This is an example of using the light receiving element 130S as a touch sensor. Fig. 20B As shown, when the finger 352 touching the display device 50D reflects the light emitted by the light emitting element in the layer 357, the light receiving element in the layer 353 detects the reflected light. Thus, it is possible to detect that the finger 352 has touched the display device 50D.
[0410] Fig. 20C This is an example of using the light receiving element 130S as a non-contact sensor. Fig. 20C As shown, when a finger 352 approaching (ie, not touching) the display device 50D reflects light emitted by the light emitting element in the layer 357 , the light receiving element in the layer 353 detects the reflected light.
[0411] <Display device 50E> Fig.21 The display device 50E shown is an example of a display device using an MML (Metal Mask Less) structure. That is, the display device 50E includes a light-emitting element that is not manufactured using a high-definition metal mask. Note that the stacked structure from the substrate 151 to the insulating layer 235 and the stacked structure from the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so the description thereof is omitted.
[0412] exist Fig.21 In the embodiment, light emitting elements 130R, 130G, and 130B are disposed on the insulating layer 235 .
[0413] The light emitting element 130R includes a conductive layer 124R on the insulating layer 235 , a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114 . Fig.21The light emitting element 130R shown emits red light (R). The layer 133R includes a light emitting layer that emits red light. In the light emitting element 130R, the layer 133R and the common layer 114 may be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R may be referred to as a pixel electrode.
[0414] The light emitting element 130G includes a conductive layer 124G on the insulating layer 235 , a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114 . Fig.21 The light emitting element 130G shown emits green light (G). The layer 133G includes a light emitting layer that emits green light. In the light emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.
[0415] The light emitting element 130B includes a conductive layer 124B on the insulating layer 235 , a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114 . Fig.21 The light emitting element 130B shown emits blue light (B). Layer 133B includes a light emitting layer that emits blue light. In the light emitting element 130B, layer 133B and common layer 114 may be collectively referred to as an EL layer. One or both of conductive layer 124B and conductive layer 126B may be referred to as a pixel electrode.
[0416] In this specification and the like, an island-shaped layer provided for each light-emitting element in the EL layer included in the light-emitting element is referred to as a layer 133R, a layer 133G, or a layer 133B, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. In addition, in this specification and the like, the layer 133R, the layer 133G, and the layer 133B not including the common layer 114 may be referred to as an island-shaped EL layer, an EL layer formed in an island shape, or the like.
[0417] Layer 133R, layer 133G, and layer 133B are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintentional light emission caused by crosstalk can be suppressed, thereby realizing a display device with a very high contrast.
[0418] In addition, Fig.21 In FIG. 1 , the film thicknesses of the layers 133R, 133G, and 133B are shown as being the same, but the present invention is not limited thereto. The film thicknesses of the layers 133R, 133G, and 133B may be different from each other.
[0419] Conductive layer 124R is electrically connected to conductive layer 112b included in transistor 205R through openings provided in insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, conductive layer 124G is electrically connected to conductive layer 112b included in transistor 205G, and conductive layer 124B is electrically connected to conductive layer 112b included in transistor 205B.
[0420] Conductive layers 124R, 124G, and 124B are formed to cover the openings provided in insulating layer 235. Concave portions of conductive layers 124R, 124G, and 124B are filled with layer 128, respectively.
[0421] Layer 128 has the function of flattening the concave portions of conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B electrically connected to conductive layers 124R, 124G, and 124B are provided on conductive layers 124R, 124G, and 124B and layer 128. Therefore, the region overlapping the concave portions of conductive layers 124R, 124G, and 124B can also be used as a light-emitting region, thereby increasing the aperture ratio of the pixel. Conductive layers 124R and 126R are preferably conductive layers used as reflective electrodes.
[0422] Layer 128 may be an insulating layer or a conductive layer. Layer 128 may be formed of various inorganic insulating materials, organic insulating materials, and conductive materials as appropriate. In particular, layer 128 is preferably formed of an insulating material, and is particularly preferably formed of an organic insulating material. As layer 128, for example, an organic insulating material that can be used for the above-mentioned insulating layer 237 can be used.
[0423] Although Fig.21 An example is shown in which the top surface of the layer 128 has a flat portion, but there is no particular limitation on the shape of the layer 128. The top surface of the layer 128 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.
[0424] The height of the top surface of layer 128 may be the same as or substantially the same as the height of the top surface of conductive layer 124R, or may be different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.
[0425] The end of the conductive layer 126R may also be aligned with the end of the conductive layer 124R, and may also cover the side of the end of the conductive layer 124R. Each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape. Specifically, each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape with a taper angle less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side of the pixel electrode also has a tapered shape. By making the side of the pixel electrode have a tapered shape, the coverage of the EL layer provided along the side of the pixel electrode can be improved.
[0426] Since the conductive layers 124G and 126G and the conductive layers 124B and 126B are the same as the conductive layers 124R and 126R, detailed descriptions thereof will be omitted.
[0427] The top surface and side surfaces of the conductive layer 126R are covered by the layer 133R. Similarly, the top surface and side surfaces of the conductive layer 126G are covered by the layer 133G, and the top surface and side surfaces of the conductive layer 126B are covered by the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.
[0428] Part of the top surface and side surfaces of the layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and the insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. Both the common layer 114 and the common electrode 115 are continuous films shared by a plurality of light-emitting elements.
[0429] exist Fig.21 In the embodiment, there is no arrangement between the conductive layer 126R and the layer 133R. Fig.17 In other words, the display device 50E is not provided with an insulating layer (also referred to as a partition wall, a dam, a spacer, etc.) that contacts the pixel electrode and covers the top surface end of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. Thus, a high-definition or high-resolution display device can be realized. In addition, there is no need for a mask for forming the insulating layer, thereby reducing the manufacturing cost of the display device.
[0430] As described above, layer 133R, layer 133G, and layer 133B all include a light-emitting layer. Layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surfaces of layer 133R, layer 133G, and layer 133B are exposed in the manufacturing process of the display device, so by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and the damage to the light-emitting layer can be reduced. As a result, the reliability of the light-emitting element can be improved.
[0431] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light emitting elements 130R, 130G, and 130B share the common layer 114.
[0432] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B via the insulating layer 125.
[0433] By covering the side surfaces of the layers 133R, 133G, and 133B (or even covering a portion of the top surfaces thereof) with at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) can be prevented from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing the light-emitting element from being short-circuited. Thus, the reliability of the light-emitting element can be improved.
[0434] The insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. By adopting a structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B, film peeling of the layers 133R, 133G, and 133B can be prevented, thereby improving the reliability of the light-emitting element.
[0435] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.
[0436] By providing the insulating layer 125 and the insulating layer 127, the space between adjacent island-shaped layers can be filled, so that the unevenness of the formed surface of the layer (for example, the carrier injection layer, the common electrode, etc.) provided on the island-shaped layer can be reduced and further flattened. Therefore, the coverage of the carrier injection layer or the common electrode, etc. can be improved.
[0437] The common layer 114 and the common electrode 115 are arranged on the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are arranged, steps are generated due to the area where the pixel electrode and the island EL layer are arranged and the area where the pixel electrode and the island EL layer are not arranged (the area between the light-emitting elements). The display device of one embodiment of the present invention can flatten the step by including the insulating layer 125 and the insulating layer 127, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection caused by disconnection can be suppressed. Alternatively, the resistance increase caused by the local thin filmization of the common electrode 115 due to the step can be suppressed.
[0438] The top surface of the insulating layer 127 preferably has a shape with higher flatness. The top surface of the insulating layer 127 may also have at least one of a plane, a convex surface, and a concave surface. For example, the top surface of the insulating layer 127 preferably has a convex surface shape with high flatness and a large curvature radius.
[0439] The insulating layer 125 may be an insulating layer containing an inorganic material. For example, oxides, nitrides, oxynitrides, and oxynitrides may be used as the insulating layer 125. Specific examples of the above materials are as described above. The insulating layer 125 may be a single-layer structure or a stacked-layer structure. In particular, the selectivity of aluminum oxide to the EL layer is high in etching, and it has a function of protecting the EL layer in the formation of the insulating layer 127 described later, so it is preferred. In particular, by using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by the ALD method for the insulating layer 125, an insulating layer 125 with fewer pinholes and a good function of protecting the EL layer can be formed. In addition, the insulating layer 125 may also have a stacked-layer structure of a film formed by the ALD method and a film formed by the sputtering method. The insulating layer 125 may, for example, have a stacked-layer structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.
[0440] The insulating layer 125 preferably has a function of blocking the insulating layer from at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.
[0441] When the insulating layer 125 is used as a blocking insulating layer or an insulating layer having an impurity gettering function, it can have a structure that suppresses the entry of impurities (typically, at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. By adopting this structure, a light-emitting element with high reliability can be provided, and a display device with high reliability can be provided.
[0442] The impurity concentration of the insulating layer 125 is preferably low. This can prevent impurities from being mixed into the EL layer from the insulating layer 125 and deteriorating the EL layer. In addition, by reducing the impurity concentration in the insulating layer 125, the barrier property against at least one of water and oxygen can be improved. For example, it is preferable that one of the hydrogen concentration and the carbon concentration in the insulating layer 125 is sufficiently low, and it is preferable that both the hydrogen concentration and the carbon concentration are sufficiently low.
[0443] The insulating layer 127 provided on the insulating layer 125 has the function of flattening the large unevenness of the insulating layer 125 formed between adjacent light emitting elements. In other words, the insulating layer 127 improves the flatness of the surface on which the common electrode 115 is formed.
[0444] As the insulating layer 127, an insulating layer containing an organic material can be used as appropriate. As the organic material, a photosensitive organic resin is preferably used, for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification, etc., acrylic resin does not refer to only polymethacrylate or methacrylic resin, and sometimes refers to acrylic polymers in a broad sense as a whole.
[0445] As the insulating layer 127, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin and precursors of the above resins can also be used. In addition, as the insulating layer 127, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose or alcohol-soluble polyamide resin can also be used. In addition, as a photosensitive resin, a photoresist can also be used. As a photosensitive organic resin, a positive material or a negative material can be used.
[0446] A material that absorbs visible light may also be used as the insulating layer 127. By absorbing the light emitted from the light-emitting element by the insulating layer 127, it is possible to suppress the leakage of light from the light-emitting element to the adjacent light-emitting element through the insulating layer 127 (stray light). Therefore, the display quality of the display device can be improved. In addition, the display quality can be improved even if a polarizing plate is not used in the display device, so a lightweight and thin display device can be realized.
[0447] As materials that absorb visible light, materials including pigments such as black, materials including dyes, resin materials including light absorption (for example, polyimide, etc.), and resin materials that can be used for color filters (color filter materials) can be cited. In particular, when using a resin material formed by mixing or stacking two or more colors of color filter materials, the effect of shielding visible light can be improved, so it is preferred. In particular, by mixing three or more colors of color filter materials, a black or nearly black resin layer can be achieved.
[0448] [Display device 50F] Fig. 22 The main difference between the display device 50F shown and the display device 50E is that a coloring layer (color filter, etc.) is provided in each sub-pixel of each color in the former.
[0449] Fig. 22 The display device 50F shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light, etc. between the substrate 151 and the substrate 152.
[0450] The light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50F through the coloring layer 132R. Similarly, the light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50F through the coloring layer 132G. The light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50F through the coloring layer 132B.
[0451] The light-emitting elements 130R, 130G, and 130B each include a layer 133. These three layers 133 are formed by the same process and the same material. In addition, these three layers 133 are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintentional light emission caused by crosstalk can be suppressed, thereby realizing a display device with very high contrast.
[0452] For example, Fig. 22 The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.
[0453] Or, for example Fig. 22 The light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, the layer 133 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that presents blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that presents red light and the sub-pixel 11G that presents green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferred that a coloring layer 132R is provided between the color conversion layer on the light-emitting element 130R and the substrate 152, and a coloring layer 132G is provided between the color conversion layer on the light-emitting element 130G and the substrate 152. By extracting the light that transmits the color conversion layer through the coloring layer, the color purity of the light presented by the sub-pixel can be improved by absorbing light other than the desired color light by the coloring layer.
[0454] <Display device 50G> Fig.23 The main difference between the illustrated display device 50G and the display device 50F is that the former is a bottom emission type display device.
[0455] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.
[0456] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.23 The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, and a transistor 205B are provided on the insulating layer 153. In addition, a coloring layer 132R (not shown), a coloring layer 132G, and a coloring layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the coloring layers 132R (not shown), the coloring layer 132G, and the coloring layer 132B.
[0457] The light-emitting element 130G overlapping the colored layer 132G includes a conductive layer 124G, a conductive layer 126G, an EL layer 113 , a common layer 114 , and a common electrode 115 .
[0458] The light-emitting element 130B overlapping the colored layer 132B includes a conductive layer 124B, a conductive layer 126B, an EL layer 113 , a common layer 114 , and a common electrode 115 .
[0459] Conductive layers 124G, 124B, 126G, and 126B are each made of a material having high visible light transmittance. Common electrode 115 is preferably made of a material that reflects visible light. In a bottom emission display device, a metal with low resistivity can be used for common electrode 115, so that a voltage drop caused by the resistance of common electrode 115 can be suppressed, and high display quality can be achieved.
[0460] A transistor according to one embodiment of the present invention can be miniaturized and have a reduced occupied area, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission structure display device.
[0461] <Example of Method for Manufacturing Display Device> The following describes a method for manufacturing a display device using an MML (Metal Mask Less) structure with reference to FIG24. Here, the process of manufacturing a light-emitting element without a high-definition metal mask is described in detail. FIG24 is a cross-sectional view of three light-emitting elements and a connection portion 140 included in a display portion 162 in each process.
[0462] When manufacturing a light-emitting element, a vacuum process such as evaporation and a solution process such as spin coating and inkjet can be used. As an evaporation method, physical evaporation methods (PVD methods) such as sputtering, ion plating, ion beam evaporation, molecular beam evaporation, vacuum evaporation, and chemical vapor deposition (CVD methods) can be cited. In particular, a functional layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) included in the EL layer can be formed using evaporation (vacuum evaporation), coating (dip coating, dye coating, rod coating, spin coating, spray coating), printing (inkjet, screen printing (porcelain printing), offset printing (lithography), flexographic printing (relief printing), gravure printing or micro-contact printing, etc.) and other methods.
[0463] The island-shaped layer (including the light-emitting layer) manufactured in the manufacturing method of the display device described below is not formed using a high-precision metal mask, but is formed by processing by photolithography after the light-emitting layer is deposited on the entire surface. Therefore, a high-definition display device or a display device with a high aperture ratio that has been difficult to achieve so far can be realized. Furthermore, since the light-emitting layer can be formed separately for each color, a display device with extremely clear, high contrast and high display quality can be realized. In addition, by providing a sacrificial layer on the light-emitting layer, the damage to the light-emitting layer during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.
[0464] For example, when a display device is composed of three light-emitting elements: a light-emitting element emitting blue light, a light-emitting element emitting green light, and a light-emitting element emitting red light, three island-shaped light-emitting layers can be formed by repeating the formation of the light-emitting layer and the photolithography process three times.
[0465] First, pixel electrodes 111R, 111G, 111B and a conductive layer 123 are formed on a substrate 151 provided with transistors 205R, 205G, 205B, etc. (not shown). Fig.24A ).
[0466] When forming the conductive film to be the pixel electrode, for example, a sputtering method or a vacuum evaporation method may be used. By forming a resist mask on the conductive film by a photolithography process and then processing the conductive film, the pixel electrodes 111R, 111G, 111B and the conductive layer 123 can be formed. The conductive film can be processed by one or both of a wet etching method and a dry etching method.
[0467] Next, a film 133Bf (which will later become a layer 133B) is formed on the pixel electrodes 111R, 111G, and 111B. Fig.24A ). The film 133Bf (latter layer 133B) includes a light-emitting layer that emits blue light.
[0468] This embodiment shows an example in which an island-shaped EL layer is first formed in a light-emitting element that emits blue light, and then an island-shaped EL layer is formed in a light-emitting element that emits light of other colors.
[0469] In the process of forming the island-shaped EL layer, the pixel electrodes in the light-emitting elements of the colors formed second and later may be damaged in the previous process. Therefore, the driving voltage of the light-emitting elements of the colors formed second and later may become high.
[0470] Therefore, when manufacturing a display device according to one embodiment of the present invention, it is preferred to start manufacturing from the island EL layer of the light-emitting element (e.g., the blue light-emitting element) that emits the shortest wavelength of light. For example, it is preferred to manufacture the island EL layer in the order of blue, green, red, or blue, red, green.
[0471] Thus, the state of the interface between the pixel electrode and the EL layer in the blue light-emitting element can be well maintained, thereby suppressing the driving voltage of the blue light-emitting element from becoming higher. In addition, the life of the blue light-emitting element can be extended and the reliability can be improved. Note that compared with the blue light-emitting element, the driving voltage rise of the red and green light-emitting elements is less affected, so the driving voltage can be reduced and the reliability can be improved as a whole display device.
[0472] Note that the order of manufacturing the island-shaped EL layers is not limited to the above order, and for example, the island-shaped EL layers may be manufactured in the order of red, green, and blue.
[0473] like Fig.24A As shown, the film 133Bf is not formed on the conductive layer 123. For example, the film 133Bf can be deposited only in a desired region using a range mask. By adopting a deposition process using a range mask and a processing process using a resist mask, a light emitting element can be manufactured with a relatively simple process.
[0474] The heat-resistant temperature of the compound contained in the film 133Bf is preferably 100° C. or more and 180° C. or less, more preferably 120° C. or more and 180° C. or less, and further preferably 140° C. or more and 180° C. or less. Thus, the reliability of the light-emitting element can be improved. In addition, the upper limit of the temperature that can be applied in the manufacturing process of the display device can be increased. Therefore, the range of selection of materials and formation methods for the display device can be expanded, thereby achieving an increase in yield and an increase in reliability.
[0475] As the heat-resistant temperature, for example, any of the glass transition temperature, softening point, melting point, thermal decomposition temperature and 5% weight loss temperature may be used, and the lowest temperature among the above temperatures is preferably used.
[0476] The film 133Bf can be formed by, for example, a vapor deposition method, specifically, a vacuum vapor deposition method. Alternatively, the film 133Bf can be formed by a transfer method, a printing method, an inkjet method, or a coating method.
[0477] Next, a sacrificial layer 118B is formed on the film 133Bf and the conductive layer 123 ( Fig.24A ). The sacrificial layer 118B can be formed by forming a resist mask on a film that will later become the sacrificial layer 118B by a photolithography process and then processing the film.
[0478] By providing the sacrificial layer 118B on the film 133Bf, damage to the film 133Bf during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.
[0479] The sacrificial layer 118B is preferably provided in a manner covering each end of the pixel electrodes 111R, 111G, and 111B. Thus, the end of the layer 133B formed in the subsequent process is located outside the end of the pixel electrode 111B. Since the entire top surface of the pixel electrode 111B can be used as a light-emitting area, the aperture ratio of the pixel can be increased. In addition, the end of the layer 133B may be damaged in the process after the layer 133B is formed, so it is preferably located outside the end of the pixel electrode 111B, that is, it is preferably not used as a light-emitting area. Thus, the uneven characteristics of the light-emitting element can be suppressed, and the reliability can be improved.
[0480] By covering the top surface and side surfaces of the pixel electrode 111B with the layer 133B, each process after forming the layer 133B can be performed without exposing the pixel electrode 111B. When the end of the pixel electrode 111B is exposed, corrosion may occur in an etching process, etc. By suppressing the corrosion of the pixel electrode 111B, the yield and characteristics of the light-emitting element can be improved.
[0481] Preferably, the sacrificial layer 118B is further provided at a position overlapping with the conductive layer 123. Thus, the conductive layer 123 can be prevented from being damaged during the manufacturing process of the display device.
[0482] As the sacrificial layer 118B, a film having high resistance to the processing conditions of the film 133Bf is used. Specifically, a film having a large etching selectivity ratio with the film 133Bf is used.
[0483] The sacrificial layer 118B is formed at a temperature lower than the heat resistance temperature of each compound included in the film 133Bf. The substrate temperature when forming the sacrificial layer 118B is typically 200°C or less, preferably 150°C or less, more preferably 120°C or less, further preferably 100°C or less, and further preferably 80°C or less.
[0484] When the heat-resistant temperature of the compound contained in the film 133Bf is high, the deposition temperature of the sacrificial layer 118B can be increased, so it is preferred. For example, the substrate temperature when forming the sacrificial layer 118B can also be set to above 100°C, above 120°C, or above 140°C. The higher the deposition temperature, the denser and more barrier-resistant inorganic insulating film can be formed. Therefore, by depositing the sacrificial layer at the above temperature, the damage to the film 133Bf can be further reduced, thereby improving the reliability of the light-emitting element.
[0485] The deposition temperature of other layers (eg, insulating film 125f) formed on the film 133Bf is the same as described above.
[0486] The sacrificial layer 118B can be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum evaporation. Alternatively, the sacrificial layer 118B can be formed by the above-mentioned wet deposition method.
[0487] The sacrificial layer 118B (a layer provided in contact with the film 133Bf when the sacrificial layer 118B has a stacked structure) is preferably formed by a formation method that causes less damage to the film 133Bf. For example, ALD or vacuum evaporation is more preferable than sputtering.
[0488] The sacrificial layer 118B can be processed by wet etching or dry etching. The sacrificial layer 118B is preferably processed by anisotropic etching.
[0489] By using the wet etching method, the damage to the film 133Bf during the processing of the sacrificial layer 118B can be reduced compared to the dry etching method. When the wet etching method is used, for example, it is preferred to use a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of the above. In addition, when the wet etching method is used, a mixed acid solution containing water, phosphoric acid, dilute hydrofluoric acid, and nitric acid can also be used. Note that the solution used for the wet etching process can be alkaline or acidic.
[0490] As the sacrificial layer 118B, for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film can be used.
[0491] As the sacrificial layer 118B, for example, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium and tantalum, or alloy materials containing these metal materials can be used.
[0492] The sacrificial layer 118B can use metal oxides such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium tin oxide containing silicon.
[0493] Note that element M (M is one or more of aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) may be used instead of the above-mentioned gallium.
[0494] For example, as a material very suitable for the manufacturing process of semiconductors, semiconductor materials such as silicon or germanium are preferably used. In addition, oxides or nitrides of the above semiconductor materials can be used. In addition, non-metals such as carbon or their compounds can be used. In addition, metals such as titanium, tantalum, tungsten, chromium, aluminum, or alloys containing one or more of them can be used. In addition, oxides of the above metals such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.
[0495] As the sacrificial layer 118B, various inorganic insulating films that can be used for the protective layer 131 can be used. In particular, the adhesion between the oxide insulating film and the film 133Bf is higher than the adhesion between the nitride insulating film and the film 133Bf, so it is preferred. For example, inorganic insulating materials such as aluminum oxide, hafnium oxide and silicon oxide can be used for the sacrificial layer 118B. As the sacrificial layer 118B, for example, an aluminum oxide film can be formed by the ALD method. By using the ALD method, damage to the substrate (especially the film 133Bf) can be reduced, so it is preferred.
[0496] For example, the sacrificial layer 118B may have a stacked structure of an inorganic insulating film (eg, an aluminum oxide film) formed by ALD and an inorganic film (eg, an In—Ga—Zn oxide film, a silicon film, or a tungsten film) formed by sputtering.
[0497] In addition, the same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 formed later. For example, an aluminum oxide film formed using the ALD method can be used for both the sacrificial layer 118B and the insulating layer 125. Here, the sacrificial layer 118B and the insulating layer 125 can be deposited under the same deposition conditions or different deposition conditions. For example, by depositing the sacrificial layer 118B under the same conditions as the insulating layer 125, the sacrificial layer 118B can be formed as an insulating layer with high barrier properties to at least one of water and oxygen. On the other hand, the sacrificial layer 118B is a layer that is mostly or entirely removed in a subsequent process, so it is preferably easy to process. Therefore, the sacrificial layer 118B is preferably deposited under conditions where the substrate temperature is lower than that of the insulating layer 125 during deposition.
[0498] An organic material may also be used as the sacrificial layer 118B. For example, a material that is soluble in a solvent that is chemically stable to at least the film located at the uppermost portion of the film 133Bf may also be used as the organic material. In particular, a material that is soluble in water or alcohol may be used appropriately. When depositing the above-mentioned material, it is preferred that the material is applied by the above-mentioned wet deposition method in a state where the material is dissolved in a solvent such as water or alcohol, and then a heating treatment is performed to evaporate the solvent. At this time, by performing the heating treatment in a reduced pressure atmosphere, the solvent can be removed at a low temperature and in a short time, so that thermal damage to the film 133Bf can be reduced, which is preferred.
[0499] Alternatively, the sacrificial layer 118B may be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or fluororesin such as perfluoropolymer.
[0500] For example, the sacrificial layer 118B may have a stacked structure of an organic film (eg, a PVA film) formed by evaporation or the wet deposition method and an inorganic film (eg, a silicon nitride film) formed by sputtering.
[0501] Note that a part of the sacrificial film may remain as a sacrificial layer in the display device of one embodiment of the present invention.
[0502] Next, the sacrificial layer 118B is used as a hard mask processing film 133Bf to form a layer 133B ( Fig. 24B ).
[0503] Therefore, if Fig. 24B As shown, the stacked structure of the layer 133B and the sacrificial layer 118B remains on the pixel electrode 111B. In addition, the pixel electrode 111R and the pixel electrode 111G are exposed. In addition, the sacrificial layer 118B remains on the conductive layer 123 in the region corresponding to the connection portion 140 .
[0504] The film 133Bf is preferably processed by anisotropic etching. Anisotropic dry etching is particularly preferred. Alternatively, wet etching may be used.
[0505] Then, the same steps as the step of forming the film 133Bf, the step of forming the sacrificial layer 118B, and the step of forming the layer 133B are repeated twice by changing at least the light-emitting material, thereby forming a stacked structure of the layer 133R and the sacrificial layer 118R on the pixel electrode 111R and a stacked structure of the layer 133G and the sacrificial layer 118G on the pixel electrode 111G ( Fig.24C Specifically, the layer 133R is formed to include a light-emitting layer that emits red light, and the layer 133G is formed to include a light-emitting layer that emits green light. The sacrificial layers 118R and 118G may use the same material as that used for the sacrificial layer 118B, and may use different materials.
[0506] Note that the side surfaces of the layers 133B, 133G, and 133R are preferably perpendicular or substantially perpendicular to the formed surface. For example, the angle between the formed surface and these side surfaces is preferably not less than 60 degrees and not more than 90 degrees.
[0507] As described above, the distance between two adjacent layers among the layers 133B, 133G, and 133R formed by photolithography can be reduced to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, the distance can be defined, for example, by the distance between two adjacent opposite ends of the layers 133B, 133G, and 133R. By reducing the distance between the island-shaped EL layers as described above, a display device with high definition and high aperture ratio can be provided.
[0508] Next, an insulating film 125f, which will later become the insulating layer 125, is formed to cover the pixel electrode, the layer 133B, the layer 133G, the layer 133R, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, and an insulating layer 127 ( Fig.24D ).
[0509] As the insulating film 125f, it is preferable to form an insulating film with a thickness of 3 nm or more, 5 nm or more, or 10 nm or more and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less.
[0510] The insulating film 125f is preferably formed by, for example, the ALD method. The ALD method is preferred because deposition damage can be reduced and a film with high coverage can be deposited. As the insulating film 125f, for example, an aluminum oxide film is preferably formed by the ALD method.
[0511] In addition, the insulating film 125f may be formed by a sputtering method, a CVD method, or a PECVD method whose deposition rate is higher than that of the ALD method. Thus, a display device with high reliability can be manufactured with high productivity.
[0512] The insulating film to be the insulating layer 127 is preferably formed by the above-mentioned wet deposition method (e.g., spin coating) using a photosensitive resin composition containing an acrylic resin. Preferably, a heat treatment (also called pre-baking) is performed after deposition to remove the solvent in the insulating film. Next, a portion of the insulating film is irradiated with visible light or ultraviolet light to make a portion of the insulating film photosensitive. Next, development is performed to remove the exposed area in the insulating film. Next, a heat treatment (also called post-baking) is performed. In this way, a Fig.24D The insulating layer 127 is shown. Note that the shape of the insulating layer 127 is not limited to Fig.24D For example, the top surface of the insulating layer 127 may have one or more of a convex curved surface, a concave curved surface, and a flat surface. In addition, the insulating layer 127 may also cover the side surface of at least one end of the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.
[0513] Then, if Fig.24E As shown in FIG. 1 , etching is performed using the insulating layer 127 as a mask to remove the insulating film 125f and a portion of the sacrificial layers 118B, 118G, and 118R. As a result, openings are formed in the sacrificial layers 118B, 118G, and 118R, respectively, and the top surfaces of the layers 133B, 133G, and 133R and the conductive layer 123 are exposed. Note that a portion of the sacrificial layers 118B, 118G, and 118R may remain at a position overlapping with the insulating layer 127 and the insulating layer 125 (see the sacrificial layers 119B, 119G, and 119R).
[0514] The etching process can be performed by dry etching or wet etching. In addition, when the insulating film 125f is deposited using the same material as the sacrificial layers 118B, 118G, and 118R, the etching process can be performed at one time, which is preferable.
[0515] As described above, by providing the insulating layer 127, the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, it is possible to suppress the occurrence of poor connection due to disconnected portions and resistance increase due to locally thin film thickness in the common layer 114 and the common electrode 115 between the light-emitting elements. Thus, the display device according to one embodiment of the present invention can improve display quality.
[0516] Next, a common layer 114 and a common electrode 115 are sequentially formed on the insulating layer 127, the layer 133B, the layer 133G, and the layer 133R ( Fig.24F ).
[0517] The common layer 114 can be formed by a method such as evaporation (including vacuum evaporation), transfer, printing, inkjet, or coating.
[0518] The common electrode 115 can be formed by, for example, sputtering or vacuum deposition. Alternatively, a film formed by deposition and a film formed by sputtering may be stacked.
[0519] As described above, in a method for manufacturing a display device of one embodiment of the present invention, the island-shaped layer 133B, the island-shaped layer 133G, and the island-shaped layer 133R are not formed using a high-precision metal mask but are formed by depositing a film on one surface and processing the film, so that the island-shaped layer can be formed with a uniform thickness. In addition, a high-definition display device or a display device with a high aperture ratio can be realized. In addition, even if the clarity or aperture ratio is high and the distance between sub-pixels is extremely small, the contact between the layers 133B, 133G, and 133R in adjacent sub-pixels can be suppressed. Thus, the leakage current between sub-pixels can be suppressed. Therefore, the unintentional light emission caused by crosstalk can be suppressed, so that a display device with a very high contrast can be realized.
[0520] By providing the insulating layer 127 having a tapered end between adjacent island-shaped EL layers, disconnection can be suppressed when forming the common electrode 115, and a portion with a locally thin film thickness can be prevented from being formed in the common electrode 115. Thus, poor connection due to disconnected portions and resistance increase due to a portion with a locally thin film thickness can be suppressed in the common layer 114 and the common electrode 115. Thus, the display device of one embodiment of the present invention can achieve both high definition and high display quality.
[0521] This embodiment mode can be combined with other embodiment modes as appropriate.
[0522] (Implementation 4) In this embodiment, an electronic device which is one embodiment of the present invention is described using FIGS. 25 to 27 .
[0523] The electronic device of this embodiment includes a display device of one embodiment of the present invention in a display portion. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display portion of various electronic devices.
[0524] Electronic devices include, for example, television sets, desktop or notebook computers, displays for computers, etc., digital signage, large-scale game consoles such as pinball machines, and other electronic devices with larger screens, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, sound reproduction devices, and the like.
[0525] In particular, since the display device of one embodiment of the present invention can improve the clarity, it can be suitably used in electronic devices including a smaller display unit. Examples of such electronic devices include watch-type and bracelet-type information terminal devices (wearable devices), wearable devices that can be worn on the head, VR devices such as head-mounted displays, glasses-type AR devices, and MR devices.
[0526] A display device according to one embodiment of the present invention preferably has an extremely high resolution such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K (3840×2160 pixels), 8K (7680×4320 pixels), etc. In particular, the resolution is preferably set to 4K, 8K or above. In addition, the pixel density (clarity) in the display device according to one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, further preferably 1000 ppi or more, further preferably 2000 ppi or more, further preferably 3000 ppi or more, further preferably 5000 ppi or more, further preferably 7000 ppi or more. By using a display device having one or both of high resolution and high definition, the sense of reality and depth can be further improved. In addition, there is no particular limitation on the screen ratio (aspect ratio) of the display device of one embodiment of the present invention. For example, the display device can adapt to various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10, etc.
[0527] The electronic device of this embodiment may also include a sensor (the sensor has the function of detecting, detecting or measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared).
[0528] The electronic device of this embodiment may have various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of executing various software (programs); a function of wireless communication; a function of reading programs or data stored in a storage medium; etc.
[0529] use FIG. 25A to FIG. 25DAn example of a wearable device that can be worn on the head is described. These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying SR content, and a function of displaying MR content. When an electronic device has a function of displaying at least one of AR, VR, SR, MR, etc., the user's sense of immersion can be improved.
[0530] Fig.25A The electronic device 700A shown and Fig.25B The electronic devices 700B shown include a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical components 753, glasses frames 757 and a pair of nose pads 758.
[0531] The display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of performing extremely high-definition display can be realized.
[0532] Both the electronic device 700A and the electronic device 700B can project the image displayed by the display panel 751 onto the display area 756 in the optical member 753. Since the optical member 753 is light-transmissive, the user can see the image displayed in the display area overlapping the transmitted image seen through the optical member 753. Therefore, both the electronic device 700A and the electronic device 700B are electronic devices capable of AR display.
[0533] The electronic device 700A and the electronic device 700B may also be provided with a camera capable of photographing the front as an imaging unit. In addition, by providing an acceleration sensor such as a gyro sensor on the electronic device 700A and the electronic device 700B, the user's head orientation can be detected and an image corresponding to the direction can be displayed on the display area 756.
[0534] The communication unit includes a wireless communication device, through which a video signal etc. can be supplied. In addition to or in place of the wireless communication device, a connector to which a cable for supplying a video signal and a power supply potential can be connected may be included.
[0535] Electronic device 700A and electronic device 700B are provided with a battery (not shown) and can be charged by one or both of wireless and wired methods.
[0536] The housing 721 may also be provided with a touch sensor module. The touch sensor module has a function of detecting whether the outer surface of the housing 721 is touched. Through the touch sensor module, various processes can be performed by detecting a user's tapping operation or sliding operation. For example, a process such as temporarily stopping or reproducing a dynamic image can be performed through a tapping operation, and a process such as fast forwarding or rewinding can be performed through a sliding operation. In addition, by providing a touch sensor module on each of the two housings 721, the operating range can be expanded.
[0537] As the touch sensor module, various touch sensors can be used. For example, various methods such as electrostatic capacitance, resistance film, infrared, electromagnetic induction, surface acoustic wave, and optical can be used. In particular, it is preferred to use electrostatic capacitance or optical sensors in the touch sensor module.
[0538] When an optical touch sensor is used, a photoelectric conversion element may be used as a light receiving element. In the active layer of the photoelectric conversion element, one or both of an inorganic semiconductor and an organic semiconductor may be used.
[0539] Fig.25C The electronic device 800A shown and Fig.25D The electronic device 800B shown includes a pair of display portions 820, a housing 821, a communication portion 822, a pair of mounting portions 823, a control portion 824, a pair of imaging portions 825, and a pair of lenses 832. Fig.25D The display unit 820, the communication unit 822 and the imaging unit 825 are omitted.
[0540] The display unit 820 may be a display device according to one embodiment of the present invention. Therefore, an electronic device capable of displaying with extremely high definition may be realized, thereby allowing the user to experience a high sense of immersion.
[0541] The display unit 820 is provided at a position visible through the lens 832 inside the housing 821. In addition, by displaying different images between the pair of display units 820, three-dimensional display using parallax can be performed.
[0542] The electronic device 800A and the electronic device 800B can both be referred to as VR-oriented electronic devices. A user who wears the electronic device 800A or the electronic device 800B can see the image displayed on the display unit 820 through the lens 832 .
[0543] The electronic device 800A and the electronic device 800B preferably have a mechanism in which the left and right positions of the lens 832 and the display unit 820 can be adjusted so that the lens 832 and the display unit 820 are located at the most suitable position according to the position of the user's eyes. In addition, it is preferable to have a mechanism in which the focus is adjusted by changing the distance between the lens 832 and the display unit 820.
[0544] The user can use the mounting portion 823 to mount the electronic device 800A or the electronic device 800B on the head. Fig.25C In the examples, the mounting portion 823 is shaped like the temples of glasses (also called temples), but the invention is not limited thereto. As long as the user can wear it, the mounting portion 823 may have a helmet-shaped or belt-shaped shape, for example.
[0545] The imaging unit 825 has a function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used in the imaging unit 825. In addition, a plurality of cameras can be provided to correspond to various viewing angles such as telephoto and wide angle.
[0546] Note that the example including the imaging unit 825 is shown here, and a distance measuring sensor (hereinafter, also referred to as a detection unit) capable of measuring the distance to the object may be provided. In other words, the imaging unit 825 is a form of a detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as a laser radar (LIDAR: Light Detection and Ranging) may be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be obtained, and a more accurate gesture operation can be achieved.
[0547] The electronic device 800A may also include a vibration mechanism used as a bone conduction headset. For example, any one or more of the display unit 820, the housing 821, and the mounting unit 823 may adopt a structure including the vibration mechanism. Thus, there is no need to separately provide audio equipment such as headphones, earphones, or speakers, and the image and sound can be enjoyed by only installing the electronic device 800A.
[0548] Electronic device 800A and electronic device 800B may both include input terminals. Cables for supplying video signals from a video output device or the like, power for charging a battery provided in the electronic device, and the like may be connected to the input terminals.
[0549] An electronic device according to one embodiment of the present invention may also have a function of wirelessly communicating with earphone 750. Earphone 750 includes a communication unit (not shown) and has a wireless communication function. Earphone 750 can receive information (such as sound data) from the electronic device through the wireless communication function. For example, Fig.25A The electronic device 700A shown has a function of transmitting information to the headset 750 through a wireless communication function. In addition, for example Fig.25C The electronic device 800A shown has a function of transmitting information to the headset 750 through a wireless communication function.
[0550] The electronic device may also include an earphone unit. Fig.25B The electronic device 700B shown includes an earphone unit 727. For example, a structure in which the earphone unit 727 and the control unit are connected in a wired manner may be adopted. A part of the wiring connecting the earphone unit 727 and the control unit may also be arranged inside the housing 721 or the mounting portion 723.
[0551] same, Fig.25D The electronic device 800B shown includes an earphone unit 827. For example, a structure in which the earphone unit 827 and the control unit 824 are connected in a wired manner may be adopted. A part of the wiring connecting the earphone unit 827 and the control unit 824 may also be arranged inside the housing 821 or the mounting portion 823. In addition, the earphone unit 827 and the mounting portion 823 may also include magnets. Thus, the earphone unit 827 can be fixed to the mounting portion 823 by magnetic force, and storage becomes easy, which is preferred.
[0552] The electronic device may also include a sound output terminal that can be connected to earphones or headphones. In addition, the electronic device may also include one or both of a sound input terminal and a sound input mechanism. As the sound input mechanism, for example, a sound receiving device such as a microphone may be used. By providing the sound input mechanism to the electronic device, the electronic device can have the so-called earphone function.
[0553] As described above, as electronic devices according to one embodiment of the present invention, both glasses-type (electronic devices 700A and 700B, etc.) and goggles-type (electronic devices 800A and 800B, etc.) are preferable.
[0554] An electronic device according to one embodiment of the present invention can transmit information to the headset in a wired or wireless manner.
[0555] Fig.26A The electronic device 6500 shown is a portable information terminal device that can be used as a smartphone.
[0556] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like. The display portion 6502 has a touch panel function.
[0557] As the display portion 6502 , a display device which is one embodiment of the present invention can be used.
[0558] Fig.26B 65 is a schematic cross-sectional view of an end portion of a housing 6501 on one side of a microphone 6506 .
[0559] A light-transmitting protective component 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, an optical component 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are provided in the space surrounded by the housing 6501 and the protective component 6510.
[0560] The display panel 6511 , the optical member 6512 , and the touch sensor panel 6513 are fixed to the protective member 6510 using an adhesive layer (not shown).
[0561] In a region outside the display portion 6502, a portion of the display panel 6511 is folded back, and the folded back portion is connected to an FPC 6515. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.
[0562] The display panel 6511 may use a flexible display of one embodiment of the present invention. Thus, an extremely lightweight electronic device may be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 may be installed while suppressing the thickness of the electronic device. In addition, by folding a portion of the display panel 6511 to provide a connection portion with the FPC 6515 on the back of the pixel portion, an electronic device with a narrow frame may be realized.
[0563] Fig.26C 100 shows an example of a television set. In a television set 7100, a display portion 7000 is incorporated in a housing 7101. Here, a structure in which the housing 7101 is supported by a stand 7103 is shown.
[0564] The display device of one embodiment of the present invention can be applied to the display portion 7000 .
[0565] The operation can be performed by using the operation switch provided in the housing 7101 and the remote control operation machine 7111 provided separately. Fig.26C In addition, the display unit 7000 may be provided with a touch sensor, and the television unit 7100 may be operated by touching the display unit 7000 with a finger or the like. In addition, the remote control unit 7111 may be provided with a display unit that displays information output from the remote control unit 7111. By using the operation keys or the touch panel provided in the remote control unit 7111, the channel and volume can be operated, and the image displayed on the display unit 7000 can be operated.
[0566] In addition, the television device 7100 includes a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, the modem can be connected to a wired or wireless communication network to perform one-way (from a sender to a receiver) or two-way (between a sender and a receiver or between receivers, etc.) information communication.
[0567] Fig.26D 1 and 2 show an example of a notebook computer. The notebook computer 7200 includes a housing 7211 , a keyboard 7212 , a pointing device 7213 , an external connection port 7214 , and the like. A display portion 7000 is incorporated in the housing 7211 .
[0568] The display device of one embodiment of the present invention can be applied to the display portion 7000 .
[0569] Fig.26E and Fig.26F An example of digital signage is shown.
[0570] Fig.26E The digital signage 7300 shown includes a housing 7301, a display unit 7000, a speaker 7303, etc. In addition, an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, etc. may be included.
[0571] Fig.26F The digital signage 7400 is shown to be disposed on a cylindrical pillar 7401. The digital signage 7400 includes a display unit 7000 disposed along a curved surface of the pillar 7401.
[0572] exist Fig.26E and Fig.26F In the embodiment of the present invention, the display device can be used for the display portion 7000.
[0573] The larger the display unit 7000 is, the more information can be provided at one time. The larger the display unit 7000 is, the easier it is to attract people's attention, for example, the advertising effect can be improved.
[0574] By using a touch panel for the display unit 7000, not only can a static image or a dynamic image be displayed on the display unit 7000, but the user can also intuitively operate it, which is preferred. In addition, when used for providing information such as route information or traffic information, the ease of use can be improved through intuitive operation.
[0575] like Fig.26E and Fig.26FAs shown, the digital signage 7300 or the digital signage 7400 can preferably be linked with the information terminal device 7311 or the information terminal device 7411 such as a smartphone carried by the user through wireless communication. For example, the advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal device 7311 or the information terminal device 7411. In addition, by operating the information terminal device 7311 or the information terminal device 7411, the display of the display unit 7000 can be switched.
[0576] The game can be executed on the digital signage 7300 or the digital signage 7400 using the screen of the information terminal device 7311 or the information terminal device 7411 as an operation unit (controller). Thus, an unspecified number of users can participate in the game at the same time and enjoy the game.
[0577] FIG. 27A to FIG. 27G The electronic device shown includes a housing 9000, a display portion 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connecting terminal 9006, a sensor 9007 (the sensor has the function of detecting, detecting or measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared), a microphone 9008, etc.
[0578] exist FIG. 27A to FIG. 27G In the embodiment of the present invention, the display device can be used for the display portion 9001.
[0579] FIG. 27A to FIG. 27G The electronic device shown has various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of controlling processing by using various software (programs); a function of wireless communication; a function of reading out programs or data stored in a storage medium and processing them; etc. Note that the functions of the electronic device are not limited to the above functions, but may have various functions. The electronic device may also include multiple display units. In addition, a camera or the like may be provided in the electronic device so that it has the following functions: a function of taking a static image or a dynamic image, and storing the taken image in a storage medium (an external storage medium or a storage medium built into the camera); a function of displaying the taken image on a display unit; etc.
[0580] Below, we explain in detail FIG. 27A to FIG. 27G Electronic equipment shown.
[0581] Fig.27A9101 is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 can be used as a smart phone, for example. Note that a speaker 9003, a connection terminal 9006, a sensor 9007, etc. can also be provided in the portable information terminal 9101. In addition, as the portable information terminal 9101, text or image information can be displayed on multiple surfaces. Fig.27A 9050. In addition, information 9051 indicated by a dotted rectangle may be displayed on another surface of the display unit 9001. Examples of information 9051 include information indicating that an email, SNS, or phone call has been received; a title of the email or SNS; a sender's name of the email or SNS; a date; a time; a remaining battery level; and radio wave strength. Alternatively, icon 9050 may be displayed at a location where information 9051 is displayed.
[0582] Fig.27B 9102 is a three-dimensional diagram showing a portable information terminal 9102. The portable information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different surfaces. For example, when the portable information terminal 9102 is placed in a jacket pocket, the user can confirm the information 9053 displayed at a position viewed from above the portable information terminal 9102. For example, the user can confirm the display without taking the portable information terminal 9102 out of the pocket, thereby determining whether to answer a call.
[0583] Fig.27C 9103 is a perspective view showing a tablet terminal 9103. The tablet terminal 9103 can execute various application software such as mobile phone, reading and editing of e-mails and articles, playing music, network communication, computer games, etc. The tablet terminal 9103 includes a display portion 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front of a housing 9000, an operation key 9005 used as a button for operation on the side of the housing 9000, and a connection terminal 9006 on the bottom.
[0584] Fig.27D 9001 is a three-dimensional diagram showing a watch-type portable information terminal 9200. The portable information terminal 9200 can be used, for example, as a smart watch (registered trademark). In addition, the display surface of the display unit 9001 is curved, and a display can be performed along its curved display surface. In addition, the portable information terminal 9200 can perform hands-free calls, for example, by communicating with a headset capable of wireless communication. In addition, by using the connection terminal 9006, the portable information terminal 9200 can perform data transmission and charging with other information terminals. Charging can also be performed by wireless power supply.
[0585] FIG. 27E to FIG. 27G 9201 is a perspective view showing a foldable portable information terminal. Fig.27E is a perspective view of the portable information terminal 9201 in an unfolded state. Figure 27G This is a three-dimensional diagram of the folded state. Fig.27F is from Fig.27E Status and Figure 27G The portable information terminal 9201 is easy to carry in the folded state, and has a large display area that is seamlessly spliced in the unfolded state, so the display is easy to browse. The display unit 9001 included in the portable information terminal 9201 is supported by three housings 9000 connected by hinges 9055. The display unit 9001 can be bent within a range of a curvature radius of 0.1 mm or more and 150 mm or less, for example.
[0586] This embodiment mode can be combined with other embodiment modes as appropriate. [Example]
[0587] In this example, transistors (samples A to D) which are one embodiment of the present invention were manufactured and their electrical characteristics were evaluated.
[0588] The structures of samples A to D can be referred to according to Figure 4C The description of the transistor 100C shown in FIG. 10A is referred to in detail. The manufacturing methods of samples A to D can refer to the description of Embodiment Mode 2. Note that the insulating layer 110 is made of Fig. 8A Specifically, the insulating layer 110 has a stacked structure of an insulating layer 110d, an insulating layer 110a, an insulating layer 110b, and an insulating layer 110c.
[0589] <Sample production> First, an In-Sn-Si oxide (ITSO) film is formed to a thickness of about 100 nm on the substrate 102 by a sputtering method, and this film is processed to obtain a conductive layer 112a. As the substrate 102, a glass substrate is used.
[0590] Next, a first insulating film to be the insulating layer 110d, a second insulating film to be the insulating layer 110a, and a third insulating film to be the insulating layer 110b are sequentially formed over the substrate 102 and the conductive layer 112a. The first insulating film to the third insulating film are continuously formed by the PECVD method.
[0591] As the first insulating film, a silicon nitride film with a thickness of about 50 nm is used. The first insulating film is formed using a mixed gas of silane (SiH4) gas with a flow rate of 200 sccm, nitrogen (N2) gas with a flow rate of 2000 sccm, and ammonia (NH3) gas with a flow rate of 2000 sccm. The pressure during formation is 200 Pa, the power supply is 2000 W, and the substrate temperature is 350°C.
[0592] As the second insulating film, a silicon nitride film with a thickness of about 30nm is used. The second insulating film is formed using a mixed gas of silane (SiH4) gas with a flow rate of 200sccm, nitrogen (N2) gas with a flow rate of 2000sccm, and ammonia (NH3) gas with a flow rate of 100sccm. The pressure during formation is 100Pa, the power supply power is 2000W, and the substrate temperature is 350℃.
[0593] As described above, the ammonia flow rate of the deposition gas used to form the first insulating film to become the insulating layer 110d is higher than the ammonia flow rate of the deposition gas used to form the second insulating film to become the insulating layer 110a. Thus, the hydrogen content of the insulating layer 110d can be higher than that of the insulating layer 110a.
[0594] As the third insulating film, a silicon oxynitride film with a thickness of about 300 nm is used. The third insulating film is formed using a mixed gas of silane (SiH4) gas with a flow rate of 200 sccm and nitrous oxide (N2O) gas with a flow rate of 6000 sccm, a pressure of 200 Pa, a power supply of 1200 W, and a substrate temperature of 350°C.
[0595] Next, an IGZO film with a thickness of about 20 nm is formed on the third insulating film as the metal oxide layer 149. The IGZO film is formed by a sputtering method using an IGZO sputtering target material having an atomic ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow rate ratio during formation is 100% and the substrate temperature is room temperature.
[0596] Next, a heat treatment was performed at 350° C. for 1 hour in a dry air (CDA) atmosphere. An oven apparatus was used for the heat treatment.
[0597] Next, the metal oxide layer 149 is removed. The metal oxide layer 149 is removed by wet etching.
[0598] A fourth insulating film, which becomes the insulating layer 110c, is formed on the third insulating film. A silicon nitride film having a thickness of about 30 nm is used as the fourth insulating film. The fourth insulating film is formed using a mixed gas of silane (SiH4) gas with a flow rate of 200 sccm, nitrogen (N2) gas with a flow rate of 2000 sccm, and ammonia (NH3) gas with a flow rate of 100 sccm. The pressure during formation is 100 Pa, the power is 2000 W, and the substrate temperature is 350°C.
[0599] Next, an In—Sn—Si oxide (ITSO) film is formed to a thickness of 100 nm as the conductive film 112 bf over the fourth insulating film by a sputtering method.
[0600] Next, the conductive film 112bf is processed to obtain the conductive layer 112B.
[0601] Next, while removing the conductive layer 112B in the region overlapping the conductive layer 112a and forming the conductive layer 112b including the opening 143, the first to fourth insulating films in the region overlapping the conductive layer 112a are removed to form the insulating layer 110 including the opening 141. The conductive film 112bf is removed by wet etching. The first to fourth insulating films are removed by dry etching. The top surfaces of the openings 141 and 143 are circular in shape.
[0602] Next, the metal oxide film 108f is formed so as to cover the openings 141 and 143. The structure of the metal oxide film 108f is different for each sample.
[0603] In sample A, the metal oxide film 108f has a single-layer structure. An IGZO film having a thickness of about 20 nm is formed as the metal oxide film 108f. The IGZO film is formed by a sputtering method using an IGZO sputtering target having an atomic ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow rate ratio during formation is 10%, and the substrate temperature is room temperature.
[0604] In sample B, the metal oxide film 108f has a single-layer structure. An IGZO film having a thickness of about 20 nm is formed as the metal oxide film 108f. The IGZO film is formed by a sputtering method using an IGZO sputtering target material having an atomic ratio of metal elements of In:Ga:Zn=1:3:2. The oxygen flow rate ratio during formation is 10%, and the substrate temperature is room temperature.
[0605] In sample C, the metal oxide film 108f has a stacked structure of a metal oxide film 108af and a metal oxide film 108bf on the metal oxide film 108af. An IGZO film having a thickness of approximately 10 nm is formed as the metal oxide film 108af. The IGZO film is formed by a sputtering method using an IGZO sputtering target material having an atomic number ratio of metal elements of In:Ga:Zn=1:3:2. The oxygen flow rate ratio during formation is 10%, and the substrate temperature is room temperature. An IGZO film having a thickness of approximately 10 nm is formed as the metal oxide film 108bf. The IGZO film is formed by a sputtering method using an IGZO sputtering target material having an atomic number ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow rate ratio during formation is 10%, and the substrate temperature is room temperature.
[0606] In sample D, the metal oxide film 108f has a stacked structure of a metal oxide film 108af and a metal oxide film 108bf on the metal oxide film 108af. An IGZO film having a thickness of approximately 10 nm is formed as the metal oxide film 108af. The IGZO film is formed by a sputtering method using an IGZO sputtering target having an atomic number ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow ratio during formation is 10%, and the substrate temperature is room temperature. An IGZO film having a thickness of approximately 10 nm is formed as the metal oxide film 108bf. The IGZO film is formed by a sputtering method using an IGZO sputtering target having an atomic number ratio of metal elements of In:Ga:Zn=1:3:2. The oxygen flow ratio during formation is 10%, and the substrate temperature is room temperature.
[0607] Next, a heat treatment was performed at 350° C. for 2 hours in a dry air (CDA) atmosphere. An oven apparatus was used for the heat treatment.
[0608] Next, the metal oxide film 108f is processed to obtain the semiconductor layer 108.
[0609] Next, as the insulating layer 106, a silicon oxynitride film was deposited to a thickness of 30 nm by a plasma CVD method.
[0610] Next, a titanium film with a thickness of 50 nm, an aluminum film with a thickness of 200 nm, and a titanium film with a thickness of 50 nm are deposited by sputtering. Then, each conductive film is processed to obtain a conductive layer 104 .
[0611] Thus, a transistor corresponding to the transistor 100C is formed.
[0612] Next, a 300-nm-thick silicon oxynitride film was formed as a protective layer of the transistor by a plasma CVD method.
[0613] Next, a heat treatment is performed at 300 °C for 1 hour in an atmosphere of dry air (CDA). An oven device is used during the heat treatment.
[0614] Next, a polyimide film with a thickness of approximately 1.5 μm is formed as a planarization layer.
[0615] Next, a heat treatment is performed at 250 °C for 1 hour in an atmosphere of dry air (CDA). An oven device is used during the heat treatment.
[0616] Through the above procedures, Samples A to D are obtained.
[0617] <Id-Vg Characteristics> Next, the Id-Vg characteristics of the transistors of Samples A to D manufactured above are measured.
[0618] The Id-Vg characteristics of the transistors are measured under the following conditions. The voltage applied to the gate electrode (hereinafter, also referred to as the gate voltage (Vg)) is applied in increments of 0.05 V from -3 V to +3 V. In addition, the voltage applied to the source electrode (hereinafter, also referred to as the source voltage (Vs)) is set to 0 V (comm), and the voltage applied to the drain electrode (hereinafter, also referred to as the drain voltage (Vd)) is set to 0.1 V and 1.2 V.
[0619] Here, in Samples A to D, transistors with a width D143 of the opening 143 of 2.0 μm (channel width 6.3 μm) are measured. The number of measurements for each sample is 10.
[0620] Fig.28A The Id-Vg characteristics of Sample A are shown, Fig.28B The Id-Vg characteristics of Sample B are shown, Fig.29A The Id-Vg characteristics of Sample C are shown, Fig.29B The Id-Vg characteristics of Sample D are shown. In FIG. 28A to FIG. 29B the horizontal axis shows the gate potential (Vg), the left vertical axis shows the drain current (Id), and the right vertical axis shows the field-effect mobility (μFE) when the drain voltage (Vd) is 1.2 V. FIG. 28A to FIG. 29B The results of the Id-Vg characteristics of 10 overlapping transistors are shown.
[0621] As FIG. 28A to FIG. 29B shown, it can be confirmed that Samples A to D all exhibit good switching characteristics. In addition, it can be confirmed that the on-state currents of Samples A and D are larger than those of Samples B and C.
[0622] The average drift voltage (Vsh) of the transistors of sample A, sample B, sample C and sample D are -0.11V, 0.26V, -0.09V and -0.03V, respectively. Here, Vsh is defined as the Vg at which the tangent of the point on the curve with the largest inclination in the Id-Vg curve of the transistor intersects with the straight line of Id=1pA. In addition, the 3σ of Vsh of sample A, sample B, sample C and sample D are 0.07V, 0.08V, 0.07V and 0.08V, respectively. Note that σ represents the standard deviation. It can be confirmed that the drift voltage (Vsh) of sample B and sample D is higher than that of sample A and sample C.
[0623] The average off-state currents of the transistors of sample A, sample B, sample C, and sample D are 4.56×10 -11 A. Measurement lower limit (1.00×10 -12 A) or less, 2.19×10 -11 A and 3.54×10 -12 A. It was confirmed that the off-state currents of samples B and D were smaller than those of samples A and C.
[0624] The average values of the subthreshold swing values (S values) of the transistors of sample A, sample B, sample C, and sample D are 0.07 V, 0.13 V, 0.07 V, and 0.07 V. Here, the S value refers to the change in gate voltage (Vg) in the subthreshold region when the drain current (Id) value changes by one digit with a fixed drain voltage (Vd).
[0625] The average values of the threshold voltage (Vth) of the transistors of Sample A, Sample B, Sample C, and Sample D are 0.35 V, 1.37 V, 1.24 V, and 0.53 V. In addition, the 3σ of Vth of Sample A, Sample B, Sample C, and Sample D are 0.14 V, 0.18 V, 0.21 V, and 0.15 V, respectively.
[0626] The above results confirm that a transistor with a short channel length and good electrical characteristics can be obtained. In addition, it can be confirmed that the transistor of sample D having a stacked structure of the semiconductor layer 108 has a normally-off characteristic and a large on-state current. [Explanation of symbols]
[0627] 11B: sub-pixel, 11G: sub-pixel, 11R: sub-pixel, 50A: display device, 50B: display device, 50C: display device, 50D: display device, 50E: display device, 50F: display device, 50G: display device, 100A: transistor, 100B: transistor, 100C: transistor, 100D: transistor, 100E: transistor, 100F: transistor, 100G: transistor, 100H: transistor, 100: transistor, 102: substrate, 103: conductive layer, 104: conductive layer, 106a: insulating layer, 106b: insulating layer, 106: insulating layer, 108a: semiconductor layer, 108af: metal oxide film, 108b: semiconductor layer , 108bf: metal oxide film, 108c: semiconductor layer, 108f: metal oxide film, 108: semiconductor layer, 110a: insulating layer, 110af: insulating film, 110b: insulating layer, 110bf: insulating film, 110c: insulating layer, 110cf: insulating film, 110d: insulating layer, 110f: insulating film, 110: insulating layer, 111B: pixel electrode, 111G: pixel electrode, 111R: pixel electrode, 111S: pixel electrode, 112a: conductive layer, 112a_1: conductive layer, 112a_2: conductive layer, 112a_2A: conductive layer, 112B: conductive layer, 112b: conductive layer, 112b_1: conductive layer, 112b_2: conductive layer 112bf: conductive film, 113B: EL layer, 113G: EL layer, 113R: EL layer, 113S: functional layer, 113: EL layer, 114: common layer, 115: common electrode, 117: light shielding layer, 118B: sacrificial layer, 118G: sacrificial layer, 118R: sacrificial layer, 119B: sacrificial layer, 119G: sacrificial layer, 123: conductive layer, 124B: conductive layer, 124G: conductive layer, 124R: conductive layer, 125f: insulating film, 125: insulating layer, 126B: conductive layer, 126G: conductive layer, 126R: conductive layer, 127: insulating layer, 128: layer, 130B: light emitting element, 130G: light emitting element, 130R: light emitting element Component, 130S: light receiving element, 131: protective layer, 132B: coloring layer, 132G: coloring layer, 132R: coloring layer, 133B: layer, 133Bf: film, 133G: layer, 133R: layer, 133: layer, 140: connection part, 141: opening, 142: adhesive layer, 143: opening, 145: opening, 148: opening, 149: metal oxide layer, 151: substrate, 152: substrate, 153: insulating layer, 162: display part, 164: circuit part, 165: wiring, 166: conductive layer, 172: FPC, 173: IC, 204: connection part, 205B: transistor, 205D: transistor, 205G: transistor, 205R: transistor,205S: transistor, 210: pixel, 218: insulating layer, 235: insulating layer, 237: insulating layer, 2...
Claims
1. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; as well as The second insulating layer, Wherein, the first insulating layer is disposed on the first conductive layer, The second conductive layer is disposed on the first insulating layer, The first insulating layer and the second conductive layer include an opening reaching the first conductive layer, The first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer, The second insulating layer is disposed on the second semiconductor layer, The third conductive layer is disposed on the second insulating layer, Furthermore, the conductivity of the first semiconductor layer is different from the conductivity of the second semiconductor layer.
2. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; as well as The second insulating layer, Wherein, the first insulating layer is disposed on the first conductive layer, The second conductive layer is disposed on the first insulating layer, The first insulating layer and the second conductive layer include an opening reaching the first conductive layer, The first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer, The second insulating layer is disposed on the second semiconductor layer, The third conductive layer is disposed on the second insulating layer, Furthermore, the electrical conductivity of the first semiconductor layer is higher than that of the second semiconductor layer.
3. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; as well as The second insulating layer, Wherein, the first insulating layer is disposed on the first conductive layer, The second conductive layer is disposed on the first insulating layer, The first insulating layer and the second conductive layer include an opening reaching the first conductive layer, The first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer, The second insulating layer is disposed on the second semiconductor layer, The third conductive layer is disposed on the second insulating layer, The first semiconductor layer comprises a first metal oxide, The second semiconductor layer comprises a second metal oxide, Furthermore, the band gap of the first metal oxide is smaller than the band gap of the second metal oxide.
4. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; as well as The second insulating layer, Wherein, the first insulating layer is disposed on the first conductive layer, The second conductive layer is disposed on the first insulating layer, The first insulating layer and the second conductive layer include an opening reaching the first conductive layer, The first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer, The second insulating layer is disposed on the second semiconductor layer, The third conductive layer is disposed on the second insulating layer, The first semiconductor layer comprises a first metal oxide, The second semiconductor layer comprises a second metal oxide, The first metal oxide comprises indium, The second metal oxide comprises indium and element M, The element M is one or more of gallium, aluminum and tin, Furthermore, the content of the element M contained in the first metal oxide is lower than the content of the element M contained in the second metal oxide.
5. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; as well as The second insulating layer, Wherein, the first insulating layer is disposed on the first conductive layer, The second conductive layer is disposed on the first insulating layer, The first insulating layer and the second conductive layer include an opening reaching the first conductive layer, The first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second conductive layer. The second semiconductor layer is disposed on the first semiconductor layer, The second insulating layer is disposed on the second semiconductor layer, The third conductive layer is disposed on the second insulating layer, The first semiconductor layer and the second semiconductor layer each include a metal oxide. Furthermore, the crystallinity of the first semiconductor layer is lower than that of the second semiconductor layer.
6. The semiconductor device according to any one of claims 1 to 5, The first conductive layer and the second conductive layer respectively include oxide conductors.
7. The semiconductor device according to any one of claims 1 to 5, The first insulating layer includes a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer. The fourth insulating layer contains oxygen, And the third insulating layer and the fifth insulating layer respectively contain nitrogen.
8. The semiconductor device according to any one of claims 1 to 5, The first insulating layer includes a third insulating layer, a fourth insulating layer on the third insulating layer, a fifth insulating layer on the fourth insulating layer, and a sixth insulating layer on the fifth insulating layer. The fifth insulating layer contains oxygen, The third insulating layer, the fourth insulating layer and the sixth insulating layer each contain nitrogen, And the third insulating layer includes a region having a higher hydrogen content than that of the fourth insulating layer.
9. The semiconductor device according to any one of claims 1 to 5, further comprising a fourth conductive layer, wherein the fourth conductive layer includes a region in contact with the top surface of the first conductive layer, The first insulating layer includes a region in contact with a top surface of the first conductive layer and a top surface and a side surface of the fourth conductive layer, The fourth conductive layer includes a region overlapping the third conductive layer via the first insulating layer, the first semiconductor layer, the second semiconductor layer, and the second insulating layer. And the conductivity of the fourth conductive layer is higher than that of the first conductive layer.
