Intermediate frequency pulse output device with feedback function and circuit

Abstract

The invention belongs to the technical field of pulse output circuits, and particularly relates to an intermediate frequency pulse output device with a feedback function and a circuit, the device comprises an intermediate frequency pulse output circuit, a single-chip microcomputer module, a power supply module, a key module, a display module and a Bluetooth module, and feedback signals of the intermediate frequency pulse output circuit are input into the single-chip microcomputer module. The identification module is used for identifying open-circuit, load and short-circuit conditions of equipment; the intermediate frequency pulse output circuit comprises an energy storage circuit, a pulse wave generation circuit and a feedback circuit, and the feedback circuit is used for monitoring the operation condition of the circuit. Through the integrated feedback circuit, the open circuit, load and short circuit states of the equipment can be monitored and identified in real time, so that the safety and reliability of the equipment are greatly improved, and a user can conveniently identify and maintain the state of the equipment; through the designed circuit structure, the manufacturing cost is reduced, and meanwhile, the compact design is also beneficial to reducing the size of equipment, so that the device is more suitable for being used in occasions with limited space.

Description

Technical Field

[0001] The invention belongs to the technical field of pulse output circuits, and in particular relates to an intermediate frequency pulse output device and circuit with a feedback function. Background Art

[0002] In the field of rehabilitation equipment technology, existing technologies mainly use pulse signal generators, feedback networks, comparators, control signal generators and output stages to realize the functions of related circuits. These technologies have met market demand to a certain extent and promoted the development of this field.

[0003] However, with the development of changes in market demand, the existing technology has gradually exposed some problems or shortcomings. The medium-frequency pulse output circuit with feedback function adopts many advanced technologies and materials, which makes its manufacturing cost relatively high, which may lead to a higher selling price of the equipment, increasing the purchase cost of users. In addition, due to the complex circuit structure, it is necessary to be equipped with larger components such as heat sinks and transformers, so the volume of the entire circuit is relatively large. This may limit its application in occasions with limited space. The above problems not only affect the development of rehabilitation therapy equipment, but also make it difficult to meet users' higher requirements for electrical stimulation products, especially the existing circuit design, which cannot monitor the use and operation status of the rehabilitation therapy equipment circuit. Therefore, there is an urgent need for a new technology or improvement plan that can solve the above problems. Summary of the invention

[0004] In view of the above deficiencies in the prior art, the purpose of the present invention is to provide a medium-frequency pulse output device and circuit with a feedback function, which can monitor and identify the open circuit, load and short circuit states of the rehabilitation treatment equipment in real time, thereby improving the safety and reliability of the equipment.

[0005] To achieve the above object, the present invention provides the following technical solutions: A medium frequency pulse output device with a feedback function comprises a medium frequency pulse output circuit, a single chip computer module, a power supply module, a key module, a display module and a Bluetooth module. The feedback signal of the medium frequency pulse output circuit is input into the single chip computer module to identify the open circuit, load and short circuit conditions of the device.

[0006] A medium frequency pulse output circuit with a feedback function is applied in the above-mentioned medium frequency pulse output device with a feedback function and is used as a medium frequency pulse output circuit.

[0007] As a preferred solution of the present invention, the intermediate frequency pulse output circuit includes an energy storage circuit, a pulse wave generating circuit and a feedback circuit, and the feedback circuit is used to monitor the operation of the circuit.

[0008] As a preferred solution of the present invention, the energy storage circuit includes a transistor Q1 and a transistor Q2, the emitter of the transistor Q2 is grounded, and the base of the transistor Q2 is connected in series with a capacitor C3 to serve as a control terminal IO2; The emitter of the transistor Q1 is grounded, and the base of the transistor Q1 is connected in series with the resistor R1 to serve as the control terminal IO1. The base of the transistor Q1 is also connected with a capacitor C1, and the capacitor C1 is connected in parallel with the resistor R1. The collector of transistor Q1 is connected in series with inductor L1 and resistor R2 and then connected to power supply VCC; The collector of transistor Q2 is connected in series with resistor R3, voltage stabilizing diode D1, inductor L1 and resistor R2, and then connected to power supply VCC; The cathode of the voltage zener diode D1 is connected in series with the capacitor C2 and then grounded, and the collector of the transistor Q2 is connected in series with the resistor R3 and the capacitor C4 and then grounded; The collector of transistor Q2 is connected to the pulse wave generating circuit.

[0009] As a preferred solution of the present invention, the pulse wave generating circuit includes transistor Q3, transistor Q4, transistor Q5, transistor Q6, transistor Q7, and transistor Q8; The emitter of the transistor Q5 is connected in series with the voltage stabilizing diode D1, the inductor L1, and the resistor R2, and then connected to the power supply VCC; the collector of the transistor Q5 is connected to the output terminal A1; the collector of the transistor Q5 is connected to the emitter of the transistor Q3; the base of the transistor Q3 is connected in series with the resistor R5, and then connected to the collector of the transistor Q4; the collector of the transistor Q3 is connected to the IOC control terminal; the emitter of the transistor Q4 is grounded, and the base of the transistor Q4 is connected in series with the resistor R4, and then connected to the IOA control terminal; The base of transistor Q5 is connected in series with resistor R9 and resistor R10 and then connected to the base of transistor Q8, the output end of resistor R9 is connected to the collector of transistor Q6, the emitter of transistor Q6 is grounded, and the base of transistor Q6 is connected in series with resistor R11 and then connected to the IOB control terminal; The emitter of transistor Q7 is connected in series with voltage regulator diode D1, inductor L1 and resistor R2 and then connected to power supply VCC, the collector of transistor Q7 is connected to output terminal A2, the collector of transistor Q7 is connected to the emitter of transistor Q8, the collector of transistor Q8 is connected to IOC control terminal, and the collector of transistor Q8 is connected in series with diode D3 and grounded; The input end of resistor R9 is connected in series with resistor R6, which is connected in series with voltage regulator diode D1, inductor L1 and resistor R2 to power supply VCC. The base of transistor Q7 is connected in series with resistor R7, voltage regulator diode D1, inductor L1 and resistor R2 to power supply VCC.

[0010] As a preferred solution of the present invention, the IOA control terminal, the IOB control terminal and the IOC control terminal of the pulse wave generating circuit are respectively connected to the pin 4, the pin 5 and the pin 6 of the single chip microcomputer in the single chip microcomputer module.

[0011] As a preferred solution of the present invention, the Key1 output end of the key module is connected to pin 3 of the microcontroller in the microcontroller module; the Key2 output end of the key module is connected to pin 13 of the microcontroller; and the Key3 output end of the key module is connected to pin 7 of the microcontroller.

[0012] As a preferred solution of the present invention, during the energy storage process of capacitors C2 and C4, the control terminal IO2 is set to a low level, and the transistor Q2 is turned off; When the control terminal IO1 is set to output a high level, the transistor Q1 is turned on, and the 5V voltage stores energy through the inductor and flows to GND, forming a loop; When the control terminal IO1 outputs a low level, the transistor Q1 is turned off, and the inductor charges the capacitive elements C2 and C4 to store energy.

[0013] As a preferred solution of the present invention, when the control terminal 10A is set to a high level and the control terminal 10B is set to a low level: the transistor Q4 is turned on, the resistor R7 divides the high voltage of the capacitive elements C2 and C4, the transistor Q7 is turned on, and the first output terminal A1 is in a relatively high voltage state relative to the second output terminal A2; The control terminal 10B is set to a low level, the transistor Q6 is turned off, the transistor Q5 is turned off, and the second output terminal A2 is in a relatively low voltage state relative to the first output terminal A1; A load resistor is connected in series between the first output terminal and the second output terminal, the emitter voltage of the transistor Q8 is higher than the collector voltage, the transistor Q8 is turned on, and the control terminal IOC detects the voltage V1; If there is an open circuit between the first output terminal and the second output terminal, the control terminal IOC will detect the voltage V2; If A1 and A2 are short-circuited, the control terminal IOC will detect the voltage V3, V3 ≤ 2.4V; The control end IOC will obtain V3>V1>V2, and this feedback is used to determine the open circuit, load and short circuit conditions of the circuit.

[0014] As a preferred solution of the present invention, when the control terminal 10A is set to a low level and the control terminal 10B is set to a high level: the transistor Q4 is turned off, the two ends of the resistor R7 are at a high voltage, the transistor Q7 is turned off, and the first output terminal A1 is in a relatively low voltage state relative to the second output terminal A2; The transistor Q6 is turned on, and the resistor R6 divides the high voltage of the capacitor C. At this time, the transistor Q5 is turned on, and the second output terminal A2 is in a relatively high voltage state relative to the first output terminal A1; A load resistor is connected in series between the first output terminal and the second output terminal, the emitter voltage of the transistor Q3 is higher than the collector voltage, the transistor Q3 is turned on, and the control terminal IOC detects the voltage V4; If there is an open circuit between A1 and A2, the control terminal IOC will detect the voltage V5; If A1 and A2 are short-circuited, the control terminal IOC will detect the voltage V6, and V6 ≤ 2.4V; The control end IOC will obtain V6>V4>V5, and the feedback formed thereby is used to judge the open circuit, load and short circuit conditions of the circuit.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention can monitor and identify the open circuit, load and short circuit status of the device in real time through the integrated feedback circuit, which greatly improves the safety and reliability of the device and also facilitates the user to identify and maintain the device status. The designed circuit structure reduces the manufacturing cost, and the compact design also helps to reduce the size of the device, making it more suitable for use in occasions with limited space. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is the energy storage circuit diagram of the present invention; Figure 2 This is a pulse wave generating circuit diagram of the present invention; Figure 3 It is a circuit diagram of the single chip microcomputer connection of the present invention; Figure 4 The power supply module circuit of the present invention Figure 1 ; Figure 5 The power supply module circuit of the present invention Figure 2 ; Figure 6 This is a circuit diagram of the Bluetooth module of the present invention; Figure 7 The circuit diagram of the display module of the present invention; Figure 8 This is a circuit diagram of the key module of the present invention. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings.

[0018] like Figure 1-Figure 3As shown in , this embodiment provides a medium frequency pulse output device and circuit with feedback function, which is mainly used in rehabilitation therapy equipment, wherein the medium frequency pulse output device includes a medium frequency pulse output circuit, a single-chip computer module, a power supply module, a button module, a display module and a Bluetooth module, and the medium frequency pulse output circuit includes a storage circuit, a pulse wave generating circuit and a feedback circuit, wherein the feedback circuit (which can be implemented based on known technology) is embedded in the pulse wave generating circuit, and the feedback signal of the feedback circuit is input into the single-chip computer module, that is, the open circuit, load and short circuit conditions of the rehabilitation therapy equipment can be identified, which is convenient for users to identify and use.

[0019] In this embodiment, the energy storage circuit, the pulse wave generating circuit and the feedback circuit form an intermediate frequency pulse output circuit, and the feedback circuit is used to monitor the operation of the circuit.

[0020] The design of the intermediate frequency pulse output circuit is as follows: the energy storage circuit includes a transistor Q1, a transistor Q2 and a power supply VCC, the emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected in series with a resistor R1, and serves as a control terminal IO1, the base of the transistor Q1 is connected to a capacitor C1, and the capacitor C1 is connected in parallel with the resistor R1; the power supply VCC is connected in series with a resistor R2 and an inductor L1, and then connected to the collector of the transistor Q1; The power source VCC is connected in series with the resistor R2, the inductor L1, the voltage zener diode D1 and the resistor R3 and connected to the collector of the transistor Q2; the emitter of the transistor Q2 is grounded, and the base of the transistor Q2 is connected in series with the capacitor C2 to serve as the control terminal IO2; the collector of the transistor Q2 is connected in series with the resistor R3 and the capacitor C4 and then grounded; The cathode of the voltage zener diode D1 is connected in series with the capacitor C1 and then grounded.

[0021] The collector of transistor Q1 is connected to the pulse wave generating circuit, such as Figure 2 As shown, the pulse wave generating circuit includes transistor Q3, transistor Q4, transistor Q5, transistor Q6, transistor Q7, and transistor Q8; The power source VCC is connected in series with a resistor R2, an inductor L1, and a voltage stabilizing diode D1, and then connected to the emitter of the transistor Q5. The collector of the transistor Q5 is connected to the output terminal A1. The collector of the transistor Q5 is connected to the emitter of the transistor Q3. The collector of the transistor Q3 is connected to the IOC control terminal. The base of the transistor Q3 is connected in series with a resistor R5, and then connected to the collector of the transistor Q4. The emitter of the transistor Q4 is grounded, and the base of the transistor Q4 is connected in series with a resistor R4, and then connected to the IOA control terminal. The base of transistor Q5 is connected in series with resistor R9 and resistor R10 and then connected to the base of transistor Q8, the output end of resistor R9 is connected to the collector of transistor Q6, the emitter of transistor Q6 is grounded, and the base of transistor Q6 is connected in series with resistor R11 and then connected to the IOB control terminal; The power source VCC is connected in series with the resistor R2, the inductor L1, and the voltage zener diode D1, and then connected to the emitter of the transistor Q7. The output terminal (i.e., the negative electrode) of the voltage zener diode D1 is connected in series with the resistor R6. The resistor R6 is connected to the input terminal of the resistor R9. The output terminal (i.e., the negative electrode) of the voltage zener diode D1 is connected in series with the resistor R7 and connected to the base of the transistor Q7. The base of the transistor Q7 is connected in series with the resistor R8 and connected to the collector of the transistor Q4. The collector of the transistor Q7 is connected to the output terminal A2, the collector of the transistor Q7 is connected to the emitter of the transistor Q8, the collector of the transistor Q8 is connected to the IOC control terminal, and the collector of the transistor Q8 is connected in series with a diode D3 to ground; In this application, the microcontroller model used in the microcontroller module is STC8H1K08-36I-TSSOP20. Figure 3 As shown; the IOA control terminal, IOB control terminal and IOC control terminal of the pulse wave generating circuit are connected to pin 4, pin 5 and pin 6 of the microcontroller respectively.

[0022] In the process of storing energy for capacitive elements C2 and C4, first set the control terminal IO2 to a low level, at which time the transistor Q2 is turned off; when the control terminal IO1 is set to output a high level, the transistor Q1 is turned on, and at this time the 5V voltage stores energy through the inductor and flows to GND, forming a loop; when the control terminal IO1 outputs a low level, the transistor Q1 is turned off, and at this time the inductor charges and stores energy for the capacitive elements C2 and C4. Because the capacitive element has the characteristic of no sudden voltage change, after the control terminal IO1 outputs a series of specific PWM (Pulse width modulation) signals, the entire circuit completes the charging and energy storage of the capacitive element. In addition, the diode D1 is used to prevent charge reflux after the capacitive element C is under high voltage, playing a role in circuit protection.

[0023] When the control terminal IOA is set to a high level and the control terminal IOB is set to a low level: transistor Q4 is turned on, and resistor R7 divides the high voltage of the capacitive elements C2 and C4, so that transistor Q7 is turned on. At this time, the first output terminal A1 is in a relatively high voltage state relative to the second output terminal A2; the control terminal IOB is set to a low level, and transistor Q6 is turned off, so that transistor Q5 is cut off, and the second output terminal A2 is in a relatively low voltage state relative to the first output terminal A1. At this time, if a load resistor is connected in series between the first output terminal and the second output terminal (i.e., it is in a normal working state), the emitter voltage of transistor Q8 is higher than the collector voltage, transistor Q8 is turned on, and the control terminal IOC will detect the voltage V1; At this time, if there is an open circuit between the first output terminal and the second output terminal, the control terminal IOC will detect the voltage V2; if there is a short circuit between A1 and A2, the control terminal IOC will detect the voltage V3, and V3≤2.4V. Based on this circuit, the control terminal IOC will obtain V3>V1>V2, and the feedback formed by this can determine the open circuit, load and short circuit conditions of the circuit. If the current voltage V0 collected by the control terminal IOC is less than 1 / 2V1, it is judged as an open circuit state; if the current voltage V0>2V2 and V0<V3-0.3, it is judged as a load state, and if the current voltage V0>V3-0.3, the microcontroller judges it as a short circuit state.

[0024] When the control terminal IOA is set to a low level and the control terminal IOB is set to a high level: the transistor Q4 is turned off, the two ends of the resistor R7 are high voltage, the transistor Q7 is turned off, and the first output terminal A1 is in a relatively low voltage state relative to the second output terminal A2; the transistor Q6 is turned on, and the resistor R6 divides the high voltage of the capacitor C, and the transistor Q5 is turned on. At this time, if a load resistor is connected in series between the first output terminal and the second output terminal, the emitter voltage of the transistor Q3 is higher than the collector voltage, the transistor Q3 is turned on, and the control terminal IOC will detect the voltage V4; at this time, if there is an open circuit between A1 and A2, the control terminal IOC will detect the voltage V5; if there is a short circuit between A1 and A2, the control terminal IOC will detect the voltage V6, and V6≤2.4V. Based on this circuit, the control terminal IOC will obtain V6>V4>V5, and the feedback formed by this can judge the open circuit, load and short circuit conditions of the circuit. If the current voltage V0 collected by the control end IOC is less than 1 / 2V4, it is judged as an open circuit state; if the current voltage V0 is greater than 2V5 and V0 is less than V6-0.3, it is judged as a load state; if the current voltage V0 is greater than V6-0.3, the microcontroller judges it as a short circuit state.

[0025] After completing one pulse wave output, the control terminal IO2 is set to a high level, the transistor Q3 is turned on, and the remaining charge in the energy storage capacitor C is consumed, so that the capacitive element C is at a relatively stable voltage value.

[0026] like Figure 4 and Figure 5 The circuit diagram of the power supply module is shown in Figure 1. As with the prior art, the external power input Vin can be between 7V and 35V. The NPN will block or absorb the current from the ADJ pin by responding to the following TTL pin logic. When the TTL is pulled high, the NPN is turned on and the ADJ pin is pulled to GND, and the LM117 outputs about 1.25V. When the TTL is pulled low, the NPN is turned off, and the regulator outputs a 5V voltage according to the programming. In addition, the RT9193-33 chip converts the 5V voltage into a 3.3V voltage output; Figure 6As shown, the chip used in the Bluetooth module is HC05, which is a prior art and will not be described in detail here.

[0027] like Figure 7 The structure diagram of the display module is shown. The chip model used in the display module is 0.960LED; like Figure 8 The circuit diagram of the key module; the Key1 output terminal of the key module is connected to the pin 3 of the single-chip microcomputer; the Key2 output terminal of the key module is connected to the pin 13 of the single-chip microcomputer; the Key3 output terminal of the key module is connected to the pin 7 of the single-chip microcomputer; Since the Bluetooth module, the single-chip computer module, the power supply module, the display module and the key module all adopt the existing technology, the connection relationship between them will not be described in detail.

Claims

1. An intermediate frequency pulse output device with feedback function, characterized in that: It includes an intermediate frequency pulse output circuit, a single-chip computer module, a power supply module, a button module, a display module and a Bluetooth module. The feedback signal of the intermediate frequency pulse output circuit is input into the single-chip computer module to identify the open circuit, load and short circuit conditions of the equipment.

2. An intermediate frequency pulse output circuit with feedback function, characterized in that: The invention is applied in a medium frequency pulse output device with feedback function as described in claim 1 and used as a medium frequency pulse output circuit.

3. The intermediate frequency pulse output circuit with feedback function according to claim 2, characterized in that: The intermediate frequency pulse output circuit comprises an energy storage circuit, a pulse wave generating circuit and a feedback circuit, and the feedback circuit is used to monitor the operation status of the circuit.

4. The intermediate frequency pulse output circuit with feedback function according to claim 3, characterized in that: The energy storage circuit includes a transistor Q1 and a transistor Q2, the emitter of the transistor Q2 is grounded, and the base of the transistor Q2 is connected in series with a capacitor C3 to serve as a control terminal IO2; The emitter of the transistor Q1 is grounded, and the base of the transistor Q1 is connected in series with the resistor R1 to serve as the control terminal IO1. The base of the transistor Q1 is also connected with a capacitor C1, and the capacitor C1 is connected in parallel with the resistor R1. The collector of transistor Q1 is connected in series with inductor L1 and resistor R2 and then connected to power supply VCC; The collector of transistor Q2 is connected in series with resistor R3, voltage stabilizing diode D1, inductor L1 and resistor R2, and then connected to power supply VCC; The cathode of the voltage zener diode D1 is connected in series with the capacitor C2 and then grounded, and the collector of the transistor Q2 is connected in series with the resistor R3 and the capacitor C4 and then grounded; The collector of transistor Q2 is connected to the pulse wave generating circuit.

5. The intermediate frequency pulse output circuit with feedback function according to claim 4, characterized in that: The pulse wave generating circuit comprises transistor Q3, transistor Q4, transistor Q5, transistor Q6, transistor Q7 and transistor Q8; The emitter of the transistor Q5 is connected in series with the voltage stabilizing diode D1, the inductor L1, and the resistor R2, and then connected to the power supply VCC; the collector of the transistor Q5 is connected to the output terminal A1; the collector of the transistor Q5 is connected to the emitter of the transistor Q3; the base of the transistor Q3 is connected in series with the resistor R5, and then connected to the collector of the transistor Q4; the collector of the transistor Q3 is connected to the IOC control terminal; the emitter of the transistor Q4 is grounded, and the base of the transistor Q4 is connected in series with the resistor R4, and then connected to the IOA control terminal; The base of transistor Q5 is connected in series with resistor R9 and resistor R10 and then connected to the base of transistor Q8, the output end of resistor R9 is connected to the collector of transistor Q6, the emitter of transistor Q6 is grounded, and the base of transistor Q6 is connected in series with resistor R11 and then connected to the IOB control terminal; The emitter of transistor Q7 is connected in series with voltage regulator diode D1, inductor L1 and resistor R2 and then connected to power supply VCC, the collector of transistor Q7 is connected to output terminal A2, the collector of transistor Q7 is connected to the emitter of transistor Q8, the collector of transistor Q8 is connected to IOC control terminal, and the collector of transistor Q8 is connected in series with diode D3 and grounded; The input end of resistor R9 is connected in series with resistor R6, which is connected in series with voltage regulator diode D1, inductor L1 and resistor R2 to power supply VCC. The base of transistor Q7 is connected in series with resistor R7, voltage regulator diode D1, inductor L1 and resistor R2 to power supply VCC.

6. The intermediate frequency pulse output circuit with feedback function according to claim 5, characterized in that: The IOA control terminal, the IOB control terminal and the IOC control terminal of the pulse wave generating circuit are respectively connected to the pin 4, the pin 5 and the pin 6 of the single chip microcomputer in the single chip microcomputer module.

7. The intermediate frequency pulse output circuit with feedback function according to claim 4, characterized in that: The Key1 output end of the key module is connected to the pin 3 of the single-chip microcomputer in the single-chip microcomputer module; the Key2 output end of the key module is connected to the pin 13 of the single-chip microcomputer; and the Key3 output end of the key module is connected to the pin 7 of the single-chip microcomputer.

8. The intermediate frequency pulse output circuit with feedback function according to claim 6, characterized in that: In the process of storing energy in capacitors C2 and C4, the control terminal IO2 is set to a low level, and transistor Q2 is turned off; When the control terminal IO1 is set to output a high level, the transistor Q1 is turned on, and the 5V voltage stores energy through the inductor and flows to GND, forming a loop; When the control terminal IO1 outputs a low level, the transistor Q1 is turned off, and the inductor charges the capacitive elements C2 and C4 to store energy.

9. The intermediate frequency pulse output circuit with feedback function according to claim 8, characterized in that: When the control terminal 10A is set to a high level and the control terminal 10B is set to a low level: the transistor Q4 is turned on, the resistor R7 divides the high voltage of the capacitive elements C2 and C4, the transistor Q7 is turned on, and the first output terminal A1 is in a relatively high voltage state relative to the second output terminal A2; The control terminal 10B is set to a low level, the transistor Q6 is turned off, the transistor Q5 is turned off, and the second output terminal A2 is in a relatively low voltage state relative to the first output terminal A1; A load resistor is connected in series between the first output terminal and the second output terminal, the emitter voltage of the transistor Q8 is higher than the collector voltage, the transistor Q8 is turned on, and the control terminal IOC detects the voltage V1; If there is an open circuit between the first output terminal and the second output terminal, the control terminal IOC will detect the voltage V2; If A1 and A2 are short-circuited, the control terminal IOC will detect the voltage V3, V3 ≤ 2.4V; The control end IOC will get V3>V1>V2, and this feedback is used to determine the open circuit, load and short circuit conditions of the circuit.

10. The intermediate frequency pulse output circuit with feedback function according to claim 8, characterized in that: When the control terminal 10A is set to a low level and the control terminal 10B is set to a high level: the transistor Q4 is turned off, the two ends of the resistor R7 are at a high voltage, the transistor Q7 is turned off, and the first output terminal A1 is in a relatively low voltage state relative to the second output terminal A2; The transistor Q6 is turned on, and the resistor R6 divides the high voltage of the capacitor C. At this time, the transistor Q5 is turned on, and the second output terminal A2 is in a relatively high voltage state relative to the first output terminal A1; A load resistor is connected in series between the first output terminal and the second output terminal, the emitter voltage of the transistor Q3 is higher than the collector voltage, the transistor Q3 is turned on, and the control terminal IOC detects the voltage V4; If there is an open circuit between A1 and A2, the control terminal IOC will detect the voltage V5; If A1 and A2 are short-circuited, the control terminal IOC will detect the voltage V6, and V6 ≤ 2.4V; The control end IOC will obtain V6>V4>V5, and the feedback formed by this is used to judge the open circuit, load and short circuit conditions of the circuit.

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