Topology model analysis and updating method based on primary equipment starting operation
By conducting global topology analysis in the power grid and saving the relationship, and performing local analysis after the switch changes, the problem of low efficiency of topology structure changes caused by the change of the power grid switch is solved, and the bus number is quickly updated, which improves the speed of grid topology analysis and efficiency.
Patent Information
- Application Number
- CN202411134540.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-19
- Publication Date
- 2024-12-17
AI Technical Summary
When the grid switch changes, traditional methods need to re-produce topological analysis of the entire main network, resulting in large-scale changes in the number of busbars and topological islands, which takes a long time, and only local topological changes cannot be effectively utilized.
The topology model analysis and update method based on the primary device startup operation is adopted, and the relationship between nodes and nodes, lines and buses are saved through global topology analysis. After the switch changes, the buses parallel and divided are tracked, and the unchanged numbers are retained. The newly generated number is the maximum added 1 for the previous time, and the disappearance number is deleted, and only row-to-row and column-added and deleted the admittance matrix.
Reduce the number of search switches, improve the topological analysis speed, avoid the need to regenerate the admission matrix, and improve the analysis efficiency.
Smart Images

Figure CN119154255A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power grid topology analysis, and in particular to a topology model analysis and updating method based on a primary device startup operation. Background Art
[0002] The electrical wiring diagram of the power grid is very complex due to its huge scale, a large number of electrical components and complicated wiring. This also makes the Switch / Node model of the power grid wiring diagram very large and complex. Therefore, many power grid analysis systems do not use the Switch / Node model but the Bus / Branch model to perform various data analyses. Therefore, by studying the key information identification method of the primary equipment startup operation of the power grid startup plan covering the charging rules of equipment such as lines, main transformers, and buses, it is necessary to convert the Switch / Node model into the Bus / Branch model based on the components such as the operating equipment, the operating equipment relationship, and the semantics of the operating event in the startup plan template. The process of converting the Switch / Node model into the Bus / Branch model is the topological analysis of the power grid. Finally, the actual physical connection model is converted into a simple mathematical connection model. The primary equipment operation of the power grid startup plan is essentially to analyze the changes in the topological model of the power grid and then update its topological model.
[0003] The principle of topological analysis method is to traverse the graph and find out its connection relationship and each connected area. There are mainly matrix method and tree search method, among which tree search algorithm is the most commonly used in the process of power grid topological analysis. It traverses all connected nodes through depth-first search algorithm or breadth-first search algorithm. In the process of traversal, each node is analyzed for busbar, that is, the nodes connected by closed switches are paralleled into a new busbar, and each busbar is analyzed for electrical island, that is, all buses connected by lines are merged into an electrical island, and finally the topological analysis of the power grid is completed. In this way, the power grid wiring diagram of a Switch / Node model is converted into a power grid topological diagram of a Bus / Branch model. When the switch of the power grid changes, the topological structure of the power grid may change. At this time, it is necessary to select a suitable method to re-analyze the topological structure of the power grid. The traditional method is to re-analyze the topological structure of the power grid of the entire main network, but this will cause a large-scale change in the numbering of the generated busbars and topological islands, and will cause the power grid analysis system such as the power flow calculation system to regenerate the node admittance matrix, which will take a lot of time. In fact, the change of the switch only affects the local topology network and does not change the topology of the entire network.
[0004] In view of this, a topology model analysis and update method based on a device startup operation is needed. Summary of the invention
[0005] In view of the problem in the prior art that when the switches of the power grid change, re-analyzing the topology of the entire main network will cause large-scale changes in the numbering of the generated busbars and topological islands, which will take a lot of time, the present invention provides a topology model analysis and update method based on a single device startup operation, which can track and analyze only the parallel and split columns of the busbars caused by the changed switches after the switch changes. It retains the busbar structure generated by the previous topology analysis, and continues to retain the busbar numbers that have not changed in this analysis, and sets the number of the newly generated busbar due to the busbar split to the previous maximum busbar number plus 1, and deletes the busbar number that disappears due to the parallel busbars. In this way, there is no need to regenerate the admittance matrix, only the rows and columns of the original admittance matrix need to be added and deleted. The specific technical solution is as follows:
[0006] A topology model analysis and update method based on a device startup operation comprises the following steps:
[0007] Perform a global topological analysis on the entire power grid wiring diagram to obtain the association relationship between nodes, the association relationship between nodes and lines, the association relationship between lines and buses, and the association relationship between buses and electrical islands, and save these association relationships in the database to obtain node switch association tables, node line association tables, bus node association tables, and electrical island bus association tables;
[0008] After the switch changes, a local topology analysis is performed: only the parallelization and division of the busbars caused by the changed switch is tracked and analyzed, the busbar numbers that have not changed are retained in this analysis, and the numbers of the newly generated busbars due to the busbar division are set to the previous maximum busbar number plus 1, and the busbar numbers that disappear due to the parallelization of the busbars are deleted.
[0009] Preferably, the global topology analysis is specifically as follows:
[0010] S101: Using the breadth-first search algorithm to search the power grid starting from the power source, marking the searched nodes as searched;
[0011] S102: during the search process, the switch information and the node information connected to both ends are stored in a switch node association table;
[0012] S103: During the search process, data information of devices such as lines and transformers and information of lines connected thereto are saved in a node-line association table;
[0013] S104: Analyze the switch status and line status during the search process, combine all nodes connected by closed bus switches and feeder switches into a bus, save the bus information and node information in a bus node association table, save the bus information in a bus information table, and save the starting node information of the bus;
[0014] S105: Determine whether the bus is a valid bus. The so-called valid bus includes the following situations: the bus connects two different lines; the bus connects a line and a parallel device; the bus connects a power supply and a parallel device other than the power supply; if the bus is an invalid bus, delete the bus;
[0015] S106: Conduct electrical island analysis, specifically scan the bus node association table and the node line association table, merge the buses connected by lines into one electrical island, that is, save the bus number belonging to the electrical island in the electrical island bus association table, and finally determine whether the electrical island is a live island or a dead island. A live island is an electrical island with power supply or an external network incoming line, and a dead island does not contain power supply.
[0016] Preferably, the local topology analysis is specifically as follows:
[0017] S201: Acquire switch opening and closing information in the power grid wiring diagram;
[0018] S202: Analyze the switch type and switch status, if the switch is a bus switch, perform bus analysis, if the switch is a line switch, perform branch analysis, and then update the switch-branch association table and the branch-bus association table;
[0019] S203: Determine whether the bus is a valid bus. If it is a valid bus, perform the next step of analysis. If it is an invalid bus, delete it from the database.
[0020] S204: Conduct electrical island analysis, by scanning the node bus association table and the node branch association table, merge the buses connected by branches into one electrical island, update the electrical island bus association table, and finally determine whether the electrical island is a live island.
[0021] Preferably, the busbar analysis is specifically as follows:
[0022] (1) There are three types of impacts on the topology of the power grid caused by the closing of the bus switch: 1. The topology does not change; 2. The busbars connected to the switch and belonging to the same electrical island are paralleled to become one busbar, and the new busbar after paralleling still belongs to the original electrical island; 3. The busbars connected to the switch belong to two different electrical islands. After the switch is closed, the two busbars and the electrical islands to which the two busbars belong are paralleled;
[0023] For case 1, it is only necessary to detect whether the two nodes at both ends of the switch belong to the same bus. If the two nodes belong to the same bus, no other operations are required;
[0024] For case 2, when the nodes at both ends of the switch belong to different buses and the two buses belong to the same electrical island, the two buses need to be combined and the bus number is set to the smaller one of the two bus numbers;
[0025] Case 3 is when the nodes at both ends of the switch belong to different buses and the two buses belong to different electrical islands, then the buses and electrical islands need to be paralleled, and the number of the paralleled electrical island is set to the smaller one of the two original electrical island numbers;
[0026] (2) The impact of busbar switch disconnection on the topological structure of the power grid can be divided into three cases: 1. The topological structure does not change; 2. The busbars are separated but still belong to the same electrical island; 3. The busbars are separated and the electrical islands are also separated. The details are as follows:
[0027] The analysis method for case 1 is the same as that for when the switch is closed. It determines whether the topology should be changed by checking whether the node numbers at both ends of the switch belong to the same bus. If they do, no processing is performed.
[0028] In case 2, it is necessary to perform breadth-first search from both ends of the disconnected switch, save the nodes with connectivity found, and then compare the two node sequences to see if they are the same. If they are the same, it means that the disconnection of the switch has caused the busbar to split;
[0029] Case 3 is to perform electrical island detection based on Case 2. The method is to compare the nodes contained in the two busbars with the nodes in each electrical island. If these two groups of nodes belong to the same electrical island, there is no need to split the electrical island. If not, electrical island splitting is required.
[0030] Preferably, the branch analysis is specifically as follows:
[0031] When the line switch is closed, scan the line switch at the other end of the line to see if it is also closed. If the line switch at the other end of the line is also closed, it means that the line is connected to two different busbars. If the busbars connected to the line belong to different electrical islands, the electrical islands are paralleled and the two electrical islands are paralleled into one electrical island. The electrical island number after paralleling is set to the smaller of the two original electrical island numbers. If the busbars connected to the line do not belong to different electrical islands, no operation is required.
[0032] When the line switch is disconnected, check whether the line switch at the other end of the line is disconnected. If it is disconnected, no topological analysis is required. If the line switch at the other end is closed, select one of the busbars at both ends of the disconnected line for breadth-first search. If the other busbar can be searched from the busbar, it means that the two busbars belong to one electrical island. If not, it means that the two busbars are in two electrical islands and the two electrical islands need to be rebuilt.
[0033] Preferably, the electrical island analysis is specifically as follows:
[0034] S301: First, initialize all buses and mark them as unscanned, then put the initial bus into a queue, and determine whether the queue is empty. If it is not empty, take out the first bus and mark it as scanned, then scan all nodes in the bus to obtain the line connected to each node, and then search each line to obtain another bus connected to the line, put the other bus into the queue, and mark it as searched;
[0035] S302: An electrical island is obtained by searching as in step S301, and the topological structure of the electrical island is recorded. All buses are marked as searched by using the breadth-first search method of the graph, and the division of all electrical islands is obtained.
[0036] A topology model analysis and update system based on a one-time device startup operation is applied to the above method, comprising a topology database, a cache module, a node / component model module, a graphic element model module, a SCADA system, a bus / road model module, and a topology analysis result module; the topology database is connected to the cache module, the cache module is connected to the node / component model module, the node / component model module is connected to the graphic element model module, the bus / branch model module and the topology analysis result module, and the graphic element model module is also connected to the SCADA system.
[0037] A computer-readable storage medium includes a stored program, wherein when the program is running, the device where the computer-readable storage medium is located is controlled to execute the topology model analysis and update method based on a single device startup operation as described above.
[0038] A processor is used to run a program, wherein when the program is run, the topology model analysis and update method based on a single device startup operation as described above is executed.
[0039] Compared with the prior art, the present invention has the following beneficial effects:
[0040] After the switch changes, the present invention only tracks and analyzes the parallelization and separation of the busbars caused by the changed switch. It retains the busbar structure generated by the previous topological analysis, and continues to retain the busbar numbers that have not changed in this analysis, and sets the number of the newly generated busbar due to the busbar separation to the previous maximum busbar number plus 1, and deletes the busbar number that disappears due to the parallelization of the busbars. In this way, there is no need to regenerate the admittance matrix, and only the rows and columns of the original admittance matrix need to be added and deleted. Moreover, by classifying the switches of the power grid, they are divided into bus switches and line switches. Because the line switches are all connected together and connected to the endpoints of their two outgoing lines, when the line switches change, the busbars at both ends will definitely change. Therefore, when performing topological analysis, there is no need to search for the line switches, and only the buses need to be directly paralleled or separated. This reduces the number of switches to be searched and improves the speed of topological analysis. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for the specific embodiments or the description of the prior art. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn according to the actual scale.
[0042] Figure 1 It is a flowchart of global topology analysis;
[0043] Figure 2 It is a flowchart of local topology analysis;
[0044] Figure 3 It is a schematic diagram of the switch state;
[0045] Figure 4 Analyze the flow chart for the switch;
[0046] Figure 5 Analyze the flow chart for the busbar;
[0047] Figure 6 Analyze flow charts for electrical islands;
[0048] Figure 7 The diagram is a schematic diagram of a topology model analysis and update system framework based on a device startup operation. DETAILED DESCRIPTION
[0049] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0050] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0051] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, the singular forms "a", "an" and "the" are intended to include plural forms unless the context clearly indicates otherwise.
[0052] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
[0053] In one embodiment of the present invention, a method for analyzing and updating a topology model based on a device startup operation is provided, comprising:
[0054] Step 1: Perform a global topological analysis on the entire power grid wiring diagram to obtain the association relationship between nodes, the association relationship between nodes and lines, the association relationship between lines and buses, and the association relationship between buses and electrical islands, and save these association relationships in the database to obtain a node switch association table, a node line association table, a bus node association table, and an electrical island bus association table;
[0055] Because the switch changes and line switching of the power grid wiring diagram do not occur frequently, and each change only changes a few switches, these changes only affect the local topology and do not affect the topology of the entire power grid. Therefore, when the switch changes occur, only the changed switches need to be analyzed, and there is no need to re-analyze the topology of the entire power grid, which greatly speeds up the topology analysis. Therefore, there is step two:
[0056] Step 2: After the switch changes, perform local topology analysis: only track and analyze the parallel and split busbars caused by the changed switches, keep the busbar numbers that have not changed in this analysis, set the number of the newly generated busbar due to busbar splitting to the previous maximum busbar number plus 1, and delete the busbar numbers that disappear due to bus parallelization.
[0057] The specific steps of global topology analysis are as follows:
[0058] (1) Starting from the power source, the breadth-first search algorithm is used to search the power grid, and the searched nodes are marked as searched.
[0059] (2) During the search process, the switch information and the node information connected to its two ends are saved in the switch node association table.
[0060] (3) During the search process, the data information of devices such as lines and transformers and the lines to which they are connected are saved in the node-line association table.
[0061] (4) During the search process, the switch status and line status are analyzed, and all nodes connected by closed bus switches and feeder switches are combined into a bus. The bus information and node information are saved in the bus node association table, and the bus information is saved in the bus information table. At the same time, the starting node information of the bus is saved. In this way, the bus analysis is completed.
[0062] (5) Determine whether the bus is a valid bus. A valid bus includes the following situations: the bus connects two different lines; the bus connects a line and a parallel device; the bus connects a power supply and a parallel device other than the power supply. If the bus is an invalid bus, delete it.
[0063] (6) After completing the busbar analysis, the electrical island needs to be analyzed. The electrical island analysis needs to be performed. Scan the busbar node association table and the node line association table, and merge the buses connected by lines into one electrical island, that is, save the busbar number belonging to the electrical island in the electrical island bus association table. Finally, determine whether the electrical island is a live island or a dead island. A live island is an electrical island with a power supply or an external network incoming line, and current flows through its line, while a dead island does not contain a power supply, so no current flows through the line.
[0064] The global topology analysis flow chart is as follows: Figure 1 shown.
[0065] The specific steps of local topology analysis are as follows:
[0066] (1) Obtain the switch opening and closing information in the power grid wiring diagram, which is the telesignaling information read from the database.
[0067] (2) Analyze the switch type and switch status. If the switch is a bus switch, perform bus analysis. If the switch is a feeder switch, perform branch analysis. Then update the switch-branch association table and the branch-bus association table.
[0068] (3) Determine whether the bus is a valid bus. If it is a valid bus, proceed to the next step of analysis. If it is an invalid bus, delete it from the database.
[0069] (4) Conduct electrical island analysis. By scanning the node bus association table and the node branch association table, the buses connected by branches are merged into an electrical island, and the electrical island bus association table is updated. Finally, it is determined whether the electrical island is a live island.
[0070] The local topology analysis flow chart is as follows: Figure 2 shown.
[0071] The global topology analysis and local topology analysis in the above two major directions also include the following specific analyses:
[0072] First, the switches in the power grid are classified into line switches and bus switches. The two ends of the line switch connect the bus and the line. Its opening and closing will affect the state of the line, whether it is put into operation or out of operation, but will not affect the state of the bus.
[0073] The busbar switch is also called the bus tie switch, and its purpose is to connect two busbars. Its opening and closing will make the busbar have two states: split and parallel, and will not affect the line state. Figure 3 As shown in the figure, BL1 and BL2 are two busbars, which are connected by busbar switch sw1. When sw1 is closed, the two busbars BL1 and BL2 will be paralleled into one busbar, and when it is disconnected, they will be restored to two busbars. Sw4, sw3, sw2, and sw5 are four line switches. When they are closed, the busbars they are connected to will be merged into the corresponding electrical island; when they are disconnected, the busbars they are connected to will be separated from the original electrical island and placed in the new electrical island. After the switch categories are divided, the switch displacement situation of each category of switches can be analyzed. The purpose of switch displacement analysis is to confirm the impact of switch displacement on the topological structure of the power grid. There are four main types of switch displacement situations: two displacement situations of busbar switches and two displacement situations of line switches. The following will analyze these four displacement situations in detail.
[0074] (1) There are three possible effects of the closing of a busbar switch on the topological structure of the power grid: 1. The topological structure does not change; 2. The busbars connected to the switch and belonging to the same electrical island are connected in parallel to become one busbar, and the new busbars still belong to the original electrical island; 3. The busbars connected to the switch belong to two different electrical islands. After the switch is closed, the two busbars and the electrical islands to which the two busbars belong are connected in parallel.
[0075] For case 1, it is only necessary to detect whether the two nodes at both ends of the switch belong to the same bus. If the two nodes belong to the same bus, no other operations are required.
[0076] For case 2, when the nodes at both ends of the switch belong to different buses and the two buses belong to the same electrical island, the two buses need to be combined and the bus number is set to the smaller one of the two bus numbers.
[0077] Case 3 is when the nodes at both ends of the switch belong to different buses and the two buses belong to different electrical islands, then the buses and electrical islands need to be paralleled. The number of the electrical island after paralleling is set to the smaller number of the two original electrical islands.
[0078] (2) The impact of busbar disconnection on the topological structure of the power grid can be divided into three cases: 1. The topological structure does not change; 2. The busbars are split but still belong to the same electrical island; 3. The busbars are split and the electrical island is also split.
[0079] The analysis method for case 1 is the same as that when the switch is closed. It determines whether the topology should be changed by checking whether the node numbers at both ends of the switch belong to the same bus. If so, no processing is performed.
[0080] Case 2 requires a breadth-first search from both ends of the disconnected switch, saving the searched nodes with connectivity, and then comparing the two node sequences to see if they are the same. If they are the same, it means that the disconnection of the switch has caused the busbar to split.
[0081] Case 3 is to perform electrical island detection based on Case 2. The method is to compare the nodes contained in the two buses with the nodes in each electrical island. If the two groups of nodes belong to the same electrical island, there is no need to separate the electrical islands. If not, electrical island separation is required. The flow chart is as follows Figure 4 shown.
[0082] (3) If the line switch is closed, it is necessary to analyze whether the line is connected to the system, that is, to scan whether the line switch at the other end of the line is also closed. If the line switch at the other end of the line is also closed, it means that the line is connected to two different busbars. If the busbars connected to the line belong to different electrical islands, the electrical islands need to be paralleled, and the two electrical islands need to be paralleled into one electrical island. The electrical island number after paralleling is set to the smaller one of the original two electrical island numbers. If not, no operation is required.
[0083] (4) When the line switch is disconnected, an additional analysis is required to detect whether the line switch at the other end of the line is disconnected. If it is disconnected, it means that the line has not been put into operation and no topological analysis is required. If the line switch at the other end is closed, it means that the line has just been put into operation and the next step of analysis is required.
[0084] The disconnection of the line switch may cause two situations: 1. The busbars connected at both ends of a line still belong to one electrical island; 2. The busbars at both ends of the line belong to two electrical islands respectively, which causes the electrical island to be split. The judgment method for these two situations is to select one of the busbars at both ends of the disconnected line for breadth-first search. If the other busbar can be searched from the busbar, it means that the two busbars belong to one electrical island. If not, it means that the two busbars are in two electrical islands and the two electrical islands need to be rebuilt. Because one of the electrical islands has been topologically analyzed, the topological structure of the other electrical island can be obtained by removing the topological structure of the electrical island that has not been split from the electrical island topological structure just obtained after the search.
[0085] Busbar analysis uses the breadth-first search method of the graph to search for connected nodes, and classifies the nodes with connection relationships connected together through busbar switches into a busbar.
[0086] The specific process is as follows: First, initialize all nodes and mark all nodes as unsearched. Then put a starting node into the queue. Then determine whether the queue is empty. If it is not empty, take the first node from the queue, mark it as searched, add it to the busbar set, and then add other nodes connected to it to the queue. Repeat this process to get a connected subgraph, which is a busbar. Then select an unmarked node and continue the above steps to get another busbar. When all nodes are marked as searched, the busbar analysis is completed.
[0087] The busbar analysis flow chart is as follows: Figure 5 shown.
[0088] The analysis of electrical island is based on switch analysis and busbar analysis. The main purpose of electrical island analysis is to analyze whether there is electrical connection between busbars, that is, whether the busbars are connected.
[0089] First, initialize all buses and mark them as unscanned. Then put the initial bus into the queue and check whether the queue is empty. If it is not empty, take out the first bus and mark it as scanned. Then scan all nodes in the bus to get the line connected to each node. Then search each line to get the other bus connected to the line. Put this other bus into the queue and mark it as searched.
[0090] By searching in this way, an electrical island is obtained, and the topological structure of the electrical island is recorded. By using the breadth-first search method of the graph to mark all buses as searched, the division of all electrical islands is obtained. The electrical island flow chart is as follows: Figure 6 shown.
[0091] In one embodiment of the present invention, a topology model analysis and update system based on a device startup operation is also provided, which is applied to the above method, such as Figure 7 As shown, it includes a topological database, a cache module, a node / component model module, a graphic model module, a SCADA system, a bus / road model module, and a topological analysis result module; the topological database is connected to the cache module, the cache module is connected to the node / component model module, the node / component model module is connected to the graphic model module, the bus / branch model module and the topological analysis result module, and the graphic model module is also connected to the SCADA system.
[0092] In summary, after the switch changes, the present invention only tracks and analyzes the parallelization and separation of the busbars caused by the changed switch. It retains the busbar structure generated by the previous topological analysis, and continues to retain the busbar numbers that have not changed in this analysis, and sets the number of the newly generated busbar due to the busbar separation to the previous maximum busbar number plus 1, and deletes the busbar number that disappears due to the parallelization of the busbar. In this way, there is no need to regenerate the admittance matrix, and only the rows and columns of the original admittance matrix need to be added and deleted. Moreover, by classifying the switches of the power grid, it is divided into bus switches and line switches. Because the line switches are all connected together and connected to the endpoints of their two outgoing lines, when the line switches change, the busbars at both ends will definitely change. Therefore, when performing topological analysis, there is no need to search for the line switches, and only the buses need to be directly paralleled or separated. This reduces the number of switches to be searched and improves the speed of topological analysis.
[0093] Those of ordinary skill in the art will appreciate that the units of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition of each example has been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0094] In the embodiments provided by the present invention, it should be understood that the division of units is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units can be combined into one unit, one unit can be split into multiple units, or some features can be ignored, etc.
[0095] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0096] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-0nlyMemory), random access memory (RAM, RandomAccessMemory), mobile hard disk, magnetic disk or optical disk, etc., which can store program code.
[0097] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and specification of the present invention.
Claims
1. A topology model analysis and update method based on a device startup operation, It is characterized in that The following steps are involved: Perform a global topological analysis on the entire power grid wiring diagram to obtain the association relationship between nodes, the association relationship between nodes and lines, the association relationship between lines and buses, and the association relationship between buses and electrical islands, and save these association relationships in the database to obtain node switch association tables, node line association tables, bus node association tables, and electrical island bus association tables; After the switch changes, a local topology analysis is performed: only the parallelization and division of the busbars caused by the changed switch is tracked and analyzed, the busbar numbers that have not changed are retained in this analysis, and the numbers of the newly generated busbars due to the busbar division are set to the previous maximum busbar number plus 1, and the busbar numbers that disappear due to the parallelization of the busbars are deleted.
2. A topology model analysis and updating method based on a device startup operation according to claim 1, It is characterized in that The global topology analysis is as follows: S101: Using the breadth-first search algorithm to search the power grid starting from the power source, marking the searched nodes as searched; S102: during the search process, the switch information and the node information connected to both ends are stored in a switch node association table; S103: During the search process, data information of devices such as lines and transformers and information of lines connected thereto are saved in a node-line association table; S104: Analyze the switch status and line status during the search process, combine all nodes connected by closed bus switches and feeder switches into a bus, save the bus information and node information in a bus node association table, save the bus information in a bus information table, and save the starting node information of the bus; S105: Determine whether the bus is a valid bus. The so-called valid bus includes the following situations: the bus connects two different lines; the bus connects a line and a parallel device; the bus connects a power supply and a parallel device other than the power supply; if the bus is an invalid bus, delete the bus; S106: Conduct electrical island analysis, specifically scan the bus node association table and the node line association table, merge the buses connected by lines into one electrical island, that is, save the bus number belonging to the electrical island in the electrical island bus association table, and finally determine whether the electrical island is a live island or a dead island. A live island is an electrical island with power supply or an external network incoming line, and a dead island does not contain power supply.
3. A topology model analysis and updating method based on a one-time device startup operation according to claim 2, It is characterized in that The local topology analysis is as follows: S201: Acquire switch opening and closing information in the power grid wiring diagram; S202: Analyze the switch type and switch status, if the switch is a bus switch, perform bus analysis, if the switch is a line switch, perform branch analysis, and then update the switch-branch association table and the branch-bus association table; S203: Determine whether the bus is a valid bus. If it is a valid bus, perform the next step of analysis. If it is an invalid bus, delete it from the database. S204: Conduct electrical island analysis, by scanning the node bus association table and the node branch association table, merge the buses connected by branches into one electrical island, update the electrical island bus association table, and finally determine whether the electrical island is a live island.
4. A topology model analysis and updating method based on a one-time device startup operation according to claim 3, It is characterized in that The busbar analysis is as follows: (1) There are three types of impacts on the topology of the power grid caused by the closing of the bus switch:
1. The topology does not change; 2. The busbars connected to the switch and belonging to the same electrical island are paralleled to become one busbar, and the new busbar after paralleling still belongs to the original electrical island; 3. The busbars connected to the switch belong to two different electrical islands. After the switch is closed, the two busbars and the electrical islands to which the two busbars belong are paralleled; For case 1, it is only necessary to detect whether the two nodes at both ends of the switch belong to the same bus. If the two nodes belong to the same bus, no other operations are required; For case 2, when the nodes at both ends of the switch belong to different buses and the two buses belong to the same electrical island, the two buses need to be paralleled and the bus number is set to the smaller one of the two bus numbers; Case 3 is when the nodes at both ends of the switch belong to different buses and the two buses belong to different electrical islands, then the buses and electrical islands need to be paralleled, and the number of the paralleled electrical island is set to the smaller one of the two original electrical island numbers; (2) The impact of busbar switch disconnection on the topological structure of the power grid can be divided into three cases:
1. The topological structure does not change; 2. The busbars are separated but still belong to the same electrical island; 3. The busbars are separated and the electrical islands are also separated. The details are as follows: The analysis method for case 1 is the same as that for when the switch is closed. It determines whether the topology should be changed by checking whether the node numbers at both ends of the switch belong to the same bus. If they do, no processing is performed. In case 2, it is necessary to perform breadth-first search from both ends of the disconnected switch, save the nodes with connectivity found, and then compare the two node sequences to see if they are the same. If they are the same, it means that the disconnection of the switch has caused the busbar to split; Case 3 is to perform electrical island detection based on Case 2. The method is to compare the nodes contained in the two busbars with the nodes in each electrical island. If these two groups of nodes belong to the same electrical island, there is no need to split the electrical island. If not, electrical island splitting is required.
5. A topology model analysis and updating method based on a one-time device startup operation according to claim 3, It is characterized in that The branch analysis is as follows: When the line switch is closed, scan whether the line switch at the other end of the line is also closed. If the line switch at the other end of the line is also closed, it means that the line is connected to two different busbars. If the busbars connected to the line belong to different electrical islands, the electrical islands are paralleled and the two electrical islands are paralleled into one electrical island. The electrical island number after paralleling is set to the smaller one of the original two electrical island numbers. If the busbars connected to the line do not belong to different electrical islands, no operation is required. When the line switch is disconnected, check whether the line switch at the other end of the line is disconnected. If it is disconnected, no topological analysis is required. If the line switch at the other end is closed, select one of the busbars at both ends of the disconnected line for breadth-first search. If the other busbar can be searched from the busbar, it means that the two busbars belong to one electrical island. If not, it means that the two busbars are in two electrical islands and the two electrical islands need to be rebuilt.
6. A topology model analysis and updating method based on a one-time device startup operation according to claim 3, It is characterized in that The electrical island analysis is as follows: S301: First, initialize all buses and mark them as unscanned, then put the initial bus into a queue, and determine whether the queue is empty. If it is not empty, take out the first bus and mark it as scanned, then scan all nodes in the bus to obtain the line connected to each node, and then search each line to obtain another bus connected to the line, put the other bus into the queue, and mark it as searched; S302: An electrical island is obtained by searching as in step S301, and the topological structure of the electrical island is recorded. All buses are marked as searched by using the breadth-first search method of the graph, and the division of all electrical islands is obtained.
7. A topology model analysis and update system based on a device startup operation, It is characterized in that The method applied to any one of claims 1 to 6 comprises a topological database, a cache module, a node / component model module, a graph model module, a SCADA system, a bus / road model module, and a topological analysis result module; the topological database is connected to the cache module, the cache module is connected to the node / component model module, the node / component model module is connected to the graph model module, the bus / branch model module and the topological analysis result module, and the graph model module is also connected to the SCADA system.
8. A computer-readable storage medium, It is characterized in that The computer-readable storage medium includes a stored program, wherein when the program is running, the device where the computer-readable storage medium is located is controlled to execute the topology model analysis and update method based on a single device startup operation as described in any one of claims 1 to 6.
9. A processor, It is characterized in that The processor is used to run a program, wherein when the program is run, the topology model analysis and update method based on a single device startup operation as described in any one of claims 1 to 6 is executed.
