A wide range impulse current measurement method and device
Through the combination of staging measurement and voltage divider circuit, the accuracy problem of wide range impact current measurement in the prior art is solved, and accurate measurement of impact current and efficient adaptation in the case of negative signals are achieved.
Patent Information
- Application Number
- CN202411677073.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2044-11-22
AI Technical Summary
The prior art is difficult to accurately measure the impact current of a wide range, especially when the lightning arrester deteriorates, the amplitude of the impact current is extremely large and it is difficult to measure instantaneously.
The staging measurement method is adopted to obtain the multi-stage A/D sampling data of the lightning arrester when he withstands the impact current, and to calculate the peak value of the impact current by combining the voltage divider circuit and transformer data.
Accurate measurement of wide range shock current is achieved, measurement accuracy and adaptability in negative signals is improved, and the hysteresis and saturation of transformers are avoided affecting measurement.
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Figure CN119165237B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a wide-range impulse current measurement method and device, belonging to the technical field of impulse current measurement. Background Art
[0002] Lightning arresters are connected in parallel to power transmission and transformation lines, playing an important role in protecting other facilities on the lines from shocks. As time goes by, the number of shocks to the arrester increases, and it gradually deteriorates and cannot withstand the shock of strong currents. In severe cases, it may even explode. The monitoring of lightning arresters is related to the safe operation of the power grid. By measuring the size and number of shocks of the arrester's shock current, it is of great reference value to judge the degree of deterioration of the arrester. Because the shock current is generally a steep wave of 8 / 20μS, with an amplitude ranging from tens of A to hundreds of kA, it is a difficult problem to accurately measure such a wide range of shock currents instantly. Summary of the invention
[0003] The purpose of the present invention is to provide a method and device for measuring a wide-range impulse current, so as to solve the problem in the prior art that it is difficult to accurately measure a wide-range impulse current.
[0004] To achieve the above objectives, the present invention is implemented by adopting the following technical solutions:
[0005] In a first aspect, the present invention provides a wide-range impulse current measurement method, comprising:
[0006] Obtaining first-gear A / D sampling data, second-gear A / D sampling data, and third-gear A / D sampling data generated when the arrester is subjected to an impact current, wherein the first-gear A / D sampling data, the second-gear A / D sampling data, and the third-gear A / D sampling data are different sampling data corresponding to voltages formed by different voltage divisions after the arrester is subjected to an impact current;
[0007] Compare the A / D maximum sampling value in each file of A / D sampling data with the A / D maximum sampling value corresponding to the zero potential to determine whether the impact current corresponding to each file of A / D sampling data is positive or negative;
[0008] The best A / D sampling data is selected according to the maximum A / D sampling value in each A / D sampling data and the positive and negative of the corresponding impact current;
[0009] The circuit data of each voltage-dividing circuit and the performance data of the transformer are obtained, and the peak value of the inrush current is calculated based on the optimal A / D sampling data, the circuit data of the corresponding voltage-dividing circuit and the performance data of the transformer.
[0010] Further, the A / D maximum sampling value in each file of A / D sampling data is compared with the A / D maximum sampling value corresponding to the zero potential to determine the positive or negative of the impact current corresponding to each file of A / D sampling data, including:
[0011] Compare the A / D maximum sampling value in the first gear of A / D sampling data with the A / D maximum sampling value corresponding to the zero potential. If the A / D maximum sampling value in the first gear of A / D sampling data is larger, the impact current corresponding to the first gear of A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to the zero potential is larger, the impact current corresponding to the first gear of A / D sampling data is a negative impact current.
[0012] Compare the A / D maximum sampling value in the second gear A / D sampling data with the A / D maximum sampling value corresponding to the zero potential. If the A / D maximum sampling value in the second gear A / D sampling data is larger, the impact current corresponding to the second gear A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to the zero potential is larger, the impact current corresponding to the second gear A / D sampling data is a negative impact current.
[0013] Compare the A / D maximum sampling value in the third-level A / D sampling data with the A / D maximum sampling value corresponding to zero potential. If the A / D maximum sampling value in the third-level A / D sampling data is larger, the impact current corresponding to the third-level A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to zero potential is larger, the impact current corresponding to the third-level A / D sampling data is a negative impact current.
[0014] Furthermore, the maximum A / D sampling value corresponding to the zero potential is 2048.
[0015] Furthermore, the first-gear A / D sampling data, the second-gear A / D sampling data and the third-gear A / D sampling data are obtained through A / D acquisition, and the A / D acquisition is implemented by a current acquisition unit, and the current acquisition unit is an ARM chip.
[0016] Further, the method of selecting the best A / D sampling data according to the maximum A / D sampling value in each A / D sampling data and the positive and negative of the corresponding impact current includes:
[0017] For positive surge current:
[0018] If the A / D maximum sampling value in the second-grade A / D sampling data is greater than the first sampling threshold, the third-grade A / D sampling data is used as the best-grade A / D sampling data;
[0019] If the second sampling threshold ≤ the A / D maximum sampling value in the second-grade A / D sampling data ≤ the first sampling threshold, the second-grade A / D sampling data is used as the best-grade A / D sampling data;
[0020] If the A / D maximum sampling value corresponding to the zero potential is less than the A / D maximum sampling value in the second-grade A / D sampling data and less than the second sampling threshold, the first-grade A / D sampling data is used as the best-grade A / D sampling data;
[0021] For negative surge current:
[0022] If the A / D maximum sampling value in the second-grade A / D sampling data is less than the fourth sampling threshold, the third-grade A / D sampling data is used as the best-grade A / D sampling data;
[0023] If the fourth sampling threshold ≤ the A / D maximum sampling value in the second-grade A / D sampling data ≤ the third sampling threshold, the second-grade A / D sampling data is used as the best-grade A / D sampling data;
[0024] If the third sampling threshold value is less than the A / D maximum sampling value in the second-grade A / D sampling data and less than the A / D maximum sampling value corresponding to the zero potential, the first-grade A / D sampling data is used as the best-grade A / D sampling data.
[0025] Furthermore, the peak value of the inrush current is calculated based on the optimal A / D sampling data, the circuit data of the corresponding voltage divider circuit, and the performance data of the transformer, by the following formula:
[0026] ;
[0027] Among them, i max is the peak value of the inrush current, R x It is the first sampling resistance value corresponding to the output voltage of the transformer in the voltage divider circuit input to the negative terminal of the operational amplifier. R y It is the second sampling resistance value corresponding to the transformer output voltage in the voltage divider circuit input to the negative terminal of the operational amplifier. AD max It is the maximum sampling value of A / D in the best-grade A / D sampling data. AD REF is the reference voltage sampling value in the corresponding voltage divider circuit, V AD is the ADC power supply voltage in the corresponding voltage divider circuit, K is the mutual inductance coefficient of the transformer, R c It is the resistance value of the sampling resistor connected to the secondary output of the transformer.
[0028] In a second aspect, the present invention provides a wide-range impulse current measuring device, comprising: a through-type Hall current transformer, a sampling resistor R1, a plurality of parallel voltage divider circuits, an ARM chip, a voltage comparator U4, a data storage device and a data processing unit, wherein the ARM chip transmits the collected data to the data storage device for storage, and the data processing unit is used to execute a wide-range impulse current measuring method according to the data transmitted from the data storage device;
[0029] The plurality of parallel voltage-dividing circuits include a first-gear voltage-dividing circuit, a second-gear voltage-dividing circuit and a third-gear voltage-dividing circuit connected in parallel on the ARM chip, and each voltage-dividing circuit is provided with a potential shifting unit for shifting the potential in the voltage-dividing circuit;
[0030] A through-type Hall current transformer is arranged around the lower output line of the arrester, the arrester is the arrester impacted by the impact current to be measured, the lower output line passes through the through-type Hall current transformer and is connected to the protective ground, and the secondary of the through-type Hall current transformer is connected to the sampling resistor R1;
[0031] The sampling resistor R1 is respectively connected to the first-level voltage-dividing circuit, the second-level voltage-dividing circuit, the third-level voltage-dividing circuit and the voltage comparator U4, and the voltage comparator U4 is connected to the ARM chip;
[0032] When the voltage comparator U4 detects that there is an impact current, it sends a start sampling instruction to the ARM chip, and the ARM chip starts sampling. When the voltage comparator U4 detects that the voltage at the sampling resistor R1 exceeds the preset flip voltage, it sends an interrupt instruction to the ARM chip, and the ARM chip interrupts sampling after a preset time.
[0033] Further, the first-level voltage-dividing circuit includes a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and an operational amplifier U1, one end of the resistor R2 is connected to the sampling resistor R1, and the other end is respectively connected to the resistors R3, R6 and R7, the other end of the resistor R3 is connected to the reference voltage, the other end of the resistor R6 is grounded, the other end of the resistor R7 is connected to the positive input end of the operational amplifier U1, one end of the resistor R4 and the resistor R5 is connected to the negative input end of the operational amplifier U1, the other end of the resistor R5 is grounded, the other end of the resistor R4 is connected to the output end of the operational amplifier U1, the resistors R4 and R5 have the same resistance value, the output end of the operational amplifier U1 is connected to the first A / D acquisition interface of the ARM chip, and the operational amplifier U1 is used to translate the potential in the first-level voltage-dividing circuit;
[0034] The second-level voltage-dividing circuit includes a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and an operational amplifier U2, one end of the resistor R11 is connected to the sampling resistor R1, and the other end is respectively connected to the resistor R8, the resistor R12 and the resistor R13, the other end of the resistor R8 is connected to the reference voltage, the other end of the resistor R12 is grounded, the other end of the resistor R13 is connected to the positive input end of the operational amplifier U2, one end of the resistor R9 and the resistor R10 are connected to the negative input end of the operational amplifier U2, the other end of the resistor R10 is grounded, the other end of the resistor R9 is connected to the output end of the operational amplifier U2, the resistor R9 and the resistor R10 have the same resistance value, the output end of the operational amplifier U2 is connected to the second A / D acquisition interface of the ARM chip, and the operational amplifier U2 is used to translate the potential in the second-level voltage-dividing circuit;
[0035] The third-level voltage-dividing circuit includes resistor R14, resistor R16, resistor R17, resistor R18, resistor R19, resistor R20 and operational amplifier U3, one end of resistor R18 is connected to sampling resistor R1, and the other end is respectively connected to resistor R14, resistor R19 and resistor R20, the other end of resistor R14 is connected to the reference voltage, the other end of resistor R19 is grounded, the other end of resistor R20 is connected to the positive input end of operational amplifier U3, one end of resistor R16 and resistor R17 is connected to the negative input end of operational amplifier U3, the other end of resistor R16 is grounded, the other end of resistor R17 is connected to the output end of operational amplifier U3, the resistance values of resistor R16 and resistor R17 are the same, the output end of operational amplifier U3 is connected to the third A / D acquisition interface of ARM chip, and operational amplifier U3 is used to translate the potential in the third-level voltage-dividing circuit.
[0036] Furthermore, it also includes a rectifier bridge D1, a voltage comparator U4, a resistor R22 and a resistor R23. The two ends of the sampling resistor R1 are also respectively connected to the two AC input ends of the rectifier bridge D1, the positive output end of the rectifier bridge D1 is connected to the negative input end of the voltage comparator U4, the negative output end of the rectifier bridge D1 is grounded, one end of the resistor R22 and the resistor R23 are connected to the positive input end of the voltage comparator U4, the other end of the resistor R22 is connected to the reference voltage, the other end of the resistor R23 is grounded, and the output end of the voltage comparator U4 is connected to the external event interrupt interface of the ARM chip.
[0037] Furthermore, the data storage device is a ring-shaped data storage device.
[0038] Compared with the prior art, the beneficial effects achieved by the present invention are:
[0039] The invention provides a wide-range impulse current measurement method and device. The wide-range impulse current is measured by a graded measurement method, and the gear most suitable for the impulse current is found from three gears and then its peak value is calculated, which is equivalent to reducing the range of each gear, thereby realizing accurate measurement of the wide-range impulse current. The potential is translated by a voltage divider circuit, so that the ARM chip can also perform A / D acquisition when the impulse current is a negative signal, thereby improving the adaptability of the measurement method and the measurement accuracy under the negative signal condition; and the potential is translated by a voltage divider circuit, so that the ARM chip can also perform A / D acquisition when the impulse current is a negative signal, thereby improving the adaptability of the measurement method; and a through-type Hall current transformer is adopted, so that the hysteresis and saturation phenomena of other transformers will not occur, and the measurement accuracy will not be affected. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 is a flow chart of a wide-range impulse current measurement method provided by an embodiment of the present invention;
[0041] Figure 2 is a diagram showing the relationship between the secondary output voltage and time of the through-hole Hall current transformer provided in an embodiment of the present invention;
[0042] Figure 3 is a schematic diagram of a wide-range impulse current measuring device provided by an embodiment of the present invention;
[0043] Figure 4 is a schematic diagram of a ring data storage device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0044] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the protection scope of the present invention. Example
[0045] like Figure 1 As shown, the present invention provides a wide-range impulse current measurement method, comprising:
[0046] Obtaining first-gear A / D sampling data, second-gear A / D sampling data, and third-gear A / D sampling data generated when the arrester is subjected to an impact current, wherein the first-gear A / D sampling data, the second-gear A / D sampling data, and the third-gear A / D sampling data are different sampling data corresponding to voltages formed by different voltage divisions after the arrester is subjected to an impact current;
[0047] Compare the respective A / D maximum sampling values in the first gear A / D sampling data, the second gear A / D sampling data and the third gear A / D sampling data with the A / D maximum sampling value corresponding to the zero potential, and determine whether the impact current corresponding to the first gear A / D sampling data, the second gear A / D sampling data and the third gear A / D sampling data is positive or negative;
[0048] The best A / D sampling data is selected according to the respective A / D maximum sampling values of the first-gear A / D sampling data, the second-gear A / D sampling data and the third-gear A / D sampling data and the positive and negative of the corresponding impact current;
[0049] The circuit data of each voltage-dividing circuit and the performance data of the transformer are obtained, and the peak value of the inrush current is calculated based on the optimal A / D sampling data, the circuit data of the corresponding voltage-dividing circuit and the performance data of the transformer.
[0050] The present invention measures the wide-range impact current by means of a graded measurement method, finds the gear most suitable for the impact current from three gears and then calculates its peak value, which is equivalent to reducing the range of each gear, thereby realizing accurate measurement of the wide-range impact current; and the potential is translated by a voltage divider circuit, so that the ARM chip can also perform A / D acquisition when the impact current is a negative signal, thereby improving the adaptability of the measurement method and improving the measurement accuracy under the negative signal condition. Example
[0051] like Figure 1 As shown, the present invention provides a wide-range impulse current measurement method, comprising:
[0052] S1. Collect and obtain the first-level A / D sampling data, the second-level A / D sampling data and the third-level A / D sampling data generated when the lightning arrester is subjected to the impact current. The first-level A / D sampling data, the second-level A / D sampling data and the third-level A / D sampling data are respectively collected by the first-level voltage divider circuit, the second-level voltage divider circuit and the third-level voltage divider circuit connected in parallel on the current acquisition unit to collect the sampling resistor connected to the lightning arrester. The sampling resistor is connected to the lightning arrester through a mutual inductor. The lightning arrester is the lightning arrester impacted by the impact current to be measured. The potential is shifted in each voltage divider circuit to realize the impact current measurement under the negative signal condition.
[0053] The resistances of the first-level voltage-dividing circuit, the second-level voltage-dividing circuit and the third-level voltage-dividing circuit are different, that is, different voltage-dividing resistors are used for the voltage-dividing circuits.
[0054] S2. Determine the level of the inrush current.
[0055] S2-1. Calculate the maximum A / D sampling value of each gear (first gear A / D sampling data, second gear A / D sampling data and third gear A / D sampling data), and determine the positive or negative of the corresponding impact current according to the maximum A / D sampling value.
[0056] Since the impact current may be positive or negative, the potential is shifted in each voltage divider circuit, and the A / D maximum sampling value of zero potential is shifted to 2048; therefore, if the A / D maximum sampling value is greater than 2048, the corresponding impact current is positive, and if the A / D maximum sampling value is less than 2048, the corresponding impact current is negative.
[0057] S2-2. According to the maximum A / D sampling value and the positive or negative value of the corresponding impact current, determine which gear is most suitable for calculating the impact current.
[0058] For positive surge current:
[0059] First, check the A / D maximum sampling value in the second-level A / D sampling data. If the A / D maximum sampling value in the second-level A / D sampling data is greater than 3800, and 3800 is the first sampling threshold, the corresponding impact current is a large positive impact current. It is most appropriate to use the third-level A / D sampling data to calculate the impact current, and use the third-level A / D sampling data as the best-level A / D sampling data.
[0060] If 2344≤the maximum A / D sampling value in the second-gear A / D sampling data≤3800, 2344 is the second sampling threshold, and the second-gear A / D sampling data should be used to calculate the impact current most appropriately, and the second-gear A / D sampling data is used as the best-gear A / D sampling data;
[0061] If 2048<the A / D maximum sampling value in the second-level A / D sampling data<2344, the corresponding impact current is a small forward impact current. It is most appropriate to use the first-level A / D sampling data to calculate the impact current, and the first-level A / D sampling data is used as the best-level A / D sampling data.
[0062] For negative surge current:
[0063] First, check the A / D maximum sampling value in the second-level A / D sampling data. If the A / D maximum sampling value in the second-level A / D sampling data is less than 296, and 296 is the fourth sampling threshold, the corresponding impact current is a negative large impact current. It is most appropriate to use the third-level A / D sampling data to calculate the impact current, and use the third-level A / D sampling data as the best-level A / D sampling data.
[0064] If 296≤the maximum A / D sampling value in the second-gear A / D sampling data≤1752, 1752 is the third sampling threshold, and the second-gear A / D sampling data should be used to calculate the impact current most appropriately, then the second-gear A / D sampling data is used as the best-gear A / D sampling data;
[0065] If 1752<the A / D maximum sampling value in the second-level A / D sampling data<2048, the corresponding impact current is a small negative impact current. It is most appropriate to use the first-level A / D sampling data to calculate the impact current, and the first-level A / D sampling data should be used as the best-level A / D sampling data.
[0066] S3. Obtain circuit data of each voltage-dividing circuit and performance data of the transformer, and calculate the peak value of the impact current based on the best-grade A / D sampling data, the circuit data of the corresponding voltage-dividing circuit, and the performance data of the transformer.
[0067] S3 is calculated by the following formula:
[0068] ;
[0069] Among them, i max is the peak value of the inrush current, R x It is the first sampling resistance value corresponding to the output voltage of the transformer in the voltage divider circuit input to the negative terminal of the operational amplifier. R y It is the second sampling resistance value corresponding to the transformer output voltage in the voltage divider circuit input to the negative terminal of the operational amplifier. AD max It is the maximum sampling value of A / D in the best-grade A / D sampling data. AD REF is the reference voltage sampling value in the corresponding voltage divider circuit, V AD is the ADC power supply voltage in the corresponding voltage divider circuit, K is the mutual inductance coefficient of the transformer. Example
[0070] like Figure 3 As shown, the present invention provides a wide-range impulse current measuring device, including: a through-type Hall current transformer, a sampling resistor R1, a first-level voltage divider circuit, a second-level voltage divider circuit, a third-level voltage divider circuit, an ARM chip, a ring-shaped data storage device and a data processing unit. The ARM chip transmits the collected data to the data storage device for storage, and the data processing unit is used to execute the method provided in Example 1 / Example 2 according to the data transmitted from the data storage device.
[0071] like Figure 3As shown, CT1 is a through-type Hall current transformer. The output line at the lower end of the arrester passes through the through-type Hall current transformer and is connected to the protective ground ( Figure 3 PE in the figure), the secondary of the through-type Hall current transformer is connected to the sampling resistor R1. To prevent the large impact current from damaging the sampling resistor R1, the sampling resistor R1 adopts a large-capacity standard resistor made of constantan. One end of the sampling resistor R1 is respectively connected to the sampling input terminal resistor R2, the resistor R11, and the resistor R18 of the first-level voltage divider circuit, the second-level voltage divider circuit, and the third-level voltage divider circuit.
[0072] The first voltage divider circuit includes resistors R2, R3, R4, R5, R6, R7 and an operational amplifier U1. One end of resistor R2 is connected to the sampling resistor R1, and the other end is connected to resistors R3, R6 and R7 respectively. The other end of resistor R3 is connected to the reference voltage VREF, the other end of resistor R6 is grounded, and the other end of resistor R7 is connected to the positive input terminal of the operational amplifier U1 ( Figure 3 3 port of U1), one end of resistor R4 and resistor R5 are connected to the negative input terminal of operational amplifier U1 ( Figure 3 The other end of the resistor R5 is grounded, and the other end of the resistor R4 is connected to the output of the operational amplifier U1 ( Figure 3 The resistance of resistors R4 and R5 are the same, and the output of operational amplifier U1 is connected to the ARM chip ( Figure 3 The first A / D acquisition interface (U5) Figure 3 A / D_CH1 in the figure), operational amplifier U1 is used to shift the potential in the first-level voltage divider circuit (operational amplifier U1 has no amplification effect, it only shifts the potential to VREF), so that the ARM chip can also perform A / D acquisition under negative signal conditions.
[0073] Figure 3 Ports 2 and 5 of operational amplifier U1 are two power supply ports.
[0074] The second voltage divider circuit includes resistors R8, R9, R10, R11, R12, R13 and operational amplifier U2. One end of resistor R11 is connected to sampling resistor R1, and the other end is connected to resistors R8, R12 and R13 respectively. The other end of resistor R8 is connected to reference voltage VREF, the other end of resistor R12 is grounded, and the other end of resistor R13 is connected to the positive input terminal of operational amplifier U2 ( Figure 3 3 port of U2), one end of resistor R9 and one end of resistor R10 are connected to the negative input terminal of operational amplifier U2 ( Figure 3 The other end of the resistor R10 is connected to the ground, and the other end of the resistor R9 is connected to the output end of the operational amplifier U2 ( Figure 3The resistance of resistor R9 and resistor R10 is the same, and the output of operational amplifier U2 is connected to the second A / D acquisition interface of the ARM chip ( Figure 3 A / D_CH2 in the figure), operational amplifier U2 is used to shift the potential in the second voltage divider circuit (operational amplifier U2 has no amplification effect, it only shifts the potential to VREF), so that the ARM chip can perform A / D acquisition even in the case of negative signals.
[0075] Figure 3 Ports 2 and 5 of operational amplifier U2 are two power supply ports.
[0076] The third voltage divider circuit includes resistors R14, R16, R17, R18, R19, R20 and an operational amplifier U3. One end of resistor R18 is connected to the sampling resistor R1, and the other end is connected to resistors R14, R19 and R20 respectively. The other end of resistor R14 is connected to the reference voltage VREF, the other end of resistor R19 is grounded, and the other end of resistor R20 is connected to the positive input terminal of the operational amplifier U3 ( Figure 3 3 port of U3 in the middle), one end of resistor R16 and one end of resistor R17 are connected to the negative input terminal of operational amplifier U3 ( Figure 3 The other end of the resistor R16 is grounded, and the other end of the resistor R17 is connected to the output end of the operational amplifier U3 ( Figure 3 The resistance of resistor R16 and resistor R17 is the same, and the output of operational amplifier U3 is connected to the third A / D acquisition interface of ARM chip ( Figure 3 A / D_CH3 in the figure), operational amplifier U3 is used to shift the potential in the third-level voltage divider circuit (operational amplifier U3 has no amplification effect, it only shifts the potential to VREF), so that the ARM chip can perform A / D acquisition even in the case of negative signals.
[0077] Figure 3 Ports 2 and 5 of operational amplifier U3 are two power supply ports.
[0078] The two ends of the sampling resistor R1 are also connected to the two AC input terminals of the rectifier bridge D1 ( Figure 3 The positive output terminal of the rectifier bridge D1 ( Figure 3 D1 port 3) is connected to the negative terminal of the voltage comparator U4 ( Figure 3 U4 port 1), the negative output terminal of the rectifier bridge D1 ( Figure 3 The reference voltage VREF is divided by resistors R22 and R23 and connected to the positive input terminal ( Figure 3 3 port of U4) is connected to the output of the voltage comparator U4 ( Figure 3Port 4 of U4 in the chip is connected to the external event interrupt interface EXTI1 of the ARM chip.
[0079] Figure 3 Ports 2 and 5 of the medium voltage comparator U4 are two power supply ports.
[0080] In this embodiment, the transformer adopts a through-type Hall current transformer, and the lower lead of the lightning arrester passes through the through-type Hall current transformer. The hysteresis and saturation phenomena of other transformers will not occur, thereby not affecting the measurement accuracy. The secondary output of the through-type Hall current transformer is connected to a 0.1Ω sampling resistor R1 to sample the impact current at a ratio of 1:5000, that is, when the impact current is 100A, the voltage coupled by the secondary output of the through-type Hall current transformer is 0.1Ω*100A / 5000=2mV; when the impact current is 100kA, the secondary output coupling voltage of the through-type Hall current transformer is 2V.
[0081] Figure 2 The figure shows the relationship between the secondary output voltage and time of the through-type Hall current transformer. In the figure, t0 indicates the starting time of the impact current, t1 indicates the time when the impact current reaches the voltage comparator level flipping, t2 indicates the time when it reaches 75% of the peak (the typical 8 / 20μS impact current is 8μS), t3 indicates the time when it reaches the peak, t4 indicates the time when it drops below 25% (the impact current requirement is 20μS), V1 indicates the voltage when the through-type Hall current transformer output voltage reaches the voltage that causes the voltage comparator to flip, V2 indicates the voltage when the through-type Hall current transformer output voltage reaches 75% of the peak, and V3 indicates the voltage when the through-type Hall current transformer output voltage reaches the maximum voltage.
[0082] A / D sampling was performed using a DMA ring data memory and a three-channel continuous cycle scanning method. The single A / D sampling time was <200nS, and the resolution was 12-bit ARM chip for analog sampling (12-bit A / D maximum 4095). Because there was no interruption due to a lightning strike, the collected data was overwritten.
[0083] When the voltage comparator U4 detects the impact current, a lightning event interrupt occurs, and the timer in the ARM chip is immediately started. After sampling for a period of time, the timer triggers an interrupt, stops A / D sampling, and calculates the impact current peak value according to the method provided in Example 2, specifically using the following formula for calculation:
[0084] ;
[0085] Among them, i max is the peak value of the inrush current, R xIt is the first sampling resistance value corresponding to the output voltage of the transformer in the voltage divider circuit input to the negative terminal of the operational amplifier. R y It is the second sampling resistance value corresponding to the transformer output voltage in the voltage divider circuit input to the negative terminal of the operational amplifier. AD max It is the maximum sampling value of A / D in the best-grade A / D sampling data. AD REF is the reference voltage sampling value in the corresponding voltage divider circuit, V AD is the ADC power supply voltage in the corresponding voltage divider circuit (3.3V in this embodiment), K is the mutual inductance coefficient of the transformer (5000 in this embodiment), R c is the resistance value of the sampling resistor connected to the secondary output of the through-hole Hall current transformer (0.1Ω in this embodiment). Among them, in the first voltage divider circuit, R x is the resistance value of resistor R4, R y is the resistance value of resistor R5; in the second voltage divider circuit, R x is the resistance value of resistor R9, R y is the resistance value of resistor R10; in the third voltage divider circuit, R x is the resistance value of resistor R16, R y is the resistance value of resistor R17.
[0086] The number of groups of A / D sampling data n=( K 1 / 2) / 3, total sampling time T=n×3×V, number of sampling groups before interrupt sampling occurs ;in, K 1 is the capacity of the circular data memory, storing each A / D sampling value occupying 2 bytes; V is the A / D sampling speed of each channel, in μS; T1 is the time when the interrupt sampling occurs.
[0087] In this embodiment, different voltage-dividing resistors are used for grading, and an operational amplifier is used for potential shifting, so that the sampling voltage is between 0 and 3.3 V, ensuring that the ARM chip can perform measurement; the ARM main chip samples the three channels through DMA mode, and puts the sampled data into a ring data memory. The required capacity of the ring data memory is determined by the sampling speed and the sampling time, such as Figure 4As shown in the figure, if the sampling speed is 100nS and the sampling time is 100μS, the capacity of the ring data memory is 100μS / 0.1μS=1000, each data is 2 bytes, that is, the capacity is 2k bytes, and 333 sets of data are collected in each channel. The 333 sets of data collected by the third channel correspond to Figure 4 The 3rd gear group 1, the 3rd gear group 2, the 3rd gear group 3, ..., the 3rd gear group 83, ..., the 3rd gear group 333, such as Figure 4 As shown, 83 groups of data (the first group of 3rd gear, the second group of 3rd gear, the third group of 3rd gear, ..., the 83rd group of 3rd gear) are sampled for 25μS before the external event interrupt occurs, which fully meets the acquisition requirements of the conventional impulse current 8 / 20μS peak current; Figure 4 In the figure, gear 3 refers to the third channel, and gear 3 group 1, gear 3 group 2, gear 3 group 3, ..., gear 3 group 83, ..., gear 3 group 333 correspond to gear 3 A / D sampling data, that is, to data collected by the third sampling resistor through the third gear voltage divider circuit.
[0088] The ARM chip has configured the voltage comparator flip external event interrupt and 75μS timer interrupt. When a surge current occurs, when the surge voltage exceeds the flip voltage of the voltage comparator U4, the ARM chip receives the surge current external event interrupt signal and immediately starts the 75μS timer. After 75μS, a timer interrupt is generated and the A / D sampling is immediately stopped. In other words, the A / D sampled data at this time includes the data of the 25μS before the timer starts (t1) and the 75μS time when the timer works (after t1). The first 100μS sampling data is re-sorted, 3*n units are the first-level A / D sampling data, 3*n+1 units are the second-level A / D sampling data, and 3*n+2 units are the third-level A / D sampling data.
[0089] If the range of the impulse current measurement is 50A~200kA, the measurement accuracy is required to be better than 5%. The A / D sampling accuracy is 12bit.
[0090] Assuming that 1 bit is used to remove the instability of A / D sampling and 1 bit is used as the repetition of each gear, the accuracy of A / D sampling can be guaranteed to be 10 bits. The gear is calculated starting from the minimum impact current, and each gear must have a certain repetition range with the adjacent smaller gear and larger gear.
[0091] To ensure the accuracy of sampling the minimum inrush current of 50A, the sampling resolution of each A / D (i.e. each bit) should be less than 2.5A. Assuming that the gear is 2A / bit, the maximum accurate sampling of this gear is 2A×2^10=2048A.
[0092] Assuming that the gear adjacent to the minimum gear starts measuring from 2kA, the sampling resolution of each A / D should be less than 40A. Assuming that the gear is 30A / bit, the maximum accurate sampling rate of this gear is 30A×2^10=30720A.
[0093] Assuming that the gear adjacent to the previous gear starts measuring from 30kA, the sampling resolution of each A / D should be less than 600A. Assuming that the gear is 400A / bit, the maximum accurate sampling rate of this gear is 400A×2^10=409600A.
[0094] Through the above calculation, using 12-bit A / D for measurement, the three gears can meet the impulse current amplitude of 50A~200kA, and the accuracy requirement is 5%.
[0095] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.
[0096] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0097] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0098] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0099] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A wide range impulse current measurement method, characterized in that: include: Obtaining first-gear A / D sampling data, second-gear A / D sampling data, and third-gear A / D sampling data generated when the arrester is subjected to an impact current, wherein the first-gear A / D sampling data, the second-gear A / D sampling data, and the third-gear A / D sampling data are different sampling data corresponding to voltages formed by different voltage divisions after the arrester is subjected to an impact current; Compare the A / D maximum sampling value in each file of A / D sampling data with the A / D maximum sampling value corresponding to zero potential to determine whether the impact current corresponding to each file of A / D sampling data is positive or negative; The best A / D sampling data is selected according to the maximum A / D sampling value in each A / D sampling data and the positive and negative of the corresponding impact current; Obtain circuit data of each voltage-dividing circuit and performance data of the transformer, and calculate the peak value of the inrush current based on the best-grade A / D sampling data, the circuit data of the corresponding voltage-dividing circuit, and the performance data of the transformer; The voltage formed by different voltage divisions also undergoes potential shift during the voltage division process, and the zero potential also undergoes a shift. The A / D maximum sampling value corresponding to the zero potential is a positive preset value.
2. The wide-range impulse current measurement method according to claim 1, characterized in that: The step of comparing the A / D maximum sampling value in each file of A / D sampling data with the A / D maximum sampling value corresponding to the zero potential to determine whether the impact current corresponding to each file of A / D sampling data is positive or negative includes: Compare the A / D maximum sampling value in the first gear of A / D sampling data with the A / D maximum sampling value corresponding to the zero potential. If the A / D maximum sampling value in the first gear of A / D sampling data is larger, the impact current corresponding to the first gear of A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to the zero potential is larger, the impact current corresponding to the first gear of A / D sampling data is a negative impact current. Compare the A / D maximum sampling value in the second gear A / D sampling data with the A / D maximum sampling value corresponding to the zero potential. If the A / D maximum sampling value in the second gear A / D sampling data is larger, the impact current corresponding to the second gear A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to the zero potential is larger, the impact current corresponding to the second gear A / D sampling data is a negative impact current. Compare the A / D maximum sampling value in the third-level A / D sampling data with the A / D maximum sampling value corresponding to zero potential. If the A / D maximum sampling value in the third-level A / D sampling data is larger, the impact current corresponding to the third-level A / D sampling data is a positive impact current. If the A / D maximum sampling value corresponding to zero potential is larger, the impact current corresponding to the third-level A / D sampling data is a negative impact current.
3. The wide range impulse current measurement method according to claim 1, characterized in that: The maximum A / D sampling value corresponding to the zero potential is 2048.
4. The wide-range impulse current measurement method according to claim 1, characterized in that: The first-gear A / D sampling data, the second-gear A / D sampling data and the third-gear A / D sampling data are obtained through A / D acquisition, and the A / D acquisition is implemented by a current acquisition unit, and the current acquisition unit is an ARM chip.
5. The wide-range impulse current measurement method according to claim 1, characterized in that: The method of selecting the best A / D sampling data according to the maximum A / D sampling value in each A / D sampling data and the positive and negative of the corresponding impact current includes: For positive surge current: If the A / D maximum sampling value in the second-grade A / D sampling data is greater than the first sampling threshold, the third-grade A / D sampling data is used as the best-grade A / D sampling data; If the second sampling threshold ≤ the A / D maximum sampling value in the second-grade A / D sampling data ≤ the first sampling threshold, the second-grade A / D sampling data is used as the best-grade A / D sampling data; If the A / D maximum sampling value corresponding to the zero potential is less than the A / D maximum sampling value in the second-grade A / D sampling data and less than the second sampling threshold, the first-grade A / D sampling data is used as the best-grade A / D sampling data; For negative surge current: If the A / D maximum sampling value in the second-grade A / D sampling data is less than the fourth sampling threshold, the third-grade A / D sampling data is used as the best-grade A / D sampling data; If the fourth sampling threshold ≤ the A / D maximum sampling value in the second-grade A / D sampling data ≤ the third sampling threshold, the second-grade A / D sampling data is used as the best-grade A / D sampling data; If the third sampling threshold value is less than the A / D maximum sampling value in the second-grade A / D sampling data and less than the A / D maximum sampling value corresponding to the zero potential, the first-grade A / D sampling data is used as the best-grade A / D sampling data.
6. The wide-range impulse current measurement method according to claim 1, characterized in that: The peak value of the inrush current is calculated based on the best-grade A / D sampling data, the circuit data of the corresponding voltage divider circuit, and the performance data of the transformer, using the following formula: ; Among them, i max is the peak value of the inrush current, R x It is the first sampling resistance value corresponding to the output voltage of the transformer in the voltage divider circuit input to the negative terminal of the operational amplifier. R y It is the second sampling resistance value corresponding to the transformer output voltage in the voltage divider circuit input to the negative terminal of the operational amplifier. AD max It is the maximum sampling value of A / D in the best-grade A / D sampling data. AD REF is the reference voltage sampling value in the corresponding voltage divider circuit, V AD is the ADC power supply voltage in the corresponding voltage divider circuit, K is the mutual inductance coefficient of the transformer, R c It is the resistance value of the sampling resistor connected to the secondary output of the transformer.
7. A wide range impulse current measuring device, characterized in that: include: A through-type Hall current transformer, a sampling resistor R1, a plurality of parallel voltage divider circuits, an ARM chip, a voltage comparator U4, a data storage device and a data processing unit, wherein the ARM chip transmits the collected data to the data storage device for storage, and the data processing unit is used to execute the method according to any one of claims 1 to 6 according to the data transmitted from the data storage device; The plurality of parallel voltage-dividing circuits include a first-gear voltage-dividing circuit, a second-gear voltage-dividing circuit and a third-gear voltage-dividing circuit connected in parallel on the ARM chip, and each voltage-dividing circuit is provided with a potential shifting unit for shifting the potential in the voltage-dividing circuit; A through-type Hall current transformer is arranged around the lower output line of the arrester, the arrester is the arrester impacted by the impact current to be measured, the lower output line passes through the through-type Hall current transformer and is connected to the protective ground, and the secondary of the through-type Hall current transformer is connected to the sampling resistor R1; The sampling resistor R1 is respectively connected to the first-level voltage-dividing circuit, the second-level voltage-dividing circuit, the third-level voltage-dividing circuit and the voltage comparator U4, and the voltage comparator U4 is connected to the ARM chip; When the voltage comparator U4 detects that there is an impact current, it sends a start sampling instruction to the ARM chip, and the ARM chip starts sampling. When the voltage comparator U4 detects that the voltage at the sampling resistor R1 exceeds the preset flip voltage, it sends an interrupt instruction to the ARM chip, and the ARM chip interrupts sampling after a preset time.
8. The wide-range impulse current measuring device according to claim 7, characterized in that: The first-grade voltage-dividing circuit comprises a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and an operational amplifier U1, one end of the resistor R2 is connected to the sampling resistor R1, and the other end is respectively connected to the resistors R3, R6 and R7, the other end of the resistor R3 is connected to the reference voltage, the other end of the resistor R6 is grounded, the other end of the resistor R7 is connected to the positive input end of the operational amplifier U1, one end of the resistor R4 and the resistor R5 is connected to the negative input end of the operational amplifier U1, the other end of the resistor R5 is grounded, the other end of the resistor R4 is connected to the output end of the operational amplifier U1, the resistors R4 and R5 have the same resistance value, the output end of the operational amplifier U1 is connected to the first A / D acquisition interface of the ARM chip, and the operational amplifier U1 is used to translate the potential in the first-grade voltage-dividing circuit; The second-level voltage-dividing circuit includes a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and an operational amplifier U2, one end of the resistor R11 is connected to the sampling resistor R1, and the other end is respectively connected to the resistor R8, the resistor R12 and the resistor R13, the other end of the resistor R8 is connected to the reference voltage, the other end of the resistor R12 is grounded, the other end of the resistor R13 is connected to the positive input end of the operational amplifier U2, one end of the resistor R9 and the resistor R10 are connected to the negative input end of the operational amplifier U2, the other end of the resistor R10 is grounded, the other end of the resistor R9 is connected to the output end of the operational amplifier U2, the resistor R9 and the resistor R10 have the same resistance value, the output end of the operational amplifier U2 is connected to the second A / D acquisition interface of the ARM chip, and the operational amplifier U2 is used to translate the potential in the second-level voltage-dividing circuit; The third-level voltage-dividing circuit includes resistor R14, resistor R16, resistor R17, resistor R18, resistor R19, resistor R20 and operational amplifier U3, one end of resistor R18 is connected to sampling resistor R1, and the other end is respectively connected to resistor R14, resistor R19 and resistor R20, the other end of resistor R14 is connected to the reference voltage, the other end of resistor R19 is grounded, the other end of resistor R20 is connected to the positive input end of operational amplifier U3, one end of resistor R16 and resistor R17 is connected to the negative input end of operational amplifier U3, the other end of resistor R16 is grounded, the other end of resistor R17 is connected to the output end of operational amplifier U3, the resistance values of resistor R16 and resistor R17 are the same, the output end of operational amplifier U3 is connected to the third A / D acquisition interface of ARM chip, and operational amplifier U3 is used to translate the potential in the third-level voltage-dividing circuit.
9. The wide-range impulse current measuring device according to claim 7, characterized in that: It also includes a rectifier bridge D1, a resistor R22 and a resistor R23. The two ends of the sampling resistor R1 are also connected to the two AC input ends of the rectifier bridge D1 respectively. The positive output end of the rectifier bridge D1 is connected to the negative input end of the voltage comparator U4. The negative output end of the rectifier bridge D1 is grounded. One end of the resistor R22 and the resistor R23 is connected to the positive input end of the voltage comparator U4. The other end of the resistor R22 is connected to the reference voltage. The other end of the resistor R23 is grounded. The output end of the voltage comparator U4 is connected to the external event interrupt interface of the ARM chip.
10. The wide-range impulse current measuring device according to claim 7, characterized in that: The data memory is a ring-shaped data memory.
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