Three-dimensional stacked chip multi-layer lead bonding packaging method

Abstract

The invention provides a three-dimensional stacked chip multi-layer lead bonding packaging method, which comprises the following steps: selecting materials such as silicon, ceramic, aluminum nitride, aluminum oxide or glass as substrate materials, designing and manufacturing to obtain an adapter plate, cutting the adapter plate by using a full-automatic abrasive wheel cutting machine, and packaging the three-dimensional stacked chip multi-layer lead. The cut adapter plate units are combined with passive devices such as resistance-capacitance-inductance devices or active chips according to requirements to reduce the interconnection distance, conductive adhesives or welding fluxes are used for being connected with the bonding areas, and finally circuit interconnection is achieved through the positions of leads and bonding points. According to the invention, the bonding positions are mutually raised by using the adapter plate to realize multi-layer staggered stacking, so that the bonding difficulty of height difference and mutual process interference are reduced, and the problem of interconnection density of multi-layer lead bonding and the problem of stability control of various lead arcs after chips are stacked can be solved.

Description

Technical Field

[0001] The invention relates to a multi-layer wire bonding method for three-dimensional stacked chips, which can realize high-density chip stacking packaging in the field of integrated circuits and belongs to the technical field of three-dimensional integrated packaging. Background Art

[0002] High-density multi-layer wire bonding technology achieves higher signal and power density by stacking multiple layers of chips on a substrate for bonding. The main types of stacking include pyramid stacking, cantilever stacking, parallel stacking, etc. Figure 4 , 5 As shown in Figure 6, there are two main traditional stacking bonding methods. One is to stack the chips, with the first solder joint of the lead on the chip, and the second solder joints all falling on the substrate plane; the other is to design the tube shell into a step shape, and the second solder joints fall on the steps respectively. The span of the first wire bonding wire increases with the increase of the number of stacked layers and the number of pads. A maximum of two layers can be stacked, which exceeds the appropriate process window and affects the reliability of product interconnection. The second step-shaped tube shell has a lower yield, increased process difficulty, and higher cost, which is not conducive to mass production. At this stage, integrated circuits are developing in the direction of miniaturization, high density, and high complexity, resulting in an increasing number of chip stacking layers. The traditional wire bonding method can no longer meet the needs of the current development stage. Summary of the invention

[0003] The technical problem solved by the present invention is to overcome the limitation that the number of stacking layers does not exceed three layers brought about by the existing stacking method, provide a low-cost chip three-dimensional stacking multi-layer wire bonding method, achieve high-stability control of the bonding arc, improve the wire bonding yield, and increase the product qualification rate.

[0004] The technical solution of the present invention is: a three-dimensional stacked chip multi-layer wire bonding packaging method, comprising:

[0005] Make an adapter board for packaging;

[0006] Cutting the fabricated adapter plate to form a cutting unit;

[0007] Debonding and sorting the cut transfer plates;

[0008] Bond or sinter the new adapter board that meets the requirements and the resistor, capacitor and inductor components to the cut units on the adapter board after debonding and sorting according to the circuit layout;

[0009] Bonding or sintering the new interposer and chip to the substrate and curing;

[0010] Set bonding machine parameters and perform wire bonding programming according to design requirements;

[0011] Use a fully automatic bonding machine to complete wire bonding and product packaging.

[0012] The adapter plate has a thickness of 0.15 mm to 0.6 mm; its shape includes rectangular, square, circular, oval, and thumb-shaped; and its manufacturing material is silicon, ceramic, aluminum nitride, aluminum oxide, or glass.

[0013] The metallization coatings on both sides of the adapter plate are selected from Au, Al, Ni / Pb / Au, and the metallization thickness is designed to be 2μm-3μm.

[0014] The adapter board is provided with a circuit connection via hole, which has a size of 0.1mm-0.2mm; the distance between the circuit connection via hole and the edge of the adapter board is 1mm-1.5mm.

[0015] The manufacturing process of the adapter plate is as follows: silicon or ceramic or aluminum nitride or aluminum oxide or glass is used as the substrate material, and through holes are punched on both sides by laser etching or wet etching. A two-step metal seed layer method is used on the basis of the through-hole adapter plate, that is, plasma surface activation is first performed, and then magnetron sputtering is performed to achieve continuous full coverage of the surface metal; then vacuum wet activation is performed and the principle of chemical copper plating reaction is used to achieve continuous full coverage of the metal seed layer on the inner side wall of the hole, and at the same time, continuous full coverage of the metal seed layer on the surface and the inner side wall of the hole is achieved, and finally the metallization of both sides of the adapter plate is completed by pulse electroplating filling.

[0016] The produced adapter plate is cut to form a cutting unit, including: bonding the adapter plate to a 6 / 8 / 12 inch collapse ring with a UV film / blue film, using a fully automatic grinding wheel dicing machine to select a 0.1mm-0.6mm thickness blade to cut the designed and produced panel adapter plate according to the designed interval to form a cutting unit.

[0017] The debonding and sorting of the cut adapter plate includes: after cleaning the adapter plate, putting it into a UV debonding machine for debonding, the debonding time is 30 to 50 seconds, and after debonding, using a full-automatic grain sorting machine to sort the adapter plate units to obtain a new adapter plate that meets the requirements.

[0018] The new adapter board and the chip are bonded or sintered on the substrate, including: the new adapter board is stacked in parallel or pyramid shape, the chip is stacked in pyramid shape or cantilever shape, and the corresponding chip and adapter board are bonded or sintered on the corresponding planar layer area of ​​the substrate using epoxy conductive glue or solder sheet.

[0019] The curing temperature is 100°C-150°C and the curing time is 1.5-2.5 hours.

[0020] The bonding machine parameters are set, including the number of leads and lead materials, lead arc height types, lead bonding methods, and lead bonding sequences.

[0021] The wire bonding method includes wedge bonding or ball bonding, and the wire bonding sequence is from low-arc wire to high-arc wire, and from short-projection wire to long-projection wire, and the bonding wires are arranged in the same clock direction.

[0022] When performing wire bonding programming, the arc spacing between adjacent wires should be set between 100μm and 300μm, and the maximum projection distance of the bonding wire between two points should not exceed 100 times the diameter of the wire material.

[0023] Carry out product packaging, packaging methods include parallel sealing welding, laser seam welding, fusion sealing welding, energy storage welding, potting, and plastic sealing.

[0024] The advantages of the present invention compared with the prior art are:

[0025] 1. The method of the present invention can make the number of chip stacking layers exceed three, and the volume of the multifunctional chip can be reduced after packaging, thereby improving the integration level;

[0026] 2. The present invention can place passive components such as resistors, capacitors and inductors and active chips on a high-density transfer board, thereby reducing the interconnection distance and increasing the wiring density;

[0027] 3. The method of the present invention uses a high-density adapter plate to improve the bonding reliability and stability of three or more chips on the plane layer after stacking;

[0028] 4. The high-density adapter board in the method of the present invention is made of materials such as silicon and ceramics, with simple operation procedures and low development costs, and can be adapted to the customized production of industrialized three-dimensional integrated packaging mass products. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic diagram of a specific implementation process of the present invention;

[0030] Figure 2 It is a schematic diagram of the internal structure of the adapter board;

[0031] Figure 3 Schematic diagram of the adapter board from the front and top;

[0032] Figure 4 Schematic diagram of two-layer stacking and multi-layer wire bonding of traditional substrate;

[0033] Figure 5 It is a schematic diagram of multi-layer wire bonding of a traditional single chip component;

[0034] Figure 6 Schematic diagram of double-layer stacking and multi-layer wire bonding of traditional ceramic tube shell;

[0035] Figure 7 It is a schematic diagram of the specific implementation of bonding and sintering of a chip or an adapter board and resistors, capacitors and inductors on the adapter board;

[0036] Figure 8 Schematic diagram of multi-layer wire bonding after three-layer chip stacking on a plastic package substrate;

[0037] Fig. 9 Schematic diagram of multi-layer wire bonding after three layers of chips are stacked on a ceramic board;

[0038] Fig.10 It is a schematic diagram of the specific implementation of cantilever stacked multi-layer wire bonding; DETAILED DESCRIPTION

[0039] like Figure 1 As shown, the present invention provides a three-dimensional stacked chip multi-layer wire bonding packaging method, the steps are:

[0040] 1. Adapter board design

[0041] The design of the adapter plate shall meet the following conditions:

[0042] The thickness of the adapter plate is 0.15mm-0.6mm (based on the thickness of conventional chips);

[0043] The shapes of the transfer plates include rectangular, square, circular, oval, and thumb-shaped (with the substrate circuit bonding finger as a reference);

[0044] The metallization coatings on both sides of the transfer board are selected as Au, Al, Ni / Pb / Au, and the metallization thickness is designed to be 2μm-3μm (with the substrate circuit bonding material as a reference);

[0045] The adapter board is provided with a circuit connection via hole, the size of which is 0.1mm-0.2mm; the distance between the circuit connection via hole and the edge of the adapter board is 1mm-1.5mm; (the size and distance of the substrate circuit bonding finger are used as a reference)

[0046] The adapter plate design can be used to splice the required graphics, with a single-piece spacing of 0.1mm-0.6mm (based on the blade that can be installed on the fully automatic grinding wheel dicing machine);

[0047] The material of the adapter plate is silicon, ceramic, aluminum nitride, aluminum oxide or glass;

[0048] 2. Adapter board production

[0049] like Figure 2 , Figure 3As shown, a transfer plate is designed according to the requirements of step one, and then silicon or ceramic or aluminum nitride or aluminum oxide or glass is used as the substrate material, and through holes are punched by laser etching or wet etching to obtain through holes on both sides. A two-step metal seed layer method is adopted on the basis of the through-hole transfer plate, that is, plasma surface activation is first performed, and then magnetron sputtering is used to coat the film to achieve continuous full coverage of the surface metal, and then vacuum wet activation is performed and the principle of chemical copper plating reaction is used to achieve continuous full coverage of the metal seed layer on the inner side wall of the hole, and at the same time, continuous full coverage of the metal seed layer on the surface and the inner side wall of the hole is achieved, and finally the metallization of both sides of the transfer plate is completed by pulse electroplating filling;

[0050] 3. Cutting of adapter plate

[0051] Complete the adapter plate in step 2 and bond it to the 6 / 8 / 12 inch collapse ring with UV film / blue film. Use a fully automatic grinding wheel dicing machine to cut the designed and manufactured panel adapter plate according to the designed interval with a 0.1mm-0.6mm thickness blade to form a cutting unit;

[0052] 4. Clean the adapter plate after being cut by the grinding wheel dicing machine

[0053] Put the undebonded and sorted transfer board cut by the fully automatic grinding wheel dicing machine into the fully automatic cleaning machine for cleaning;

[0054] 5. Debond and sort the cleaned transfer plate

[0055] The cleaned adapter plate is placed in a UV disintegrator for disintegration for 30 to 50 seconds. After disintegration, the adapter plate units are sorted using a fully automatic grain sorter to obtain a new adapter plate that meets the requirements.

[0056] 6. Adhesion or sintering of the transfer board and the resistors, capacitors and inductors on the transfer board

[0057] like Figure 7 As shown, the new adapter board that meets the requirements in step 5 is completed, and the RC components are bonded or sintered to the adapter board according to the circuit arrangement;

[0058] 7. Chip and adapter board bonding or sintering

[0059] like Figure 8 , Fig. 9 , Fig.10 As shown, the transfer board in step 6 is stacked in parallel or pyramidal shape, the chip is stacked in pyramidal shape or cantilever shape, and epoxy conductive glue (H20E, JM7000, etc.) / solder sheet (In 97 Ag3、Sn 63 Pb 37 、In 40 Pb 60 、In25 Pb 75 、Au 80 Sn 20 etc.) bonding / sintering the corresponding chip and the multi-layer adapter plate to the corresponding plane layer area position of the substrate / tube shell;

[0060] 8. Chip and adapter board are cured after bonding

[0061] Set the curing temperature to 100℃-150℃ and the curing time to 1.5-2.5 hours, and place the bonded chip and adapter plate into the curing oven for curing;

[0062] 9. Set bonding machine parameters

[0063] According to the requirements of the drawing, confirm the number of leads and lead materials (the actual number and material of bonding leads), the type of lead arc height (the specific number of combinations of bonding height and bonding projection length), the lead bonding method (wedge welding or ball welding must be used), and the lead bonding sequence (the bonding leads must be arranged in the same clock direction from low arc leads to high arc leads and from short projection leads to long projection leads).

[0064] After completing the confirmation of bonding related information, wire bonding programming is performed according to the drawing requirements. The arc spacing between adjacent wires should be set between 100μm and 300μm, and the maximum projection distance of the bonding wire between two points should not exceed 100 times the diameter of the wire material.

[0065] 10. Use a fully automatic bonding machine to complete wire bonding and package the bonded products

[0066] The bonded products are packaged, including parallel sealing, laser seam welding, fusion sealing, energy storage welding, potting, and plastic sealing.

[0067] Example:

[0068] 1. Adapter board design

[0069] ①The thickness is designed to be 0.3mm②The pad shape is designed to be rectangular, with dimensions of 1mm*1mm, 3mm*3mm and 5mm*5mm③The metallization coating on both sides is NiPbAu / Au, with a thickness of 2μm④The size of the circuit connection via is 0.15mm, and the distance from the edge of the adapter board is 1.5mm⑤The adapter board is designed for panelization, and the single-piece spacing is 0.3mm⑥Ceramic is selected as the high-density adapter board material.

[0070] 2. Punch holes on both sides of the adapter plate by laser etching or wet etching to achieve continuous and full coverage of the metal seed layer on the surface and the inner wall of the hole, and finally complete the metallization of both sides of the adapter plate by pulse electroplating;

[0071] 3. Use UV film to bond the adapter plate to the 6-inch collapse ring, and cut it with a 0.3mm thickness blade using a grinding wheel dicing machine;

[0072] 4. Put the adapter plate into the automatic cleaning machine for cleaning;

[0073] 5. Put the cleaned adapter plate into the UV disintegrator for disintegration for 40 seconds. After disintegration, the adapter plate cutting unit that meets the requirements is obtained;

[0074] 6. Bond the adapter board to the resistors, capacitors and inductors of the adapter board according to the circuit layout;

[0075] 7. The adapter board is stacked in parallel, and the chip is stacked in a pyramid shape. The chip and the adapter board are bonded to the corresponding area of ​​the substrate using epoxy conductive adhesive H20E;

[0076] 8. Place the bonded chip and adapter plate into the curing oven, set the curing temperature to 120°C and the curing time to 2 hours;

[0077] 9. When using a fully automatic bonding machine for lead programming, the number of leads is 68, and 6 types of arch arcs are confirmed. The arc spacing of adjacent layers of leads is between 100μm and 150μm. The bonding method is gold wire ball bonding. The setting is from low-arc leads to high-arc leads, short-projection leads to long-projection leads, and the bonding leads are arranged in the same clock direction;

[0078] 10. After confirming that there is no abnormality in the machine status, run the program to perform fully automatic wire bonding; plastic seal the bonded products.

[0079] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A three-dimensional stacked chip multi-layer wire bonding packaging method, characterized in that: include: Make an adapter board for packaging; Cutting the fabricated adapter plate to form a cutting unit; Debonding and sorting the cut transfer plates; Bond or sinter the new adapter board that meets the requirements and the resistor, capacitor and inductor components to the cut units on the adapter board after debonding and sorting according to the circuit layout; Bonding or sintering the new interposer and chip to the substrate and curing; Set bonding machine parameters and perform wire bonding programming according to design requirements; Use a fully automatic bonding machine to complete wire bonding and product packaging.

2. A three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The adapter plate has a thickness of 0.15 mm to 0.6 mm; its shape includes rectangular, square, circular, oval, and thumb-shaped; and its manufacturing material is silicon, ceramic, aluminum nitride, aluminum oxide, or glass.

3. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The metallization coatings on both sides of the adapter plate are selected from Au, Al, Ni / Pb / Au, and the metallization thickness is designed to be 2μm-3μm.

4. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The adapter board is provided with a circuit connection via hole, which has a size of 0.1mm-0.2mm; the distance between the circuit connection via hole and the edge of the adapter board is 1mm-1.5mm.

5. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The manufacturing process of the adapter plate is as follows: silicon or ceramic or aluminum nitride or aluminum oxide or glass is used as the substrate material, and through holes are punched on both sides by laser etching or wet etching. A two-step metal seed layer method is used on the basis of the through-hole adapter plate, that is, plasma surface activation is first performed, and then magnetron sputtering is performed to achieve continuous full coverage of the surface metal; then vacuum wet activation is performed and the principle of chemical copper plating reaction is used to achieve continuous full coverage of the metal seed layer on the inner side wall of the hole, and at the same time, continuous full coverage of the metal seed layer on the surface and the inner side wall of the hole is achieved, and finally the metallization of both sides of the adapter plate is completed by pulse electroplating filling.

6. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The produced adapter plate is cut to form a cutting unit, including: bonding the adapter plate to a 6 / 8 / 12 inch collapse ring with a UV film / blue film, using a fully automatic grinding wheel dicing machine to select a 0.1mm-0.6mm thickness blade to cut the designed and produced panel adapter plate according to the designed interval to form a cutting unit.

7. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The debonding and sorting of the cut adapter plate includes: after cleaning the adapter plate, putting it into a UV debonding machine for debonding, the debonding time is 30 to 50 seconds, and after debonding, using a full-automatic grain sorting machine to sort the adapter plate units to obtain a new adapter plate that meets the requirements.

8. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The new adapter board and the chip are bonded or sintered on the substrate, including: the new adapter board is stacked in parallel or pyramid shape, the chip is stacked in pyramid shape or cantilever shape, and the corresponding chip and adapter board are bonded or sintered on the corresponding planar layer area of ​​the substrate using epoxy conductive glue or solder sheet.

9. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The curing temperature is 100°C-150°C and the curing time is 1.5-2.5 hours.

10. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: The bonding machine parameters are set, including the number of leads and lead materials, lead arc height types, lead bonding methods, and lead bonding sequences.

11. A three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 10, characterized in that: The wire bonding method includes wedge bonding or ball bonding, and the wire bonding sequence is from low-arc wire to high-arc wire, and from short-projection wire to long-projection wire, and the bonding wires are arranged in the same clock direction.

12. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: When performing wire bonding programming, the arc spacing between adjacent wires should be set between 100μm and 300μm, and the maximum projection distance of the bonding wire between two points should not exceed 100 times the diameter of the wire material.

13. The three-dimensional stacked chip multi-layer wire bonding packaging method according to claim 1, characterized in that: Carry out product packaging, packaging methods include parallel sealing welding, laser seam welding, fusion sealing welding, energy storage welding, potting, and plastic sealing.

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