Oscillator circuit and integrated circuit chip

Abstract

According to the oscillator circuit and the integrated circuit chip provided by the invention, the first resistor is arranged in the current generation circuit, and the corresponding first current is generated according to the temperature characteristic of the first resistor, so that a reference current circuit is replaced, and then a subsequent charge pump circuit can generate a corresponding feedback signal according to the first current and the corresponding feedback signal. A first voltage with a preset waveform is generated through a digital logic circuit, the first voltage is processed through a Schmidt trigger circuit to obtain a second voltage overturning according to a rule, and then a feedback signal with a required level and a clock signal with a preset frequency and duty ratio can be generated through the digital logic circuit. According to the oscillator circuit, the first current under the preset temperature coefficient is generated through the temperature characteristic of the first resistor to serve as the circuit working current, the problem that an output signal is greatly influenced by the temperature is solved, the first voltage is processed through the Schmitt trigger to replace a comparator and other circuit structures, and therefore the overall structure of the oscillator circuit is simplified.

Description

Technical Field

[0001] The present application relates to but is not limited to an oscillator circuit and an integrated circuit chip. Background Art

[0002] An oscillator is a device that can spontaneously emit a periodic oscillation signal after being powered on. Such devices do not require input signals, only power supply. The periodic oscillation signal generated by the oscillator circuit is usually used as the internal clock signal of the chip to provide a periodic digital input signal to analog circuits such as ADC and digital circuits.

[0003] In some embodiments, an oscillator circuit can be designed by using a resistor to generate a current and a reference voltage, and the resistor generates the operating current required for the oscillator circuit to work, and the reference voltage at the input end of the comparator inside the oscillator circuit. However, the frequency-temperature characteristics of the output signal of this type of circuit are extremely poor. The temperature coefficient of the resistor is large, and the resistance value of the resistor changes greatly with the change of temperature. The temperature coefficient of the corresponding current and the reference voltage is also large, so the temperature coefficient of the frequency of the output signal generated by the oscillator is large.

[0004] In addition, in some embodiments, an oscillator circuit can be designed using an integrator and a voltage-controlled oscillator structure, and the triangular wave signal required by the circuit is generated by the integrator, and the triangular wave signal output by the integrator controls the frequency of the voltage-controlled oscillator circuit. However, the frequency-temperature characteristics and voltage characteristics of the output signal are poor, the circuit structure is complex, and the layout area is large. The frequency of the output signal changes dramatically with changes in temperature and voltage, the frequency stability is poor, and the chip area occupied is large.

[0005] In summary, the current oscillator circuit has the problem that the circuit frequency and the duty cycle of the output signal vary greatly with the working parameters such as temperature, and the output signal is unstable. At the same time, the current oscillator circuit structure is relatively complex. Therefore, an oscillator circuit is needed to solve the problem that the output signal is greatly affected by temperature and the circuit structure is complex. Summary of the invention

[0006] The present application provides an oscillator circuit and an integrated circuit chip, which are used to solve the problem that the output signal of the current oscillator circuit is greatly affected by temperature and the circuit structure is complex.

[0007] In a first aspect, the present application provides an oscillator circuit, the circuit comprising:

[0008] A current generating circuit, the current generating circuit comprising a first resistor, the current generating circuit being used to generate a first current with a preset temperature coefficient according to the first resistor;

[0009] a charge pump circuit, wherein the charge pump circuit is used to generate a first voltage of a preset waveform according to the first current and a feedback signal;

[0010] A Schmitt trigger circuit, configured to generate a second voltage having a high level and a low level by flipping the first voltage using a Schmitt trigger;

[0011] The digital logic circuit is used to generate the feedback signal and the clock signal according to the second voltage.

[0012] As an optional implementation, the first resistor includes a resistor with a negative temperature coefficient and an absolute value of the temperature coefficient is not greater than a preset threshold.

[0013] As an optional implementation, the first resistor includes a P-type poly resistor.

[0014] As an optional implementation manner, the connection relationship of the circuit includes:

[0015] The output end of the current generating circuit is connected to the first end of the charge pump circuit, the second end of the charge pump circuit is connected to the feedback end of the digital logic circuit, the output end of the charge pump circuit is connected to the input end of the Schmitt trigger circuit, the output end of the Schmitt trigger circuit is connected to the input end of the digital logic circuit, and the output end of the digital logic circuit serves as the output end of the oscillator circuit to output the clock signal.

[0016] As an optional implementation, the current generating circuit further includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor and a seventh field effect transistor;

[0017] Among them, the first end of the first field effect tube and the first end of the second field effect tube are connected to the power supply voltage, the second end and the third end of the first field effect tube are connected, and are connected to the first end of the third field effect tube, the second end of the second field effect tube is connected to the first end of the fourth field effect tube, the third end of the second field effect tube is connected to the third end of the first field effect tube, the second end and the third end of the third field effect tube are connected, and are connected to the first end of the first resistor, the second end of the first resistor is connected to the first end of the fifth field effect tube, the second end of the fifth field effect tube is grounded, the third end of the fifth field effect tube is connected to the enable signal, the second end of the fourth field effect tube is connected to the first end of the sixth field effect tube, the first end and the third end of the sixth field effect tube are connected, the second end of the sixth field effect tube is connected to the first end of the seventh field effect tube, the first end and the third end of the seventh field effect tube are connected, the second end of the seventh field effect tube is grounded, and the third end of the sixth field effect tube and the third end of the seventh field effect tube serve as the output end of the current generating circuit.

[0018] As an optional implementation, the charge pump circuit includes an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, a sixteenth field effect transistor, a seventeenth field effect transistor and a first capacitor;

[0019] Among them, the first end of the eighth field effect tube and the first end of the ninth field effect tube are connected to the power supply voltage, the second end and the third end of the eighth field effect tube are connected, and are connected to the first end of the tenth field effect tube, the second end of the ninth field effect tube is connected to the first end of the eleventh field effect tube, the third end of the ninth field effect tube is connected to the third end of the eighth field effect tube, the second end and the third end of the tenth field effect tube are connected, the second end of the tenth field effect tube is connected to the first end of the twelfth field effect tube, the second end of the twelfth field effect tube is connected to the first end of the thirteenth field effect tube, the second end of the thirteenth field effect tube is grounded, the third end of the twelfth field effect tube is connected to the third end of the sixth field effect tube, the third end of the thirteenth field effect tube is connected to the third end of the seventh field effect tube, and the eleventh field effect tube is connected to the third end of the seventh field effect tube. The second end of the field effect tube is connected to the first end of the fourteenth field effect tube, the second end of the fourteenth field effect tube is connected to the first end of the first capacitor and serves as the output end of the charge pump circuit, the second end of the first capacitor is grounded, the third end of the fourteenth field effect tube is connected to the third end of the fifteenth field effect tube and serves as the feedback end of the charge pump circuit, the second end of the fourteenth field effect tube is connected to the first end of the fifteenth field effect tube, the second end of the fifteenth field effect tube is connected to the first end of the sixteenth field effect tube, the second end of the sixteenth field effect tube is connected to the first end of the seventeenth field effect tube, the second end of the seventeenth field effect tube is grounded, the third end of the sixteenth field effect tube is connected to the third end of the sixth field effect tube, and the third end of the seventeenth field effect tube is connected to the third end of the seventh field effect tube.

[0020] As an optional embodiment, the digital logic circuit includes an inverter group and a D flip-flop, the inverter group is used to control the logic value of the waveform according to the second voltage, and output the feedback signal at the output end of the target inverter, the output end of the inverter group is connected to the first end of the D flip-flop, the second end and the third end of the D flip-flop are connected, and the fourth end of the D flip-flop is used to output a clock signal with a duty cycle of a preset value.

[0021] As an optional implementation, the circuit further includes a filtering module, and the filtering module is used to filter out noise interference of the power supply voltage.

[0022] As an optional implementation, the filtering module includes a second capacitor and a third capacitor, the second capacitor is connected to the third ends of the first field effect transistor and the second field effect transistor, and the third capacitor is connected to the third ends of the eighth field effect transistor and the ninth field effect transistor.

[0023] In a second aspect, the present application provides an integrated circuit chip, wherein the chip comprises the oscillator circuit as described in the first aspect.

[0024] The oscillator circuit and integrated circuit chip provided by the present application generate a corresponding first current according to the temperature characteristics of the first resistor through a first resistor set in the current generating circuit, thereby replacing the reference current circuit, and then the subsequent charge pump circuit can generate a first voltage of a preset waveform according to the first current and the corresponding feedback signal, and the first voltage is processed by a Schmitt trigger circuit to obtain a second voltage that flips according to a regular pattern. Subsequently, a feedback signal of a required level and a clock signal of a preset frequency and duty cycle can be generated through a digital logic circuit. Therefore, a first current with a preset temperature coefficient is generated as the circuit working current through the temperature characteristics of the first resistor, which solves the problem that the output signal is greatly affected by temperature, and the first voltage is processed by a Schmitt trigger to replace circuit structures such as a comparator, thereby simplifying the overall structure of the oscillator circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0026] Figure 1 is a structural schematic diagram of an oscillator circuit disclosed in an embodiment of the present invention;

[0027] Figure 2 is a schematic structural diagram of another oscillator circuit disclosed in an embodiment of the present invention;

[0028] Figure 3 It is a schematic diagram of the structure of an integrated circuit chip disclosed in an embodiment of the present invention.

[0029] Reference numerals:

[0030] 101-current generating circuit; 102-charge pump circuit; 103-Schmitt trigger circuit; 104-digital logic circuit;

[0031] R1-first resistor; M1-first transistor; M2-second transistor; M3-third transistor; M4-fourth transistor; M5-fifth transistor; M6-sixth transistor; M7-seventh transistor; M8-eighth transistor; M9-ninth transistor; M10-tenth transistor; M11-eleventh transistor; M12-twelfth transistor; M13-thirteenth transistor; M14-fourteenth transistor; M15-fifteenth transistor; M16-sixteenth transistor; M17-seventeenth transistor; C1-first capacitor; C2-second capacitor; C3-third capacitor; V2-first voltage; V0-second voltage; V1-feedback signal; CLK-clock signal.

[0032] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0033] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0034] OSC, Oscillator, oscillator, a circuit that generates a periodic waveform.

[0035] An oscillator is a device that can spontaneously emit a periodic oscillation signal after being powered on. Such devices do not require input signals, only power supply. The periodic oscillation signal generated by the oscillator circuit is usually used as the internal clock signal of the chip to provide a periodic digital input signal to analog circuits such as ADC and digital circuits.

[0036] In some embodiments, an oscillator circuit can be designed by using a resistor to generate a current and a reference voltage, and the resistor generates the operating current required for the oscillator circuit to work, and the reference voltage at the input end of the comparator inside the oscillator circuit. However, the frequency-temperature characteristics of the output signal of this type of circuit are extremely poor. The temperature coefficient of the resistor is large, and the resistance value of the resistor changes greatly with the change of temperature. The temperature coefficient of the corresponding current and the reference voltage is also large, so the temperature coefficient of the frequency of the output signal generated by the oscillator is large.

[0037] In addition, in some embodiments, an oscillator circuit can be designed using an integrator and a voltage-controlled oscillator structure, and the triangular wave signal required by the circuit is generated by the integrator, and the triangular wave signal output by the integrator controls the frequency of the voltage-controlled oscillator circuit. However, the frequency-temperature characteristics and voltage characteristics of the output signal are poor, the circuit structure is complex, and the layout area is large. The frequency of the output signal changes dramatically with changes in temperature and voltage, the frequency stability is poor, and the chip area occupied is large.

[0038] In summary, the current oscillator circuit has the problem that the circuit frequency and the duty cycle of the output signal vary greatly with the working parameters such as temperature, and the output signal is unstable. At the same time, the current oscillator circuit structure is relatively complex. Therefore, an oscillator circuit is needed to solve the problem that the output signal is greatly affected by temperature and the circuit structure is complex.

[0039] The technical concept of the present application is that a first resistor is provided in a current generating circuit to generate a corresponding first current according to the temperature characteristics of the first resistor, thereby replacing a reference current circuit, and then a subsequent charge pump circuit can generate a first voltage of a preset waveform according to the first current and a corresponding feedback signal, and the first voltage is processed by a Schmitt trigger circuit to obtain a second voltage that flips according to a regular pattern, and subsequently a feedback signal of a required level and a clock signal of a preset frequency and duty cycle can be generated by a digital logic circuit, thereby generating a first current with a preset temperature coefficient as a circuit working current through the temperature characteristics of the first resistor, solving the problem that the output signal is greatly affected by temperature, and processing the first voltage by a Schmitt trigger to replace circuit structures such as a comparator, thereby simplifying the overall structure of the oscillator circuit.

[0040] See also Figure 1 , Figure 1 is a schematic diagram of the structure of an oscillator circuit disclosed in an embodiment of the present invention, such as Figure 1 As shown, the circuit includes:

[0041] A current generating circuit, the current generating circuit comprising a first resistor, the current generating circuit being used to generate a first current with a preset temperature coefficient according to the first resistor;

[0042] a charge pump circuit, wherein the charge pump circuit is used to generate a first voltage of a preset waveform according to the first current and a feedback signal;

[0043] A Schmitt trigger circuit, configured to generate a second voltage having a high level and a low level by flipping the first voltage using a Schmitt trigger;

[0044] The digital logic circuit is used to generate the feedback signal and the clock signal according to the second voltage.

[0045] A first resistor is provided in the current generating circuit, and a corresponding first current is generated according to the temperature characteristics of the first resistor, thereby replacing the reference current circuit. Then, a subsequent charge pump circuit can generate a first voltage of a preset waveform according to the first current and the corresponding feedback signal. The first voltage is processed by a Schmitt trigger circuit to obtain a second voltage that flips according to a regular pattern. Subsequently, a feedback signal of a required level and a clock signal of a preset frequency and duty cycle can be generated by a digital logic circuit. Thus, a first current with a preset temperature coefficient is generated as the circuit working current through the temperature characteristics of the first resistor, thereby solving the problem that the output signal is greatly affected by temperature. The first voltage is processed by a Schmitt trigger to replace circuit structures such as a comparator, thereby simplifying the overall structure of the oscillator circuit.

[0046] As an optional implementation, the first resistor includes a resistor with a negative temperature coefficient and an absolute value of the temperature coefficient is not greater than a preset threshold.

[0047] As an optional implementation, the first resistor includes a P-type poly resistor.

[0048] As an optional implementation manner, the connection relationship of the circuit includes:

[0049] The output end of the current generating circuit is connected to the first end of the charge pump circuit, the second end of the charge pump circuit is connected to the feedback end of the digital logic circuit, the output end of the charge pump circuit is connected to the input end of the Schmitt trigger circuit, the output end of the Schmitt trigger circuit is connected to the input end of the digital logic circuit, and the output end of the digital logic circuit serves as the output end of the oscillator circuit to output the clock signal.

[0050] Specifically, as described above, the current generating circuit can generate a low temperature coefficient current according to a low temperature coefficient resistor, and the resistor is a P-type poly resistor, which is a negative temperature coefficient resistor and has an extremely low temperature coefficient.

[0051] The charge pump circuit includes a capacitor charging and discharging unit, which controls the charging and discharging of the capacitor according to a feedback signal to generate a triangular wave signal.

[0052] Schmitt trigger circuit, flips high and low levels according to changes in input signals.

[0053] The digital logic circuit is composed of an inverter chain and a D flip-flop. After the input signal passes through the inverter, it is fed back to control the capacitor charging and discharging unit. The D flip-flop forms a two-frequency divider to improve the duty cycle stability of the output signal CLK.

[0054] A P-type poly resistor (a negative temperature resistor with a low temperature coefficient) and a current generating circuit that generates current through a resistor including a P-type poly resistor are used. A current with a low temperature coefficient is obtained by dividing the voltage difference of the resistor by the resistance value, thereby replacing a reference current circuit. The circuit has a simple structure and reduces the usage area.

[0055] The digital logic circuit feedback controls the charging and discharging of the charge pump circuit, which is repeated over and over again, so that the level of the output signal CLK is continuously flipped to form an oscillating square wave signal with a fixed period.

[0056] In some implementations, within a temperature variation range of -40°C to 150°C, the maximum deviation of the output clock signal frequency is 11 kHz, and the maximum deviation of the frequency-temperature characteristic does not exceed 3% (±1.5%).

[0057] See also Figure 2 , Figure 2 is a schematic diagram of the structure of an oscillator circuit disclosed in an embodiment of the present invention, such as Figure 2 As shown, the division of each circuit module is based on Figure 2 Specifically, the components and principles in each circuit module are as follows:

[0058] As an optional implementation, the current generating circuit further includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor and a seventh field effect transistor;

[0059] Among them, the first end of the first field effect tube and the first end of the second field effect tube are connected to the power supply voltage, the second end and the third end of the first field effect tube are connected, and are connected to the first end of the third field effect tube, the second end of the second field effect tube is connected to the first end of the fourth field effect tube, the third end of the second field effect tube is connected to the third end of the first field effect tube, the second end and the third end of the third field effect tube are connected, and are connected to the first end of the first resistor, the second end of the first resistor is connected to the first end of the fifth field effect tube, the second end of the fifth field effect tube is grounded, the third end of the fifth field effect tube is connected to the enable signal, the second end of the fourth field effect tube is connected to the first end of the sixth field effect tube, the first end and the third end of the sixth field effect tube are connected, the second end of the sixth field effect tube is connected to the first end of the seventh field effect tube, the first end and the third end of the seventh field effect tube are connected, the second end of the seventh field effect tube is grounded, and the third end of the sixth field effect tube and the third end of the seventh field effect tube serve as the output end of the current generating circuit.

[0060] After the circuit is turned on by the enable signal (ENP), the field effect tube of the circuit is turned on to generate current. The current magnitude I_current of the first field effect tube, the third field effect tube and the fifth field effect tube is equal to the voltage drop across the R_ppoly resistor divided by the resistance value of the first resistor I_current=V / R_ppoly. In a specific application scenario, the first resistor R_ppoly is a P-type poly resistor, a negative temperature coefficient resistor, and has an extremely low temperature coefficient, so I_current is a low temperature coefficient current, and the range of current magnitude changes with temperature is small. The second field effect tube and the fourth field effect tube respectively form a current mirror with the first field effect tube and the third field effect tube, so the current of the second field effect tube is proportional to the current of the first field effect tube, and it is also a low temperature coefficient current. Furthermore, the current of the seventh field effect tube is equal to the current of the second field effect tube, and it is also a low temperature coefficient current.

[0061] As an optional implementation, the charge pump circuit includes an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, a sixteenth field effect transistor, a seventeenth field effect transistor and a first capacitor;

[0062] Among them, the first end of the eighth field effect tube and the first end of the ninth field effect tube are connected to the power supply voltage, the second end and the third end of the eighth field effect tube are connected, and are connected to the first end of the tenth field effect tube, the second end of the ninth field effect tube is connected to the first end of the eleventh field effect tube, the third end of the ninth field effect tube is connected to the third end of the eighth field effect tube, the second end and the third end of the tenth field effect tube are connected, the second end of the tenth field effect tube is connected to the first end of the twelfth field effect tube, the second end of the twelfth field effect tube is connected to the first end of the thirteenth field effect tube, the second end of the thirteenth field effect tube is grounded, the third end of the twelfth field effect tube is connected to the third end of the sixth field effect tube, the third end of the thirteenth field effect tube is connected to the third end of the seventh field effect tube, and the eleventh field effect tube is connected to the third end of the seventh field effect tube. The second end of the field effect tube is connected to the first end of the fourteenth field effect tube, the second end of the fourteenth field effect tube is connected to the first end of the first capacitor and serves as the output end of the charge pump circuit, the second end of the first capacitor is grounded, the third end of the fourteenth field effect tube is connected to the third end of the fifteenth field effect tube and serves as the feedback end of the charge pump circuit, the second end of the fourteenth field effect tube is connected to the first end of the fifteenth field effect tube, the second end of the fifteenth field effect tube is connected to the first end of the sixteenth field effect tube, the second end of the sixteenth field effect tube is connected to the first end of the seventeenth field effect tube, the second end of the seventeenth field effect tube is grounded, the third end of the sixteenth field effect tube is connected to the third end of the sixth field effect tube, and the third end of the seventeenth field effect tube is connected to the third end of the seventh field effect tube.

[0063] The seventh field effect tube, the thirteenth field effect tube and the seventeenth field effect tube form a current mirror, so the current of the thirteenth field effect tube and the seventeenth field effect tube is proportional to the current of the seventh field effect tube, and is also a low temperature coefficient current. The ninth field effect tube and the eighth field effect tube form a current mirror, so the current of the ninth field effect tube is proportional to the current of the eighth field effect tube, and is also a low temperature coefficient current. The fourteenth field effect tube and the fifteenth field effect tube are switch field effect tubes. When the gate voltage V1 is at a high level, the fifteenth field effect tube is turned on and the fourteenth field effect tube is turned off. At this time, the first capacitor is discharged and the node voltage V2 gradually decreases; when the gate voltage V1 is at a low level, the fifteenth field effect tube is turned off and the fourteenth field effect tube is turned on. At this time, the ninth field effect tube acts as a current source to charge the first capacitor, and the node voltage V2 gradually increases.

[0064] As an optional embodiment, the digital logic circuit includes an inverter group and a D flip-flop, the inverter group is used to control the logic value of the waveform according to the second voltage, and output the feedback signal at the output end of the target inverter, the output end of the inverter group is connected to the first end of the D flip-flop, the second end and the third end of the D flip-flop are connected, and the fourth end of the D flip-flop is used to output a clock signal with a duty cycle of a preset value.

[0065] In the Schmitt trigger circuit, when the input node voltage V2 gradually rises from a low level (0) to exceed the threshold voltage Vth0, the output node voltage V0 flips from a low level (0) to a high level (VDD). When the input node voltage V2 gradually drops from a high level (VDD) to below the threshold voltage Vth1, the output node voltage V0 flips from a high level (VDD) to a low level (0).

[0066] A digital logic circuit can be constructed by three inverters and a D flip-flop.

[0067] The trigger input port D is connected to the output port QN to form a divider, which can double the period of the input clk port signal and reduce the frequency by half. The output port Q outputs a fixed frequency periodic oscillation square wave signal CLK, and the duty cycle of the clock CLK signal is 50%. This digital logic control circuit uses a D trigger to build a divider, which greatly improves the stability of the duty cycle of the output clock CLK signal.

[0068] Therefore, this OSC circuit adopts low temperature coefficient current and Schmitt trigger structure, which greatly improves the temperature characteristics of the output clock signal frequency, reduces the complexity of the circuit and the layout area, and uses D flip-flops to build a binary divider to greatly improve the stability of the output clock CLK signal duty cycle.

[0069] As an optional implementation, the circuit further includes a filtering module, and the filtering module is used to filter out noise interference of the power supply voltage.

[0070] As an optional implementation, the filtering module includes a second capacitor and a third capacitor, the second capacitor is connected to the third ends of the first field effect transistor and the second field effect transistor, and the third capacitor is connected to the third ends of the eighth field effect transistor and the ninth field effect transistor.

[0071] When various implementation methods are combined and applied, the circuit principle is:

[0072] After the circuit is turned on by the enable signal, the field effect tube of the circuit is turned on to generate current, and the entire OSC circuit starts to work. When the node voltage V2 at the input end of the Schmitt trigger circuit gradually rises from a low level (0) to a high level (VDD) when it exceeds the threshold voltage Vth0, the output node voltage V0 is flipped from a low level (0) to a high level (VDD), and the node voltage V0 is converted by the digital logic circuit, and the feedback voltage is flipped from a low level (0) to a high level (VDD). At this time, the gate voltages of the fourteenth field effect tube and the fifteenth field effect tube are high level (VDD), so the fifteenth field effect tube is turned on, the fourteenth field effect tube is turned off, the first capacitor is discharged, and the node voltage V2 gradually decreases.

[0073] When the node voltage V2 gradually decreases below the threshold voltage Vth1, the output node voltage V0 flips from a high level (VDD) to a low level (0). After the node voltage V0 is converted by the digital logic circuit, the feedback voltage flips from a high level (VDD) to a low level (0). At this time, the gate voltages of the fourteenth field effect transistor and the fifteenth field effect transistor are low level (0), so the fourteenth field effect transistor is turned on, the fifteenth field effect transistor is turned off, the first capacitor is charged, and the node voltage V2 gradually rises.

[0074] When the node voltage V2 gradually rises and exceeds the threshold voltage Vth0, the output node voltage V0 flips from a low level (0) to a high level (VDD). In this cycle, the first voltage, the feedback voltage of the digital logic circuit, and the clock signal continuously flip between a low level (0) and a high level (VDD), and the CLK signal outputs a periodic oscillation square wave signal with a fixed frequency.

[0075] See also Figure 3 , Figure 3 is a schematic diagram of the structure of an integrated circuit chip disclosed in an embodiment of the present invention, such as Figure 3 As shown, the present application provides an integrated circuit chip, comprising an oscillator circuit as in any embodiment.

[0076] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0077] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. An oscillator circuit, characterized in that: The circuit comprises: A current generating circuit, the current generating circuit comprising a first resistor, the current generating circuit being used to generate a first current with a preset temperature coefficient according to the first resistor; a charge pump circuit, wherein the charge pump circuit is used to generate a first voltage of a preset waveform according to the first current and a feedback signal; A Schmitt trigger circuit, configured to generate a second voltage having a high level and a low level by flipping the first voltage using a Schmitt trigger; The digital logic circuit is used to generate the feedback signal and the clock signal according to the second voltage.

2. The circuit according to claim 1, characterized in that The first resistor includes a resistor with a negative temperature coefficient and an absolute value of the temperature coefficient is not greater than a preset threshold.

3. The circuit according to claim 2, characterized in that The first resistor includes a P-type poly resistor.

4. The circuit according to claim 1, characterized in that The connection relationship of the circuit includes: The output end of the current generating circuit is connected to the first end of the charge pump circuit, the second end of the charge pump circuit is connected to the feedback end of the digital logic circuit, the output end of the charge pump circuit is connected to the input end of the Schmitt trigger circuit, the output end of the Schmitt trigger circuit is connected to the input end of the digital logic circuit, and the output end of the digital logic circuit serves as the output end of the oscillator circuit to output the clock signal.

5. The circuit according to claim 1, characterized in that The current generating circuit also includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor and a seventh field effect transistor; Among them, the first end of the first field effect tube and the first end of the second field effect tube are connected to the power supply voltage, the second end and the third end of the first field effect tube are connected, and are connected to the first end of the third field effect tube, the second end of the second field effect tube is connected to the first end of the fourth field effect tube, the third end of the second field effect tube is connected to the third end of the first field effect tube, the second end and the third end of the third field effect tube are connected, and are connected to the first end of the first resistor, the second end of the first resistor is connected to the first end of the fifth field effect tube, the second end of the fifth field effect tube is grounded, the third end of the fifth field effect tube is connected to the enable signal, the second end of the fourth field effect tube is connected to the first end of the sixth field effect tube, the first end and the third end of the sixth field effect tube are connected, the second end of the sixth field effect tube is connected to the first end of the seventh field effect tube, the first end and the third end of the seventh field effect tube are connected, the second end of the seventh field effect tube is grounded, and the third end of the sixth field effect tube and the third end of the seventh field effect tube serve as the output end of the current generating circuit.

6. The circuit according to claim 5, characterized in that The charge pump circuit includes an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, a sixteenth field effect transistor, a seventeenth field effect transistor and a first capacitor; Among them, the first end of the eighth field effect tube and the first end of the ninth field effect tube are connected to the power supply voltage, the second end and the third end of the eighth field effect tube are connected, and are connected to the first end of the tenth field effect tube, the second end of the ninth field effect tube is connected to the first end of the eleventh field effect tube, the third end of the ninth field effect tube is connected to the third end of the eighth field effect tube, the second end and the third end of the tenth field effect tube are connected, the second end of the tenth field effect tube is connected to the first end of the twelfth field effect tube, the second end of the twelfth field effect tube is connected to the first end of the thirteenth field effect tube, the second end of the thirteenth field effect tube is grounded, the third end of the twelfth field effect tube is connected to the third end of the sixth field effect tube, the third end of the thirteenth field effect tube is connected to the third end of the seventh field effect tube, and the eleventh field effect tube is connected to the third end of the seventh field effect tube. The second end of the field effect tube is connected to the first end of the fourteenth field effect tube, the second end of the fourteenth field effect tube is connected to the first end of the first capacitor and serves as the output end of the charge pump circuit, the second end of the first capacitor is grounded, the third end of the fourteenth field effect tube is connected to the third end of the fifteenth field effect tube and serves as the feedback end of the charge pump circuit, the second end of the fourteenth field effect tube is connected to the first end of the fifteenth field effect tube, the second end of the fifteenth field effect tube is connected to the first end of the sixteenth field effect tube, the second end of the sixteenth field effect tube is connected to the first end of the seventeenth field effect tube, the second end of the seventeenth field effect tube is grounded, the third end of the sixteenth field effect tube is connected to the third end of the sixth field effect tube, and the third end of the seventeenth field effect tube is connected to the third end of the seventh field effect tube.

7. The circuit according to any one of claims 1 to 6, characterized in that: The digital logic circuit includes an inverter group and a D flip-flop. The inverter group is used to control the logic value of the waveform according to the second voltage and output the feedback signal at the output end of the target inverter. The output end of the inverter group is connected to the first end of the D flip-flop, the second end and the third end of the D flip-flop are connected, and the fourth end of the D flip-flop is used to output a clock signal with a duty cycle of a preset value.

8. The circuit according to any one of claims 1 to 6, characterized in that: The circuit further comprises a filtering module, and the filtering module is used to filter out noise interference of the power supply voltage.

9. The circuit according to claim 8, characterized in that The filtering module includes a second capacitor and a third capacitor, the second capacitor is connected to the third ends of the first field effect transistor and the second field effect transistor, and the third capacitor is connected to the third ends of the eighth field effect transistor and the ninth field effect transistor.

10. An integrated circuit chip, characterized in that: The chip comprises the oscillator circuit as claimed in any one of claims 1-9.

Images