Silicon nitride ceramic layer silicon carbide chip package

Abstract

The invention provides a silicon nitride ceramic layer silicon carbide chip package, which relates to the technical field of chip package and comprises a silicon nitride ceramic substrate and a silicon carbide chip module connected to the silicon nitride ceramic substrate. The arrangement of the silicon nitride ceramic substrate gives full play to the performance of the silicon carbide power device, and the overall energy consumption of the module is remarkably reduced, so that the module can operate more efficiently under the same working condition, and the energy consumption is reduced; the operation efficiency is improved, and the service life of the equipment is prolonged. In addition, the highest working junction temperature of the module is also effectively improved, so that the module can stably work in a higher temperature environment. The 8-shaped current loop layout not only greatly reduces the stray inductance of the module, but also significantly reduces the voltage spike in work, and improves the overall electrical performance and reliability of the module. The negative influence of the parasitic effect on the performance of the module is effectively reduced, and the stable operation of the module under high-frequency and high-power conditions is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a silicon nitride ceramic layer silicon carbide chip packaging. Background Art

[0002] Based on the rapid development of current power semiconductor technology, especially in applications with high power density, high frequency and high temperature working environment, traditional silicon-based power devices are gradually unable to meet the needs of emerging applications. As a wide bandgap semiconductor material, silicon carbide has gradually become the core material of high-performance power electronic devices with its higher switching speed, lower loss and better thermal stability.

[0003] However, with the widespread application of silicon carbide devices, the bottleneck of packaging technology has gradually emerged. Traditional packaging materials and layout designs are difficult to meet the electrical performance and thermal management requirements of silicon carbide modules under high temperature and high voltage conditions. Summary of the invention

[0004] The invention discloses a silicon nitride ceramic layer silicon carbide chip package to solve the above problem.

[0005] The present invention adopts the following scheme: The present application provides a silicon nitride ceramic layer silicon carbide chip package, comprising a silicon nitride ceramic substrate, and a silicon carbide chip module connected to the silicon nitride ceramic substrate, wherein an 8-shaped current loop is arranged on the silicon nitride ceramic substrate; the silicon carbide chip module comprises two bridge arms; each of the bridge arms comprises a plurality of silicon carbide chips connected to the current loop.

[0006] Furthermore, the silicon nitride ceramic substrate includes an upper copper layer, a silicon nitride ceramic layer and a lower copper layer which are sequentially connected from top to bottom; the upper copper layer includes a plurality of copper blocks, and the plurality of copper blocks are electrically connected to each other through bonding wires; the drain of the silicon carbide chip is electrically connected to the upper copper layer; and the pads on the silicon carbide chip and the pins on the silicon nitride ceramic substrate are bonded and connected using gold wire or aluminum wire.

[0007] Furthermore, a capacitor is electrically connected between the positive and negative electrodes of the upper copper layer near the switch node of the silicon carbide chip.

[0008] Furthermore, the upper copper layer is electrically connected to a power terminal via a bonding wire.

[0009] Furthermore, the lower copper layer is a whole copper plate, and a heat dissipation base plate is connected thereunder.

[0010] Furthermore, the heat dissipation base plate is copper.

[0011] Furthermore, the gate of each silicon carbide chip is electrically connected to a gate resistor.

[0012] Furthermore, it comprises an outer shell with an upper opening, the silicon nitride ceramic substrate and the silicon carbide chip module are placed in the outer shell, and the outer shell is filled with insulating glue; the upper opening is covered by a cover plate.

[0013] By adopting the above technical solution, the present invention can achieve the following technical effects: The setting of silicon nitride ceramic substrate fully utilizes the performance of silicon carbide power devices, and the overall energy consumption of the module has been significantly reduced, allowing it to operate more efficiently under the same working conditions, reducing energy consumption; improving operating efficiency and extending the service life of the equipment. In addition, the maximum operating junction temperature of the module has also been effectively improved, allowing it to work stably in a higher temperature environment.

[0014] The 8-shaped current loop layout not only reduces the stray inductance of the module, but also significantly reduces the voltage spikes during operation, improving the overall electrical performance and reliability of the module. The optimized structural layout effectively reduces the negative impact of parasitic effects on module performance, ensuring the stable operation of the module under high-frequency and high-power conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of a silicon nitride ceramic layer silicon carbide chip packaging structure according to an embodiment of the present invention; Figure 2 This is a schematic structural diagram of a silicon nitride ceramic layer silicon carbide chip package after removing the outer shell in an embodiment of the present invention; Figure 3 This is a schematic diagram of the front structure of a silicon nitride ceramic layer silicon carbide chip package after removing the outer shell in an embodiment of the present invention; Figure 4 yes Figure 3 Partial structure diagram of Figure 1 ; Figure 5 yes Figure 3 Partial structure diagram of Figure 2 ; Figure 6 It is a schematic diagram of the exploded structure of a silicon nitride ceramic layer silicon carbide chip package silicon nitride ceramic substrate part according to an embodiment of the present invention; Icon: silicon nitride ceramic substrate 1, silicon nitride ceramic layer 2, upper copper layer 3, lower copper layer 4, silicon carbide chip 5, gate resistor 6, bonding wire 7, capacitor 8, current loop 9, power terminal 10, heat dissipation base plate 11, outer shell 12. DETAILED DESCRIPTION

[0016] Example Combination Figures 1 to 6As shown, this embodiment provides a silicon nitride ceramic layer silicon carbide chip package, including a silicon nitride ceramic substrate 1, and a silicon carbide chip 5 module connected to the silicon nitride ceramic substrate 1, wherein an "8"-shaped current loop 9 is provided on the silicon nitride ceramic substrate 1; the silicon carbide chip 5 module includes two bridge arms; each of the bridge arms includes a plurality of silicon carbide chips 5 connected to the current loop 9.

[0017] Specifically, in this embodiment, the silicon nitride ceramic substrate 1 includes an upper copper layer 3, a silicon nitride ceramic layer 2 and a lower copper layer 4 which are sequentially connected from top to bottom; Figure 6 As shown, the upper copper layer 3 includes a plurality of copper plates, and the plurality of copper plates are electrically connected to the circuit through bonding wires 7; the drain of the silicon carbide chip 5 is electrically connected to the upper copper layer 3; in this embodiment, as Figure 2 and Figure 3 As shown, there are two bridge arms, each of which includes 6 silicon carbide chips 5. Under standard configuration, the entire module in this embodiment includes a total of 36 silicon carbide chips 5. Of course, in other embodiments, the chip model and quantity can be adjusted according to specific production requirements.

[0018] The silicon nitride ceramic substrate 1 not only provides excellent mechanical strength, but also has outstanding electrical insulation and efficient heat dissipation performance. As a chip packaging and heat dissipation material, the drain electrodes of the plurality of silicon carbide chips 5 are connected to the circuit on the substrate through a copper layer to ensure that the drain signal is transmitted to the external circuit through the substrate; and the bonding wire 7 of gold wire or aluminum wire is used to bond the pads on the silicon carbide chip 5 to the pins on the silicon nitride ceramic substrate 1 to form a stable electrical connection.

[0019] In this implementation, if Figure 3 and Figure 4 As shown, the gate of each silicon carbide chip 5 is electrically connected to a gate resistor 6 to control the switching behavior of the gate and adjust the gate voltage to ensure the normal operation of the device. A plurality of capacitors 8 are electrically connected between the positive and negative electrodes of the upper copper layer 3 near the switch node of the silicon carbide chip 5, and the plurality of capacitors 8 are arranged in parallel, which effectively reduces the parasitic inductance in the connection line; and enhances the filtering capability, which can significantly reduce the voltage spikes and high-frequency noise, and improve the anti-interference ability of the circuit. Of course, the capacitor 8 can also be integrated in the silicon nitride ceramic substrate 1 and be close to the silicon carbide chip 5 to further optimize the performance of the module.

[0020] In this embodiment, the upper copper layer 3 is electrically connected to a power terminal 10 via a bonding wire 7 for electrical connection with the outside. Figure 5As shown, the "8"-shaped current loop 9 is electrically connected at its intersection through the bonding wire 7 to avoid cross-conduction of the current loop 9 at the intersection. After the current is input from the collector, it moves downward along the path and then bypasses the lower half to form a loop. The current path of this part covers the left half of the package; then the current continues to move to the upper right along the package path to complete the first "8"-shaped current loop 9. The right side has the same flow direction, from the upper right part to the lower half of the second "8"-shaped current loop 9, and then returns upward. This flow mode makes the area of ​​the current loop 9 smaller than that of the traditional silicon carbide chip 5 module, which can significantly shorten the current path between the power devices, so that the heat generated by each part of the chip is relatively balanced, avoiding local overheating caused by excessive local current. Heat can be conducted more evenly in the chip and packaging structure, improving the heat dissipation efficiency. According to the principle of electromagnetics, stray inductance is proportional to the area of ​​the current loop 9. The smaller the loop area, the lower the stray inductance. The reduction of stray inductance helps to enhance high-frequency stability and reduce electromagnetic interference.

[0021] In this embodiment, the lower copper layer 4 is a whole copper plate, and a heat dissipation base plate 11 made of copper is connected to it by vacuum sintering through a low-temperature solder sheet, which can significantly improve the heat dissipation performance of the silicon nitride ceramic substrate 1. Of course, this embodiment also includes an outer shell 12 with an upper opening, and the silicon nitride ceramic substrate 1 and the silicon carbide chip 5 module are placed in the outer shell 12, and the outer shell 12 is filled with insulating glue to ensure that the internal components of the module are electrically insulated and physically sealed. The upper opening is sealed by a cover plate (not shown in the figure), thereby closing the upper part of the module encapsulated by the silicon nitride ceramic layer 2 and silicon carbide, further improving the safety and reliability of the module.

[0022] The following further describes the manufacturing process of the silicon nitride ceramic layer 2 silicon carbide chip 5 package in the embodiment of the present invention, which includes the following steps: S1: First, use an ultrasonic cleaning process to clean the surface of all components and accessories required for manufacturing the silicon nitride ceramic layer 2 and the silicon carbide chip 5 package. After cleaning, fix the drain electrode of the silicon carbide chip 5 on the upper copper layer 3 of the silicon nitride ceramic substrate 1 by welding; S2: After all chips are successfully soldered to the silicon nitride ceramic substrate 1, the pads on the silicon carbide chip 5 and the pins on the silicon nitride ceramic substrate 1 are bonded and connected using gold wire or aluminum wire to form a stable electrical connection; after completing one bonding, sub-unit testing and performance testing are performed to test the electrical characteristics of the silicon carbide chip 5, such as on-resistance, leakage current, breakdown voltage, etc., to ensure that each sub-unit meets the design requirements and specification standards; S3: The capacitor 8 is electrically connected between the positive electrode and the negative electrode of the upper copper layer 3; S4: Fix the heat dissipation base plate 11 and the housing using adhesive; S5: Perform secondary bonding to electrically connect the power terminal 10 to the corresponding copper block on the upper copper layer 3 through the bonding wire 7; S6: Connecting the gate of the silicon carbide chip 5 to the gate resistor 6 with metal layers plated at both ends through the bonding wire 7 to form a complete gate circuit structure; S7: Place the silicon nitride ceramic layer 2 silicon carbide encapsulated module in the outer shell 12, and use insulating glue to pot the inside of the shell to ensure that the internal components of the module are electrically insulated and physically sealed; after potting, fix the cover plate to the top opening of the shell with adhesive.

[0023] It should be understood that the above are only preferred implementations of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention.

[0024] The above description of the drawings used in the implementation manner only illustrates certain embodiments of the present invention and should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

Claims

1. A silicon nitride ceramic layer silicon carbide chip package, comprising a silicon nitride ceramic substrate, and a silicon carbide chip module connected to the silicon nitride ceramic substrate, characterized in that: An 8-shaped current loop is arranged on the silicon nitride ceramic substrate; the silicon carbide chip module includes two bridge arms; each of the bridge arms includes a plurality of silicon carbide chips connected to the current loop.

2. The silicon nitride ceramic layer silicon carbide chip package according to claim 1, characterized in that: The silicon nitride ceramic substrate comprises an upper copper layer, a silicon nitride ceramic layer and a lower copper layer which are sequentially connected from top to bottom; the upper copper layer comprises a plurality of copper plates, and the plurality of copper plates are electrically connected to each other through bonding wires; the drain of the silicon carbide chip is electrically connected to the upper copper layer, and the pads on the silicon carbide chip and the pins on the silicon nitride ceramic substrate are bonded and connected by gold wire or aluminum wire.

3. The silicon nitride ceramic layer silicon carbide chip package according to claim 2, characterized in that: A capacitor is electrically connected between the positive and negative electrodes of the upper copper layer near the switch node of the silicon carbide chip.

4. The silicon nitride ceramic layer silicon carbide chip package according to claim 2, characterized in that: The upper copper layer is electrically connected to a power terminal via a bonding wire.

5. The silicon nitride ceramic layer silicon carbide chip package according to claim 2, characterized in that: The lower copper layer is a whole copper plate, and a heat dissipation base plate is connected thereunder.

6. The silicon nitride ceramic layer silicon carbide chip package according to claim 5, characterized in that: The heat dissipation base plate is copper.

7. The silicon nitride ceramic layer silicon carbide chip package according to any one of claims 1 to 6, characterized in that: The gate of each silicon carbide chip is electrically connected to a gate resistor.

8. The silicon nitride ceramic layer silicon carbide chip package according to claim 7, characterized in that: It comprises an outer shell with an upper opening, the silicon nitride ceramic substrate and the silicon carbide chip module are placed in the outer shell, and the outer shell is filled with insulating glue; the upper opening is covered by a cover plate.

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