Programmable power supply for testing and power supply driving parameter optimization method
By using a programmable power supply composed of signal generator, amplifier and capacitor module in complex board systems to adjust the power-on speed and capacitance value, the problem of power supply voltage drop during the chip power-on reset process is solved, and low-cost power supply parameters are achieved Optimize and system start normally.
Patent Information
- Application Number
- CN202411390048.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-09-14
- Filing Date
- 2024-10-08
- Publication Date
- 2024-12-31
AI Technical Summary
In complex board systems, the power supply voltage is prone to sudden drop in the power supply voltage during the chip power-on reset process, resulting in the chip being unable to initialize normally. The existing programmable power supply is costly and cumbersome, and it is impossible to effectively match the power supply slope and load requirements.
The programmable power supply consisting of a signal generator, amplifier and capacitor module is adopted. By adjusting the signal generator output signal waveform and amplifier driving capability, combined with the adjustable capacitor module, the power driving parameters are optimized to match the system requirements.
It realizes the optimization of power supply parameters with a simple structure and low cost to ensure the normal power-on system, provides guidance on actual parameter selection and solves the matching problems in power supply system design.
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Figure CN119232126A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to electronic technology, in particular to a power supply technology for testing. Background Art
[0002] See also Figure 1 to Figure 4 In the power-on process of a complex board system, the chip can be regarded as a load of the power supply. General SOCs (DSPPMUMCUCPU) have a power-on reset (POR) action, which can be regarded as a chip initialization action inside the chip. At the moment of POR, the chip will generate a large instantaneous current. When the power supply load capacity is weak and the power-on slope is long, it is easy to see a sudden drop in the power supply voltage on the chip. However, the POR circuit is generally released when the power supply potential reaches a certain value. Once this drop is below the detection voltage Vth, it will cause POR to fail or repeatedly trigger POR, resulting in the chip being unable to initialize normally.
[0003] Due to the limitations of board-level system design, the power system design matching cannot guarantee 100% meeting the system chip current requirements to avoid this situation. Therefore, it is necessary to conduct experimental tests and demonstrations on the power-on slope and load matching in advance. And it is necessary to test whether the system board starts normally under various power-on conditions. The programmable power supply in the prior art is an experimental device that meets this situation, but it is costly and cumbersome to operate. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a programmable power supply for testing with a simple structure and low cost, and a method for optimizing power drive parameters using the power supply.
[0005] The technical solution adopted by the present invention to solve the technical problem is that a programmable power supply for testing is composed of a signal generator, an amplifier and a capacitor module. The signal amplifier is connected to the input end of the amplifier, the output end of the amplifier is connected to the output end of the power supply, and the output end of the amplifier is also grounded through the capacitor module, and the capacitance value of the capacitor module is adjustable.
[0006] The output signal waveform of the signal generator is adjustable.
[0007] The driving capability of the amplifier is adjustable.
[0008] The present invention also provides a method for optimizing power drive parameters, comprising the following steps:
[0009] (1) Equipment selection: A programmable power supply for testing is used, which includes a signal generator, an amplifier and a capacitor module. The signal amplifier is connected to the input end of the amplifier, the output end of the amplifier is connected to the output end of the power supply, and the output end of the amplifier is also grounded through the capacitor module. The capacitance value of the capacitor module is adjustable, the output signal waveform of the signal generator is adjustable, and the driving capability of the amplifier is adjustable;
[0010] (2) Testing: Connect the programmable power supply for testing to the target load, adjust the capacitance value of the capacitance module of the programmable power supply for testing, the output signal of the signal generator, and the driving capability of the amplifier, observe the power-on waveform at the output end of the power supply until the ideal power-on waveform is obtained, and record the capacitance value of the capacitance module, the output signal parameters of the signal generator, and the driving parameters of the amplifier when the ideal power-on waveform is generated.
[0011] The beneficial effects of the present invention are as follows: the power-on speed can be adjusted by a signal generator to obtain the minimum current capacity and power-on slope required by the system power supply. The capacitor network can be adjusted to obtain the minimum capacitance value C required by the system. This provides practical parameter selection guidance in the overall power system design and allows problems to be queried through experiments in the later stage. The present invention realizes the optimization function of power supply parameters with low cost and simple structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 It is a board-level system schematic.
[0013] Figure 2 It is a schematic diagram of the time domain changes of voltage and current during the power-on process.
[0014] Figure 3 This is a schematic diagram of the POR (power-on reset) and power-on waveform abnormality during the DSP power-on process.
[0015] Figure 4 Yes Figure 3 A magnified diagram of VCC drop and POR abnormal state.
[0016] Figure 5 It is a schematic diagram of the power supply structure of the present invention.
[0017] Figure 6 This is a schematic diagram of an abnormal state caused by insufficient driving capability of the system in Example 1.
[0018] Figure 7 This is a normal power-on waveform diagram of the system after adjusting the driving capability and capacitance in Example 6.
[0019] Figure 8 This is the power-on waveform using a normal power supply.
[0020] Fig. 9 It is a power-on waveform diagram under different parameters of the power supply of the present invention.
[0021] Fig.10 It is a schematic diagram of the time domain changes of voltage and current during the power-on process of Example 2.
[0022] Fig.11 It is a schematic diagram of a trapezoidal wave signal.
[0023] Fig.12 It is a schematic diagram of a step wave signal.
[0024] Fig.13 is a schematic diagram of a sine wave signal. DETAILED DESCRIPTION
[0025] See also Figure 5 The programmable power supply for testing of the present invention is composed of a signal generator, an amplifier and a capacitor module. The signal amplifier is connected to the input end of the amplifier, the output end of the amplifier is connected to the output end of the power supply, and the output end of the amplifier is also grounded through the capacitor module, and the capacitance value of the capacitor module is adjustable.
[0026] The output signal waveform of the signal generator is adjustable. For example, the signal generator can output Figure 11 to Figure 13 The waveform shown, or other waveforms.
[0027] The driving capability of the amplifier is adjustable. In the simplest implementation, the amplifier includes a plurality of optional amplifying units, each of which has a different driving capability, and the driving capability of the amplifier is adjusted by selectively connecting the amplifying units.
[0028] See also Figure 6 , using the programmable power supply experimental network of the present invention, generating a 50ms rising power supply, it is found that during the power-on process, the VCC power supply capacity is insufficient, resulting in a POR reset situation. At this time, the driving capacity of the operational amplifier can be adjusted (for example, replacing an operational amplifier with a stronger driving capacity), or the filter capacitor can be increased to stabilize the output power supply voltage. Figure 7 , after replacing the op amp with a stronger driving capability, the waveform of power-on again. After the POR reset is released, the power supply has sufficient driving capability to ensure voltage stability. Figure 8 The waveform of the normal power supply is shown. Fig. 9 It shows that different power supply rising edge curves are produced by the programmable power supply experiment of the present invention, and each curve has a different slope (from the initial voltage 0V to the stable target voltage 5V, the boost time is 100us, 500us, 1ms, and 2ms respectively).
[0029] Example 2
[0030] Goal: Make a goal to power up from 0 to 16, time 1ms, load capacity 100mA. 0 to 100mA load transition sees voltage fluctuation less than 10mV at the output. Voltage and current conditions refer to Fig.10 .
[0031] Device selection and parameters of this embodiment:
[0032] Signal generator: Tektronix AFG31000
[0033] Operational amplifier HYX2546
[0034] Electrical characteristics:
[0035] Power supply range 4.5~18V,
[0036] Maximum load capacity: 240mA,
[0037] Transient maximum current: 1A.
[0038] Capacitance: 10pF.
Claims
1. A programmable power supply for testing, characterized in that: It consists of a signal generator, an amplifier and a capacitor module. The signal amplifier is connected to the input end of the amplifier, the output end of the amplifier is connected to the power output end of the tested system, and the output end of the amplifier is also grounded through the capacitor module. The capacitance value of the capacitor module is adjustable.
2. The programmable power supply for testing as claimed in claim 1, characterized in that: The output signal waveform of the signal generator is adjustable.
3. The programmable power supply for testing as claimed in claim 2, characterized in that: The driving capability of the amplifier is adjustable.
4. A method for optimizing power drive parameters, characterized in that: The steps include: (1) Equipment selection: A programmable power supply for testing is used, which includes a signal generator, an amplifier and a capacitor module. The signal amplifier is connected to the input end of the amplifier, the output end of the amplifier is connected to the output end of the power supply, and the output end of the amplifier is also grounded through the capacitor module. The capacitance value of the capacitor module is adjustable, the output signal waveform of the signal generator is adjustable, and the driving capability of the amplifier is adjustable; (2) Testing: Connect the programmable power supply for testing to the target load, adjust the capacitance value of the capacitance module of the programmable power supply for testing, the output signal of the signal generator, and the driving capability of the amplifier, observe the power-on waveform at the output end of the power supply until the ideal power-on waveform is obtained, and record the capacitance value of the capacitance module, the output signal parameters of the signal generator, and the driving parameters of the amplifier when the ideal power-on waveform is generated.