Reference voltage protection method for boost DC-DC and band-gap reference circuit

Abstract

The invention discloses a reference voltage protection method for a boost DC-DC and band-gap reference circuit, and relates to a reference voltage protection method which comprises an over-temperature protection circuit unit, an overvoltage protection circuit unit and a band-gap reference circuit unit. According to the over-temperature protection circuit, reliable and rapid over-temperature protection of the boost DC-DC circuit is realized, and the over-temperature protection circuit also has a certain hysteresis effect, so that the boost DC-DC circuit recovers normal work only when the temperature drops to a certain temperature; meanwhile, reliable and rapid overvoltage protection of the boost DC-DC circuit is realized; according to the band-gap reference circuit, the area of an over-temperature and over-voltage protection circuit is greatly reduced, the light weight of the circuit is achieved, reliable and rapid over-temperature and over-voltage protection is conducted on the boost DC-DC circuit at the same time, and the light weight of the circuit is guaranteed. The circuit simultaneously forms over-temperature and over-voltage protection for the boost DC-DC circuit, and the band-gap reference circuit generates different reference voltages through resistor voltage division.

Description

Technical Field

[0001] The invention relates to a method for protecting a reference voltage of an integrated circuit, and in particular to a method for protecting a reference voltage of a boost type DC-DC and a bandgap reference circuit. Background Art

[0002] Currently, boost DC-DC circuits are widely used, but temperature rise will affect the boost DC-DC circuit. The components of the integrated circuit, whether capacitors, resistors, MOS tubes or triodes, are very sensitive to temperature. Once the temperature rises to a certain level, the boost DC-DC circuit will be burned, causing permanent failure. Therefore, the over-temperature protection circuit is very important in the boost DC-DC circuit. In response to this phenomenon, the present invention designs an over-temperature protection circuit, which can realize over-temperature protection of the boost DC-DC circuit.

[0003] In addition, the boost DC-DC circuit may have an excessively high output voltage of the internal circuit, which may damage the load to which the boost DC-DC circuit provides power. Summary of the invention

[0004] The purpose of the present invention is to provide a method for protecting reference voltage of a boost type DC-DC and a bandgap reference circuit. The method designs a bandgap reference circuit that can generate two different reference voltages by using a resistor voltage divider. It is not necessary to use two bandgap reference circuits to provide reference voltages for an over-temperature protection circuit and an over-voltage protection circuit respectively, which greatly reduces the area of ​​the bandgap reference circuit and is conducive to realizing the reliability of the protection circuit and the lightweight of the circuit. This circuit simultaneously forms over-temperature and over-voltage protection for the boost type DC-DC circuit, and the bandgap reference circuit generates different reference voltages for protection by using a resistor voltage divider.

[0005] The technical solution of the present invention is as follows:

[0006] A method for protecting a reference voltage of a boost type DC-DC and a bandgap reference circuit, the method comprising an over-temperature and over-voltage protection circuit for a boost type DC-DC circuit, comprising: an over-temperature protection circuit unit, an over-voltage protection circuit unit, and a bandgap reference circuit unit; the over-temperature protection circuit unit generates a positive temperature coefficient current I generated inside the boost type DC-DC circuit by PTAT Converted into a positive temperature coefficient voltage V PTAT , and the reference voltage V generated by the bandgap reference circuit unit ref1 For comparison, at V PTAT Exceed V ref1 The power supply is turned off to form an over-temperature protection circuit, and then the output voltage V out The reference voltage V generated by the bandgap reference circuit unit ref2 For comparison, the output voltage V of the step-up DC-DC circuitout Exceed V ref2 The power supply is turned off at the same time to form an overvoltage protection circuit; this circuit simultaneously forms over-temperature and over-voltage protection for the boost DC-DC circuit, and the bandgap reference circuit generates different protection reference voltages through resistor voltage division.

[0007] The method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit, wherein the over-temperature protection circuit unit comprises: a positive temperature coefficient voltage V PTAT generating circuit, voltage comparison circuit and cascade inverter circuit;

[0008] The positive temperature coefficient voltage V PTAT The generating circuit includes: PMOS tubes: MP1, MP2, MP3; NMOS tubes: MN1, MN2; PNP type triode tubes: Q1, Q2; resistor: R1; the voltage comparison circuit includes: comparator 1; resistors: R2, R3; NMOS tube: MN3; the cascade inverter circuit includes: PMOS tubes: MP4, MP5; NMOS tubes: MN4, MN5;

[0009] The drain of the voltage comparison circuit MP3 is connected to the positive electrode of the comparator 1, and then connected to the positive electrode of R2. The negative electrode of R2 is connected to the drain of MN3, and then connected to the positive electrode of R3. The negative electrode of R3 is connected to GND. The negative electrode of the comparator 1 is a reference voltage V generated by the bandgap reference circuit unit. ref1 The output of comparator 1 is connected to the gate of MP4, the output of comparator 1 is connected to the gate of MN4, the gate of MN3 is connected to the drain of MP4, the gate of MN3 is connected to the drain of MN4, the gate of MN3 is connected to the gate of MP5, the gate of MN3 is connected to the gate of MN5, the source of MN3 is connected to GND, the substrate of PMOS tube is connected to VDD, and the substrate of NMOS tube is connected to GND;

[0010] The source of the cascade inverter circuit MP4 is connected to VDD, the gate of MP4 is connected to the gate of MN4, the drain of MP4 is connected to the drain of MN4, the drain of MP4 is connected to the gate of MP5, the drain of MP4 is connected to the gate of MN5, the source of MN4 is connected to GND, the source of MP5 is connected to VDD, the gate of MP5 is connected to the gate of MN5, the drain of MP5 is connected to the drain of MN5, the source of MN5 is connected to GND, and the drain of MP5 and the drain of MN5 are the output V of the over-temperature protection circuit unit. out1 , the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

[0011] The boost type DC-DC and bandgap reference circuit protection reference voltage method, the positive temperature coefficient voltage V PTATA generating circuit is provided, wherein the source of MP1 is connected to VDD, the gate of MP1 is connected to the gates of MP2 and MP3, the drain of MP1 is connected to the drain of MN1, the gate of MN1 is connected to the drain of MN1 to form a diode connection, the gate of MN1 is connected to the gate of MN2, the source of MN1 is connected to the emitter of Q1, the base of Q1 is connected to the collector and then to GND, the drain of MP2 is connected to the drain of MN2, the source of MN2 is connected to the positive electrode of R1, R1 is connected to the emitter of Q2, the base of Q2 is connected to the collector and then to GND, the source of MP3 is connected to VDD, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

[0012] The method for protecting the reference voltage of a boost DC-DC and a bandgap reference circuit, the overvoltage protection circuit unit includes: a comparator 2; PMOS tubes: MP13, MP14; NMOS tubes: MN16, MN17; resistors: R4, R5:

[0013] The negative electrode of the comparator 2 of the overvoltage protection circuit unit is a reference voltage V generated by the bandgap reference circuit unit. ref2 Access, step-up DC-DC circuit output V out The positive electrode of R4 is connected to the positive electrode of comparator 2, the negative electrode of R4 is connected to the positive electrode of R5, the negative electrode of R5 is connected to GND, the output of comparator 2 is connected to the gate terminal of MP13, the source terminal of MP13 is connected to VDD, the gate terminal of MP13 is connected to the gate terminal of MN16, the drain terminal of MP13 is connected to the drain terminal of MN16, the source terminal of MN16 is connected to GND, the source terminal of MP14 is connected to VDD, the gate terminal of MP14 is connected to the drain terminal of MP13, the drain terminal of MP14 is connected to the drain terminal of MN17, the gate terminal of MN17 is connected to the gate terminal of MP14, the source terminal of MN17 is connected to GND, the drain terminal of MP14 and the drain terminal of MN17 are the output V of the overvoltage protection circuit unit out2 , the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

[0014] The method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit is described, wherein the bandgap reference circuit unit comprises: a first bandgap reference startup circuit, a second bandgap reference startup circuit, a reference voltage generating circuit, a resistor voltage divider V ref1 、V ref2 Generate circuit.

[0015] The method for protecting reference voltage of a boost DC-DC and a bandgap reference circuit is described, wherein the first bandgap reference startup circuit comprises: PMOS tubes: MP6, MP7, MP8; NMOS tubes: MN6, MN7; NPN-type triode: Q3; capacitors: C1, C2; the second bandgap reference startup circuit comprises: PMOS tubes: MP9, MP10; NMOS tubes: MN8, MN9, MN10, MN11; resistors: R6, R7; the reference voltage generation circuit comprises: PMOS tubes: MP11, MP12; NMOS tubes: MN12, MN13, MN14, MN15; NPN-type triodes: Q4, Q5; resistors: R8, R9; capacitors: C3, C4; amplifier: OPA; resistor voltage divider V ref1 、V ref2 The generating circuit includes: resistors: R10, R11, R12; capacitor: C5.

[0016] The boost type DC-DC and bandgap reference circuit protection reference voltage method, the first bandgap reference startup circuit, the source of MP6 is connected to the power supply VDD, the gate of MP6 is connected to the gate of MP7, and the gate of MP6 and the gate of MP7 are biased by an external bias circuit to provide a bias voltage V BP1 , the drain of MP6 is connected to the source of MP7, the drain of MP7 is connected to the source of MP8, and the gate of MP8 is biased by an external bias circuit. BP2 , the drain of MP8 is connected to the drain of MN6, the gate of MN6 is connected to the drain of MN6 to form a diode connection, and is connected to the gate of MN7, the gate of MN6 is also connected to the positive electrode of C1, the negative electrode of C1 is connected to GND, the source of MN6 is connected to the collector of Q3, the base of Q3 is connected to the collector, the emitter of Q3 is connected to GND, the drain of MN7 is connected to VDD, the source of MN7 is connected to the positive electrode of C2, and is connected to the base of Q4 at the same time, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

[0017] The described method for protecting the reference voltage of a boost DC-DC and a bandgap reference circuit, the second bandgap reference startup circuit, the positive electrode of R6 is connected to the power supply VDD, the negative electrode is connected to the source end of MP9, the gate end of MP9 is connected to the drain end of MN8, the gate end of MP10, the drain end of MN9, the positive electrode of C4, the drain end of MP11, and the drain end of MN12, the drain end of MP9 is connected to the collector of Q4, the source end of MN10, and the gate end of MN12, the gate end of MN8 is connected to the drain end, forming a diode connection, the source end of MN8 is connected to the drain end of MN10, the gate end of MN10 is connected to the gate end of MN11, and the bias voltage V is provided by an external bias circuit BN2, the positive electrode of R7 is connected to VDD, the negative electrode of R7 is connected to the source terminal of MP10, the gate terminal of MP10 is connected to the drain terminal of MN9, the gate terminal of MN9 is connected to the drain terminal, forming a diode connection, the source terminal of MN9 is connected to the drain terminal of MN11, the source terminal of MN11 is connected to the gate terminal of MN13, the collector of Q5, and the drain terminal of MP10, the negative electrode of C4 is connected to GND, the source terminal of MP11 is connected to VDD, the gate terminal of MP11 is connected to the gate terminal of MP12, the source terminal of MP12 is connected to VDD, the drain terminal of MP12 is connected to the gate terminal, forming a diode connection, and then connected to the drain terminal of MN13, the drain terminal of MN13 is connected to the drain terminal of MN12 and the drain terminal of MN14, the gate terminal of MN14 is connected to the gate terminal of MN15, and the bias voltage V is provided by the external bias circuit BN1 , the source end of MN14 is connected to the drain end of MN15, the source end of MN15 is connected to GND, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

[0018] The described boost type DC-DC and bandgap reference circuit protection reference voltage method, the described reference voltage generating circuit, its Q4 base is connected to the emitter, and then connected to the base of Q5 and the positive electrode of the amplifier OPA, the emitter of Q4 is connected to the positive electrode of C3, the negative electrode of R8, and the positive electrode of R9, the negative electrode of C3 is connected to GND, the negative electrode of R9 is connected to GND, the positive electrode of R8 is connected to the emitter of Q5, the negative electrode of the amplifier is connected to the output, forming a source follower structure, and the output is V out3 .

[0019] The boost type DC-DC and bandgap reference circuit protection reference voltage method, the resistor voltage divider V ref1 、V ref2 The positive electrode of R10 is connected to the output of the amplifier 0PA, the negative electrode of R10 is connected to the positive electrode of R11 and the positive electrode of C5, the negative electrode of R11 is connected to the positive electrode of R12, the negative electrode of R12 is connected to GND, the negative electrode of C5 is connected to GND, and the voltage generated by the positive electrode of R11 is the generated reference voltage V ref1 , the voltage generated by the positive electrode of R12 is the reference voltage V ref2 .

[0020] The beneficial effects of the present invention are as follows:

[0021] The present invention realizes reliable and fast over-temperature protection for the boost-type DC-DC circuit, and after the over-temperature protection is started, the power supply of the boost-type DC-DC circuit is turned off. At the same time, the over-temperature protection circuit has a certain hysteresis effect, and will not resume working just when the circuit returns to normal temperature. The boost-type DC-DC circuit will resume normal operation when the temperature drops to a certain temperature, and the over-temperature protection circuit will also resume working state. The present invention also realizes reliable and fast over-voltage protection for the boost-type DC-DC circuit, and after the over-voltage protection is started, the power supply of the boost-type DC-DC circuit is turned off. When the fault is solved and the boost-type DC-DC circuit resumes normal operation, the over-voltage protection circuit will also resume working state. Finally, the bandgap reference circuit used in the present invention also greatly reduces the area of ​​the over-temperature and over-voltage protection circuits, and realizes the lightweight of the circuit. This circuit simultaneously forms over-temperature and over-voltage protection for the boost-type DC-DC circuit, and the bandgap reference circuit generates different reference voltages for protection through resistor voltage division. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a flow chart of the present invention;

[0023] Figure 2 A circuit diagram of a bandgap reference circuit unit of an over-temperature and over-voltage protection circuit of a boost-type DC-DC circuit of the present invention;

[0024] Figure 3 It is a circuit diagram of an over-temperature protection circuit unit of an over-temperature and over-voltage protection circuit of a boost-type DC-DC circuit of the present invention;

[0025] Figure 4 The present invention is a circuit diagram of an overvoltage protection circuit unit of an over-temperature and overvoltage protection circuit of a boost DC-DC circuit. DETAILED DESCRIPTION

[0026] In order to facilitate understanding of the present invention, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0027] Combination Figure 1 The principle of the present invention is to generate a positive temperature coefficient current I generated by a bandgap reference circuit inside a boost DC-DC circuit. PTAT Monitor to achieve over-temperature protection, and then detect the internal output voltage of the boost DC-DC circuit to achieve over-voltage protection.

[0028] The design process is as follows: First, a positive temperature coefficient current I is generated by the internal bandgap reference circuit of the boost DC-DC circuit. PTAT , through the positive temperature coefficient voltage VPTAT Generating circuit, generating positive temperature coefficient voltage V PTAT , the positive temperature coefficient voltage will gradually increase as the temperature rises; then, the bandgap reference circuit outputs the voltage V out2 , and then the reference voltage V is generated by the resistor voltage divider circuit ref1 and V ref2 ; Finally, the positive temperature coefficient voltage V PTAT With V ref1 Through the comparator, when V PTAT Exceed V ref1 When the power is turned off, the over-temperature protection is realized, and the output voltage V out With V ref2 Through the comparator, when V out Exceed V ref2 When the voltage is too high, the power supply is turned off to achieve overvoltage protection.

[0029] Combination Figure 2 Analyze the principle of the bandgap reference circuit unit:

[0030] After the circuit is powered on, the circuit is prone to degeneracy point problems, and the base voltages of Q2 and Q3 are zero, so a startup circuit must be added. This bandgap reference circuit uses a dual-loop startup circuit to speed up the reference voltage response speed and enable the circuit to start quickly.

[0031] The first bandgap reference startup circuit is composed of MP6, MP7, MP8, MN6, MN7, Q3, C1, and C2. After the circuit is powered on, V BP1 Control MP6 and MP7 to conduct, V BP2 Control MP8 to turn on. After MP6, MP7, and MP8 are turned on, the diode-connected MN6 and Q3 are turned on. The current is copied to the MN7 path through the current mirror. The current charges C2, which will increase the voltage of the upper plate of C2 and the base voltage of Q4, which is higher than the turn-on voltage V of Q4. BE4 When the bandgap reference circuit starts, the voltage on the upper plate of C2 increases, which will cause V GS Lower, when V GS When the voltage is lower than the threshold voltage, MN7 is turned off and the first bandgap reference startup circuit stops working.

[0032] The second bandgap reference startup circuit is composed of MP9, MP10, MP11, MP12, MN8, MN9, MN10, MN11, MN12, MN13, MN14, MN15, R6, R7, and C4. After the circuit is powered on, the current flows into the second loop through the five-tube amplifier on the right to charge the upper plate of C4, V BN2 Provide bias voltage for MN10 and MN11 to turn them on, and the base voltage of Q4 increases. When the voltage is higher than the turn-on voltage V of Q4,BE4 When the bandgap reference circuit starts to work, the source voltage of MN8 and MN9 increases, V GS Decrease, when V GS When it is less than the threshold voltage, MN10 and MN11 are turned off, and the second bandgap reference startup circuit of the startup circuit stops working. At the same time, the voltage of C4 can also turn on MP9 and MP10, so that the branch currents of MP9 and MP10 are consistent. The five-tube amplifier composed of MP11, MP12, MN12, MN13, MN14, and MN15 can also ensure that the drain voltages of MP9 and MP10 are the same, because the ideal amplifier has the characteristic of virtual short. Since the tail current of the op amp is nA level and works in the subthreshold region, the current accuracy is poor. MN14 and MN15 adopt a common source and common gate structure to enhance current matching. Adding resistors R6 and R7 can reduce noise interference and improve power supply suppression.

[0033] Transistors Q4, Q5 and resistors R8, R9 form the main structure of the reference voltage generation circuit. The base-emitter voltage V BE4 , the output voltage of the bandgap reference is V out3 :

[0034] V BE4 =I R8 R 8 +V BE5

[0035] Right now:

[0036]

[0037] According to the above formula, I R8 is the PTAT current, I SQ4 is the current flowing through the Q4 branch.

[0038] again:

[0039] V out3 =V BE4 +(I SQ4 +I R8 )R 9

[0040] Since the bases of Q4 and Q5 are connected to the amplifier 0PA, there is no base current loss, ensuring that the currents of Q4 and Q5 are equal, V out3 It can be expressed as:

[0041]

[0042] V BE4 is the negative temperature coefficient reference voltage, ΔV BE1 For a positive temperature coefficient reference voltage, by adjusting A zero temperature coefficient reference voltage can be obtained.

[0043] Then two reference voltages V are obtained through the resistor voltage divider circuit. ref1 、V ref2 .

[0044] By circuit Figure 4 It can be seen that:

[0045]

[0046] Combination Figure 3 Analysis of the principle of over-temperature protection circuit unit:

[0047] V out1 It is the output signal of over-temperature protection. It is low level in normal operation and high level in over-temperature protection. The leftmost module is the positive temperature coefficient current I generated by the bandgap reference source inside the boost DC-DC circuit. PTAT , MP1, MP2, MN1, MN2 are mutually biased current sources, the purpose is to ensure that the currents of the left and right paths are equal. The ratio of the emitter area of ​​Q2 tube to the emitter area of ​​Q1 tube is N:1. The current of the two circuits is determined by the voltage difference between the emitters of Q1 and Q2 tubes, and the voltage difference between the emitters of Q1 and Q2 tubes is proportional to the temperature.

[0048] Assume the emitter voltage of Q1 is V BE1 , assuming the emitter voltage of Q2 is V BE2 , the voltage difference between the emitters of Q1 and Q2 is ΔV BE2 , we can get:

[0049]

[0050] From the above formula, we can know that ΔV BE2 Directly proportional to temperature.

[0051] From the circuit diagram, we can see that ΔV BE2 is the voltage across resistor R1, so the positive temperature coefficient current I PTAT for:

[0052]

[0053] After being copied by the current mirror, the positive temperature coefficient current I PTAT is copied to the R2 and R3 resistor branches. When the over-temperature protection is not activated, the positive temperature coefficient current I PTAT It only flows through R2, and R3 is short-circuited by MN3, so the positive temperature coefficient voltage V PTAT for:

[0054] V PTAT =R2*I PTAT

[0055] That is:

[0056]

[0057] When the over-temperature protection is activated, MN3 is closed and the current flows through R2 and R3, so the positive temperature coefficient voltage V PTAT becomes:

[0058] V PTAT =(R2+R3)*I PTAT

[0059] That is:

[0060]

[0061] Thus, the positive temperature coefficient voltage V PTAT It is established, and then compared with the reference voltage V at the negative electrode of comparator 1 ref1 When the positive temperature coefficient voltage V PTAT The voltage is higher than the reference voltage V ref1 When the temperature of the boost DC-DC circuit reaches the overheating point, the output jumps, causing the MN3 tube to shut down, and the positive temperature coefficient voltage V PTAT The boost DC-DC circuit will not resume normal operation just because the temperature has just dropped. When the temperature drops to a certain level, the boost DC-DC circuit will start to work normally again. This achieves the hysteresis effect of overheat protection and avoids repeated switching of the chip at a certain temperature point. The size of the hysteresis window is mainly determined by MN3, which can be determined by setting the width-to-length ratio of the MN3 tube. The overheat shutdown point is mainly determined by the resistance values ​​of R2 and R3.

[0062] Combination Figure 4 Analysis of the principle of overvoltage protection circuit unit:

[0063] The circuit on the left is a voltage comparison circuit, V out2 The output signal of the overvoltage protection circuit is low level when it is working normally and high level when it is overvoltage protection. out It is the output of the boost DC-DC circuit. The series resistor on the right forms a feedback voltage, which is V FB , from the circuit we can know:

[0064]

[0065] The feedback voltage V FB With reference voltage V ref2 For comparison, when V FB Exceeds the set reference voltage Vref2 When the overvoltage protection circuit is turned off, the output jumps and the step-up DC-DC circuit is turned off. When the circuit fault is resolved, it restarts and the overvoltage protection circuit also restarts.

[0066] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined. It should be understood that the features described herein may be combined in different dependent claims and in a manner different from that described in the original claims. It should also be understood that the features described in conjunction with the individual embodiments may be used in other described examples.

Claims

1. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit, characterized in that: The method includes an over-temperature and over-voltage protection circuit for a boost DC-DC circuit, including: an over-temperature protection circuit unit, an over-voltage protection circuit unit, and a bandgap reference circuit unit; the over-temperature protection circuit unit generates a positive temperature coefficient current I generated inside the boost DC-DC circuit by PTAT Converted into a positive temperature coefficient voltage V PTAT , and the reference voltage V generated by the bandgap reference circuit unit ref1 For comparison, at V PTAT Exceed V ref1 The power supply is turned off to form an over-temperature protection circuit, and then the output voltage V out The reference voltage V generated by the bandgap reference circuit unit ref2 For comparison, the output voltage V of the step-up DC-DC circuit out Exceed V ref2 The power supply is turned off at the same time to form an overvoltage protection circuit; this circuit simultaneously forms over-temperature and over-voltage protection for the boost DC-DC circuit, and the bandgap reference circuit generates different protection reference voltages through resistor voltage division.

2. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 1, characterized in that: The over-temperature protection circuit unit includes: a positive temperature coefficient voltage V PTAT generating circuit, voltage comparison circuit and cascade inverter circuit; The positive temperature coefficient voltage V PTAT The generating circuit includes: PMOS tubes: MP1, MP2, MP3; NMOS tubes: MN1, MN2; PNP type triode tubes: Q1, Q2; resistor: R1; the voltage comparison circuit includes: comparator 1; resistors: R2, R3; NMOS tube: MN3; the cascade inverter circuit includes: PMOS tubes: MP4, MP5; NMOS tubes: MN4, MN5; The drain of the voltage comparison circuit MP3 is connected to the positive electrode of the comparator 1, and then connected to the positive electrode of R2. The negative electrode of R2 is connected to the drain of MN3, and then connected to the positive electrode of R3. The negative electrode of R3 is connected to GND. The negative electrode of the comparator 1 is a reference voltage V generated by the bandgap reference circuit unit. ref1 The output of comparator 1 is connected to the gate of MP4, the output of comparator 1 is connected to the gate of MN4, the gate of MN3 is connected to the drain of MP4, the gate of MN3 is connected to the drain of MN4, the gate of MN3 is connected to the gate of MP5, the gate of MN3 is connected to the gate of MN5, the source of MN3 is connected to GND, the substrate of PMOS tube is connected to VDD, and the substrate of NMOS tube is connected to GND; The source of the cascade inverter circuit MP4 is connected to VDD, the gate of MP4 is connected to the gate of MN4, the drain of MP4 is connected to the drain of MN4, the drain of MP4 is connected to the gate of MP5, the drain of MP4 is connected to the gate of MN5, the source of MN4 is connected to GND, the source of MP5 is connected to VDD, the gate of MP5 is connected to the gate of MN5, the drain of MP5 is connected to the drain of MN5, the source of MN5 is connected to GND, and the drain of MP5 and the drain of MN5 are the output V of the over-temperature protection circuit unit. out1 , the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

3. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 2, characterized in that: The positive temperature coefficient voltage V PTAT A generating circuit is provided, wherein the source of MP1 is connected to VDD, the gate of MP1 is connected to the gates of MP2 and MP3, the drain of MP1 is connected to the drain of MN1, the gate of MN1 is connected to the drain of MN1 to form a diode connection, the gate of MN1 is connected to the gate of MN2, the source of MN1 is connected to the emitter of Q1, the base of Q1 is connected to the collector and then to GND, the drain of MP2 is connected to the drain of MN2, the source of MN2 is connected to the positive electrode of R1, R1 is connected to the emitter of Q2, the base of Q2 is connected to the collector and then to GND, the source of MP3 is connected to VDD, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

4. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 1 or 2, characterized in that: The overvoltage protection circuit unit includes: a comparator 2; PMOS tubes: MP13, MP14; NMOS tubes: MN16, MN17; resistors: R4, R5; The negative electrode of the comparator 2 of the overvoltage protection circuit unit is a reference voltage V generated by the bandgap reference circuit unit. ref2 Access, step-up DC-DC circuit output V out The positive electrode of R4 is connected to the positive electrode of comparator 2, the negative electrode of R4 is connected to the positive electrode of R5, the negative electrode of R5 is connected to GND, the output of comparator 2 is connected to the gate terminal of MP13, the source terminal of MP13 is connected to VDD, the gate terminal of MP13 is connected to the gate terminal of MN16, the drain terminal of MP13 is connected to the drain terminal of MN16, the source terminal of MN16 is connected to GND, the source terminal of MP14 is connected to VDD, the gate terminal of MP14 is connected to the drain terminal of MP13, the drain terminal of MP14 is connected to the drain terminal of MN17, the gate terminal of MN17 is connected to the gate terminal of MP14, the source terminal of MN17 is connected to GND, the drain terminal of MP14 and the drain terminal of MN17 are the output V of the overvoltage protection circuit unit out2 , the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

5. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 1 or 2, characterized in that: The bandgap reference circuit unit includes: a first bandgap reference startup circuit, a second bandgap reference startup circuit, a reference voltage generating circuit, a resistor voltage divider V ref1 、V ref2 Generate circuit.

6. A method for protecting reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 5, characterized in that: The first bandgap reference startup circuit comprises: PMOS tubes: MP6, MP7, MP8; NMOS tubes: MN6, MN7; NPN type triode: Q3; capacitors: C1, C2; the second bandgap reference startup circuit comprises: PMOS tubes: MP9, MP10; NMOS tubes: MN8, MN9, MN10, MN11; resistors: R6, R7; the reference voltage generation circuit comprises: PMOS tubes: MP11, MP12; NMOS tubes: MN12, MN13, MN14, MN15; NPN type triodes: Q4, Q5; resistors: R8, R9; capacitors: C3, C4; amplifier: OPA; resistor voltage divider V ref1 、V ref2 The generating circuit includes: resistors: R10, R11, R12; capacitor: C5.

7. A method for protecting reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 5, characterized in that: The first bandgap reference startup circuit has a source of MP6 connected to a power supply VDD, a gate of MP6 connected to a gate of MP7, and a bias voltage V is provided between the gate of MP6 and the gate of MP7 by an external bias circuit. BP1 , the drain of MP6 is connected to the source of MP7, the drain of MP7 is connected to the source of MP8, and the gate of MP8 is biased by an external bias circuit. BP2 , the drain of MP8 is connected to the drain of MN6, the gate of MN6 is connected to the drain of MN6 to form a diode connection, and is connected to the gate of MN7, the gate of MN6 is also connected to the positive electrode of C1, the negative electrode of C1 is connected to GND, the source of MN6 is connected to the collector of Q3, the base of Q3 is connected to the collector, the emitter of Q3 is connected to GND, the drain of MN7 is connected to VDD, the source of MN7 is connected to the positive electrode of C2, and is connected to the base of Q4 at the same time, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

8. A method for protecting a reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 1 or 2, characterized in that: The second bandgap reference startup circuit has a positive electrode of R6 connected to the power supply VDD, a negative electrode connected to the source terminal of MP9, a gate terminal of MP9 connected to the drain terminal of MN8, a gate terminal of MP10, a drain terminal of MN9, a positive electrode of C4, a drain terminal of MP11, and a drain terminal of MN12, a drain terminal of MP9 connected to the collector of Q4, a source terminal of MN10, and a gate terminal of MN12, a gate terminal of MN8 connected to a drain terminal to form a diode connection, a source terminal of MN8 connected to a drain terminal of MN10, a gate terminal of MN10 connected to a gate terminal of MN11, and a bias voltage V is provided by an external bias circuit. BN2 , the positive electrode of R7 is connected to VDD, the negative electrode of R7 is connected to the source terminal of MP10, the gate terminal of MP10 is connected to the drain terminal of MN9, the gate terminal of MN9 is connected to the drain terminal, forming a diode connection, the source terminal of MN9 is connected to the drain terminal of MN11, the source terminal of MN11 is connected to the gate terminal of MN13, the collector of Q5, and the drain terminal of MP10, the negative electrode of C4 is connected to GND, the source terminal of MP11 is connected to VDD, the gate terminal of MP11 is connected to the gate terminal of MP12, the source terminal of MP12 is connected to VDD, the drain terminal of MP12 is connected to the gate terminal, forming a diode connection, and then connected to the drain terminal of MN13, the drain terminal of MN13 is connected to the drain terminal of MN12 and the drain terminal of MN14, the gate terminal of MN14 is connected to the gate terminal of MN15, and the bias voltage V is provided by the external bias circuit BN1 , the source end of MN14 is connected to the drain end of MN15, the source end of MN15 is connected to GND, the substrate of the PMOS tube is connected to VDD, and the substrate of the NMOS tube is connected to GND.

9. A method for protecting reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 5, characterized in that: The reference voltage generating circuit has a Q4 base connected to the emitter, and then connected to the base of Q5 and the positive electrode of the amplifier OPA. The emitter of Q4 is connected to the positive electrode of C3, the negative electrode of R8, and the positive electrode of R9. The negative electrode of C3 is connected to GND, the negative electrode of R9 is connected to GND, the positive electrode of R8 is connected to the emitter of Q5, and the negative electrode of the amplifier is connected to the output, forming a source follower structure, and the output is V out3 .

10. A method for protecting reference voltage of a boost DC-DC and a bandgap reference circuit according to claim 6, characterized in that: The resistor divider V ref1 、V ref2 The positive electrode of R10 is connected to the output of the amplifier OPA, the negative electrode of R10 is connected to the positive electrode of R11 and the positive electrode of C5, the negative electrode of R11 is connected to the positive electrode of R12, the negative electrode of R12 is connected to GND, the negative electrode of C5 is connected to GND, and the voltage generated by the positive electrode of R11 is the generated reference voltage V ref1 , the voltage generated by the positive electrode of R12 is the reference voltage V ref2 .

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