Main loop parameter design method for transformer-free multi-terminal flexible interconnection device

Abstract

The invention discloses a method for designing parameters of a main loop of a transformerless multi-terminal flexible interconnection device, and relates to the technical field of alternating-current power grid power flow control and power electronics, and the method comprises the steps: carrying out MTSNOP main loop parameter design through series converter design and parallel converter design; the design of the series converter comprises the design of the voltage, the number and the capacitance value of PFCM and PBCM submodules, the design of bridge arm inductors of the PFCM and the PBCM and the design of alternating current side equivalent filter inductors; the parallel converter design comprises parallel CMI capacity design, sub-module voltage and number design, parallel CMI sub-module capacitance value design and parallel CMI connection inductor design. According to the method, a modular design is adopted, ports are easy to expand, and the method can adapt to power systems of different scales; the reasonable parameter design can effectively improve the system transmission capacity, alleviate the line heavy load problem, optimize the transmission power flow, effectively inhibit the voltage fluctuation, and improve the voltage quality.

Description

Technical Field

[0001] The present invention relates to the technical field of AC power grid power flow control, and in particular to a main circuit parameter design method and system for a transformerless multi-terminal flexible interconnection device. Background Art

[0002] With the global economic integration and the growth of electricity demand, the power system is developing towards high voltage, large capacity and long-distance transmission; however, large-scale power systems face many challenges, including line overload, voltage fluctuations, transmission bottlenecks, etc. The power industry faces three major challenges: the increase in electricity demand and the uneven geographical distribution of power sources have resulted in restrictions on the construction of new power lines, requiring the improvement of the transmission capacity of existing lines and keeping them operating near the stability limit; the system overload and voltage quality degradation caused by the uneven distribution of line parameters require the optimization of the power system's transmittable capacity without affecting safety and stability; the frequent power changes in the system increase the complexity of grid control, requiring the optimization of transmission flows and the global consideration of the operation mode of the power system.

[0003] Existing flexible interconnection devices have problems such as high cost, large size, and low operating efficiency, which limit their application in transmission networks. In order to solve these problems, researchers proposed a transformerless multi-terminal flexible interconnection device (MTSNOP). MTSNOP consists of a series converter and a parallel cascaded multi-level converter (CMI), and has the advantages of no need for a transformer, light weight, high efficiency, low cost, and easy port expansion. The selection of MTSNOP main circuit parameters is the key to system design. Reasonable parameters can effectively improve system performance, reduce costs, and improve economy. At present, there is no MTSNOP main circuit parameter design scheme at home and abroad. Therefore, research on it is of great significance to explore the technical and economic advantages of MTSNOP under complex grid structures. It is very necessary to study the main circuit parameter design method of transformerless multi-terminal flexible interconnection devices. Summary of the invention

[0004] The purpose of this section is to summarize some aspects of embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the specification abstract and the invention title of this application to avoid blurring the purpose of this section, the specification abstract and the invention title, and such simplifications or omissions cannot be used to limit the scope of the present invention.

[0005] In view of the above-mentioned problems, the present invention is proposed.

[0006] Therefore, the technical problems solved by the present invention are: the poor transmission capacity and low voltage quality in the prior art, and how to design the main circuit parameter method of a transformerless multi-terminal flexible interconnection device.

[0007] To solve the above technical problems, the present invention provides the following technical solutions: a main circuit parameter design method for a transformerless multi-terminal flexible interconnection device, comprising dividing the MTSNOP main circuit parameter design into a series converter design and a parallel converter design; designing the sub-module voltage and quantity, capacitor value, bridge arm inductance, and AC side equivalent filter inductance of the PFCM and PBCM in the series converter design; and designing the capacity, sub-module voltage and quantity, capacitor value, and connection inductance of the parallel CMI in the parallel converter design.

[0008] As a preferred scheme of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the series converter design includes that the PBCM structure in the series converter is the same as the PFCM structure, the PFCM and the PBCM share a DC bus, and the PBCM parameter design method is the same as that of the PFCM.

[0009] As a preferred solution of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the series converter design also includes the design of the PFCM submodule voltage and quantity and the capacitance value, and the PFCM submodule voltage and quantity are set to take the AC component amplitude of the series voltage as 0.1 times the phase voltage amplitude, expressed as:

[0010]

[0011] in, is the fundamental frequency component of the PFCM output voltage, V phase is the line phase voltage;

[0012] PFCM is a single-phase MMC structure. The output voltage amplitude on the AC side is half of the DC bus voltage. The DC bus voltage is equal to the number of PFCM bridge arm submodules multiplied by the submodule capacitor voltage value. The number of submodules and the constraints on the capacitor voltage value in the submodule are expressed as:

[0013]

[0014] Where N is the number of submodules in one bridge arm of PFCM, V c is the PFCM submodule capacitor voltage;

[0015] Based on the submodule capacitor voltage value, the IGBT operating voltage is selected to be 50% to 70% of the rated voltage. The submodule capacitor voltage rating constraint is expressed as:

[0016] 0.5 V IGBT ≤V c *≤0.7·V IGBT

[0017] Among them, V IGBTis the rated voltage of the IGBT, V c * is the PFCM submodule capacitor voltage rating;

[0018] The operating current of the switching device in the PFCM is consistent with the bridge arm current, including base frequency AC and DC, which can be expressed as:

[0019]

[0020] Among them, I IGBT is the rated current of the IGBT, I N is the line current, is the DC component of the bridge arm current;

[0021] Based on the number of submodules, the constraints of the capacitor voltage value in the submodule, and the capacitor voltage rating of the submodule, after selecting the switching device that meets the requirements, select the switching frequency according to the product data sheet of the device, denoted as f PFCM ;

[0022] Designing the capacitance value of the PFCM submodule includes the effect of suppressing the DC voltage ripple by the capacitor, constraining the capacitor voltage fluctuation within the specified range to limit the voltage stress of the device, and calculating the bridge arm current of the PFCM, which is expressed as:

[0023]

[0024] Among them, i cl (t) is the chronological value of the PFCM bridge arm current connected to line l, i l (t) is the instantaneous value of the line current, I l is the current of the lth line, is the DC component of the PFCM bridge arm current connected to the lth line, ρ l is the current phase of the lth line, ω is the fundamental angular frequency, and t is the time;

[0025] The switching function of the PFCM bridge arm is constructed as:

[0026]

[0027] Among them, M l is the voltage modulation index, S l is the switching function of the bridge arm, θ cl is the phase of the bridge arm output voltage;

[0028] As the switch device operates, the current flowing into the submodule capacitor is expressed as:

[0029]

[0030] Where C is the capacitance of each submodule in the PFCM;

[0031] The DC component of the current flowing into the capacitor is zero. The DC component of the current flowing into the capacitor is expressed as:

[0032]

[0033] Calculate the DC component of the bridge arm current, expressed as:

[0034]

[0035] Substituting the DC component of the bridge arm current into the current flowing into the submodule capacitor, the current flowing into the submodule capacitor is expressed as:

[0036]

[0037] The current flowing into the submodule capacitor results in the capacitor voltage fluctuation, which is expressed as:

[0038]

[0039] Where, ΔV c is the PFCM capacitor voltage fluctuation value;

[0040] The voltage fluctuation of the submodule capacitor includes the fundamental frequency fluctuation and the double frequency fluctuation. l =1), the maximum value of capacitor voltage fluctuation is expressed as:

[0041]

[0042] The constraints for designing the submodule capacitor values ​​of the PFCM are expressed as:

[0043]

[0044] When the submodule capacitance of the PFCM meets the constraints, the submodule voltage fluctuation in the PFCM will be maintained within the required range.

[0045] As a preferred solution of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the series converter design also includes the bridge arm inductance design of the PFCM and the AC side equivalent filter inductance design, the bridge arm inductance design of the PFCM includes that the inductance of the PFCM meets the requirements of circulating current suppression, the bridge arm voltage and the bridge arm current are added to the double frequency fluctuation, and the total energy of the upper and lower bridge arms is calculated, which is expressed as:

[0046]

[0047] Among them, v clpis the output voltage of the upper bridge arm, P is the active component transmitted by the bridge arm, W pha (t) is the total energy of the upper and lower bridge arms, ρ 2f is the phase of the double frequency circulating current, V 2f is the double frequency voltage, P is the active component transmitted by the bridge arm, the parameters of the upper bridge arm are indicated by the subscript p, the parameters of the lower bridge arm are indicated by the subscript n, and L is the inductance of the bridge arm;

[0048] There are N submodules in each bridge arm, and the upper and lower bridge arms 2N bridge arms evenly share the double frequency fluctuation. The energy stored in each PFCM is W PFCM , expressed as:

[0049]

[0050] Among them, W PFCM The energy stored in each PFCM, V dc is the DC bus voltage;

[0051] The total energy of the upper and lower bridge arms generated by the double frequency circulating current is equal to the energy stored in the PFCM capacitor. The total energy of the upper and lower bridge arms and the energy stored in each PFCM are W PFCM The double frequency components in are equal, which can be expressed as:

[0052]

[0053] Among them, V dc is the DC bus voltage;

[0054] Calculate the amplitude of the double frequency circulating current, expressed as:

[0055]

[0056] Among them, I 2f is the amplitude of the double frequency circulating current;

[0057] Design the bridge arm inductance, expressed as:

[0058]

[0059] The bridge arm inductance can suppress the rising rate of the short-circuit fault current on the DC side. If the positive and negative busbars on the DC side are short-circuited, the short-circuit current forms a loop through the PFCM. The rising rate of the bridge arm current is calculated and expressed as:

[0060]

[0061] Among them, i cp is the PFCM upper arm current, i cn is the lower arm current of PFCM;

[0062] Calculate the bridge arm inductance, expressed as:

[0063]

[0064] Among them, α is the rising rate of the bridge arm current in the transient state;

[0065] The design of the equivalent filter inductor on the AC side of the PFCM includes setting the line current ripple constraint, which is expressed as:

[0066]

[0067] in, is the rated value of DC bus voltage, L l is the line equivalent filter inductance, f s is the switching frequency, △I max is the maximum value of line current ripple change;

[0068] The design constraint of the line equivalent filter inductance includes taking the maximum value of the line current ripple as 10% of the line rated current amplitude, expressed as:

[0069]

[0070] Among them, f eqs is the PFCM equivalent switching frequency;

[0071] Under the constraint condition of line equivalent filter inductance, the per-unit value of line equivalent filter inductance is set to 0.1, and the line equivalent filter inductance is calculated, which is expressed as:

[0072]

[0073] Among them, S N The line capacity.

[0074] As a preferred solution of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the parallel converter design includes parallel CMI capacity design and submodule voltage and quantity design. The parallel CMI capacity design includes when using MTSNOP to adjust the power flow of multiple interconnected transmission lines, the transmission lines provide reactive support to each other, and the parallel CMI provides reactive power to achieve reactive compensation of the balanced line. The parallel CMI reactive compensation capacity is Q N ;

[0075] Design the voltage and quantity of parallel CMI submodules. Based on the number of parallel CMI submodules, the withstand voltage of IGBT tubes, and the line phase voltage, the number of submodules per phase is constrained, which can be expressed as:

[0076]

[0077] Where M is the number of sub-modules per phase, is the submodule capacitor voltage rating.

[0078] As a preferred solution of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the parallel converter design also includes parallel CMI capacity design and submodule voltage and quantity design, and the parallel CMI submodule capacitance value design includes suppressing the ripple of the capacitor voltage by selecting the parallel CMI submodule capacitance value, and constructing the average switching function of the output voltage of each submodule, which is expressed as:

[0079]

[0080] Among them, S c (t) is the average switching function of the output voltage of each submodule, V p is the fundamental frequency component of the parallel CMI output voltage, θ p is the output voltage phase of the parallel CMI;

[0081] Calculate the instantaneous value of the capacitor current flowing into the submodule, expressed as:

[0082]

[0083] Among them, i c (t) is the instantaneous value of the capacitive current flowing into the submodule, i p (t) is the instantaneous value of CMI line current, I p is the bridge arm current amplitude;

[0084] Calculate the instantaneous value of the capacitor voltage flowing into the submodule, expressed as:

[0085]

[0086] Among them, v c (t) is the instantaneous value of the capacitor voltage flowing into the submodule, and C is the capacitance value of the parallel CMI submodule;

[0087] Design the capacitance constraint of the parallel CMI submodules, expressed as:

[0088]

[0089] Where, ΔV c is the fluctuation of capacitor voltage.

[0090] As a preferred solution of the main circuit parameter design method of the transformerless multi-terminal flexible interconnection device described in the present invention, the parallel converter design also includes a parallel CMI connection inductor design, and the parallel CMI connection inductor design includes the operating characteristics of the CMI in a steady state, and the reactive power output in an ideal state is expressed as:

[0091]

[0092] Among them, U S is the grid side voltage, U C is the output voltage of CMI, δ is the phase difference between the grid voltage and the output voltage of CMI, L p Connect inductor for CMI;

[0093] From the perspective of reactive power compensation capacity, the constraint on CMI connection inductance is expressed as:

[0094]

[0095] If the three-phase voltage is unbalanced, the constraint on the CMI connection inductance is expressed as:

[0096]

[0097] in, It is the three-phase unbalanced voltage;

[0098] If the CMI connection inductor meets the filtering effect of the output current, the inductor standard value is set to 0.1, and the CMI connection inductor is expressed as:

[0099]

[0100] The CMI connection inductor is designed to meet the requirements of reactive power compensation under rated capacity, stable operation under unbalanced grid voltage, and filtering effect on output current.

[0101] Another object of the present invention is to provide a main circuit parameter design system for a transformerless multi-terminal flexible interconnection device, which can reasonably design the main circuit parameters of the transformerless multi-terminal flexible interconnection device by constructing an automatic allocation module, a series converter module and a parallel converter module, thereby solving the current problem of main circuit parameter design of a transformerless multi-terminal flexible interconnection device.

[0102] As a preferred solution of the main circuit parameter design system based on the transformerless multi-terminal flexible interconnection device described in the present invention, it includes: an automatic allocation module, a series converter module, and a parallel converter module; the automatic allocation module is used to divide the MTSNOP main circuit parameter design into a series converter design and a parallel converter design; the series converter module is used for the voltage and quantity of PFCM and PBCM sub-modules, the capacitance of PFCM and PBCM sub-modules, the bridge arm inductance of PFCM and PBCM, and the parameter design of the AC side equivalent filter inductance; the parallel converter module is used for the parameter design of the parallel CMI capacity, the sub-module voltage and quantity, the parallel CMI sub-module capacitance and the parallel CMI connection inductance.

[0103] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of a method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device.

[0104] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of a method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device.

[0105] Beneficial effects of the present invention: The main circuit parameter design method based on the transformerless multi-terminal flexible interconnection device provided by the present invention adopts a modular design, and the port is easy to expand, so it can adapt to power systems of different sizes; the voltage and quantity design of the PFCM and PBCM sub-modules affect the amplitude of the series equivalent output voltage, thereby determining the range of power flow regulation; the capacitance value design of the PFCM and PBCM sub-modules affects the amplitude of the capacitor voltage fluctuation, thereby improving the quality of the output voltage; the bridge arm inductance design of the PFCM and PBCM improves the stable operation and system performance of the PFCM and PBCM; the equivalent filter inductance design of the PFCM and PBCM AC side constrains the filtering effect of the switching frequency current ripple; the voltage and quantity design of the parallel CMI sub-modules constrains The relationship between the voltage and quantity of CMI submodules makes the control of the transformerless multi-terminal flexible interconnection device simple, the voltage resistance of a single switch device is reduced, and the manufacturing cost is reduced; through the parallel CMI submodule capacitance value design, the appropriate capacitance value is selected to ensure the stable performance of the system; through the parallel CMI connection inductance design, the system stability is ensured in three cases: the compensation demand for reactive power under rated capacity, the stable operation of the grid voltage imbalance, and the filtering effect on the output current; reasonable parameter design can effectively improve the system transmission capacity, alleviate the line overload problem, optimize the transmission flow, and can effectively suppress voltage fluctuations and improve voltage quality; the present invention has achieved better results in terms of easy port expansion, increased transmission capacity, improved voltage quality, and MTSNOP main circuit parameter design. BRIEF DESCRIPTION OF THE DRAWINGS

[0106] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0107] Figure 1 An overall flow chart of a method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device provided in the first embodiment of the present invention;

[0108] Figure 2A topological structure of a transformerless multi-terminal flexible interconnection device and a system schematic diagram of interconnected multi-transmission lines provided in the first embodiment of the present invention;

[0109] Figure 3 A schematic diagram of a system for connecting three transmission lines using a transformerless multi-terminal flexible interconnection device provided in a first embodiment of the present invention;

[0110] Figure 4 A transformerless multi-terminal flexible interconnection device provided in the second embodiment of the present invention is a capacitor voltage waveform diagram of a series converter submodule;

[0111] Figure 5 A capacitor voltage waveform diagram of a transformerless multi-terminal flexible interconnect device connected in parallel with CMI submodules provided in a second embodiment of the present invention;

[0112] Figure 6 A current waveform diagram of line 1 connected to a transformerless multi-terminal flexible interconnection device provided in a second embodiment of the present invention;

[0113] Figure 7 A current waveform diagram of line 2 connected to a transformerless multi-terminal flexible interconnection device provided in a second embodiment of the present invention;

[0114] Figure 8 A current waveform diagram of line 3 connected to a transformerless multi-terminal flexible interconnection device provided in a second embodiment of the present invention;

[0115] Fig. 9 A power waveform diagram of each line connected to a transformerless multi-terminal flexible interconnection device provided in a second embodiment of the present invention;

[0116] Fig.10 A module schematic diagram of a main circuit parameter design system for a transformerless multi-terminal flexible interconnection device provided in the third example of the present invention. DETAILED DESCRIPTION

[0117] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in the art without creative work should fall within the scope of protection of the present invention.

[0118] Example 1, reference Figure 1-Figure 3 , which is an embodiment of the present invention, provides a method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device, comprising:

[0119] S1: The MTSNOP main circuit parameter design is divided into series converter design and parallel converter design.

[0120] Furthermore, the series converter design includes a power balance module (PBCM) in the series converter having the same structure as a power flow control module (PFCM), the PFCM and the PBCM share a DC bus, and the PBCM parameter design method is the same as that of the PFCM.

[0121] It should be noted that the parameter design of the MTSNOP main circuit not only improves the design flexibility by independently designing the series converter and the parallel converter, but also enables fine adjustment of the system performance through this step-by-step design method, thereby optimizing the efficiency and stability of the overall system. In particular, the design consistency of the PBCM structure and the PFCM structure in the series converter, as well as their configuration of sharing the DC bus, ensures the high efficiency of the system in energy transfer and management. At the same time, the sameness of the PBCM parameter design and the PFCM parameter design ensures the compatibility and interchangeability between system components, reducing maintenance costs and complexity.

[0122] S2: Design the sub-module voltage and quantity, capacitor value, bridge arm inductance, and AC side equivalent filter inductance of the PFCM and PBCM in the series converter design.

[0123] Furthermore, the series converter design also includes the design of the PFCM submodule voltage and quantity and the capacitance value. The PFCM submodule voltage and quantity are set to take the AC component amplitude of the series voltage as 0.1 times the phase voltage amplitude, expressed as:

[0124]

[0125] in, is the fundamental frequency component of the PFCM output voltage, V phase is the line phase voltage.

[0126] PFCM is a single-phase MMC structure. The output voltage amplitude on the AC side is half of the DC bus voltage. The DC bus voltage is equal to the number of PFCM bridge arm submodules multiplied by the submodule capacitor voltage value. The number of submodules and the constraints on the capacitor voltage value in the submodule are expressed as:

[0127]

[0128] Where N is the number of submodules in one bridge arm of PFCM, V c is the PFCM submodule capacitor voltage.

[0129] Based on the submodule capacitor voltage value, the IGBT operating voltage is selected to be 50% to 70% of the rated voltage. The submodule capacitor voltage rating constraint is expressed as:

[0130] 0.5 V IGBT ≤V c *≤0.7·V IGBT

[0131] Among them, V IGBT is the rated voltage of the IGBT, V c * is the PFCM submodule capacitor voltage rating.

[0132] The operating current of the switching device in the PFCM is consistent with the bridge arm current, including base frequency AC and DC, which can be expressed as:

[0133]

[0134] Among them, I IGBT is the rated current of the IGBT, I N is the line current, is the DC component of the bridge arm current.

[0135] Based on the number of submodules, the constraints of the capacitor voltage value in the submodule, and the capacitor voltage rating of the submodule, after selecting the switching device that meets the requirements, select the switching frequency according to the product data sheet of the device, denoted as f PFCM .

[0136] It should be noted that the design of the PFCM submodule capacitor value includes the capacitor's suppression effect on DC voltage ripple, constraining the capacitor voltage fluctuation within the specified range to limit the device's voltage stress, and calculating the PFCM bridge arm current, which is expressed as:

[0137]

[0138] Among them, i cl (t) is the chronological value of the PFCM bridge arm current connected to line l, i l (t) is the instantaneous value of the line current, I l is the current of the lth line, is the DC component of the PFCM bridge arm current connected to the lth line, ρ l is the current phase of the lth line, ω is the fundamental angular frequency, and t is the time.

[0139] The switching function of the PFCM bridge arm is constructed as:

[0140]

[0141] Among them, M l is the voltage modulation index, S l is the switching function of the bridge arm, θ cl is the phase of the bridge arm output voltage.

[0142] As the switch device operates, the current flowing into the submodule capacitor is expressed as:

[0143]

[0144] Where C is the capacitance of each submodule in the PFCM.

[0145] The DC component of the current flowing into the capacitor is zero. The DC component of the current flowing into the capacitor is expressed as:

[0146]

[0147] Calculate the DC component of the bridge arm current, expressed as:

[0148]

[0149] Substituting the DC component of the bridge arm current into the current flowing into the submodule capacitor, the current flowing into the submodule capacitor is expressed as:

[0150]

[0151] The capacitor voltage fluctuation can be obtained by the current flowing into the submodule capacitor, which is expressed as:

[0152]

[0153] Where, ΔV c is the PFCM capacitor voltage fluctuation value.

[0154] The voltage fluctuation of the submodule capacitor includes the fundamental frequency fluctuation and the double frequency fluctuation. l =1), the maximum value of capacitor voltage fluctuation is expressed as:

[0155]

[0156] The constraints for designing the submodule capacitor values ​​of the PFCM are expressed as:

[0157]

[0158] When the submodule capacitance of the PFCM meets the constraints, the submodule voltage fluctuation in the PFCM will be maintained within the required range.

[0159] It should also be noted that the series converter design also includes the PFCM bridge arm inductance design and the AC side equivalent filter inductance design. The PFCM bridge arm inductance design includes the PFCM inductance meeting the requirements of circulating current suppression, adding the bridge arm voltage and bridge arm current to the double frequency fluctuation, and calculating the total energy of the upper and lower bridge arms, which is expressed as:

[0160]

[0161] Among them, v clp is the output voltage of the upper bridge arm, P is the active component transmitted by the bridge arm, W pha (t) is the total energy of the upper and lower bridge arms, ρ 2f is the phase of the double frequency circulating current, V 2f is the double frequency voltage, P is the active component transmitted by the bridge arm, the parameters of the upper bridge arm are marked with subscript p, the parameters of the lower bridge arm are marked with subscript n, and L is the inductance of the bridge arm.

[0162] There are N submodules in each bridge arm, and the upper and lower bridge arms 2N bridge arms evenly share the double frequency fluctuation. The energy stored in each PFCM is W PFCM , expressed as:

[0163]

[0164] Among them, W PFCM The energy stored in each PFCM, V dc is the DC bus voltage.

[0165] The total energy of the upper and lower bridge arms generated by the double frequency circulating current is equal to the energy stored in the PFCM capacitor. The total energy of the upper and lower bridge arms and the energy stored in each PFCM are W PFCM The double frequency components in are equal, which can be expressed as:

[0166]

[0167] Among them, V dc is the DC bus voltage.

[0168] Calculate the amplitude of the double frequency circulating current, expressed as:

[0169]

[0170] Among them, I 2f is the amplitude of the double frequency circulating current;

[0171] Design the bridge arm inductance, expressed as:

[0172]

[0173] The bridge arm inductance can suppress the rising rate of the short-circuit fault current on the DC side. If the positive and negative busbars on the DC side are short-circuited, the short-circuit current forms a loop through the PFCM. The rising rate of the bridge arm current is calculated and expressed as:

[0174]

[0175] Among them, i cp is the PFCM upper arm current, icn is the PFCM lower arm current.

[0176] Calculate the bridge arm inductance, expressed as:

[0177]

[0178] Among them, α is the rising rate of the bridge arm current in the transient state.

[0179] The design of the equivalent filter inductor on the AC side of the PFCM includes setting the line current ripple constraint, which is expressed as:

[0180]

[0181] in, is the rated value of DC bus voltage, L l is the line equivalent filter inductance, f s is the switching frequency, △I max is the maximum value of line current ripple change.

[0182] The design constraint of the line equivalent filter inductance includes taking the maximum value of the line current ripple as 10% of the line rated current amplitude, expressed as:

[0183]

[0184] Among them, f eqs is the PFCM equivalent switching frequency.

[0185] Under the constraint condition of line equivalent filter inductance, the per-unit value of line equivalent filter inductance is set to 0.1, and the line equivalent filter inductance is calculated, which is expressed as:

[0186]

[0187] Among them, S N The line capacity.

[0188] It should also be noted that the voltage and number of PFCM and PBCM submodules directly determine the amplitude of the series equivalent output voltage, and thus determine the range of power flow regulation. The number of PFCM and PBCM submodules directly depends on the selection of the submodule capacitor voltage and the relationship between the series voltage. In order to ensure the reliability of the device, a certain margin is usually reserved when selecting the number of submodules. When the selected submodule capacitor voltage value is too large, a switch device with a higher withstand voltage value is required, and the corresponding manufacturing cost will also increase sharply. In addition, the output voltage level of a small number of submodules is low, and the harmonic characteristics are poor. If the selected submodule capacitor voltage value is too low, the manufacturing cost of the required switch device is greatly reduced, but too many submodules make the control complex and the overall volume of the device larger. Therefore, when selecting the number of submodules and the submodule capacitor voltage value, it is also necessary to comprehensively consider performance, reliability, cost and technical feasibility in combination with the actual application scenario. Because when the operating voltage is too high, the device loss will increase greatly, and when the operating voltage is too low, the utilization rate of the device is insufficient, and it is necessary to ensure that the switch device meets its withstand voltage V IGBT And flow resistance I IGBT , so the operating voltage of IGBT is selected to be 50% to 70% of the rated voltage. The capacitance value of the PFCM and PBCM submodules affects the amplitude of the capacitor voltage fluctuation, thereby affecting the quality of the output voltage. In addition, the bridge arm inductance in the series converter plays a key role in the power transmission of PFCM and PBCM and reducing the output current fluctuation. When designing the bridge arm inductance, it is necessary to comprehensively consider the parameter design from the aspects of satisfying the circulation suppression and fault current suppression. The bridge arm inductance, as part of the internal circulation loop between PFCM and PBCM, has a significant effect on suppressing the internal circulation. Therefore, the design of the bridge arm inductance is of great significance to the stable operation of PFCM and PBCM and the performance of the system. In the design of the line equivalent filter inductance, if the system internal impedance of the actual power grid is considered, the equivalent filter inductance value can be appropriately reduced.

[0189] S3: Design the capacity of the parallel CMI, submodule voltage and quantity, capacitor value, and connection inductance in the parallel converter design.

[0190] Furthermore, the parallel converter design includes the parallel CMI capacity design and the submodule voltage and quantity design. The parallel CMI capacity design includes that when using MTSNOP to adjust the power flow of multiple interconnected transmission lines, the transmission lines provide reactive support to each other, and the parallel CMI provides reactive power to achieve reactive compensation of the balanced line. The parallel CMI reactive compensation capacity is Q N .

[0191] Designing the voltage and quantity of parallel CMI submodules includes designing the number constraints of each phase submodule based on the number of parallel CMI submodules, IGBT tube withstand voltage, and line phase voltage, which can be expressed as:

[0192]

[0193] Where M is the number of sub-modules per phase, is the submodule capacitor voltage rating.

[0194] It should be noted that the parallel converter design also includes the parallel CMI capacity design and the submodule voltage and quantity design. The parallel CMI submodule capacitance value design includes the selection of the parallel CMI submodule capacitance value to suppress the ripple of the capacitor voltage and construct the average switching function of each submodule output voltage, which is expressed as:

[0195]

[0196] Among them, S c (t) is the average switching function of the output voltage of each submodule, V p is the fundamental frequency component of the parallel CMI output voltage, θ p is the parallel CMI output voltage phase.

[0197] Calculate the instantaneous value of the capacitor current flowing into the submodule, expressed as:

[0198]

[0199] Among them, i c (t) is the instantaneous value of the capacitive current flowing into the submodule, i p (t) is the instantaneous value of CMI line current, I p is the bridge arm current amplitude.

[0200] Calculate the instantaneous value of the capacitor voltage flowing into the submodule, expressed as:

[0201]

[0202] Among them, v c (t) is the instantaneous value of the capacitor voltage flowing into the submodule, and C is the capacitance value of the parallel CMI submodule.

[0203] Design the capacitance constraint of the parallel CMI submodules, expressed as:

[0204]

[0205] Where, ΔV c is the fluctuation of capacitor voltage.

[0206] It should also be noted that the parallel converter design also includes the parallel CMI connection inductor design. The parallel CMI connection inductor design includes the operating characteristics of the CMI in steady state and the reactive power output in ideal state, which is expressed as:

[0207]

[0208] Among them, U S is the grid side voltage, U C is the output voltage of CMI, δ is the phase difference between the grid voltage and the output voltage of CMI, L p Connect the inductor for CMI.

[0209] From the perspective of reactive power compensation capacity, the constraint on CMI connection inductance is expressed as:

[0210]

[0211] If the three-phase voltage is unbalanced, the constraint on the CMI connection inductance is expressed as:

[0212]

[0213] in, It is three-phase unbalanced voltage.

[0214] If the CMI connection inductor meets the filtering effect of the output current, the inductor standard value is set to 0.1, and the CMI connection inductor is expressed as:

[0215]

[0216] The design of CMI connection inductance is based on meeting the reactive power compensation requirements under rated capacity, stable operation under grid voltage imbalance and filtering effect on output current.

[0217] It should also be noted that in the design of the voltage and number of parallel CMI submodules, similar to the design of the voltage of the PFCM bridge arm submodule, when the designed submodule capacitor voltage is too low, the more submodules are required, the more complex the control is, and the bulkier the volume is; on the contrary, when the submodule capacitor voltage is designed to be too high, the number of submodules required is less, but the single switch device needs to withstand a higher voltage, and the manufacturing cost is high. Therefore, the selection of the rated voltage of the submodule capacitor needs to be selected after comprehensive consideration of the actual situation, and a more appropriate size is selected. Considering the reliability of the system, the selection of the number of submodules usually retains some redundancy. In addition, the number of submodules suitable for the modulation method used must also be considered. In the design of the voltage and number of parallel CMI submodules, a small capacitance value can improve the system's following performance, but if it is too low, it will affect the stability of the DC side voltage; a large capacitance value can ensure the stability of the system, but if the capacitance value is too large, the cost will also increase. In the design of the parallel CMI connection inductor, δ is the phase difference between the grid-side voltage and the output voltage of the CMI, which is usually about 6°.

[0218] Example 2, reference Figure 4-Figure 9, which is an embodiment of the present invention, provides a main circuit parameter design method for a transformerless multi-terminal flexible interconnection device. In order to verify the beneficial effects of the present invention, scientific demonstration is carried out through economic benefit calculation and simulation experiments.

[0219] The system is simulated and verified using MATLAB / Simulink software. The power flow of each line in the simulation is shown in Table 1, and the simulation parameters are shown in Table 2.

[0220] Refer to Table 1 for a comparative analysis of the experimental data.

[0221] Table 1 Flow conditions of each line

[0222]

[0223] Table 2 Simulation parameters

[0224]

[0225] Figure 4 It is the sub-module capacitor voltage of PFCM and PBCM in the MTSNOP series converter. The PFCM connected to line 1 operates under rated conditions, and its capacitor voltage fluctuation is about 8%. Since the maximum value of the fundamental frequency and the double frequency voltage fluctuation is taken as the superposition relationship when designing the capacitor parameters, some margin is left, so the capacitor fluctuation of 8% meets the design requirements. Figure 5 The voltage fluctuation of the capacitor of the parallel CMI submodule is about 5%, which is consistent with the design value. Figures 6 to 8 They are the current waveforms of each line respectively. Fig. 9 It is the active power waveform and reactive power waveform of each line.

[0226] The simulation results show that the proposed main loop parameter design method based on MTSNOP can achieve efficient and stable operation of the device, and the effectiveness of the proposed design method is verified in the results. Therefore, our invention is creative.

[0227] Example 3, reference Fig.10 , which is an embodiment of the present invention, provides a main circuit parameter design method system for a transformerless multi-terminal flexible interconnection device, including an automatic allocation module, a series converter module, and a parallel converter module.

[0228] The automatic allocation module is used to divide the MTSNOP main circuit parameter design into series converter design and parallel converter design; the series converter module is used for the voltage and quantity of PFCM and PBCM sub-modules, the capacitance of PFCM and PBCM sub-modules, the bridge arm inductance of PFCM and PBCM and the parameter design of the equivalent filter inductance on the AC side; the parallel converter module is used for the parameter design of the parallel CMI capacity, sub-module voltage and quantity, parallel CMI sub-module capacitance and parallel CMI connection inductance.

[0229] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0230] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.

[0231] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering, or processing in another suitable manner as necessary, and then stored in a computer memory.

[0232] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc. It should be noted that the above embodiments are only used to illustrate the technical solution of the present invention and are not limited. Although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

[0233] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device, characterized in that: include: The MTSNOP main circuit parameter design is divided into series converter design and parallel converter design; Design the submodule voltage and quantity, capacitor value, bridge arm inductance, and AC side equivalent filter inductance of PFCM and PBCM in the series converter design; The capacity of the parallel CMI, submodule voltage and quantity, submodule capacitance value, and connection inductance in the parallel converter design are designed.

2. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 1, characterized in that: The series converter design includes that the PBCM structure in the series converter is the same as the PFCM structure, the PFCM and the PBCM share a DC bus, and the PBCM parameter design method is the same as that of the PFCM.

3. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 2, characterized in that: The series converter design also includes the design of PFCM submodule voltage and quantity and capacitor value. The PFCM submodule voltage and quantity are set to take the AC component amplitude of the series voltage as 0.1 times the phase voltage amplitude, expressed as: in, is the fundamental frequency component of the PFCM output voltage, V phase is the line phase voltage; PFCM is a single-phase MMC structure. The output voltage amplitude on the AC side is half of the DC bus voltage. The DC bus voltage is equal to the number of PFCM bridge arm submodules multiplied by the submodule capacitor voltage value. The number of submodules and the constraints on the capacitor voltage value in the submodule are expressed as: Where N is the number of submodules in one bridge arm of PFCM, V c is the PFCM submodule capacitor voltage; Based on the submodule capacitor voltage value, the IGBT operating voltage is selected to be 50% to 70% of the rated voltage. The submodule capacitor voltage rating constraint is expressed as: 0.5 V IGBT ≤V c * ≤0.7 V IGBT Among them, V IGBT is the rated voltage of the IGBT, V c * is the PFCM submodule capacitor voltage rating; The operating current of the switching device in the PFCM is consistent with the bridge arm current, including base frequency AC and DC, which can be expressed as: Among them, I IGBT is the rated current of the IGBT, I N is the line current, is the DC component of the bridge arm current; Based on the number of submodules, the constraints of the capacitor voltage value in the submodule, and the capacitor voltage rating of the submodule, after selecting the switching device that meets the requirements, select the switching frequency according to the product data sheet of the device, denoted as f PFCM ; Designing the capacitance value of the PFCM submodule includes the effect of suppressing the DC voltage ripple by the capacitor, constraining the capacitor voltage fluctuation within the specified range to limit the voltage stress of the device, and calculating the bridge arm current of the PFCM, which is expressed as: Among them, i cl (t) is the chronological value of the PFCM bridge arm current connected to line l, i l (t) is the instantaneous value of the current in line l, I l is the current of the lth line, is the DC component of the PFCM bridge arm current connected to the lth line, ρ l is the current phase of the lth line, ω is the fundamental angular frequency, and t is the time; The switching function of the PFCM bridge arm is constructed as: Among them, M l is the voltage modulation index, S l is the switching function of the bridge arm, θ cl is the phase of the bridge arm output voltage; As the switch device operates, the current flowing into the submodule capacitor is expressed as: Where C is the capacitance of each submodule in the PFCM; The DC component of the current flowing into the capacitor is zero. The DC component of the current flowing into the capacitor is expressed as: Calculate the DC component of the bridge arm current, expressed as: Substituting the DC component of the bridge arm current into the current flowing into the submodule capacitor, the current flowing into the submodule capacitor is expressed as: The current flowing into the submodule capacitor results in the capacitor voltage fluctuation, which is expressed as: Where, ΔV c is the PFCM capacitor voltage fluctuation value; The voltage fluctuation of the submodule capacitor includes the fundamental frequency fluctuation and the double frequency fluctuation. l =1), the maximum value of capacitor voltage fluctuation is expressed as: The constraints for designing the submodule capacitor values ​​of the PFCM are expressed as: When the submodule capacitance of the PFCM meets the constraints, the submodule voltage fluctuation in the PFCM will be maintained within the required range.

4. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 3, characterized in that: The series converter design also includes the bridge arm inductance design of the PFCM and the equivalent filter inductance design on the AC side. The bridge arm inductance design of the PFCM includes that the inductance of the PFCM meets the requirements of circulating current suppression, the bridge arm voltage and the bridge arm current are added to the double frequency fluctuation, and the total energy of the upper and lower bridge arms is calculated, which is expressed as: Among them, v clp is the output voltage of the upper bridge arm, P is the active component transmitted by the bridge arm, W pha (t) is the total energy of the upper and lower bridge arms, ρ 2f is the phase of the double frequency circulating current, V 2f is the double frequency voltage, P is the active component transmitted by the bridge arm, the parameters of the upper bridge arm are indicated by the subscript p, the parameters of the lower bridge arm are indicated by the subscript n, and L is the inductance of the bridge arm; There are N submodules in each bridge arm, and the upper and lower bridge arms 2N bridge arms evenly share the double frequency fluctuation. The energy stored in each PFCM is W PFCM , expressed as: Among them, W PFCM The energy stored in each PFCM, V dc is the DC bus voltage; The total energy of the upper and lower bridge arms generated by the double frequency circulating current is equal to the energy stored in the PFCM capacitor. The total energy of the upper and lower bridge arms and the energy stored in each PFCM are W PFCM The double frequency components in are equal, which can be expressed as: Among them, V dc is the DC bus voltage; Calculate the amplitude of the double frequency circulating current, expressed as: Among them, I 2f is the amplitude of the double frequency circulating current; Design the bridge arm inductance, expressed as: The bridge arm inductance can suppress the rising rate of the short-circuit fault current on the DC side. If the positive and negative busbars on the DC side are short-circuited, the short-circuit current forms a loop through the PFCM. The rising rate of the bridge arm current is calculated and expressed as: Among them, i cp is the PFCM upper arm current, i cn is the lower arm current of PFCM; Calculate the bridge arm inductance, expressed as: Among them, α is the rising rate of the bridge arm current in the transient state; The design of the equivalent filter inductor on the AC side of the PFCM includes setting the line current ripple constraint, which is expressed as: in, is the rated value of DC bus voltage, L l is the line equivalent filter inductance, f s is the switching frequency, △I max is the maximum value of line current ripple change; The design constraint of the line equivalent filter inductance includes taking the maximum value of the line current ripple as 10% of the line rated current amplitude, expressed as: Among them, f eqs is the PFCM equivalent switching frequency; Under the constraint condition of line equivalent filter inductance, the per-unit value of line equivalent filter inductance is set to 0.1, and the line equivalent filter inductance is calculated, which is expressed as: Among them, S N The line capacity.

5. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 4, characterized in that: The parallel converter design includes parallel CMI capacity design and submodule voltage and quantity design. The parallel CMI capacity design includes that when using MTSNOP to adjust the power flow of multiple interconnected transmission lines, the transmission lines provide reactive support to each other, and the parallel CMI provides reactive power to achieve reactive compensation of balanced lines. The parallel CMI reactive compensation capacity is Q N ; Designing the voltage and quantity of parallel CMI submodules includes designing the number constraints of each phase submodule based on the number of parallel CMI submodules, IGBT tube withstand voltage, and line phase voltage, which can be expressed as: Where M is the number of sub-modules per phase, is the submodule capacitor voltage rating.

6. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 5, characterized in that: The parallel converter design also includes parallel CMI capacity design and submodule voltage and quantity design. The parallel CMI submodule capacitance value design includes suppressing the ripple of the capacitor voltage by selecting the parallel CMI submodule capacitance value, and constructing the average switching function of each submodule output voltage, which is expressed as: Among them, S c (t) is the average switching function of the output voltage of each submodule, V p is the fundamental frequency component of the parallel CMI output voltage, θ p is the output voltage phase of the parallel CMI; Calculate the instantaneous value of the capacitor current flowing into the submodule, expressed as: Among them, i c (t) is the instantaneous value of the capacitive current flowing into the submodule, i p (t) is the instantaneous value of CMI line current, I p is the bridge arm current amplitude; Calculate the instantaneous value of the capacitor voltage flowing into the submodule, expressed as: Among them, v c (t) is the instantaneous value of the capacitor voltage flowing into the submodule, and C is the capacitance value of the parallel CMI submodule; Design the capacitance constraint of the parallel CMI submodules, expressed as: Where, ΔV c is the fluctuation of capacitor voltage.

7. The method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to claim 6, characterized in that: The parallel converter design also includes a parallel CMI connection inductor design, which includes the operating characteristics of the CMI in a steady state and the reactive power output in an ideal state, which is expressed as: Among them, U S is the grid side voltage, U C is the output voltage of CMI, δ is the phase difference between the grid voltage and the output voltage of CMI, L p Connect inductor for CMI; From the perspective of reactive power compensation capacity, the constraint on CMI connection inductance is expressed as: If the three-phase voltage is unbalanced, the constraint on the CMI connection inductance is expressed as: in, It is the three-phase unbalanced voltage; If the CMI connection inductor meets the filtering effect of the output current, the inductor standard value is set to 0.1, and the CMI connection inductor is expressed as: The design of CMI connection inductance is based on meeting the reactive power compensation requirements under rated capacity, stable operation under grid voltage imbalance and filtering effect on output current.

8. A system using the method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device as claimed in any one of claims 1 to 7, characterized in that: It includes automatic distribution module, series converter module and parallel converter module; The automatic allocation module is used to divide the MTSNOP main loop parameter design into a series converter design and a parallel converter design; The series converter module is used for the voltage and quantity of PFCM and PBCM submodules, the capacitance value of PFCM and PBCM submodules, the bridge arm inductance of PFCM and PBCM and the parameter design of the equivalent filter inductance on the AC side; The parallel converter module is used for parameter design of parallel CMI capacity, submodule voltage and quantity, parallel CMI submodule capacitance value and parallel CMI connection inductance.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for designing main circuit parameters of a transformerless multi-terminal flexible interconnection device according to any one of claims 1 to 7 are implemented.

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