Isolated switching power supply circuit and control circuit and power supply control method thereof

Abstract

The invention provides an isolated switching power supply circuit with a dynamic response control function, a secondary side control circuit of the isolated switching power supply circuit and a power supply control method. The secondary side control circuit comprises a rectifier tube control signal generation circuit which provides a rectifier tube control signal for controlling the synchronous connection and disconnection of a synchronous rectifier tube; the input end of the power supply circuit is coupled with the second end of the synchronous rectifier tube, the output end of the power supply circuit is coupled with the power supply end of the secondary side control circuit and used for providing power supply voltage for the secondary side control circuit, and in the period when the synchronous rectifier tube stops follow current, the power supply circuit supplies power in a first current state in a first time period, and the power supply circuit supplies power in a second current state in a second time period. In the second time period, the power supply circuit supplies power in a second current state when supplying power, and the maximum value of the power supply current in the first current state is larger than the maximum value of the power supply current in the second current state. According to the invention, while power supply through the secondary side synchronous rectifier tube is fully satisfied, false triggering of dynamic response control is avoided, and improper output voltage increase and device damage can be avoided.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and specifically but not limited to an isolated switching power supply circuit with a dynamic response control function, a secondary side control circuit and a power supply control method thereof. Background Art

[0002] Isolated switching power supply circuits are widely used in the power supply of electronic products because they can safely draw power from the mains. Isolated switching power supplies are isolated by transformers and control the output of energy to the secondary side by controlling the switching duty cycle of the primary switch. Switching power supplies generally have rectifier tubes on the secondary side to charge the output capacitor in time periods and provide stable power to the load.

[0003] Synchronous rectification (SR) is a technology that uses power switch tubes such as metal oxide semiconductor field effect transistors (MOSFET) to replace rectifier diodes to reduce rectification losses. It has been widely used in industrial power supplies, consumer electronics and other fields.

[0004] Figure 1 An isolated flyback switching power supply circuit is shown. The isolated switching power supply circuit adopts a primary side control architecture, and the primary side control circuit controls the primary side switch Q based on the received feedback signal FB. The feedback signal FB can be obtained from the auxiliary winding. The secondary side synchronous rectifier SR is controlled by the secondary side control circuit to perform synchronous rectification. In order to reduce the complexity and application cost of the system, the secondary side control circuit usually has a built-in high-voltage power supply technology, and uses the voltage at the drain end of the synchronous rectifier SR to power the secondary side control circuit through the power supply circuit inside the secondary side control circuit.

[0005] The isolated flyback circuit of the primary side control architecture has the characteristics of low operating frequency and slow dynamic response speed of the load when lightly loaded. In order to speed up the dynamic response speed of the output when lightly loaded, a dynamic acceleration algorithm needs to be added. Usually, when the secondary side circuit detects the dynamic change of the secondary side load, a signal is sent to the primary side to control the primary side circuit to respond dynamically. For example, when the output voltage drops, the secondary side synchronous rectifier SR is controlled to turn on again for a period of time at a certain time when the freewheeling is stopped, so that the voltage on the secondary side winding increases and is reflected in the feedback signal FB detected by the primary side. When the primary side control circuit detects the signal in the corresponding time period, if the feedback signal on the auxiliary winding is higher than the threshold, it means that the system load has increased significantly, and the loop needs to respond quickly and turn on the primary side switch in advance. At this time, the operating frequency of the system is increased, and the response speed of the system is accelerated, which avoids the serious drop of the output voltage during dynamic switching under light load conditions.

[0006] However, due to the interference of charging current on the secondary winding, the power supply technology is prone to interfere with the voltage on the secondary winding, causing dynamic response misjudgment, resulting in an abnormal increase in output voltage, making the system unable to work normally or even damaging the device.

[0007] In view of this, it is necessary to provide a new structure or control method to solve at least part of the above problems. Summary of the invention

[0008] At least in view of one or more problems in the background technology, the present invention application proposes an isolated switching power supply circuit with dynamic response control function, a secondary side control circuit and a power supply control method thereof.

[0009] According to one aspect of the present application, a secondary control circuit is proposed for an isolated switching power supply circuit, wherein the isolated switching power supply circuit has a dynamic response control function, the isolated switching power supply circuit includes a primary circuit and a secondary circuit, the secondary circuit includes a secondary winding, a synchronous rectifier and the secondary control circuit, wherein the first end of the synchronous rectifier is coupled to the secondary winding, and the second end of the synchronous rectifier is coupled to the output end of the isolated switching power supply circuit, the secondary control circuit includes: a rectifier control signal generating circuit, providing a rectifier control signal for controlling the synchronous conduction and shutdown of the synchronous rectifier; and a power supply circuit, wherein the input end of the power supply circuit is coupled to the second end of the synchronous rectifier, and the output end of the power supply circuit is coupled to the power supply end of the secondary control circuit for providing a power supply voltage for the secondary control circuit, wherein during the period when the synchronous rectifier stops freewheeling, in a first time period, the power supply circuit supplies power in a first current state, and in a second time period, the power supply circuit supplies power in a second current state, wherein the maximum value of the power supply current in the first current state is greater than the maximum value of the power supply current in the second current state.

[0010] In one embodiment, the isolated switching power supply circuit is a flyback switching power supply circuit.

[0011] In one embodiment, the power supply circuit includes a linear switching device.

[0012] In one embodiment, within a preset time from when the synchronous rectifier is switched from on to off, the power supply circuit is charged in a first current state when supplying power, and after the preset time, the power supply circuit is charged in a second current state when supplying power.

[0013] In one embodiment, the secondary side control circuit further includes a power supply control circuit, which includes: a power supply limiting circuit, which provides a power supply limiting signal based on the rectifier control signal; a power supply control signal generating circuit, which provides a power supply control signal based on at least the power supply end voltage, and is used to control the power supply circuit to turn on the power supply when the power supply control signal is valid; and a power supply control output circuit, whose first input end is coupled to the output end of the power supply limiting circuit, and whose second input end is coupled to the output end of the power supply control signal generating circuit, when the power supply control signal is valid and the power supply limiting signal is in an invalid state, the power supply control output circuit controls the power supply circuit to be powered in a first current state, and when the power supply control signal is valid and the power supply limiting signal is in a valid state, the power supply control output circuit controls the power supply circuit to be powered in a second current state.

[0014] In one embodiment, the power supply limiting circuit includes: a timing circuit, whose input end receives a rectifier control signal, and the timing circuit starts timing when the synchronous rectifier switches from on to off; and a trigger circuit, whose first input end is coupled to the output end of the timing circuit, whose second input end receives the rectifier control signal, and whose output end is used to provide a power supply limiting signal. When the timing of the timing circuit reaches a preset time, the power supply limiting signal switches from an invalid state to a valid state, and when the synchronous rectifier switches from off to on, the power supply limiting signal switches from a valid state to an invalid state.

[0015] In one embodiment, the power supply control output circuit includes: a logic circuit, a first input terminal of which is coupled to the output terminal of the power supply limiting circuit, and a second input terminal of which is coupled to the output terminal of the power supply control signal generating circuit; and a current mirror input arm circuit, a first input terminal of which is coupled to the output terminal of the logic circuit, and a second input terminal of which is coupled to the output terminal of the power supply control output circuit, the current mirror input arm circuit and the linear switching device of the power supply control circuit constitute a current mirror, and the logic circuit controls the power supply current flowing through the linear switching device by controlling the current of the current mirror input arm.

[0016] In one embodiment, the logic circuit includes a NOT gate and an AND gate, wherein an input terminal of the NOT gate is coupled to an output terminal of the power supply limiting circuit, a first input terminal of the AND gate is coupled to an output terminal of the power supply control signal generating circuit, and a second input terminal of the AND gate is coupled to an output terminal of the NOT gate.

[0017] In one embodiment, the current mirror input arm circuit includes: a first linear switch device; a first current source and a first switch coupled in series, coupling the first linear switch device, the control end of the first switch coupled to the output end of the power supply control signal generating circuit, when the power supply control signal is valid, the first switch is turned on, and the current in the first current source flows through the first linear switch device, when the power supply control signal is invalid, the first switch is turned off; and a second current source and a second switch coupled in series, coupling the first linear switch device and coupled in parallel with the first current source and the first switch coupled in series, the control end of the second switch coupled to the output end of the AND gate, when the second switch is turned on, the current in the second current source flows through the first linear switch device; wherein the power supply circuit includes a second linear switch device, the control end of the first linear switch device is coupled to the control end of the second linear switch device to form a current mirror.

[0018] In one embodiment, the secondary side control circuit further includes a dynamic response signal generating circuit, which is used to detect the load change state of the output end of the isolated switching power supply circuit and generate a dynamic response signal, and the rectifier control signal generating circuit further controls the synchronous rectifier based on the dynamic response signal.

[0019] According to another aspect of the present application, an isolated switching power supply circuit is provided. The isolated switching power supply circuit includes a primary circuit and a secondary circuit, wherein the secondary circuit includes the secondary control circuit as described in any of the above embodiments.

[0020] In one embodiment, the isolated switching power supply circuit further includes an auxiliary winding, wherein the primary circuit includes a primary winding, a primary switch and a primary control circuit, wherein a first end of the primary winding is coupled to an input end of the isolated switching power supply circuit, a second end of the primary winding is coupled to the primary switch, a control end of the primary switch is coupled to an output end of the primary control circuit, wherein an input end of the primary control circuit is coupled to the auxiliary winding for receiving a feedback signal reflecting a secondary winding voltage.

[0021] In one embodiment, the primary side control circuit includes a dynamic response control circuit, which receives a feedback signal and generates a dynamic control signal. When the feedback signal detects that the secondary side circuit freewheeling ends and the dynamic acceleration masking time has passed, if the feedback signal is greater than the dynamic response threshold, the dynamic control signal is a valid value and is used to control the primary side switch to turn on in advance.

[0022] In one embodiment, the preset time is less than the dynamic acceleration masking time.

[0023] According to another aspect of the present application, a power supply control method for a secondary control circuit of an isolated switching power supply circuit is proposed, including supplying power in a first current state during a first time period when a synchronous rectifier tube stops freewheeling, and supplying power in a second current state during a second time period, so as to reduce interference with the secondary winding voltage.

[0024] In one embodiment, the maximum value of the power supply current flowing through the power supply circuit in the second current state is smaller than the maximum value of the power supply current in the first current state.

[0025] The isolated switching power supply circuit and its secondary side control circuit and power supply control method proposed in the present invention application can fully meet the power supply through the secondary side synchronous rectifier tube while avoiding the dynamic response of the primary side control circuit being falsely triggered, and can avoid inappropriate increase in output voltage and damage to devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the present invention and are used together with the description to explain the embodiments of the present invention, but do not constitute a limitation of the present invention. In the accompanying drawings:

[0027] Figure 1 An isolated flyback switching power supply circuit is shown;

[0028] Figure 2 An isolated switching power supply circuit according to an embodiment of the present invention is shown;

[0029] Figure 3 A waveform diagram for dynamic control is shown;

[0030] Figure 4 A schematic diagram of the interference waveform of the power supply circuit to the above dynamic control is shown;

[0031] Figure 5 A schematic diagram of a power supply control circuit according to an embodiment of the present invention is shown;

[0032] Figure 6 A secondary side control circuit according to a specific embodiment of the present invention is shown;

[0033] Figure 7 A schematic diagram of a power supply control waveform according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0034] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0035] The description in this section is only for several typical embodiments, and the present invention is not limited to the scope of the embodiments. The combination of different embodiments, the mutual replacement of some technical features in different embodiments, and the mutual replacement of the same or similar prior art means with some technical features in the embodiments are also within the scope of the description and protection of the present invention.

[0036] "Coupled" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conductive medium such as a conductor, wherein the electrical conductive medium may contain parasitic inductance or parasitic capacitance, or a connection through an intermediate circuit or component described in the embodiments in the specification; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functions, such as a connection through circuits or components such as switches, signal amplification circuits, and follower circuits. "Multiple" or "many" means two or more.

[0037] Figure 2 An isolated switching power supply circuit 200 according to an embodiment of the present invention is shown. The isolated switching power supply circuit 200 includes a primary circuit and a secondary circuit, and the primary circuit and the secondary circuit are isolated by a transformer. The transformer magnetically couples the primary winding Lp, the secondary winding Ls and the auxiliary winding La. The primary circuit includes a primary winding Lp, a primary switch Q and a primary control circuit 10, wherein a first end of the primary winding Lp is coupled to an input end of the isolated switching power supply circuit for obtaining an input voltage Vin, and a second end of the primary winding Lp is coupled to the primary switch Q. A control end of the primary switch Q is coupled to an output end of the primary control circuit 10 for receiving a primary control signal PSR PWM, wherein an input end of the primary control circuit 10 is coupled to the auxiliary winding La for receiving a feedback signal FB reflecting the secondary voltage. The secondary circuit includes a secondary winding Ls, a synchronous rectifier SR and a secondary control circuit 20, wherein a first end of the synchronous rectifier SR is coupled to the secondary winding Ls, and a second end of the synchronous rectifier SR is coupled to the output end OUT of the isolated switching power supply circuit.

[0038] Figure 2 The isolated switching power supply circuit shown is a flyback switching power supply circuit. However, the present invention can also be applied to other isolated switching power supply circuits that use the secondary side to transmit the feedback signal to the primary side and may interfere with the feedback signal due to the power supply current.

[0039] The secondary side control circuit 20 includes a rectifier control signal generating circuit 21 and a power supply circuit 22. The rectifier control signal generating circuit 21 provides a rectifier control signal SR PWM for controlling the synchronous on and off of the synchronous rectifier SR. The input end of the power supply circuit 22 is coupled to the second end Drain of the synchronous rectifier SR, and the output end of the power supply circuit 22 is coupled to the power supply end VDD of the secondary side control circuit for providing a power supply voltage for the secondary side control circuit 20. The power supply end VDD can be coupled to the first end of the synchronous rectifier SR through a capacitor C. In one embodiment, the secondary side control circuit 20 can be made in an electronic package chip, and the power supply end VDD is located inside the electronic package. In another embodiment, the capacitor C can be located outside the electronic package chip, and the power supply end VDD constitutes an external pin of the electronic package. In one embodiment, the synchronous rectifier SR can also be manufactured in the same electronic package as the secondary side control circuit 20. In the illustrated embodiment, the power supply circuit 22 includes a linear switch device LDO, a first end of the linear switch device LDO is coupled to the second end of the synchronous rectifier SR, and the second end of the linear switch device LDO is coupled to the power supply terminal VDD. When the power supply circuit 22 is powered, the power supply current Ic flows through the linear switch device LDO. The linear switch device can work in a linear state and can be used to control the current value or current change slope of the power supply current Ic when it is turned on. The synchronous rectifier SR and the linear switch device LDO can use transistors of the same type or different types such as metal oxide semiconductor field effect transistors (MOSFET) or junction field effect transistors (JFET). Preferably, the first end of the synchronous rectifier SR is its source terminal, the second end of the synchronous rectifier SR is its drain terminal, the source of the linear switch device LDO is coupled to the drain terminal of the synchronous rectifier SR, marked as the drain terminal Drain, and the drain of the linear switch device LDO is coupled to the power supply terminal VDD. The power supply circuit 22 in the secondary side control circuit 22 may further include a power supply control circuit 221 for controlling the charging current Lc flowing through the linear switch device LDO. When the power supply end VDD voltage and / or the state of the synchronous rectifier SR meet certain conditions, such as when the power supply end VDD voltage Vdd is less than the threshold and the synchronous rectifier SR stops continuing current, the power supply control circuit 221 controls the linear switching device LDO to turn on, and the power supply circuit 22 flows through the current Ic to power each circuit in the secondary side control circuit 20.

[0040] The isolated switching power supply circuit 200 has a dynamic response control function. In one embodiment, the primary control circuit 10 includes a dynamic response control circuit 101, which is coupled to the auxiliary winding La to receive a feedback signal FB, and generates a dynamic control signal based on the feedback signal FB during the dynamic response monitoring window, which is used to control the primary switch to perform dynamic response control. The dynamic response monitoring window period is represented by the dynamic response monitoring window signal DT below. In one embodiment, the dynamic response monitoring window period is a time period from a masking time after the secondary side freewheeling ends to the primary switch turning on. After the primary control circuit 10 detects the end of the secondary side circuit freewheeling through the feedback signal FB and passes the dynamic acceleration masking time, if the feedback signal FB is greater than the dynamic response threshold, the dynamic response control circuit generates an effective dynamic control signal for controlling the primary switch Q to turn on in advance. In other embodiments, the dynamic response monitoring window period can be other time intervals. Correspondingly, the secondary circuit 20 may also include a dynamic response signal generating circuit for detecting the load change state of the output end of the isolated switching power supply circuit and generating a dynamic response signal. If the load increase of the output end OUT is detected, such as by detecting a drop in the output voltage Vout or an increase in the output current of the output end, then during the dynamic response monitoring window, an effective dynamic response signal is generated, and the rectifier tube control signal generating circuit 21 further controls the synchronous rectifier tube SR to conduct for a short period of time based on the dynamic response signal, thereby increasing the voltage on the secondary winding Ls, so that the dynamic response signal is reflected in the feedback signal FB of the primary side.

[0041] Figure 3A possible dynamic control waveform is shown. From top to bottom, they are respectively the primary control signal PSR PWM, which is used to control the on and off of the primary switch Q; the rectifier control signal SR PWM, which is used to control the synchronous on and off of the secondary synchronous rectifier SR; the feedback signal FB, which is used to reflect the voltage on the secondary winding Ls; and the dynamic response monitoring window signal DT, which is used to allow the primary circuit to perform dynamic response control during the period when the signal DT is valid. At time t0, the signal PSR PWM is set low, the primary switch is turned off, and the secondary SR starts to continue current, and then the signal SR PWM is set high, and the secondary SR is synchronously turned on. When the secondary SR continues current at the end, the signal SR PWM is set low, and the secondary SR is turned off. At time t1, the primary switch detects the end of the secondary SR continuous current through the feedback signal FB. A dynamic acceleration shielding time Td is set from the end of the secondary SR freewheeling. During the dynamic acceleration shielding time Td, the dynamic response monitoring window signal DT is in an invalid state (low level). Even if the feedback signal FB is higher than the dynamic response threshold Vdth, the dynamic response control of the primary circuit will not be triggered. After the dynamic acceleration shielding time Td, at time t3, the dynamic response monitoring window signal DT is set high, and the primary circuit decides whether to perform dynamic response control based on the feedback signal FB. At time t4, the secondary circuit detects that the load is dynamically increased, and the signal SR PWM is set high to turn on the secondary synchronous rectifier tube SR for a short period of time. The feedback signal FB increases. When it is detected that the feedback signal FB is higher than the dynamic response threshold Vdth, the dynamic response control is triggered, and the signal PSR PWM is set high to turn on the primary switch in advance. If the load does not change, when the normal switching cycle arrives, at time t5, the signal PSR PWM is set high, and the dynamic response monitoring window signal DT is set low. Of course, the dynamic response monitoring window signal DT can also be set low in advance or before the primary switch is turned off.

[0042] Figure 4 The interference waveform diagram of the power supply circuit on the above dynamic control is shown. Signal Ic is the charging current flowing through the power supply circuit. The supply current Ic will interfere with the secondary winding voltage and the primary feedback signal FB. In the time interval t1-t3, it is the dynamic acceleration shielding time Td. The feedback signal FB that appears in this interval is higher than the dynamic response threshold and will not trigger the dynamic response control. At time t3, the dynamic response monitoring window signal DT is set high, and the system enters the dynamic response monitoring state, allowing dynamic response control according to the feedback signal FB. At time t4, the signal SR PWM is low, and the secondary synchronous rectifier is not turned on. However, the charging current Ic of the power supply circuit will interfere with the feedback signal FB. This is because when the power supply circuit is supplying power, the pulsed charging current Ic will flow through the secondary winding of the transformer, and the pulsed current Ic will generate a certain induced electromotive force Vs on the secondary winding of the transformer, and there is:

[0043] Vs=Ls×d Ic / dt

[0044] Wherein, Ls is the inductance value of the secondary winding, so when the power supply circuit supplies power, a voltage disturbance will be generated on the secondary winding, and the disturbance will be transmitted to the auxiliary winding through transformer coupling, thereby generating a voltage disturbance on the feedback signal FB. If the oscillation voltage of the signal FB exceeds the dynamic response threshold, the primary control circuit 10 will be mistakenly accelerated dynamically, which will cause the system operating frequency to increase, thereby causing the output voltage to be high, and even causing damage to some components, or causing the system to not work properly.

[0045] In a preferred embodiment, during the interval when the secondary circuit outputs a valid dynamic response signal, such as the period when the dynamic response monitoring window signal DT is a valid value, the charging current slope in the power supply circuit is correspondingly reduced to ensure that the disturbance to the primary feedback signal FB is not sufficient to falsely trigger the dynamic response control. Therefore, the present invention application can avoid false triggering of the dynamic response by setting different charging current states for the power supply circuit at different time ends, while meeting the power supply requirements of the secondary control circuit. That is, the power supply circuit 22 is controlled during the period when the synchronous rectifier tube stops the continuous current. In the first time period, the power supply circuit supplies power in the first current state, and in the second time period, the power supply circuit supplies power in the second current state.

[0046] In a preferred embodiment, corresponding to Figure 4 In the control system shown, the power supply circuit 22 supplies power in the first current state during the preset time from when the synchronous rectifier SR switches from on to off, and after the preset time, supplies power in the second current state. The preset time may be equal to the dynamic acceleration masking time. In a preferred embodiment, the preset time is less than the dynamic acceleration masking time Td to ensure that false triggering does not occur during the dynamic response monitoring window. The current change slope flowing through the power supply circuit in the first current state is greater than the current change slope flowing through the power supply circuit in the second current state. In one embodiment, the maximum current flowing through the linear switch device LDO in the first current state is controlled to be greater than the maximum current flowing through the linear switch device LDO in the second current state, which can also satisfy that the current change slope flowing through the power supply circuit in the first current state is greater than the current change slope flowing through the power supply circuit in the second current state, so that the disturbance control of the feedback signal FB by the power supply circuit in the second current state is within a safe range.

[0047] Figure 5The schematic diagram of the power supply control circuit 500 according to an embodiment of the present invention is shown. The power supply control circuit 400 includes a power supply limiting circuit 501, a power supply control signal generating circuit 502 and a power supply control output circuit 503. The input end of the power supply limiting circuit 501 is coupled to the output end of the rectifier control signal generating circuit 21 for receiving the rectifier control signal SRPWM. The power supply limiting circuit 501 provides a power supply limiting signal LDO_limit based on the rectifier control signal SR PWM. When the power supply limiting signal LDO_limit is in an invalid state, the power supply circuit supplies power in a first current state, such as supplying power with a higher current slope or current peak value. When the power supply limiting signal LDO_limit is in a valid state, the power supply circuit supplies power in a second current state, such as supplying power with a lower current slope or current peak value. In this state, dynamic response control can be performed without triggering dynamic response by mistake. The power supply control signal generating circuit 502 provides a power supply control signal GDC based on at least the power supply voltage Vdd of the power supply terminal VDD. In one embodiment, when the power supply voltage Vdd is less than the power supply threshold, the power supply control signal GDC is a valid value such as a high level, which is used to turn on the power supply circuit and use the drain terminal Drain voltage to supply power to the power supply terminal VDD. The power supply control signal generating circuit 502 can further receive the rectifier control signal SR PWM or the drain terminal voltage Vdrain. Only when the signal SRPWM is at a low level or the drain terminal voltage Vdrain is greater than the power supply voltage Vdd, and the power supply voltage Vdd is less than the power supply threshold, the power supply control signal GDC is valid. The first input terminal of the power supply control output circuit 503 is coupled to the output terminal of the power supply limiting circuit 501 for receiving the power supply limiting signal LDO_limit, and the second input terminal of the power supply control output circuit 503 is coupled to the output terminal of the power supply control signal generating circuit 304 for receiving the power supply control signal GDC. When the power supply control signal GDC is valid and the power supply limiting signal LDO_limit is in an invalid state, the power supply control output circuit 400 controls the power supply circuit to supply power in the first current state. When the power supply control signal GDC is valid and the power supply limiting signal LDO_limit is in a valid state, the power supply control output circuit 503 controls the power supply circuit to supply power in the second current state.

[0048] Figure 6A secondary control circuit 600 according to a specific embodiment of the present invention is shown. In one embodiment, the secondary control circuit 600 is fabricated on the same semiconductor substrate to form a semiconductor chip, wherein the semiconductor chip has a drain pin Drain and a power supply pin VDD, which are respectively connected to the drain end of the synchronous rectifier SR and the power supply end of the secondary control circuit 600. In another embodiment, the secondary control circuit 600 is fabricated in an electronic package. The secondary control circuit 600 includes a rectifier control signal generating circuit 61, a linear switch device LDO and a power supply control circuit 62. The rectifier control signal generating circuit 61 generates a rectifier control signal SR PWM for controlling the conduction and shutdown of the secondary synchronous rectifier SR. The power supply circuit includes a linear switch device LDO and a power supply control circuit 62, and the power supply control circuit 62 controls the linear switch device LDO to provide a charging current Ic to the power supply end VDD to power the secondary control circuit 600. The power supply circuit may also use other types of switching devices instead of the linear switch device LDO to provide a power supply charging current.

[0049] In the illustrated embodiment, the rectifier control signal generating circuit 61 includes a conduction detection module and a shutdown detection module, and the conduction detection module and the shutdown detection module can output the rectifier control signal SR PWM based on the voltage difference Vds across the synchronous rectifier. In the illustrated embodiment, the ground terminal of the secondary control circuit 600 is coupled to the source of the synchronous rectifier SR, so the voltage obtained from the drain terminal Drain is the drain-source voltage difference Vds across the synchronous rectifier. When the drain-source voltage Vds indicates that the secondary side starts to continue flowing, such as when Vds drops from a high value to less than a threshold value (usually a negative voltage close to zero), the conduction detection module outputs a valid signal, triggering the latch 611 to output a valid (such as a high level) rectifier control signal SR PWM for turning on the synchronous rectifier SR. When the drain-source voltage Vds indicates that the secondary side freewheeling has ended, if Vds rises to a value greater than a shutdown threshold, the shutdown detection module outputs a valid signal, triggering the latch 611 to output an invalid (eg, low level) rectifier control signal SR PWM for shutting down the synchronous rectifier SR.

[0050] The power supply control circuit 62 includes a power supply limiting circuit 63, a power supply control signal generating circuit 64 and a power supply control output circuit 65. The power supply limiting circuit 63 is coupled to the rectifier control signal generating circuit 61 for receiving the rectifier control signal SRPWM. The power supply limiting circuit 63 provides a power supply limiting signal LDO_limit based on the rectifier control signal SR PWM, which is used to switch the power supply current Ic state of the power supply circuit. In the illustrated embodiment, the power supply limiting circuit 63 includes a NOT gate 631, a timing circuit 632 and a trigger circuit 633. The input end of the timing circuit 632 receives the rectifier control signal SR PWM or the inverted signal of the rectifier control signal SR PWM, wherein the inverted signal of the signal SR PWM is converted by the NOT gate 631, and the timing circuit 632 is triggered to start timing based on the rectifier control signal SR PWM. If the timing circuit 632 is triggered at a low level, the signal SR PWM can be directly received to trigger timing. Alternatively, the NOT gate 631 can also be regarded as a part of the timing circuit 632. In one embodiment, when the rectifier control signal SR PWM indicates that the synchronous rectifier SR switches from on to off, the timing circuit 63 starts timing. The first input terminal of the trigger circuit 633 is coupled to the output terminal of the timing circuit 632, and the second input terminal of the trigger circuit 633 is coupled to the output terminal of the rectifier control signal generating circuit 61 for receiving the rectifier control signal SR PWM. The output terminal of the trigger circuit 633 is used to provide the power supply limit signal LDO_limit. When the timing of the timing circuit 632 reaches a preset time, the power supply limit signal LDO_limit switches from an invalid state (such as a low level) to a valid state (such as a high level). When the rectifier control signal SR PWM is converted from an invalid state to a valid state, that is, when the synchronous rectifier SR switches from off to on, the power supply limit signal LDO_limit switches from a valid state to an invalid state. The power supply limit signal LDO_limit can also be switched from a valid state to an invalid state at any time during the conduction period of the synchronous rectifier SR or when SR switches from on to off. In one embodiment, when the rectifier control signal SR PWM is converted from an inactive state to an active state and after a predetermined delay, the power supply limit signal LDO_limit is switched from an active state to an inactive state.

[0051] The power supply control signal generating circuit 64 provides a power supply control signal GDC based on at least the power supply terminal VDD voltage Vdd, and is used to control the power supply circuit LDO to turn on when the power supply control signal GDC is valid. In one embodiment, when the power supply terminal voltage Vdd is lower than the threshold value Vth and the drain-source voltage Vds is higher than the preset threshold value, the power supply control signal GDC is valid. In another embodiment, when the power supply terminal voltage Vdd is lower than the threshold value Vth and the signal SR PWM is in a low level state, the power supply control signal GDC is valid.

[0052] The first input terminal of the power supply control output circuit 65 is coupled to the output terminal of the power supply limiting circuit 63, and the second input terminal of the power supply control output circuit 65 is coupled to the output terminal of the power supply control signal generating circuit 64. The power supply control output circuit 65 includes a logic circuit 66 and a current mirror input arm circuit 67. The first input terminal of the logic circuit 66 is coupled to the output terminal of the power supply limiting circuit 63 for receiving the power supply limiting signal LDO_limit, and the second input terminal of the logic circuit 66 is coupled to the output terminal of the power supply control signal generating circuit 64 for receiving the power supply control signal GDC. The first input terminal of the current mirror input arm circuit 67 is coupled to the output terminal of the logic circuit 66, and the second input terminal of the current mirror input arm circuit 67 is coupled to the output terminal of the power supply control signal generating circuit 64. The current mirror input arm circuit 67 and the linear switch device LDO of the power supply circuit form a current mirror, and the logic circuit 66 controls the supply current Ic flowing through the linear switch device LDO by controlling the current of the current mirror input arm. When the power supply limit signal LDO_limit is a valid value, the logic circuit 66 controls the input current flowing into the current mirror input arm circuit 67 to be a lower value, which is used to limit the maximum value of the charging current of the power supply circuit (linear switch device LDO+power supply control circuit 62), thereby limiting the current change slope of the charging current Ic. The logic circuit 66 includes a NOT gate 661 and an AND gate 662, wherein the input end of the NOT gate 661 is coupled to the output end of the power supply limit circuit 63, and the first input end of the AND gate 662 is coupled to the output end of the power supply control signal generating circuit 64, for receiving the power supply control signal GDC. The second input end of the AND gate 662 is coupled to the output end of the NOT gate 661. In other embodiments, based on the different levels of the effective value of the logic signal, the second input end of the AND gate 662 can also be directly coupled to the output end of the power supply limit circuit 63. The input current Iin of the current mirror generates an output current Ic amplified in equal proportion, Ic=Iin*n. The input current of the current mirror input arm circuit 67 is controlled by the power supply control signal GDC and the power supply limit signal LDO_limit. When the power supply control signal GDC is valid but the power supply limit signal LDO_limit is invalid, the input current of the current mirror input arm circuit 67 is the first input current value, the power supply circuit LDO supplies power in the first current state, and the current maximum value or charging slope is large. When the power supply control signal GDC is valid and the power supply limit signal LDO_limit is valid, the input current of the current mirror input arm circuit 67 is the second input current value, the power supply circuit LDO supplies power in the second current state, and the current maximum value or charging slope is limited. The second input current value is smaller than the first input current value, so that the current change slope in the second current state is correspondingly smaller than the current change slope in the first current state.

[0053] Specifically, in Figure 6In the illustrated embodiment, the current mirror input arm circuit 67 includes a first linear switch device 671, a first current source Iref1 and a first switch K1 coupled in series, and a second current source Iref2 and a second switch K2 coupled in series. The control end of the first linear switch device 671 is coupled to the control end of the linear switch device LDO in the power supply circuit to form a current mirror, so that the current Ic flowing through the linear switch device LDO is proportional to the current mirror input current Iin flowing through the first linear switch device 671, Ic=Iin*n. The first current source Iref1 and the first switch K1 coupled in series are coupled to the first linear switch device 671, and the control end of the first switch K1 is coupled to the output end of the power supply control signal generating circuit 64. When the power supply control signal GDC is valid, the first switch K1 is turned on, and the current in the first current source Iref1 flows through the first linear switch device 671. When the power supply control signal GDC is invalid, the AND gate 662 outputs an invalid signal, the first switch K1 and the second switch are both turned off, the input end current is zero, and the linear switch device LDO is turned off. The second current source Iref2 and the second switch K2 coupled in series are coupled in series with the first linear switch device 671 and are connected in parallel with the first current source Iref1 and the first switch K1 coupled in series, and the control end of the second switch K2 is coupled to the output end of the AND gate 662. When the power supply limit signal LDO_limit is invalid and the power supply control signal GDC is valid, the second switch K2 is turned on, and the current in the second current source Iref2 flows through the first linear switch device 671. When the power supply control signal GDC is valid and the power supply limit signal LDO_limit is invalid, both the first switch K1 and the second switch K2 are turned on, and the current Iref1+Iref2 flows through the first linear switch device 671, and Ic=(Iref1+Iref2)*n. When the power supply control signal GDC and the power supply limit signal LDO_limit are both valid, the AND gate 662 outputs a low-level invalid signal, the first switch K1 is turned on, the second switch K2 is turned off, and the current Iref1 flows through the first linear switch device 671, Ic=Iref1*n, and the power supply current is reduced at this time to reduce the change slope of the charging current Ic, thereby preventing excessive disturbance to the feedback signal FB and erroneously triggering the dynamic response.

[0054] The power supply control circuit 600 may further include a dynamic response signal generating circuit 68, which is used to detect the load change state of the output end of the isolated switching power supply circuit and generate a dynamic response signal DTX. The rectifier control signal generating circuit 61 further generates a rectifier control signal SR PWM based on the dynamic response signal DTX to further control the synchronous rectifier SR. For example, at a time corresponding to the primary circuit dynamic response monitoring window, when the dynamic response signal generating circuit 68 detects that Vout has dropped, the dynamic response signal DTX is set high to turn on the secondary synchronous rectifier SR.

[0055] In other embodiments, the power supply control circuit may adopt a different Figure 6 Other control methods of the embodiment. For example, the power supply limiting circuit can be controlled to generate an effective power supply limiting signal LDO_limit in other time periods to reduce the charging current slope of the power supply circuit, and accordingly, the power supply limiting circuit and the primary circuit dynamic response monitoring window period are also adjusted accordingly; the power supply control signal generating circuit can further include a synchronous rectifier state detection circuit, which only turns on the power supply circuit when the drain terminal voltage Vds is greater than the power supply voltage Vdd; the power supply control output circuit uses other driving circuits to drive the conduction degree of the linear switching device LDO, thereby controlling the maximum value or charging slope of the power supply current Ic.

[0056] Figure 7 A schematic diagram of a power supply control waveform according to an embodiment of the present invention is shown. Figure 7 The embodiment shown is used to illustrate the working principle of a synchronous rectification power supply control circuit and method involved in the patent application of the present invention. To simplify the description, the current ratio of the current mirror is n=1. Figure 2 and Figure 6Describe the marks in the embodiments. The signals from top to bottom are the primary side control signal PSR PWM, which is used to control the on and off of the primary side switch Q; the rectifier diode control signal SR PWM, which is used to control the synchronous on and off of the secondary side synchronous rectifier SR; the drain-source voltage Vds of the secondary side synchronous rectifier SR; the power supply control signal GDC, which is used to control whether to charge and supply power to the power supply terminal VDD; the charging current Ic of the power supply circuit; the feedback signal FB; the dynamic response monitoring window signal DT; and the power supply limit signal LDO_limit. At time t1, the primary side switch Q is turned off, and the secondary side circuit starts to freewheel. The rectifier diode control signal generation circuit 61 detects that Vds < Vthon, the conduction detection module outputs a high level, the signal SR PWM is set high, and SR conducts, where Vthon is the conduction threshold. At this time, the power supply limit signal LDO_limit is at a low level. At this time, Vds < Vdd, GDC is at a low level, and the power supply circuit does not work. At time t2, the freewheeling of the secondary side circuit ends, Vds > Vthoff, the signal SR PWM is set low, and SR turns off, where Vthoff is the turn-off threshold. At this time, the voltage on the secondary side winding Ls drops, and the timing circuit 632 in the power supply control circuit starts timing. However, before the timing reaches the preset time Tth, the output signal of the timing circuit 632 remains low, and the power supply limit signal LDO_limit remains low. The feedback signal FB drops as the voltage on the secondary side winding Ls drops. When the feedback signal FB drops to the preset threshold, at time t3, the primary side circuit determines that the freewheeling of the secondary side circuit has ended, enters the dynamic acceleration shielding time, and starts timing. The time difference between time t3 and t2 is approximately one-quarter of the resonant period, which can be ignored compared to the dynamic acceleration shielding time Td and the preset time Tth. After SR turns off, if it is detected that Vdd < Vth, the signal GDC is set high, the power supply circuit LDO conducts, and the power supply terminal is supplied with a charging current Ic with a maximum current value of Iref1 + Iref2. At this time, the power supply current is not limited and operates at the maximum saturation current, and the current change slope corresponding to the charging current Ic is also relatively large, resulting in a relatively large interference to the secondary side winding Ls of the transformer, and further causing a relatively large interference to the auxiliary winding La and the primary side feedback signal FB. However, because the primary side circuit is in the dynamic acceleration shielding time Td, even if the perturbation caused by the charging current Ic makes VFB > Vdth, no dynamic acceleration response will occur. At time t4, the timing circuit 632 reaches the preset time Tth, the output signal of the timing circuit 632 is set high, the trigger circuit 633 is set high, the power supply limit signal LDO_limit changes to a high level, the NOT gate 661 outputs a low level, the AND gate 662 outputs a low level, the second switch K2 turns off, and the power supply of the power supply circuit is limited. At this time, if the signal GDC is high, the maximum value of the charging current Ic of the power supply circuit is Iref1, and the corresponding current change slope also decreases.Afterwards, at time t5, the dynamic response monitoring window signal DT in the primary circuit is set high, and the dynamic response control is selectively performed according to the feedback signal FB. After t5 and before the next PSR PWM rising edge arrives, if the feedback signal FB voltage is detected to exceed the dynamic response threshold Vdth, the primary control circuit will set the PSR PWM pulse high in advance. Obviously, the preset time Tth required by the timing circuit 632 is less than the dynamic acceleration shielding time Td of the primary control circuit. At time t6, the signal GDC is set high, and the power supply circuit starts to supply power. At this time, because the power supply limit signal LDO_limit is at a high level, the peak value of the power supply current of the power supply circuit LDO is reduced to Ireff1, and the current change slope is correspondingly reduced. The voltage disturbance on the secondary winding and the voltage disturbance on the feedback signal FB are both small, less than the dynamic response threshold Vdth, so the PSR PWM will not be falsely triggered to be set high in advance, thereby avoiding problems such as the system switching frequency increasing, the output voltage being too high, and the system not being able to work normally. At time t7, the signal PSR PWM is set high, and the dynamic response monitoring window signal DT is set low. At time t8, the primary switch Q is turned off, the secondary side starts to continue current, the SR PWM is set high, the power supply limit signal LDO_limit is set low, and then the process is repeated.

[0057] exist Figure 7 In the embodiment shown, during the period when the synchronous rectifier SR stops freewheeling (SR PWM is at a low level), during the first time period t1-t4, the power supply circuit supplies power in the first current state, and its maximum power supply current is relatively large (Iref1+Iref2). Correspondingly, its current change slope is also relatively large, and the interference fluctuation to the feedback signal FB is also relatively large. During the second time period t4-t8, the power supply circuit supplies power in the second current state, and its maximum power supply current is significantly reduced (Iref1). Correspondingly, its current change slope is relatively small, and the interference fluctuation to the feedback signal FB is also relatively small, which will not cause dynamic response false triggering. However, the dynamic response window time of the isolated switching power supply circuit can be set in other time periods during the period when the synchronous rectifier stops freewheeling. Correspondingly, the time periods of the first time period of power supply in the first current state and the second time period of power supply in the second current state can be the same in other embodiments. Figure 7 The periods shown are different.

[0058] The present invention application provides a power supply control method for a power supply circuit of an isolated switching power supply circuit with a dynamic response control function, when the synchronous rectifier tube stops the continuous current, in the first time period, the power supply circuit supplies power in a first current state to ensure a larger power supply capacity, and in the second time period, the power supply circuit supplies power in a second current state to reduce the interference with the voltage Vs on the secondary winding Ls, so as to limit its interference with the feedback signal transmitted from the secondary side to the primary side during the dynamic response, wherein the current change slope flowing through the power supply circuit in the second current state is less than the current change slope flowing through the power supply circuit in the first current state, so as to prevent interference with the dynamic response control. In this way, the power supply function of the secondary synchronous rectifier tube SR can be retained to meet the requirements of reducing the complexity and application cost of the system, and the dynamic acceleration function of the primary control circuit is avoided to be triggered incorrectly in the primary control application, the output voltage is avoided to be abnormal, and the device is avoided to be damaged by overstress. In a preferred embodiment, the current change slope flowing through the power supply circuit in the second current state can be smaller than the current change slope flowing through the power supply circuit in the first current state by controlling the maximum value of the power supply current flowing through the power supply circuit in the second current state to be smaller than the maximum value of the power supply current in the first current state.

[0059] Those skilled in the art should know that the logic controls such as "high level" and "low level", "set" and "reset", "AND gate" and "OR gate" in the logic control involved in the specification or drawings can be interchanged or changed, and the same function or purpose as the above embodiment can be achieved by adjusting the subsequent logic control. Due to different signal detection methods, "greater than" and "less than" when comparing the feedback signal with the threshold signal can also be interchanged to achieve the same purpose.

[0060] The description and application of the present invention here are illustrative, and it is not intended to limit the scope of the present invention to the above-mentioned embodiments. The effects or advantages involved in the specification may not be reflected in the actual experimental examples due to the uncertainty of specific condition parameters or other factors, and the effects or advantages are not used to limit the scope of the invention. The deformation and change of the embodiments disclosed here are possible, and the replacement of the embodiments and the various equivalent parts are well known to those of ordinary skill in the art. It should be clear to those skilled in the art that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials and parts without departing from the spirit or essential features of the present invention. Other deformations and changes can be made to the embodiments disclosed here without departing from the scope and spirit of the present invention.

Claims

1. A secondary side control circuit for an isolated switching power supply circuit, wherein the isolated switching power supply circuit has a dynamic response control function, the isolated switching power supply circuit comprises a primary side circuit and a secondary side circuit, the secondary side circuit comprises a secondary side winding, a synchronous rectifier tube and the secondary side control circuit, wherein a first end of the synchronous rectifier tube is coupled to the secondary side winding, a second end of the synchronous rectifier tube is coupled to an output end of the isolated switching power supply circuit, and the secondary side control circuit comprises: A rectifier control signal generating circuit provides a rectifier control signal for controlling the synchronous on and off of the synchronous rectifier; as well as A power supply circuit, wherein the input end of the power supply circuit is coupled to the second end of the synchronous rectifier tube, and the output end of the power supply circuit is coupled to the power supply end of the secondary control circuit for providing a power supply voltage for the secondary control circuit, wherein during the period when the synchronous rectifier tube stops freewheeling, in a first time period, the power supply circuit supplies power in a first current state, and in a second time period, the power supply circuit supplies power in a second current state, wherein the maximum value of the power supply current in the first current state is greater than the maximum value of the power supply current in the second current state.

2. The secondary-side control circuit as claimed in claim 1, wherein the power supply circuit comprises a linear switching device, and the power supply current flows through the linear switching device.

3. The secondary side control circuit as claimed in claim 1, wherein within a preset time from when the synchronous rectifier is switched from on to off, the power supply circuit is charged in a first current state when supplying power, and after the preset time, the power supply circuit is charged in a second current state when supplying power.

4. The secondary side control circuit according to claim 1, wherein the secondary side control circuit further comprises a power supply control circuit, the power supply control circuit comprising: A power supply limiting circuit provides a power supply limiting signal based on a rectifier tube control signal; A power supply control signal generating circuit, providing a power supply control signal based on at least the voltage of the power supply terminal, and the power supply circuit supplies power when the power supply control signal is valid; as well as A power supply control output circuit has a first input terminal coupled to the output terminal of the power supply limiting circuit, and a second input terminal coupled to the output terminal of the power supply control signal generating circuit. When the power supply control signal is valid and the power supply limiting signal is in an invalid state, the power supply control output circuit controls the power supply circuit to be powered in a first current state. When the power supply control signal is valid and the power supply limiting signal is in a valid state, the power supply control output circuit controls the power supply circuit to be powered in a second current state.

5. The secondary side control circuit as claimed in claim 4, wherein the power supply limiting circuit comprises: A timing circuit, whose input end is coupled to the rectifier tube control signal generating circuit, controls the timing circuit to start timing based on the rectifier tube control signal; as well as A trigger circuit, wherein a first input end is coupled to an output end of a timing circuit, and a second input end is coupled to an output end of a rectifier control signal generating circuit. The output end of the trigger circuit is used to provide a power supply limiting signal. When the timing of the timing circuit reaches a preset time, the power supply limiting signal switches from an invalid state to a valid state. When the rectifier control signal switches from an invalid state to a valid state or the rectifier control signal switches from an invalid state to a valid state and after a predetermined delay, the power supply limiting signal switches from a valid state to an invalid state.

6. The secondary side control circuit as claimed in claim 4, wherein the power supply control output circuit comprises: A logic circuit, a first input terminal of which is coupled to the output terminal of the power supply limiting circuit, and a second input terminal of which is coupled to the output terminal of the power supply control signal generating circuit; as well as A current mirror input arm circuit has a first input terminal coupled to the output terminal of a logic circuit, and a second input terminal coupled to the output terminal of a power supply control signal generating circuit. The current mirror input arm circuit and the linear switching device of the power supply circuit constitute a current mirror. The logic circuit controls the power supply current flowing through the linear switching device by controlling the current of the current mirror input arm.

7. The secondary side control circuit as claimed in claim 6, wherein the logic circuit comprises: A NOT gate, an input terminal of which is coupled to the output terminal of the power supply limiting circuit; as well as The AND gate has a first input terminal coupled to the output terminal of the power supply control signal generating circuit, a second input terminal coupled to the output terminal of the NOT gate, and an output terminal coupled to the first input terminal of the current mirror input arm circuit.

8. The secondary side control circuit as claimed in claim 6, wherein the current mirror input arm circuit comprises: a first linear switching device; A first current source and a first switch coupled in series are coupled to a first linear switch device, a control end of the first switch is coupled to an output end of a power supply control signal generating circuit, when the power supply control signal is valid, the first switch is turned on, and the current in the first current source flows through the first linear switch device, when the power supply control signal is invalid, the first switch is turned off; as well as A second current source and a second switch coupled in series are coupled to the first linear switch device and are coupled in parallel to the first current source and the first switch coupled in series, a control end of the second switch is coupled to the output end of the logic circuit, and when the second switch is turned on, a current in the second current source flows through the first linear switch device; The control terminal of the first linear switch device is coupled to the control terminal of the linear switch device of the power supply circuit to form a current mirror.

9. The secondary side control circuit as described in claim 1 further comprises a dynamic response signal generating circuit, the dynamic response signal generating circuit is used to detect the load change state of the output end of the isolated switching power supply circuit and generate a dynamic response signal, and the rectifier control signal generating circuit further controls the synchronous rectifier based on the dynamic response signal.

10. An isolated switching power supply circuit, comprising a primary circuit and a secondary circuit, wherein the secondary circuit comprises the secondary control circuit according to any one of claims 1 to 9.

11. The isolated switching power supply circuit as claimed in claim 10, comprising a flyback switching power supply circuit.

12. The isolated switching power supply circuit as described in claim 11 further includes an auxiliary winding, wherein the primary circuit includes a primary winding, a primary switch and a primary control circuit, wherein a first end of the primary winding is coupled to an input end of the isolated switching power supply circuit, a second end of the primary winding is coupled to the primary switch, a control end of the primary switch is coupled to an output end of the primary control circuit, wherein an input end of the primary control circuit is coupled to the auxiliary winding for receiving a feedback signal reflecting the voltage of the secondary winding.

13. An isolated switching power supply circuit as described in claim 10, wherein the primary side control circuit includes a dynamic response control circuit, the dynamic response control circuit receives a feedback signal and generates a dynamic control signal, when the feedback signal detects that the secondary side circuit freewheeling ends and after the dynamic acceleration shielding time has passed, if the feedback signal is greater than the dynamic response threshold, the dynamic control signal is a valid value, which is used to control the primary side switch to turn on in advance.

14. The isolated switching power supply circuit as claimed in claim 13, wherein the preset time is less than the dynamic acceleration masking time.

15. A power supply control method for an isolated switching power supply circuit, wherein the isolated switching power supply circuit has a dynamic response control function, the isolated switching power supply circuit comprises a primary circuit and a secondary circuit, the secondary circuit comprises a secondary winding, a synchronous rectifier tube and a power supply circuit, wherein a first end of the synchronous rectifier tube is coupled to the secondary winding, and a second end of the synchronous rectifier tube is coupled to an output end of the isolated switching power supply circuit and an input end of the power supply circuit, the method comprising: When the synchronous rectifier stops freewheeling, in the first time period, the power supply circuit supplies power in a first current state, and in the second time period, the power supply circuit supplies power in a second current state to reduce interference with the secondary winding voltage. 16 . The control method according to claim 15 , wherein a maximum value of the power supply current flowing through the power supply circuit in the second current state is smaller than a maximum value of the power supply current in the first current state.

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