Photodetector structure and integrated coherent optical receiver chip

Abstract

The invention discloses a photodetector structure and an integrated coherent optical receiver chip. The photodetector structure comprises a semiconductor substrate; a spacer layer is formed on the semiconductor substrate; at least one photoelectric detector is formed on the spacing layer; a cavity is formed in the semiconductor substrate below a detector area where the at least one photoelectric detector is located. According to the photoelectric detector structure, the photoelectric detector is isolated from the substrate through the cavity, so that the parasitic capacitance of the ICR-PIC radio frequency output end is reduced, and the ICR-PIC radio frequency performance and the heating efficiency when a heater is integrated are optimized.

Description

Technical Field

[0001] The present application relates to the field of coherent optical communication technology, and in particular to a photodetector structure and an integrated coherent optical receiver chip. Background Art

[0002] In the field of optical communications, coherent detection is to interfere the received signal light with the local oscillator light generated by the local laser, thereby extracting the output interference light signal. Compared with the traditional intensity direct detection technology, coherent detection has the advantages of supporting multiple modulation formats and high spectrum utilization efficiency. At the same time, because coherent detection can retain the phase information of the optical signal, the linear transmission damage of the signal such as the group velocity dispersion and polarization mode dispersion of the optical fiber can be more effectively balanced during digital signal processing.

[0003] Integrated coherent optical receiver chip (Intradyne Coherent Receiver-Photonic Integrated Circuit, ICR-PIC) and digital coherent receiver based on ICR-PIC are specific application forms of coherent detection, which usually include optical splitters, polarization beam splitters, polarization rotators, coherent optical mixers, photoelectric detectors (PD) and differential transimpedance preamplifiers. After the input optical signal is divided into two orthogonal polarized lights by the optical splitter and polarization beam splitter, it is mixed with local oscillator optical signals with the same or similar wavelengths, and finally the phase signal of the input light is converted into an output differential RF voltage signal through the photodetector. Among them, the substrate of the chip is easy to introduce a large parasitic capacitance at the RF output end of the chip, causing the RF performance of the photodetector to decrease. In particular, the substrate silicon refractive index of the silicon-based integrated chip is relatively high, which causes more serious degradation of RF performance. For example, the bandwidth of the high-speed PD will be significantly reduced.

[0004] Therefore, how to reduce the parasitic capacitance at the RF output end of the ICR-PIC and improve the RF performance of the ICR-PIC has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further described in detail in the Detailed Description of the Invention section. The Summary of the Invention section of this application does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0006] In view of the existing problems, the present application provides a photodetector structure, including:

[0007] Semiconductor substrate;

[0008] A spacer layer is formed on the semiconductor substrate;

[0009] At least one photodetector is formed on the spacer layer;

[0010] A cavity is formed in the semiconductor substrate below a detector region where the at least one photodetector is located.

[0011] In one embodiment, at least one groove is formed around the detector area, and the groove is communicated with the cavity.

[0012] In one embodiment, a waveguide layer is further provided between the spacer layer and the at least one photodetector.

[0013] In one embodiment, the photodetector comprises a germanium photodetector.

[0014] In one embodiment, at least one heater is arranged in the detector region, and the at least one heater is used to heat the at least one photodetector.

[0015] In one embodiment, the height of the cavity ranges from 30 microns to 80 microns.

[0016] A second aspect of an embodiment of the present invention provides an integrated coherent optical receiver chip, comprising: a signal optical coupler, a local oscillator optical coupler, at least one 90-degree coherent optical mixer and a plurality of photodetectors, wherein the plurality of photodetectors have the photodetector structure described in any one of claims 1 to 6; the output end of the signal optical coupler and the output end of the local oscillator optical coupler are respectively connected to the input end of the 90-degree coherent optical mixer, and the plurality of output ends of the 90-degree coherent optical mixer are respectively connected to the plurality of photodetectors in a one-to-one correspondence.

[0017] In one embodiment, the integrated coherent optical receiver chip also includes at least one monitoring photodetector, and at least one first power splitter is arranged between the signal optical coupler and / or the local oscillator optical coupler and the at least one 90-degree coherent optical mixer, and the first power splitter is used to distribute optical power to a monitoring photodetector and a 90-degree coherent optical mixer.

[0018] In one embodiment, the power ratio allocated by the power beam splitter to the monitoring photodetector ranges from 2% to 10%.

[0019] In one embodiment, when the integrated coherent optical receiver chip includes two 90-degree coherent optical mixers, a fourth power beam splitter is further arranged between the local oscillator optical coupler and the two 90-degree coherent optical mixers, and the fourth power beam splitter is used to distribute the local oscillator optical power to the two 90-degree coherent optical mixers, and the splitting ratio of the fourth power beam splitter is 50%:50%.

[0020] The photodetector structure provided in the present application isolates the photodetector from the substrate through a cavity, thereby reducing the parasitic capacitance of the ICR-PIC RF output end, which is beneficial to the optimization of the ICR-PIC RF performance and the heating efficiency when the heater is integrated. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The following drawings of the present application are used as a part of the present application for understanding the present application. The drawings show the embodiments of the present application and their descriptions, which are used to explain the principle of the present application.

[0022] In the attached figure:

[0023] Figure 1 A cross-sectional schematic diagram of a photodetector according to an embodiment of the present application is shown;

[0024] Figure 2 A cross-sectional schematic diagram of a photodetector according to another embodiment of the present application is shown;

[0025] Figure 3 A schematic diagram showing the structure of a photoelectric detector when no cavity is formed according to an embodiment of the present application is shown;

[0026] Figure 4 A schematic diagram of the structure of a photoelectric detector according to an embodiment of the present application is shown;

[0027] Figure 5 A schematic diagram of the structure of an integrated coherent optical receiver chip according to an embodiment of the present application is shown;

[0028] Figure 6 A schematic structural diagram of an integrated coherent optical receiver chip according to another embodiment of the present application is shown;

[0029] Figure 7 A schematic structural diagram of an integrated coherent optical receiver chip according to another embodiment of the present application is shown. DETAILED DESCRIPTION

[0030] Next, the present application will be described more completely in conjunction with the accompanying drawings, in which embodiments of the present application are shown. However, the present application can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, for clarity, the sizes and relative sizes of layers and regions may be exaggerated. The same reference numerals throughout represent the same elements.

[0031] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0032] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0033] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "a", "an", and "said / the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0034] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the present application. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present application should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the present application.

[0035] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by ordinary technicians in the field of this application. It will also be understood that terms such as those defined in commonly used dictionaries should be understood to have a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an ideal or overly formal sense unless expressly defined as such herein.

[0036] In order to prevent the substrate of the integrated coherent optical receiver chip from introducing a large parasitic capacitance at the RF output end of the chip, thereby reducing the RF performance of the photodetector, the present application embodiment proposes a photodetector structure and an integrated coherent optical receiver chip, such as Figure 1 As shown, the photodetector structure 10 includes:

[0037] A semiconductor substrate 11;

[0038] A spacer layer 12 is formed on the semiconductor substrate 11;

[0039] At least one photodetector is formed on the spacer layer 12;

[0040] A cavity is formed in the semiconductor substrate 11 below a detector region where at least one photodetector is located.

[0041] In the present application, the photodetector structure 10 may be generated based on a variety of material systems. For example, the semiconductor substrate may be silicon, and accordingly, the spacer layer may be a buried oxide layer in a silicon-based optoelectronic material system.

[0042] It should be noted that the material system of the photodetector structure 10 is not specifically limited in the present application.

[0043] In the present application, above each cavity 14 corresponds to a detector area, and the number of photoelectric detectors in the detector area may be one or more.

[0044] Please continue reading Figure 1 The photodetector may include a PD core 15, a bottom connection 16 of the PD, a top connection 17, and an input waveguide 18 connecting other optical paths to the PD. The input waveguide 18 inputs light into the PD core 15 of the photodetector structure.

[0045] It should be noted that the number of input waveguides of the photodetector may be 1, 2 or more.

[0046] Since the bandwidth can be expressed in terms of the 3dB cutoff frequency, the PD bandwidth is given by the 3dB cutoff frequency f of the carriers in the PD core. PD The 3dB cutoff frequency f of the resistor-capacitor (RC) circuit RC Jointly determined, as shown in the following formula:

[0047]

[0048] Among them, f 3dB is the 3dB cutoff frequency, τ RC is the RC delay, τ PD is the PD delay, T RC It is the product of PD equivalent capacitance (including PD junction capacitance, parasitic capacitance, etc.) and PD resistance; f RC is the 3dB cutoff frequency of the RC circuit, f PD is the 3dB cutoff frequency of the PD.

[0049] 3dB cutoff frequency f of RC circuit RC The relationship with RC delay is shown in the following formula:

[0050] f RC =1 / 2πτ RC

[0051] PD's 3dB cutoff frequency f PD The relationship with PD delay is shown in the following formula:

[0052] f PD=1 / 2πτ PD

[0053] The photodetector structure provided in the present application has a cantilever structure because a cavity is formed in the substrate. The cantilever structure can support the photodetector area in the chip instead of the photodetector area supported by a complete dielectric layer. Since the refractive index of air / vacuum is lower than that of other solid materials, the cantilever structure reduces the refractive index of the material around the photodetector and also reduces the parasitic capacitance of the ICR-PIC RF output end, thereby reducing the PD equivalent capacitance, thereby reducing the RC delay τ RC Reduce, f 3dB The increase in the 3dB cutoff frequency is beneficial to the optimization of the ICR-PIC RF performance. For the bandwidth reduction of high-speed PD caused by parasitic capacitance, the bandwidth can be significantly improved. When the ICR-PIC is integrated with a heater, the cavity can also optimize the heating efficiency.

[0054] Please continue reading Figure 1 According to one embodiment of the present application, at least one groove 13 is formed around the detector area, each groove 13 is connected to the cavity 14, and the depth of each groove 13 is equal to the thickness of the spacer layer 12. The groove can be formed by various means commonly used in the art, such as first forming a patterned hard mask layer, and then etching the spacer layer using the hard mask layer as a mask to form the groove.

[0055] In this embodiment, the groove 13 may be one or more grooves. For example, it may be a U-shaped groove surrounding the PD region; Figure 1 As shown, there are two grooves located on both sides of the PD area. The groove 13 is used to provide a window for etching away the top part of the substrate. The subsequent etching solution can etch and remove the top area of ​​the substrate through the groove 13, thereby forming a cavity 14. Specifically, a corrosive liquid can be injected into each groove 13, and the corrosive liquid flows into the hole of the groove 13 and then uniformly corrodes the semiconductor substrate 11 in all directions. The two grooves are respectively etched into a cavity that is approximately hemispherical (the cross-section is semicircular), and the two hemispherical cavities constitute the entire cavity 14. The grooves and the cavity 14 together play a role in reducing the refractive index of the material around the PD, thereby reducing the parasitic capacitance of the PD and improving the radio frequency performance of the PD.

[0056] Next, see Figure 2 The structure of a photodetector according to another embodiment of the present application is described.

[0057] like Figure 2 As shown, the photodetector structure 20 of this embodiment includes:

[0058] Semiconductor substrate 21;

[0059] A spacer layer 22 and a waveguide layer 29 are sequentially formed on the semiconductor substrate 21 from bottom to top along a first direction D1, and the first direction is perpendicular to the surface of the semiconductor substrate 21;

[0060] A germanium photodetector is formed on the waveguide layer 29, and the germanium photodetector may include a PD core 25, a bottom connection 26 of the PD, a top connection 27, and an input waveguide 28 connecting other optical paths to the PD;

[0061] A cavity 24 is formed in the semiconductor substrate below the detector region where the photodetector is located;

[0062] Two grooves 23 are formed around the detector area, and the depth of each groove 23 is equal to the sum of the thickness of the spacer layer 22 and the thickness of the waveguide layer 29 .

[0063] Next, see Figure 3 The method of forming the cavity in this embodiment is described below.

[0064] Specifically, the method for manufacturing the cavity 24 of the photodetector structure 20 generally includes the following steps S1 to S5.

[0065] Step S1, preparing a photodetector above a spacer layer located above a substrate.

[0066] Specifically, the method for preparing the photodetector can adopt the existing methods of various material systems. For example, for the SOI material system, the preparation method includes:

[0067] Providing a semiconductor substrate 21, wherein the semiconductor substrate 21 is a silicon substrate;

[0068] Injecting oxygen ions into the silicon substrate. By injecting oxygen ions into the silicon substrate, a spacer layer 22, i.e., a buried oxide layer, is formed. The buried oxide layer separates the silicon substrate into two parts, the upper and lower parts, and the part below the buried oxide layer is the silicon substrate;

[0069] A waveguide layer 29 is formed on the silicon layer above the buried oxide layer, and a photodetector including a PD core 25, a bottom connection 26 of the PD, a top connection 27 and an input waveguide 28 is formed. The specific method can be referred to the prior art and will not be described here. Of course, an SOI substrate can also be directly used, thus avoiding the above oxygen injection step.

[0070] Step S2 , etching the waveguide layer 29 and the spacer layer 22 respectively to form two grooves 23 .

[0071] In this embodiment, each groove includes a first groove body formed in the spacer layer 22 and a second groove body formed in the waveguide layer 29, and the projection of the first groove body along the first direction is included in the projection of the second groove body along the first direction, and the first direction is perpendicular to the surface of the semiconductor substrate; that is, in a top-down perspective, the area on the spacer layer 22 that needs to be etched away is a subset of the area on the waveguide layer 29 that has been completely etched away.

[0072] Specifically, the waveguide layer 29 is first etched to form a first groove. Then, the second groove is etched on the spacer layer 22 based on the hard mask technology. At this time, the first groove and the second groove form a groove 23. Figure 3 The photodetector structure shown.

[0073] Step S3, etching to form a cavity. The hard mask is removed from the cavity, and the groove 23 is used as a channel for the corrosive substance to form a cavity in the semiconductor substrate 21 below and around the PD core 25 by isotropic etching. At this time, the PD is manufactured in a suspended state supported by a cantilever.

[0074] Preferably, the height of the cavity etched on the upper part of the substrate 21 via the groove 23 is in the range of 30 micrometers to 80 micrometers. The cavity in this height range is not only easy to etch, but also enables the ICR-PIC to have better radio frequency performance.

[0075] It should be noted that Figure 1-3 The vias and metal lines connecting the bottom and top connections of the PD, as well as the dielectric layer covering the PD to protect and support the metal layer are not shown. These layers can be arranged according to existing design rules according to actual applications, and will not be repeated in this application.

[0076] In this embodiment, a cantilever structure is used to support the photodetector area in the chip, so that the photodetector can be isolated from the substrate to a certain extent, reducing the parasitic capacitance of the ICR-PIC RF output end, which is beneficial to the optimization of the ICR-PIC RF performance.

[0077] According to one embodiment of the present application, the cross-section of at least one groove is one or more of U-shaped, square, rectangular, circular, and elliptical.

[0078] Specifically, when the groove is one, the groove is a U-shaped deep groove surrounding the PD core.

[0079] According to one embodiment of the present application, at least one heater is disposed in the detector region, and the at least one heater is used to heat the at least one photodetector.

[0080] In this embodiment, the heater may be a heating resistor. Specifically, a heating resistor is arranged near or near the photodetector area. When working in a preset band, the heating resistor is turned on to maintain the temperature of the photodetector above a preset temperature. The preset temperature here may be 20°C, 30°C, 40°C, 50°C, 60°C, 70°C, 80°C, etc., or other temperatures.

[0081] Silicon-based integrated ICR-PIC generally uses a germanium photodetector (Ge PD) as a photodetector. When the detection wavelength of Ge PD is extended from the C-wave end to the L-band, it faces the challenge of a significant decrease in the long-wave responsivity of Ge PD in a low-temperature environment. Using an external temperature controller to heat the silicon-based integrated ICR-PIC as a whole, or integrating a micro-heater near the Ge PD, can alleviate the disadvantage that the responsivity is greatly reduced with the increase of wavelength, but it will introduce a large amount of additional power consumption. In addition, some ICR-PICs based on other material systems will also encounter situations where they need to work in a lower temperature environment, so it is also necessary to set up an integrated micro-heater next to the PD. When the solution of integrating a micro-heater near the PD is adopted, the cantilever-supported PD has a better thermal isolation effect, so the heating power consumption required for the same temperature rise of the PD will be much less than that of the PD directly set on the chip, which reduces the power consumption of the ICR-PIC when the heater is applied, improves the heating efficiency of the photodetector, and can improve the responsivity of the Ge PD.

[0082] In this embodiment, when a heater is provided in the detector area, one heater may correspond to one photodetector, that is, one heater heats one photodetector; or one heater may correspond to multiple photodetectors, that is, one heater heats multiple photodetectors at the same time. Alternatively, multiple heaters may correspond to one photodetector, that is, multiple heaters heat one photodetector at the same time; or multiple heaters may correspond to multiple photodetectors, that is, each heater heats only one photodetector.

[0083] Accordingly, above each cavity there may be one PD and one heater; there may also be multiple PDs and one heater; there may also be one PD and multiple heaters; there may also be multiple PDs and multiple heaters.

[0084] Next, see Figure 4 The structure of a photodetector according to an embodiment of the present application is described below.

[0085] like Figure 4As shown, a spacer layer 22 and a waveguide layer 29 are sequentially formed on the semiconductor substrate 21. The photodetector region includes a photodetector and an integrated micro-heater 20a arranged near the photodetector. The groove 28 and the cavity 24 on the top of the semiconductor substrate 21 connected thereto play a role in isolating heat conduction, thereby improving the heating efficiency of the integrated micro-heater 20a.

[0086] It should be noted that Figure 4 Other parts and Figure 3 The functions of the middle parts are the same and will not be described in detail. Figure 4 The bottom connection, top connection, vias and metal lines of the integrated micro heater 10a, and the dielectric layer covering the PD to protect and support the metal layer are not shown. These layers can be arranged according to existing design rules according to actual applications and will not be described in detail in this application.

[0087] When it is necessary to integrate a micro heater near the PD, a cantilever structure is used instead of a complete dielectric layer to support the PD. This can form a cavity between the PD and the chip substrate, reduce heat loss caused by heat transfer, and thus improve the heating efficiency of the micro heater, reduce the power consumption of the heater, and also reduce the power consumption of the ICR-PIC chip when the heater is used.

[0088] The present application also provides an integrated coherent optical receiver chip. Next, refer to Figure 5 An integrated coherent optical receiver chip according to an embodiment of the present application is described.

[0089] like Figure 5 As shown, the integrated coherent optical receiver chip includes: a signal optical coupler 201, a local oscillator optical coupler 202, at least one 90-degree coherent optical mixer 300 and a plurality of photodetectors 100, wherein the plurality of photodetectors 100 have the above-mentioned photodetector structure; the output end of the signal optical coupler 201 and the output end of the local oscillator optical coupler 202 are respectively connected to the input end of the 90-degree coherent optical mixer 300, and the plurality of output ends of the 90-degree coherent optical mixer 300 are respectively connected to the plurality of photodetectors 100 in a one-to-one correspondence.

[0090] Integrated coherent optical receiver chips are capable of extracting information from an optical input from an input port. The optical input is a carrier (i.e., a high-frequency sinusoidal light wave) modulated by a signal (i.e., a low-frequency analog signal or a low-frequency digital sequence) through a modulation scheme. The extracted information is presented in an electronic form, such as a voltage or current presented on a set of pads.

[0091] In this embodiment, the signal optical coupler 201 and the local oscillator optical coupler 202 can be either grating couplers or end face couplers. The 90-degree coherent optical mixer 300 can be a 4×4 multimode interferometer, a 4×2 multimode interferometer, or an on-chip device structure with a 90-degree mixing function formed by any combination and splicing of multiple N×M interferometers.

[0092] In this embodiment, the integrated coherent optical receiver chip can be set as a silicon photonic chip, a multi-material system fusion optoelectronic chip or other forms. Here, the multi-material system fusion optoelectronic chip can be made of silicon nitride, lithium niobate, III-V group and other material systems and corresponding processes.

[0093] Preferably, the integrated coherent optical receiver chip is a silicon photonic chip based on a material system such as silicon, silicon dioxide, germanium, etc. In a specific implementation, the substrate is a silicon substrate, the spacer layer is a silicon dioxide spacer layer, the waveguide is a silicon waveguide, the passive device is a silicon passive device, and the detector is a silicon-based germanium photodetector or a Ge-on-Si detector; in another specific implementation, the waveguide is a SiN waveguide, and the passive device is a SiN passive device.

[0094] Since the integrated coherent optical receiver chip of the embodiment of the present application adopts the photodetector structure of the above embodiment, it is possible to reduce the parasitic capacitance of the RF output end of the chip, which is beneficial to the optimization of RF performance.

[0095] Next, see Figure 6 To illustrate an integrated coherent optical receiver chip according to another embodiment of the present application.

[0096] like Figure 6 As shown, in Figure 5 Based on the basic structure shown in the figure: after the signal light enters through the signal light coupler 201, it passes through the polarization beam splitter rotator 800 and is divided into two beams of transverse electric component and transverse magnetic component, respectively passing through the first adjustable optical attenuator 401 and the second adjustable optical attenuator 402, and then passing through the first power beam splitter 501 and the second power beam splitter 502. After beam splitting, most of the power of the transverse electric and transverse magnetic components of the signal light enter the two 90-degree mixers 300 respectively, and a small part of the power enters the first monitoring photodetector 601 and the second monitoring photodetector 602 respectively. The local oscillator light enters the fourth power beam splitter 700 through the local oscillator light coupler 202. The light entering the fourth power beam splitter 700 is evenly or approximately evenly divided into two beams and enters the two 90-degree mixers 300. The signal light entering the two 90-degree mixers 300 interferes with the local oscillator light, and the interference light is output to 8 PDs supported by the cantilever, i.e., 100, and converted into an electrical signal.

[0097] In this embodiment, the fourth power beam splitter 700 is a uniform beam splitter. The beam splitting ratio can be set according to actual needs, and preferably the beam splitting ratio is 50%:50%.

[0098] Figure 7 An integrated coherent optical receiver chip according to yet another embodiment of the present application is shown.

[0099] like Figure 7 As shown, compared to Figure 6 In the implementation method shown, after the signal light passes through the polarization beam splitter rotator 800, the transverse electric and transverse magnetic components of the signal light may also first pass through the first power beam splitter 501 and the second power beam splitter 502 respectively, and a small portion of the power separated from each enters the first monitoring photodetector 601 and the second monitoring photodetector 602; then the remaining majority of the power enters the first adjustable optical attenuator 401 and the second adjustable optical attenuator 402 respectively, and then enters the two 90-degree coherent optical mixers 300 respectively.

[0100] In this embodiment, the integrated coherent optical receiver chip may also include a third power beam splitter 503 and a third monitoring photodetector 603. The local oscillator light enters from the local oscillator optical coupler 202, and after passing through the third power beam splitter 503, a small portion of the power enters the third monitoring photodetector 603, and most of the power enters the fourth power beam splitter 700.

[0101] The PD in this embodiment has a heater. After testing, the power consumption of 8 (4 pairs) PDs heating up to 40°C is no more than 80mW. When the cantilever support is not used, the power consumption of 8 (4 pairs) PDs heating up to 40°C needs to exceed 200mW. After using a PD with a cantilever support similar to the core, the parasitic capacitance between the C pole and the S pole, as well as the parasitic capacitance between the S pole and the GND, are reduced by about 8%. It can be seen that the ICR-PIC in this application can significantly reduce the heating power consumption and the parasitic capacitance at the RF output end.

[0102] The light entering the first monitoring photodetector, the second monitoring photodetector, and the third monitoring photodetector is also converted into monitoring electrical signals. Figure 6 and Figure 7 The first monitoring photodetector 601, the second monitoring photodetector 602, and the third monitoring photodetector 603 can be conventional photodetectors according to actual needs. Preferably, a photodetector having a photodetector structure of any of the above embodiments can be used. In addition, according to actual needs, two photodetectors can be connected in a differential working mode and a differential working voltage can be set to reduce dark current.

[0103] Figure 6 and Figure 7The splitting ratio of the first power beam splitter 501, the second power beam splitter 502, and the third power beam splitter 503 is preferably 2%:98% to 10%:90%. The power beam splitter can be selected from interference type, directional coupler type, adiabatic coupler type, and adiabatic-directional coupler type.

[0104] In a specific implementation, Figure 6 and Figure 7 The second monitoring photodetector 602 may also be eliminated, and the outputs of the first power beam splitter 501 and the second power beam splitter 502 may be connected to the first monitoring photodetector 601 at the same time.

[0105] Although multiple embodiments are described herein, it should be understood that a variety of other modifications and embodiments may be conceived by those skilled in the art, all of which will fall within the spirit and scope of the concepts disclosed herein. More particularly, various modifications and changes may be made to the arrangements and / or components of the combined arrangements of the subject matter within the scope of the disclosure, drawings, and appended claims of the present application. In addition to modifications and changes to the components and / or arrangements, the use of alternatives is also an obvious option for those skilled in the art.

Claims

1. A photodetector structure, characterized in that: include: Semiconductor substrate; A spacer layer is formed on the semiconductor substrate; At least one photodetector is formed on the spacer layer; A cavity is formed in the semiconductor substrate below a detector region where the at least one photodetector is located.

2. The photodetector structure according to claim 1, characterized in that: At least one groove is formed around the detector area, and the groove is communicated with the cavity.

3. The photodetector structure according to claim 1, characterized in that: There is also a waveguide layer between the spacer layer and the at least one photodetector.

4. The photodetector structure according to claim 1, characterized in that: The photodetector includes a germanium photodetector.

5. The photodetector structure according to any one of claims 1 to 4, characterized in that: At least one heater is arranged in the detector region, and the at least one heater is used to heat the at least one photodetector.

6. The photodetector structure according to claim 1, characterized in that: The height of the cavity ranges from 30 micrometers to 80 micrometers.

7. An integrated coherent optical receiver chip, characterized in that: include: A signal optical coupler, a local oscillator optical coupler, at least one 90-degree coherent optical mixer and a plurality of photodetectors, wherein the plurality of photodetectors have the photodetector structure described in any one of claims 1 to 6; the output end of the signal optical coupler and the output end of the local oscillator optical coupler are respectively connected to the input end of the 90-degree coherent optical mixer, and the plurality of output ends of the 90-degree coherent optical mixer are respectively connected to the plurality of photodetectors in a one-to-one correspondence.

8. The integrated coherent optical receiver chip according to claim 7, characterized in that: The integrated coherent optical receiver chip also includes at least one monitoring photodetector, and at least one first power beam splitter is also arranged between the signal optical coupler and / or the local oscillator optical coupler and the at least one 90-degree coherent optical mixer, and the first power beam splitter is used to distribute optical power to a monitoring photodetector and a 90-degree coherent optical mixer.

9. The integrated coherent optical receiver chip according to claim 8, characterized in that: The power ratio allocated by the power beam splitter to the monitoring photodetector ranges from 2% to 10%.

10. The integrated coherent optical receiver chip according to claim 7, characterized in that: When the integrated coherent optical receiver chip includes two 90-degree coherent optical mixers, a fourth power beam splitter is further arranged between the local oscillator optical coupler and the two 90-degree coherent optical mixers, and the fourth power beam splitter is used to distribute the local oscillator optical power to the two 90-degree coherent optical mixers, and the splitting ratio of the fourth power beam splitter is 50%:50%.

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