All-digital virtual simulation verification system for embedded equipment

Abstract

The invention provides an embedded device-oriented all-digital virtual simulation verification system, which belongs to the technical field of digital data processing and comprises a virtual processor, a peripheral, a memory, an input / output module, a simulation control module and a result analysis module. Modules such as a virtual processor can be customized according to different embedded device characteristics so as to support various devices. The virtual processor module comprises a unit simulation processor such as an instruction set; the virtual peripheral module is provided with a timer and other unit simulation peripherals; the virtual memory module is provided with RAM and ROM unit simulation memories; the virtual input and output module comprises unit analog interfaces such as keys; the simulation control module realizes system control and equipment interaction; the result analysis module analyzes the result and generates a report. According to the method, the problems of low simulation precision, poor expandability and low interactivity in the prior art are solved, the simulation precision is improved, the expandability and the interactivity are enhanced, and the method is of great significance to development and verification of embedded equipment.

Description

Technical Field

[0001] The invention belongs to the technical field of digital data processing, and in particular relates to a full-digital virtual simulation verification system for embedded devices. Background Art

[0002] With the widespread application of embedded systems, higher requirements are placed on the development and verification of embedded devices. Traditional embedded device verification methods usually use hardware-in-the-loop testing or actual hardware testing, which have the problems of high cost, long development cycle, and poor repeatability; while all-digital virtual simulation technology can perform comprehensive functional verification and performance testing of embedded devices without relying on actual hardware, with the advantages of low cost, short development cycle, and good repeatability.

[0003] However, the existing all-digital virtual simulation verification system has the following problems when it comes to embedded devices:

[0004] The simulation accuracy is not high, and it is difficult to accurately simulate the actual operating environment and behavior of embedded devices;

[0005] Poor scalability, making it difficult to meet the verification requirements of different types of embedded devices;

[0006] The interactivity is not strong, and it is difficult to achieve real-time interaction and debugging with embedded devices. Summary of the invention

[0007] The purpose of the present invention is to provide a fully digital virtual simulation verification system for embedded devices, aiming to solve the problems of low simulation accuracy, poor scalability and weak interactivity in the prior art.

[0008] To achieve the above object, the present invention provides the following technical solutions:

[0009] A fully digital virtual simulation verification system for embedded devices comprises a virtual processor module, a virtual peripheral module, a virtual memory module, a virtual input / output module, a simulation control module and a result analysis module, wherein the virtual processor module is used to simulate the processor in the embedded device and is customized according to different embedded processor architectures to support various embedded devices; the virtual peripheral module is used to simulate the peripherals in the embedded device and is customized according to different embedded peripheral types to support various embedded devices; the virtual memory module is used to simulate the memory in the embedded device and is customized according to different embedded memory types and capacities to support various embedded devices; the virtual input / output module is used to simulate the input / output interface of the embedded device and is customized according to different embedded input / output device types to support various embedded devices; the simulation control module is used to control the operation of the virtual simulation verification system and interacts with the embedded device to realize real-time debugging and testing; the result analysis module is used to analyze the results of the virtual simulation verification and generate a test report to provide a reference for the development and optimization of embedded devices.

[0010] As a preferred solution of the present invention, the virtual processor module is provided with an instruction set unit, a register unit and a memory management unit. The instruction set unit is used to simulate the processor instruction set in the embedded device, accurately parse and execute various instructions, the register unit simulates the state of various registers of the embedded device, and realizes the read and write operations of the registers. The memory management unit is used to simulate the allocation, read and write operations of the memory to simulate the memory management function of the embedded device.

[0011] As a preferred solution of the present invention, the virtual peripheral module is provided with a timer unit, a serial port unit, an I2C unit and an SPI unit, the timer unit is used to simulate the timer function in the embedded device, the serial port unit is used to simulate the data sending and receiving process of the serial port, the I2C unit simulates data transmission and interaction according to the I2C communication protocol, and the SPI unit realizes data transmission and interaction simulation according to the SPI communication protocol.

[0012] As a preferred solution of the present invention, the serial port unit is used to simulate the data transmission and reception process of the serial port, wherein the baud rate B is calculated as follows:

[0013] ,

[0014] Where: Indicates the baud rate, is the number of bits transmitted, For the transmission time.

[0015] As a preferred solution of the present invention, a random access memory RAM unit and a read-only memory ROM unit are provided in the virtual memory module. The random access memory RAM unit is used to simulate the RAM of the embedded device, allocate corresponding memory space and implement read and write operations, and the read-only memory ROM unit is used to simulate the ROM of the embedded device and provide a read-only storage function.

[0016] As a preferred solution of the present invention, the virtual input and output module is provided with a key unit, a display unit and a sensor unit. The key unit is used to simulate key input and generate a corresponding input signal according to a triggering method. The display unit is used to simulate the display effect of the display screen. The sensor unit is used to generate simulated sensor data according to the working principle of the sensor.

[0017] As a preferred solution of the present invention, the simulation control module is provided with a start unit, a stop unit, a pause unit and a single-step execution unit. The start unit is used to start the virtual simulation verification system, the stop unit is used to control the stop of the virtual simulation verification system, the pause unit is used to pause the operation of the virtual simulation verification system, and the single-step execution unit is used to implement the single-step execution function of the virtual simulation verification system.

[0018] As a preferred solution of the present invention, a functional correctness analysis unit and a performance indicator analysis unit are provided in the result analysis module. The functional correctness analysis unit determines whether the function of the embedded device is correct by comparing the output of the virtual simulation verification system with the expected result. The performance indicator analysis unit is used to measure the execution time and memory occupancy performance indicators in the virtual simulation verification process and generate a corresponding analysis report.

[0019] As a preferred solution of the present invention, the execution time calculation formula in the performance indicator analysis unit is as follows:

[0020] ,

[0021] Where: Indicates the execution time, is the number of instructions executed, is the clock frequency of the virtual processor.

[0022] As a preferred solution of the present invention, the memory usage calculation formula in the performance indicator analysis unit is as follows:

[0023] ,

[0024] Where: Indicates the memory usage. is the memory space used, is the total memory space.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. In the present invention, a virtual processor module is used to simulate a processor in an embedded device, an instruction set unit, a register unit and a memory management unit are set, various instructions are accurately parsed and executed, and register states and memory management functions are simulated, so as to more accurately simulate processor behavior; a virtual peripheral module is used to set a variety of units to simulate different peripherals, such as timers, serial ports, I2C and SPI units, and data transmission and interaction are simulated according to corresponding protocols to improve the accuracy of peripheral simulation; a virtual memory module is used to set RAM and ROM units to simulate memory, allocate space and implement read and write operations, which conforms to actual memory characteristics; a virtual input and output module is used to set buttons, display screens and sensor units to simulate the actual operation of input and output interfaces and improve the overall simulation accuracy.

[0027] 2. In the present invention, the virtual processor module can be customized according to different embedded processor architectures, the virtual peripheral module can be customized according to different embedded peripheral types, the virtual memory module can be customized according to different embedded memory types and capacities, and the virtual input and output module can be customized according to different embedded input and output device types, thereby meeting the verification requirements of various embedded devices and enhancing scalability.

[0028] 3. In the present invention, the start, stop, pause and single-step execution units are set through the simulation control module to interact with the embedded device to achieve real-time debugging and testing. The result analysis module analyzes the simulation results and generates a test report to provide a reference for the development and optimization of embedded devices, further strengthening the interaction with the embedded device development process and enhancing interactivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0030] Figure 1 It is a system architecture block diagram of the virtual simulation verification system in the present invention;

[0031] Figure 2 It is a system architecture block diagram of the module in the present invention. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] Example 1

[0034] See also Figure 1-Figure 2 , the present invention provides the following technical solutions:

[0035] A fully digital virtual simulation verification system for embedded devices comprises a virtual processor module, a virtual peripheral module, a virtual memory module, a virtual input / output module, a simulation control module and a result analysis module, wherein the virtual processor module is used to simulate the processor in the embedded device and is customized according to different embedded processor architectures to support various embedded devices; the virtual peripheral module is used to simulate the peripherals in the embedded device and is customized according to different embedded peripheral types to support various embedded devices; the virtual memory module is used to simulate the memory in the embedded device and is customized according to different embedded memory types and capacities to support various embedded devices; the virtual input / output module is used to simulate the input / output interface of the embedded device and is customized according to different embedded input / output device types to support various embedded devices; the simulation control module is used to control the operation of the virtual simulation verification system and interacts with the embedded device to realize real-time debugging and testing; the result analysis module is used to analyze the results of the virtual simulation verification and generate a test report to provide a reference for the development and optimization of embedded devices.

[0036] In a specific embodiment of the present invention, a virtual processor module simulates a processor in an embedded device, provides core computing and control functions for virtual simulation, and supports different embedded processor architectures; a virtual peripheral module simulates peripherals in an embedded device, and meets verification requirements of different types of embedded peripherals; a virtual memory module simulates memory in an embedded device, and supports different types and capacities of embedded memory; a virtual input and output module simulates the input and output interface of an embedded device, and meets verification requirements of different types of embedded input and output devices; a simulation control module controls the operation of a virtual simulation verification system, and implements interaction with embedded devices, facilitating real-time debugging and testing; and a result analysis module analyzes the results of virtual simulation verification, and provides a reference for the development and optimization of embedded devices.

[0037] For details, please refer to Figure 2The virtual processor module is provided with an instruction set unit, a register unit and a memory management unit. The instruction set unit is used to simulate the processor instruction set in the embedded device, accurately parse and execute various instructions, the register unit simulates the state of various registers of the embedded device, and realizes the read and write operations of the registers. The memory management unit is used to simulate the allocation, read and write operations of the memory to simulate the memory management function of the embedded device.

[0038] In this embodiment: the instruction set unit can accurately parse and execute various instructions, simulate the instruction execution process of the embedded device processor, it identifies and decomposes the input instructions according to the instruction set specification of the embedded processor, performs corresponding operations according to the established rules, ensures that the program in the virtual environment can run correctly, and provides instruction-level basic support for the operation of the entire virtual system; the register unit simulates the state of various registers of the embedded device, realizes the read and write operations of the register, and simulates the storage function of the actual register by allocating corresponding memory space to each register. During the instruction execution process, according to the requirements of the instruction, the register value is read from the corresponding memory area (read operation), or the data is written to the corresponding memory area (write operation) to support the normal operation of the processor; the memory management unit is used to simulate the allocation, read and write operations of the memory to simulate the memory management function of the embedded device. It determines the memory allocation method according to the memory architecture of the embedded device, such as simulating the segment division and allocation in the segmented memory management. During the program running process, it is responsible for managing the virtual memory space, correctly performing memory read and write operations according to the memory access requirements of the instruction, and considering factors such as memory access rights and cache mechanisms to ensure the correct storage and reading of data.

[0039] For details, please refer to Figure 2 The virtual peripheral module is provided with a timer unit, a serial port unit, an I2C unit and an SPI unit. The timer unit is used to simulate the timer function in the embedded device, the serial port unit is used to simulate the data receiving and sending process of the serial port, the I2C unit simulates data transmission and interaction according to the I2C communication protocol, and the SPI unit realizes data transmission and interaction simulation according to the SPI communication protocol.

[0040] In this embodiment: the timer unit simulates the timer function in the embedded device, including counting and timing interruption. It simulates the timing process of the timer in a virtual environment according to the working principle of the timer. When the set time value is reached, the timing interruption is triggered, providing accurate time reference and timing trigger event simulation for embedded applications that require timing operation; the serial port unit simulates the data transmission and reception process of the serial port, including baud rate setting, data format, etc., and implements data transmission and reception operation simulation in a virtual environment according to the communication protocol of the serial port. By setting the baud rate and data format, it ensures that the virtual serial port can perform correct serial communication simulation with external devices or other virtual modules; the I2C unit simulates data transmission and interaction according to the I2C communication protocol. In the virtual environment, it simulates the master-slave device communication process on the I2C bus, including start signal, stop signal, address transmission, data transmission and other operations, providing a virtual communication environment for embedded devices with an I2C interface and verifying its I2C function; the SPI unit implements data transmission and interaction simulation according to the SPI communication protocol. In the virtual environment, it simulates the master-slave device communication of the SPI interface, including clock signal, data input and output and other operations, providing accurate virtual communication conditions for embedded devices involving SPI communication for functional verification.

[0041] Specifically, the serial port unit is used to simulate the data transmission and reception process of the serial port, wherein the baud rate B is calculated as follows:

[0042] ,

[0043] Where: Indicates the baud rate, is the number of bits transmitted, It is the transmission time, which is used to calculate the data transmission rate of peripherals such as simulated serial ports.

[0044] For details, please refer to Figure 2 The virtual memory module is provided with a random access memory RAM unit and a read-only memory ROM unit. The random access memory RAM unit is used to simulate the RAM of the embedded device, allocate corresponding memory space and implement read and write operations, and the read-only memory ROM unit is used to simulate the ROM of the embedded device and provide a read-only storage function.

[0045] In this embodiment: the random access memory RAM unit simulates the RAM of the embedded device, allocates corresponding memory space and implements read and write operations, provides temporary storage for programs and data in the virtual system, supports data storage and fast access when the program is running, and its read and write operations conform to the random access characteristics of RAM; the read-only memory ROM unit simulates the ROM of the embedded device, provides a read-only storage function, and is used to store fixed program codes or data, simulating the characteristics of the actual ROM in the virtual environment to ensure the read-only nature and stability of the data.

[0046] For details, please refer to Figure 2 The virtual input and output module is provided with a key unit, a display unit and a sensor unit. The key unit is used to simulate key input and generate a corresponding input signal according to a triggering method. The display unit is used to simulate the display effect of the display screen. The sensor unit is used to generate simulated sensor data according to the working principle of the sensor.

[0047] In this embodiment: the key unit simulates key input, generates a corresponding input signal according to the triggering method, simulates the pressing and releasing of actual keys in a virtual environment, and provides simulated key input for the embedded device, which is used to test the response of the embedded device to the key input; the display screen unit simulates the display effect of the display screen, including image display, text output, etc., simulates the display function of the actual display screen in a virtual environment, and generates corresponding image and text display effects according to the output data of the embedded device, which is used to verify the output display function of the embedded device; the sensor unit generates simulated sensor data according to the working principle of the sensor, simulates the working process of different types of sensors, such as temperature sensors, light sensors, etc. in a virtual environment, generates corresponding simulated data, and provides simulated sensor input for the embedded device, which is used to test the embedded device's ability to process sensor data.

[0048] For details, please refer to Figure 2 The simulation control module is provided with a start unit, a stop unit, a pause unit and a single-step execution unit. The start unit is used to start the virtual simulation verification system, the stop unit is used to control the stop of the virtual simulation verification system, the pause unit is used to pause the operation of the virtual simulation verification system, and the single-step execution unit is used to realize the single-step execution function of the virtual simulation verification system.

[0049] In this embodiment: the start unit is used to start the virtual simulation verification system and initialize the entire simulation environment. When the user starts the simulation, the unit is responsible for starting each sub-module such as the virtual processor module, the virtual peripheral module, the virtual memory module and the virtual input and output module, so that the entire virtual system enters the running state; the stop unit controls the stop of the virtual simulation verification system and ends the simulation operation. When the user needs to stop the simulation, the unit will safely terminate the operation of each sub-module, release related resources, and ensure the stable exit of the system; the pause unit pauses the operation of the virtual simulation verification system so that the user can analyze and debug. During the simulation process, the user can use the unit to pause the system operation and view the current system status, such as the register values ​​and memory data of each module, so as to discover and solve problems; the single-step execution unit realizes the single-step execution function of the virtual simulation verification system. During the debugging process, the user can use the unit to make the system execute one instruction or one operation step at a time, which is convenient for the user to gradually observe the operation process of the system and understand the execution results of each step, which helps to discover and solve problems.

[0050] For details, please refer to Figure 2 The result analysis module is provided with a functional correctness analysis unit and a performance index analysis unit. The functional correctness analysis unit determines whether the function of the embedded device is correct by comparing the output of the virtual simulation verification system with the expected result. The performance index analysis unit is used to measure the execution time and memory usage performance index in the virtual simulation verification process and generate a corresponding analysis report.

[0051] In this embodiment: the functional correctness analysis unit determines whether the function of the embedded device is correct by comparing the output of the virtual simulation verification system with the expected result. It analyzes the output data of the virtual system and compares it with the pre-set expected result. If the two are consistent, it means that the function of the embedded device meets the requirements; if they are inconsistent, it indicates that there may be a problem and further investigation is required; the performance indicator analysis unit measures the execution time, memory usage and other performance indicators during the virtual simulation verification process, and generates a corresponding analysis report, in which the execution time and memory usage are calculated by formulas. Based on these performance indicators, a detailed analysis report is generated to provide data support for the performance optimization of the embedded device.

[0052] For details, please refer to Figure 1 , the execution time calculation formula in the performance indicator analysis unit is as follows:

[0053] ,

[0054] Where: Indicates the execution time, is the number of instructions executed, It is the clock frequency of the virtual processor and is used to calculate the execution time in the virtual simulation verification process in the performance indicator analysis unit.

[0055] The calculation formula for memory usage in the performance indicator analysis unit is as follows:

[0056] ,

[0057] Where: Indicates the memory usage. is the memory space used, It is the total memory space, which is used to calculate the memory usage during the virtual simulation verification process.

[0058] In this embodiment: a detailed analysis report is generated based on the measured performance indicators. This report provides important data support for the performance optimization of embedded devices, helping developers understand the performance of devices in a virtual environment so as to perform targeted optimization, such as optimizing algorithms, adjusting memory allocation, etc.

[0059] Specifically, in the present invention, at the beginning of virtual simulation, the virtual processor module is customized according to the simulated embedded processor architecture; during operation, the instructions in the virtual system are received and processed, and the simulation of the embedded device processor behavior is realized through the collaborative work of the instruction set unit, the register unit and the memory management unit, and customized according to the type of embedded device peripherals to be simulated; during the virtual simulation process, each unit in the virtual peripheral module simulates the working process of the peripheral according to the corresponding protocol, provides a virtual peripheral environment for the embedded device, and the virtual memory module is customized according to the memory type and capacity of the embedded device; when the virtual system is running, temporary storage (RAM unit) and read-only storage (ROM unit) are provided for programs and data to simulate the actual working conditions of the memory; the virtual input and output module is customized according to the input and output device type of the embedded device ; In virtual simulation, a simulated input and output interface environment is provided for embedded devices to receive or output corresponding data; During the virtual simulation process, the user uses the start, stop, pause and single-step execution functions as needed to control the virtual simulation verification system, interact with the embedded device, and perform real-time debugging and testing; After the virtual simulation is completed, the result analysis module analyzes the simulation results; the functional correctness analysis unit first determines whether the function is correct, and the performance index analysis unit measures the relevant performance indicators and generates an analysis report to provide a reference for the development and optimization of embedded devices; The all-digital virtual simulation verification system for embedded devices provided by the present invention solves the problems existing in the prior art, has the beneficial effects of improving simulation accuracy, enhancing scalability and strengthening interactivity, and is of great significance to the development and verification of embedded devices.

[0060] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein. Any modification, replacement, and improvement made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A fully digital virtual simulation verification system for embedded devices, characterized in that: It includes a virtual processor module, a virtual peripheral module, a virtual memory module, a virtual input and output module, a simulation control module and a result analysis module. The virtual processor module is used to simulate the processor in the embedded device and is customized according to different embedded processor architectures to support various embedded devices. The virtual peripheral module is used to simulate the peripherals in the embedded device and is customized according to different embedded peripheral types to support various embedded devices; The virtual memory module is used to simulate the memory in the embedded device, and is customized according to different embedded memory types and capacities to support various embedded devices; the virtual input and output module is used to simulate the input and output interface of the embedded device, and is customized according to different embedded input and output device types to support various embedded devices; the simulation control module is used to control the operation of the virtual simulation verification system, and the simulation control module interacts with the embedded device to achieve real-time debugging and testing; The result analysis module is used to analyze the results of virtual simulation verification and generate a test report to provide a reference for the development and optimization of embedded devices.

2. A fully digital virtual simulation verification system for embedded devices according to claim 1, characterized in that: The virtual processor module is provided with an instruction set unit, a register unit and a memory management unit. The instruction set unit is used to simulate the processor instruction set in the embedded device, accurately parse and execute various instructions, the register unit simulates the state of various registers of the embedded device, and realizes the read and write operations of the registers. The memory management unit is used to simulate the allocation, read and write operations of the memory to simulate the memory management function of the embedded device.

3. A fully digital virtual simulation verification system for embedded devices according to claim 2, characterized in that: The virtual peripheral module is provided with a timer unit, a serial port unit, an I2C unit and an SPI unit. The timer unit is used to simulate the timer function in the embedded device, the serial port unit is used to simulate the data receiving and sending process of the serial port, the I2C unit simulates data transmission and interaction according to the I2C communication protocol, and the SPI unit realizes data transmission and interaction simulation according to the SPI communication protocol.

4. A fully digital virtual simulation verification system for embedded devices according to claim 3, characterized in that: The serial port unit is used to simulate the data transmission and reception process of the serial port, wherein the baud rate B is calculated as follows: , where: Indicates the baud rate, is the number of bits transmitted, For the transmission time.

5. The all-digital virtual simulation verification system for embedded devices according to claim 1, characterized in that: The virtual memory module is provided with a random access memory RAM unit and a read-only memory ROM unit. The random access memory RAM unit is used to simulate the RAM of the embedded device, allocate corresponding memory space and implement read and write operations, and the read-only memory ROM unit is used to simulate the ROM of the embedded device and provide a read-only storage function.

6. The all-digital virtual simulation verification system for embedded devices according to claim 1, characterized in that: The virtual input and output module is provided with a key unit, a display unit and a sensor unit. The key unit is used to simulate key input and generate a corresponding input signal according to a triggering method. The display unit is used to simulate the display effect of the display screen. The sensor unit is used to generate simulated sensor data according to the working principle of the sensor.

7. The all-digital virtual simulation verification system for embedded devices according to claim 1, characterized in that: The simulation control module is provided with a start unit, a stop unit, a pause unit and a single-step execution unit. The start unit is used to start the virtual simulation verification system, the stop unit is used to control the stop of the virtual simulation verification system, the pause unit is used to pause the operation of the virtual simulation verification system, and the single-step execution unit is used to implement the single-step execution function of the virtual simulation verification system.

8. The all-digital virtual simulation verification system for embedded devices according to claim 1, characterized in that: The result analysis module is provided with a functional correctness analysis unit and a performance indicator analysis unit. The functional correctness analysis unit determines whether the function of the embedded device is correct by comparing the output of the virtual simulation verification system with the expected result. The performance indicator analysis unit is used to measure the execution time and memory occupancy performance indicators in the virtual simulation verification process and generate a corresponding analysis report.

9. A fully digital virtual simulation verification system for embedded devices according to claim 8, characterized in that: The execution time calculation formula in the performance indicator analysis unit is as follows: , where: Indicates the execution time, is the number of instructions executed, is the clock frequency of the virtual processor.

10. The all-digital virtual simulation verification system for embedded devices according to claim 8, characterized in that: The calculation formula for memory usage in the performance indicator analysis unit is as follows: , where: Indicates the memory usage. is the memory space used, is the total memory space.

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