Intra-domain communication method and device of domain controller and electronic equipment

Abstract

The invention provides an intra-domain communication method and device of a domain controller, electronic equipment, a computer readable storage medium and a computer program product. The method comprises the following steps: establishing an intra-domain communication link based on an intra-domain communication wire harness; running a target operating system through each chip; calling a target operating system through each chip so as to register a virtual network port in an intra-domain communication link; and performing intra-domain communication in the intra-domain communication link through the virtual network port registered by each chip. According to the method and the device, the network flow of intra-domain communication and the network flow of extra-domain communication can be effectively separated, so that the network load of the whole system is reduced.

Description

Technical Field

[0001] The present application relates to vehicle technology, and in particular to a domain controller intra-domain communication method, device, electronic device, computer-readable storage medium and computer program product. Background Art

[0002] With the development of intelligent vehicle technology, vehicle-mounted domain controllers are becoming more and more complex, and single-chip domain controllers are difficult to meet complex functional requirements. Therefore, multiple chips are usually integrated into one domain controller. Compared with single-chip domain controllers, domain controllers that integrate multiple chips are more complex in hardware and software, and the data interaction requirements between different chips in the domain controller are also higher, which places high requirements on the versatility, reliability and speed of the domain controller's intra-domain communication method.

[0003] In the solutions provided by related technologies, a switch is usually used to uniformly forward the network traffic of intra-domain communication and the network traffic of extra-domain communication. However, this will make it impossible to distinguish the network traffic of intra-domain communication from the network traffic of extra-domain communication. When the network traffic of intra-domain communication is large, the network load of the entire system will also be large, which will affect extra-domain communication. Summary of the invention

[0004] The present application provides a domain controller intra-domain communication method, device, electronic device, computer-readable storage medium and computer program product, which can effectively separate the network traffic of intra-domain communication from the network traffic of extra-domain communication, thereby reducing the network load of the entire system.

[0005] The technical solution of this application is implemented as follows:

[0006] The present application provides an intra-domain communication method of a domain controller, which is applied to a domain controller, wherein the domain controller includes a plurality of chips, and the plurality of chips are connected through an intra-domain communication harness; the method includes:

[0007] Establishing an intra-domain communication link based on the intra-domain communication harness;

[0008] Run the target operating system through each chip;

[0009] Calling the target operating system through each chip to register a virtual network port in the intra-domain communication link;

[0010] In the intra-domain communication link, intra-domain communication is performed through the virtual network port registered by each chip.

[0011] The present application provides an intra-domain communication device of a domain controller, which is applied to a domain controller. The domain controller includes a plurality of chips, and the plurality of chips are connected through an intra-domain communication harness. The device includes:

[0012] A communication link establishing module, used for establishing an intra-domain communication link based on the intra-domain communication harness;

[0013] An operating system running module, used for running a target operating system through each chip;

[0014] A virtual network port registration module, used to call the target operating system through each chip to register a virtual network port in the intra-domain communication link;

[0015] The intra-domain communication module is used to perform intra-domain communication through the virtual network port registered by each chip in the intra-domain communication link.

[0016] The present application provides an electronic device, including:

[0017] A memory for storing executable instructions;

[0018] The processor is used to implement the intra-domain communication method of the domain controller provided in the present application when executing the executable instructions stored in the memory.

[0019] The present application provides a computer-readable storage medium storing executable instructions for causing a processor to execute instructions to implement the intra-domain communication method of a domain controller provided by the present application.

[0020] The present application provides a computer program product, which includes executable instructions for causing a processor to execute and implement the intra-domain communication method of a domain controller provided by the present application.

[0021] This application has the following beneficial effects:

[0022] In the case where multiple chips in a domain controller are connected through an intra-domain communication harness, the application establishes an intra-domain communication link based on the intra-domain communication harness; at the same time, the target operating system is run by each chip, and the target operating system is called by each chip to register a virtual network port in the intra-domain communication link; finally, the intra-domain communication is performed through the virtual network port registered by each chip in the intra-domain communication link. The application realizes intra-domain communication through a private virtual network port, which can effectively separate the network traffic of intra-domain communication from the network traffic of extra-domain communication, thereby reducing the network load of the entire system and avoiding adverse effects on extra-domain communication when the network traffic of intra-domain communication is large. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 is a schematic diagram of the architecture of a vehicle provided in an embodiment of the present application;

[0025] Figure 2 It is a structural diagram of a domain controller provided in an embodiment of the present application;

[0026] Figure 3A This is a first flow chart of the intra-domain communication method of the domain controller provided in an embodiment of the present application;

[0027] Figure 3B It is a second flow diagram of the intra-domain communication method of the domain controller provided in an embodiment of the present application;

[0028] Figure 3C It is a third flow chart of the intra-domain communication method of the domain controller provided in an embodiment of the present application;

[0029] Figure 4 This is a fourth flow chart of the intra-domain communication method of the domain controller provided in an embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0031] In the following description, reference is made to "some embodiments", which describes a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict. In the following description, reference is made to the term "multiple" to mean at least two.

[0032] In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0034] Before further describing the embodiments of the present application in detail, the nouns and terms involved in the embodiments of the present application are explained. The nouns and terms involved in the embodiments of the present application are subject to the following interpretations.

[0035] 1) Domain controller: also known as vehicle-mounted domain controller, is an integrated controller designed to manage and control multiple electronic control units (ECU) in the vehicle's electronic system. The domain controller processes and distributes data to coordinate and communicate between ECUs to achieve comprehensive control and optimization of the entire vehicle system. Depending on the functions and responsibilities, multiple domains can be divided in the vehicle, such as the body domain, cockpit domain, and intelligent driving domain. Each domain is uniformly managed by a specific domain controller to ensure the normal operation and collaborative work of various functional modules of the vehicle. For example, the body domain controller is responsible for controlling various body functions; the cockpit domain controller focuses on the electronic information system functions in the vehicle's intelligent cockpit; and the intelligent driving domain controller is responsible for implementing and regulating the vehicle's intelligent driving functions.

[0036] In an embodiment of the present application, the domain controller integrates multiple chips. For example, the Advanced Driver Assistance System (ADAS) domain controller (i.e., intelligent driving domain controller) generally integrates the main system on chip (SoC), computing power SoC, control SoC and other chips.

[0037] 2) Intra-domain communication: refers to the communication between different chips within the domain controller.

[0038] 3) Extra-domain communication: refers to the communication between different domain controllers.

[0039] 4) Virtual Network Port: Also known as Virtual Network Interface, it refers to a network interface simulated by software, which does not directly correspond to an actual physical network interface device. Virtual network ports can improve the flexibility of network configuration and network management capabilities.

[0040] The embodiments of the present application provide a domain controller intra-domain communication method, device, electronic device, computer-readable storage medium and computer program product, which can effectively separate the network traffic of intra-domain communication from the network traffic of extra-domain communication, thereby reducing the network load of the entire system. The following describes an exemplary application of the electronic device provided by the embodiments of the present application. The electronic device provided by the embodiments of the present application can be implemented as a domain controller or as a vehicle-mounted device (i.e., a vehicle electronic system including multiple domain controllers).

[0041] See also Figure 1 , Figure 1 1 is a schematic diagram of the architecture of the vehicle 100 provided in an embodiment of the present application, and takes a domain controller in the vehicle 100, namely, the domain controller 200, as an example for explanation, wherein the domain controller 200 integrates multiple chips, Figure 1 The chip 200 - 1 and the chip 200 - 2 are taken as examples.

[0042] In some embodiments, the chip 200-1 and the chip 200-2 in the domain controller 200 are connected via an intra-domain communication harness. Based on this, the domain controller 200 establishes an intra-domain communication link based on the intra-domain communication harness; the domain controller 200 runs the target operating system through the chip 200-1 and the chip 200-2 respectively; the domain controller 200 calls the target operating system through the chip 200-1 and the chip 200-2 respectively to register a virtual network port in the intra-domain communication link; the domain controller 200 registers the virtual network port ( Figure 1 Virtual network port 1 in the chip 200-2 and the virtual network port registered by chip 200-2 ( Figure 1 The virtual network port 2) in the domain is used for intra-domain communication.

[0043] In some embodiments, the domain controller 200 may implement the intra-domain communication method of the domain controller provided in the embodiments of the present application by running a computer program.

[0044] Electronic equipment Figure 1 The domain controller 200 is shown as an example, see Figure 2 , Figure 2 is a schematic diagram of the structure of the domain controller 200 provided in an embodiment of the present application, Figure 2 The domain controller 200 shown includes: at least one processor 210, a memory 250 and at least one network interface 220. The various components in the domain controller 200 are coupled together via a bus system 240. It is understood that the bus system 240 is used to achieve connection and communication between these components. In addition to the data bus, the bus system 240 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, the bus system 240 is not described in detail. Figure 2 Various buses are labeled as bus system 240 .

[0045] The processor 210 can be an integrated circuit chip with signal processing capabilities, such as a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., where the general-purpose processor can be a microprocessor or any conventional processor, etc.

[0046] The memory 250 may be removable, non-removable, or a combination thereof. Exemplary hardware devices include solid-state memory, hard disk drives, optical disk drives, etc. The memory 250 may optionally include one or more storage devices that are physically remote from the processor 210.

[0047] The memory 250 includes a volatile memory or a non-volatile memory, and may also include both volatile and non-volatile memories. The non-volatile memory may be a read-only memory (ROM), and the volatile memory may be a random access memory (RAM). The memory 250 described in the embodiment of the present application is intended to include any suitable type of memory.

[0048] In some embodiments, memory 250 can store data to support various operations, examples of which include programs, modules, and data structures, or a subset or superset thereof, as exemplarily described below.

[0049] Operating system 251, including system programs for processing various basic system services and performing hardware-related tasks, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks;

[0050] The network communication module 252 is used to reach other electronic devices (such as other domain controllers) via one or more (wired or wireless) network interfaces 220. Exemplary network interfaces 220 include: Bluetooth, Wireless Compatibility Certification (WiFi), and Universal Serial Bus (USB).

[0051] In some embodiments, the intra-domain communication device of the domain controller provided in the embodiments of the present application may be implemented in software. Figure 2The intra-domain communication device 255 of the domain controller stored in the memory 250 is shown, which can be software in the form of programs and plug-ins, including the following software modules: a communication link establishment module 2551, an operating system operation module 2552, a virtual network port registration module 2553, and an intra-domain communication module 2554. These modules are logical, so they can be arbitrarily combined or further split according to the functions implemented. The functions of each module will be described below.

[0052] The intra-domain communication method of the domain controller provided in the embodiment of the present application will be explained in combination with the exemplary application and implementation of the electronic device provided in the embodiment of the present application.

[0053] See also Figure 3A , Figure 3A This is a flow chart of the intra-domain communication method of the domain controller provided in the embodiment of the present application, which will be combined with Figure 3A The steps shown are explained.

[0054] In step 101, an intra-domain communication link based on an intra-domain communication harness is established.

[0055] Here, multiple chips are connected via an intra-domain communication harness, based on which an intra-domain communication link based on the intra-domain communication harness can be established at the physical layer. The type of the intra-domain communication harness is not limited.

[0056] It is worth noting that the intra-domain communication link here is a general term, which can be further subdivided into an intra-domain communication link between every two chips in multiple chips.

[0057] It is worth noting that in the embodiment of the present application, the intra-domain communication harness is distinguished from the extra-domain communication harness, thereby facilitating the separation of intra-domain communication and extra-domain communication.

[0058] In some embodiments, the intra-domain communication harness is a high-speed serial computer expansion bus standard (Peripheral Component Interconnect express, PCIe) bus; the above-mentioned establishment of an intra-domain communication link based on the intra-domain communication harness can be achieved in the following manner: Establishing a PCIe link based on the PCIe bus. The PCIe bus has the following advantages: a small number of hardware IOs, a simple topology, low hardware complexity, and easy deployment; as a high-speed communication bus, the PCIe bus can meet the high-speed traffic communication requirements within the domain.

[0059] In step 102, a target operating system is run through each chip.

[0060] Here, the target operating system is run in each chip included in the domain controller, wherein the type of the target operating system is not limited, for example, it can be a Linux operating system.

[0061] It is worth noting that the embodiment of the present application does not limit the execution order between step 101 and step 102, which can be executed simultaneously or one after the other.

[0062] In step 103, the target operating system is called by each chip to register the virtual network port in the intra-domain communication link.

[0063] Here, for each chip, calling the running target operating system to register the virtual network port in the intra-domain communication link is essentially to implement the registration of the virtual network port based on the network driver framework of the target operating system.

[0064] It is worth mentioning that the virtual network port is a network interface simulated by software, not a physical interface; in addition, there is a one-to-one relationship between the chip and the virtual network port, that is, each chip registers a virtual network port.

[0065] In step 104, intra-domain communication is performed through the virtual network port registered by each chip in the intra-domain communication link.

[0066] Here, in the intra-domain communication link, intra-domain communication is carried out through the virtual network port registered by each chip. In this way, on the one hand, intra-domain communication uses a private virtual network port, which can effectively separate the network traffic inside and outside the domain and reduce the network load of the overall system; on the other hand, the chip can realize intra-domain communication through the network driver framework provided by the target operating system, which has strong versatility and does not require additional adaptation of private application programming interfaces (Application Programming Interface, API), fully meeting the communication needs of different applications.

[0067] It is worth noting that by dividing the intra-domain communication process of the embodiment of the present application into network layers, the following results can be obtained: 1) Physical layer: connect and establish an intra-domain communication link through an intra-domain communication harness, with a small number of hardware IOs and a simple topology; 2) Data link layer: use the general network driver framework of the target operating system. Taking the target operating system as the Linux operating system as an example, the device difference information can be configured in the Linux device tree (Device Tree Source, DTS) file to achieve separation of driver and data; 3) Protocol layer: reuse the network protocol stack of the target operating system; 4) Application layer: realize intra-domain communication through a general network communication method, such as using sockets for intra-domain communication.

[0068] like Figure 3AAs shown, in the embodiment of the present application, when multiple chips in the domain controller are connected through the intra-domain communication harness, an intra-domain communication link based on the intra-domain communication harness is established; at the same time, the target operating system is run by each chip, and the target operating system is called by each chip to register a virtual network port in the intra-domain communication link; finally, intra-domain communication is performed through the virtual network port registered by each chip in the intra-domain communication link. The embodiment of the present application realizes intra-domain communication through a private virtual network port, which can effectively separate the network traffic of intra-domain communication from the network traffic of extra-domain communication, thereby reducing the network load of the entire system and avoiding adverse effects on extra-domain communication when the network traffic of intra-domain communication is large.

[0069] In some embodiments, see Figure 3B , Figure 3B This is a flow chart of a method for intra-domain communication of a domain controller provided in an embodiment of the present application, based on Figure 3A , after step 101 ( Figure 3B (taking step 103 as an example), steps 201 to 202 may also be performed.

[0070] In step 201, the management end chip periodically detects the status of the intra-domain communication link.

[0071] In the process of establishing an intra-domain communication link based on an intra-domain communication harness, the identities of multiple chips in the domain controller can be determined. There are two types of chip identities, namely, the management end chip and the managed end chip. There is usually only one management end chip, which is used to manage and coordinate the managed end chip; there can be one or more managed end chips.

[0072] For the management end chip, the status of the established intra-domain communication link is periodically detected. The status of the intra-domain communication link includes two states: an available state (linkup) and an unavailable state (linkdown). The unavailable state is also called a broken link state.

[0073] In step 202, when it is detected that the intra-domain communication link is in an unavailable state, the intra-domain communication link is repaired by the management-end chip.

[0074] When it is detected that the intra-domain communication link is in an available state, the management end chip continues to periodically detect the status of the intra-domain communication link; when it is detected that the intra-domain communication link is in an unavailable state, the intra-domain communication link is repaired by the management end chip, and the management end chip continues to periodically detect the status of the intra-domain communication link, wherein by repairing the intra-domain communication link, fault self-healing can be achieved, thereby improving the robustness of the intra-domain communication link. The embodiment of the present application does not limit the method of repairing the intra-domain communication link, for example, step 101 can be re-executed.

[0075] It is worth noting that if the intra-domain communication link is subdivided into intra-domain communication links between every two chips in a plurality of chips, step 202 may refer to repairing the intra-domain communication link in an unavailable state, and there is no need to repair the intra-domain communication link in an available state.

[0076] In some embodiments, the above-mentioned establishment of an intra-domain communication link based on the intra-domain communication harness can be achieved in the following manner: initializing the intra-domain communication controller of each chip to establish an intra-domain communication link based on the intra-domain communication harness; wherein the intra-domain communication controller initialization includes link training; the above-mentioned repair of the intra-domain communication link through the management-side chip can be achieved in the following manner: performing at least one of the following processing through the management-side chip to repair the intra-domain communication link: disabling and enabling the intra-domain communication link; re-link training the intra-domain communication link; re-initializing the intra-domain communication controller of the management-side chip.

[0077] Here, the intra-domain communication controller can be initialized for each chip to establish an intra-domain communication link based on the intra-domain communication harness, wherein the intra-domain communication controller initialization refers to building an intra-domain communication controller in the chip to manage intra-domain communication. The intra-domain communication controller initialization may include power-on and reset, determining the intra-domain communication harness structure (i.e., determining the identity of the chip in the intra-domain communication link), link training, software configuration, driver loading and other steps. Link training is used to ensure that data can be transmitted safely and efficiently between chips. For example, link training includes steps such as receiver detection (Receiver Detect), polling (Polling) and configuration (Configuration).

[0078] Based on this, when it is detected that the intra-domain communication link is in an unavailable state, the management end chip performs at least one of the following processing to repair the intra-domain communication link:

[0079] 1) Disabling and enabling the intra-domain communication link. Here, the intra-domain communication link may be disabled first (e.g., setting the enable bit of the intra-domain communication link to disabled), and then enabling the intra-domain communication link after a period of time (e.g., setting the enable bit of the intra-domain communication link to enabled), so that some error states or suspended transactions on the intra-domain communication link can be cleared, thereby repairing the intra-domain communication link.

[0080] 2) Retrain the intra-domain communication link. Here, the intra-domain communication link in an available state is retrained by link training.

[0081] 3) Reinitialize the intra-domain communication controller for the management end chip Here, the management end chip itself reinitializes the intra-domain communication controller, thereby eliminating the adverse effects of the previously constructed intra-domain communication controller and achieving the purpose of repairing the intra-domain communication link.

[0082] The above methods 1) to 3) can be performed one by one or in combination in a specific order to meet various repair requirements. It is worth noting that the repair costs of the communication links in the repair domain according to the above methods 1) to 3) increase in sequence.

[0083] In some embodiments, the intra-domain communication link can be disabled and enabled first through the management end chip; when the intra-domain communication link still cannot be repaired after disabling and enabling the intra-domain communication link (i.e., the intra-domain communication link is still in an unavailable state), the intra-domain communication link is retrained through the management end chip; when the intra-domain communication link still cannot be repaired after retraining the intra-domain communication link, the management end chip itself is reinitialized through the management end chip. In this way, a progressive repair from shallow to deep levels is achieved, which can improve the repair success rate while minimizing the repair cost and avoiding the spread of faults.

[0084] In some embodiments, the above-mentioned establishment of an intra-domain communication link based on the intra-domain communication harness can be achieved in the following manner: initializing the intra-domain communication controller for each chip to establish the intra-domain communication link based on the intra-domain communication harness; after establishing the intra-domain communication link based on the intra-domain communication harness, the intra-domain communication method of the domain controller also includes: registering the general input and output interface GPIO as an edge interrupt through the managed-end chip; the above-mentioned repairing of the intra-domain communication link through the managing-end chip can be achieved in the following manner: triggering the edge interrupt of the managed-end chip through the managing-end chip; and re-initializing the intra-domain communication controller for the managed-end chip in response to the edge interrupt through the managed-end chip to repair the intra-domain communication link.

[0085] Here, the intra-domain communication controller can be initialized for each chip to establish an intra-domain communication link based on the intra-domain communication harness. During the initialization of the intra-domain communication controller, the identity of each chip will be determined. For the managed end chip, the general-purpose input / output (GPIO) interface can be registered as an edge interrupt. Among them, the GPIO interface is an interface that comes with the chip for interacting with external devices for digital signals; an edge interrupt refers to an interrupt triggered by an edge level, and an edge level refers to a change from one level to another, such as from a high level to a low level or from a low level to a high level.

[0086] Based on this, when it is detected that the intra-domain communication link is in an unavailable state, the edge interrupt of the managed end chip is triggered by the management end chip, for example, the edge level is generated by the management end chip to trigger the edge interrupt of the managed end chip. When the edge interrupt is triggered, the managed end chip re-initializes the intra-domain communication controller of the managed end chip itself to repair the intra-domain communication link.

[0087] In the case where the intra-domain communication link is unavailable, the above method provides an additional repair method by realizing the notification of the management-side chip to the managed-side chip through interruption, and then the managed-side chip itself reinitializes the intra-domain communication controller.

[0088] In some embodiments, the intra-domain communication link can be disabled and enabled first through the management end chip; when the intra-domain communication link still cannot be repaired after disabling and enabling the intra-domain communication link (that is, the intra-domain communication link is still in an unavailable state), the intra-domain communication link is re-trained through the management end chip; when the intra-domain communication link still cannot be repaired after re-training the intra-domain communication link, the management end chip itself is re-initialized with the management end chip; when the intra-domain communication link still cannot be repaired after re-initializing the intra-domain communication controller of the management end chip, the edge interrupt of the managed end chip is triggered by the management end chip, so that the managed end chip responds to the edge interrupt and re-initializes the intra-domain communication controller of the managed end chip itself. In this way, the repair success rate can be further improved, and the reliability of the intra-domain communication link can be guaranteed to the greatest extent.

[0089] like Figure 3B As shown, the embodiment of the present application periodically performs status detection on the intra-domain communication link through the management-end chip. When it is detected that the intra-domain communication link is in an unavailable state, the intra-domain communication link is repaired by the management-end chip, thereby realizing self-healing repair of the intra-domain communication link and ensuring the reliability of the intra-domain communication link.

[0090] In some embodiments, see Figure 3C , Figure 3C is a flow chart of a method for intra-domain communication of a domain controller provided in an embodiment of the present application, Figure 3A Step 104 shown can be implemented through steps 301 and 302 .

[0091] In step 301, the status of the intra-domain communication link is detected by the first chip.

[0092] Here, for ease of understanding, intra-domain communication between a first chip and a second chip is taken as an example for explanation, wherein the first chip is any chip in a domain controller, and the second chip is different from the first chip.

[0093] First, the state of the intra-domain communication link is detected by the first chip, for example, periodically, or when a data packet needs to be sent or received. It is worth noting that the intra-domain communication link here refers to the intra-domain communication link between the first chip and the second chip, and the same applies below; in addition, the first chip can be used to send data packets or to receive data packets, and there is no limitation on this.

[0094] In step 302, when it is detected that the intra-domain communication link is in an available state, intra-domain communication is performed in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip.

[0095] When it is detected that the intra-domain communication link is in an available state, it is proved that the intra-domain communication link can support intra-domain communication, so intra-domain communication is performed in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip.

[0096] In some embodiments, the first chip is used to send data packets, and the second chip is used to receive data packets; the above-mentioned intra-domain communication in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip can be implemented in the following manner: the virtual network port registered by the first chip is called by the first chip to send the data packet to the intra-domain communication link; an interrupt signal is triggered in the intra-domain communication link by the first chip; and the virtual network port registered by the second chip is called by the second chip in response to the interrupt signal to receive the data packet in the intra-domain communication link.

[0097] Here, for ease of understanding, an example is given in which the first chip is used to send a data packet (ie, the first chip is a sending end) and the second chip is used to receive a data packet (ie, the second chip is a receiving end).

[0098] When the first chip detects that the intra-domain communication link is in an available state, the first chip calls the virtual network port registered by the first chip to send the data packet to the intra-domain communication link, wherein the first chip can call the virtual network port registered by the first chip through the network driver framework of the target operating system. At the same time, an interrupt signal is triggered in the intra-domain communication link through the first chip, wherein the interrupt mechanism is provided by the intra-domain communication link, and is not specially simulated, so that the implementation complexity can be reduced.

[0099] Then, in response to the interrupt signal, the second chip calls the virtual network port registered by the second chip to receive the data packet in the intra-domain communication link.

[0100] In the above method, the data packet is transmitted by calling the registered virtual network port, which is relatively simple and does not require additional adaptation of the private API.

[0101] exist Figure 3C In the embodiment, after step 301, in step 303, when it is detected that the intra-domain communication link is in an unavailable state, packet loss statistics are performed by the first chip.

[0102] When it is detected that the intra-domain communication link is in an unavailable state, it proves that intra-domain communication is not possible at this time, so packet loss statistics are performed through the first chip. The packet loss statistics can monitor network performance and facilitate fault diagnosis and location.

[0103] like Figure 3C As shown, the embodiment of the present application detects the status of the intra-domain communication link through the first chip. When the intra-domain communication link is detected to be in an available state, intra-domain communication is performed in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip. In this way, intra-domain communication is performed only when the intra-domain communication link is in an available state, which can improve the success rate of intra-domain communication.

[0104] Below, an exemplary application of the embodiment of the present application in an actual application scenario will be described. For ease of understanding, an example is given in which a domain controller includes multiple SoCs, the intra-domain communication harness is a PCIe bus, and the target operating system is a Linux operating system.

[0105] As an example, the present application embodiment provides the following Figure 4 A flow chart of the intra-domain communication method of the domain controller shown in FIG. Figure 4 , explained in step form.

[0106] Step 1) In terms of hardware, each SoC in the domain controller is connected via a PCIe bus.

[0107] Step 2) Run the Linux operating system in each SoC.

[0108] Step 3) For each SoC, a PCIe controller is initialized during the boot process of the Linux operating system to establish a PCIe link, wherein the PCIe controller corresponds to the intra-domain communication controller mentioned above.

[0109] Step 4) Relying on the network driver framework of the Linux operating system kernel, each end of the PCIe bus is registered as a virtual network port.

[0110] Step 5) The root complex (RC) end of the PCIe link periodically detects the status of the PCIe link and repairs the PCIe link when it detects that the PCIe link is in an unavailable state (i.e., broken link). The RC end corresponds to the management end chip mentioned above. To repair the PCIe link, the following steps need to be performed in sequence: a) Force the PCIe link to be disabled and then re-enabled, where disable means disabling and enable means enabling; b) Re-train the PCIe link; c) The RC end itself re-initializes the PCIe controller.

[0111] Step 6) The RC end of the PCIe link is connected to the endpoint (EP) end through the GPIO interface in hardware, wherein the EP end corresponds to the managed end chip mentioned above.

[0112] Step 7) The EP end registers the GPIO interface in step 6) as an edge interrupt.

[0113] Step 8) When the PCIe link fails to be repaired through step 5), the RC end of the PCIe link generates an edge level to trigger the edge interrupt of the EP end. The EP end responds to the edge interrupt and reinitializes the PCIe controller in the interrupt processing function.

[0114] Step 9) Each SoC performs a status check on the PCIe link before sending or receiving packets through the registered virtual network port. The actual sending and receiving action is performed only when the PCIe link is in an available state (linkup), otherwise packet loss statistics are performed. Among them, a certain SoC triggers the INTx interrupt of the PCIe link when sending a packet to notify the other end (i.e. the SoC receiving the packet) to perform the packet receiving operation. It is worth noting that the intra-domain communication realized through the registered virtual network port is equivalent to ordinary network communication.

[0115] The embodiments of the present application can at least achieve the following technical effects:

[0116] 1) At the physical layer, the PCIe bus is connected, with a small number of IOs, which can reduce hardware complexity and avoid the cost of adding a switch chip to provide a separate network forwarding topology within the domain. In addition, the PCIe bus at the physical layer is a high-speed communication bus that can meet the high-speed traffic communication requirements within the domain. In addition, PCIe itself can generate interrupts, without the need to specifically simulate interrupt signals.

[0117] 2) Intra-domain communication is achieved through a private virtual network port, which can effectively separate the network traffic within and outside the domain and reduce the load on the main forwarding chip of the domain controller; the application layer directly uses Linux network communication and does not require additional adaptation of private APIs. It has strong versatility and can meet the communication needs of different applications.

[0118] 3) The possibility of PCIe link disconnection and SoC independent reset is fully considered. The reliability of the PCIe link can be ensured through regular polling and repair on the RC end. During self-healing repair, the PCIe failure scenario is considered, and progressive repair attempts are made from shallow to deep, trying to ensure that the repair is achieved with minimal action to avoid the spread of the fault.

[0119] The following is a description of an exemplary structure in which the intra-domain communication device 255 of the domain controller provided in the embodiment of the present application is implemented as a software module. In some embodiments, for example, Figure 2 As shown, the software modules stored in the intra-domain communication device 255 of the domain controller of the memory 250 may include: a communication link establishment module 2551, used to establish an intra-domain communication link based on the intra-domain communication harness; an operating system running module 2552, used to run the target operating system through each chip; a virtual network port registration module 2553, used to call the target operating system through each chip to register the virtual network port in the intra-domain communication link; an intra-domain communication module 2554, used to perform intra-domain communication through the virtual network port registered by each chip in the intra-domain communication link.

[0120] In some embodiments, the multiple chips include a management-end chip and a managed-end chip; the intra-domain communication device 255 of the domain controller also includes a communication link repair module, which is used to: periodically detect the status of the intra-domain communication link through the management-end chip; when it is detected that the intra-domain communication link is in an unavailable state, repair the intra-domain communication link through the management-end chip.

[0121] In some embodiments, the communication link establishment module 2551 is also used to: initialize the intra-domain communication controller for each chip to establish an intra-domain communication link based on the intra-domain communication harness; wherein the intra-domain communication controller initialization includes link training; the communication link repair module is also used to: perform at least one of the following processing through the management-end chip to repair the intra-domain communication link: disabling and enabling the intra-domain communication link; re-training the intra-domain communication link; re-initializing the intra-domain communication controller for the management-end chip.

[0122] In some embodiments, the communication link establishment module 2551 is also used to: initialize the intra-domain communication controller for each chip to establish an intra-domain communication link based on the intra-domain communication harness; the intra-domain communication device 255 of the domain controller also includes an interrupt registration module, which is used to: register the general input and output GPIO interface as an edge interrupt through the managed chip; the communication link repair module is also used to: trigger the edge interrupt of the managed chip through the management chip; and re-initialize the intra-domain communication controller of the managed chip in response to the edge interrupt through the managed chip to repair the intra-domain communication link.

[0123] In some embodiments, the intra-domain communication module 2554 is also used to: perform status detection on the intra-domain communication link through the first chip; when it is detected that the intra-domain communication link is in an available state, perform intra-domain communication in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip; wherein the first chip represents any one of a plurality of chips, and the second chip is different from the first chip.

[0124] In some embodiments, the first chip is used to send data packets, and the second chip is used to receive data packets; the intra-domain communication module 2554 is also used to: call the virtual network port registered by the first chip through the first chip to send the data packet to the intra-domain communication link; trigger an interrupt signal in the intra-domain communication link through the first chip; respond to the interrupt signal through the second chip, and call the virtual network port registered by the second chip to receive the data packet in the intra-domain communication link.

[0125] In some embodiments, the intra-domain communication device 255 of the domain controller further includes a packet loss statistics module, which is used to: perform packet loss statistics through the first chip when it is detected that the intra-domain communication link is in an unavailable state.

[0126] The embodiment of the present application provides a computer program product or a computer program, which includes executable instructions, and the executable instructions are stored in a computer-readable storage medium. The processor of the electronic device reads the executable instructions from the computer-readable storage medium, and the processor executes the executable instructions, so that the electronic device implements the intra-domain communication method of the domain controller described in the embodiment of the present application.

[0127] An embodiment of the present application provides a computer-readable storage medium storing executable instructions, wherein executable instructions are stored. When the executable instructions are executed by a processor, the processor will cause the processor to implement the intra-domain communication method of the domain controller provided in the embodiment of the present application.

[0128] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface storage, optical disk, or CD-ROM; or it may be various devices including one or any combination of the above memories.

[0129] In some embodiments, executable instructions may be in the form of a program, software, software module, script or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine or other unit suitable for use in a computing environment.

[0130] As an example, executable instructions may, but need not, correspond to a file in a file system, may be stored as part of a file that stores other programs or data, such as in one or more scripts in a HyperText Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or code portions).

[0131] As an example, the executable instructions may be deployed to be executed on one electronic device, or on multiple electronic devices located at one site, or on multiple electronic devices distributed at multiple sites and interconnected by a communication network.

[0132] The above are only embodiments of the present application and are not intended to limit the protection scope of the present application. Any modifications, equivalent substitutions and improvements made within the spirit and scope of the present application are included in the protection scope of the present application.

Claims

1. A domain controller intra-domain communication method, characterized in that: Applied to a domain controller, the domain controller includes a plurality of chips, and the plurality of chips are connected via an intra-domain communication harness; the method includes: Establishing an intra-domain communication link based on the intra-domain communication harness; Run the target operating system through each chip; Calling the target operating system through each chip to register a virtual network port in the intra-domain communication link; In the intra-domain communication link, intra-domain communication is performed through the virtual network port registered by each chip.

2. The method according to claim 1, characterized in that The multiple chips include a management end chip and a managed end chip; after establishing the intra-domain communication link based on the intra-domain communication harness, the method further includes: Periodically performing status detection on the intra-domain communication link through the management end chip; When it is detected that the intra-domain communication link is in an unavailable state, the intra-domain communication link is repaired by the management-end chip.

3. The method according to claim 2, characterized in that The establishing of the intra-domain communication link based on the intra-domain communication harness comprises: Initializing the intra-domain communication controller for each chip to establish an intra-domain communication link based on the intra-domain communication harness; wherein the intra-domain communication controller initialization includes link training; The repairing of the intra-domain communication link by the management-end chip includes: At least one of the following processes is performed by the management-end chip to repair the intra-domain communication link: disabling and enabling the intra-domain communication link; re-training the intra-domain communication link; and re-initializing the intra-domain communication controller of the management-end chip.

4. The method according to claim 2, characterized in that: The establishing of the intra-domain communication link based on the intra-domain communication harness comprises: Initializing the intra-domain communication controller for each chip to establish an intra-domain communication link based on the intra-domain communication harness; After establishing the intra-domain communication link based on the intra-domain communication harness, the method further includes: Registering the general purpose input and output (GPIO) interface as an edge interrupt through the managed end chip; The repairing of the intra-domain communication link by the management-end chip includes: Triggering the edge interrupt of the managed end chip through the management end chip; The managed-end chip responds to the edge interruption and reinitializes the intra-domain communication controller of the managed-end chip to repair the intra-domain communication link.

5. The method according to any one of claims 1 to 4, characterized in that: The intra-domain communication is performed through the virtual network port registered by each chip in the intra-domain communication link, including: Performing status detection on the intra-domain communication link by using the first chip; When it is detected that the intra-domain communication link is in an available state, performing intra-domain communication in the intra-domain communication link through the virtual network port registered by the first chip and the virtual network port registered by the second chip; The first chip refers to any one of the multiple chips, and the second chip is different from the first chip.

6. The method according to claim 5, characterized in that The first chip is used to send a data packet, and the second chip is used to receive a data packet; the intra-domain communication is performed through the virtual network port registered by the first chip and the virtual network port registered by the second chip in the intra-domain communication link, including: Calling the virtual network port registered by the first chip through the first chip to send the data packet to the intra-domain communication link; triggering an interrupt signal in the intra-domain communication link by the first chip; In response to the interrupt signal, the second chip calls the virtual network port registered by the second chip to receive the data packet in the intra-domain communication link.

7. The method according to claim 5, characterized in that After the status of the intra-domain communication link is detected by the first chip, the method further includes: When it is detected that the intra-domain communication link is in an unavailable state, packet loss statistics are performed through the first chip.

8. An intra-domain communication device of a domain controller, characterized in that: Applied to a domain controller, the domain controller includes multiple chips, and the multiple chips are connected through an intra-domain communication harness; the device includes: A communication link establishing module, used for establishing an intra-domain communication link based on the intra-domain communication harness; An operating system running module, used for running a target operating system through each chip; A virtual network port registration module, used to call the target operating system through each chip to register a virtual network port in the intra-domain communication link; The intra-domain communication module is used to perform intra-domain communication through the virtual network port registered by each chip in the intra-domain communication link.

9. An electronic device, characterized in that: include: A memory for storing executable instructions; A processor, configured to implement the method according to any one of claims 1 to 7 when executing the executable instructions stored in the memory.

10. A computer-readable storage medium, characterized in that: Executable instructions are stored, and when executed by a processor, the method described in any one of claims 1 to 7 is implemented.

11. A computer program product, characterized in that The method comprises executable instructions for implementing the method according to any one of claims 1 to 7 when executed by a processor.

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