Gallium arsenide LED epitaxial structure and LED chip

Abstract

The invention provides a gallium arsenide LED epitaxial structure and an LED chip. The gallium arsenide LED epitaxial structure comprises a gallium arsenide substrate; the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the surface of one side of the substrate; wherein a composite buffer layer is arranged between the gallium arsenide substrate and the N-type semiconductor layer; the composite buffer layer comprises a first GaAs buffer layer, a defect growth layer and a defect stop layer which are sequentially arranged on the surface of the gallium arsenide substrate, the defect growth layer is used for expanding crystal defects of the first GaAs buffer layer, and the defect stop layer stops growth of the crystal defects by changing the growth direction of the crystal defects. On the basis of the arrangement, crystal defects such as epitaxial layer dislocation, stacking defects and the like and even slippage which are formed by taking scratches, defects and the like on the surface of the gallium arsenide substrate as starting points can be effectively avoided, the crystal growth quality is improved, and meanwhile, the cost is slightly increased. And the method is particularly suitable for high-power LEDs and small-size (such as Mini and Micro) LEDs.

Description

Technical Field

[0001] The present invention relates to the field of light emitting diodes, and in particular to a gallium arsenide-based LED epitaxial structure and an LED chip. Background Art

[0002] However, with the rapid development of LED technology and the gradual improvement of LED lighting efficiency, the application of LED is becoming more and more extensive, and people are paying more and more attention to the development prospects of LED in display screens. As the core component of LED lamps, the function of LED chips is to convert electrical energy into light energy. Specifically, they include epitaxial wafers and N-type electrodes and P-type electrodes respectively arranged on the epitaxial wafers. The epitaxial wafer includes a P-type semiconductor layer, an N-type semiconductor layer, and an active layer located between the N-type semiconductor layer and the P-type semiconductor layer. When current passes through the LED chip, the holes in the P-type semiconductor and the electrons in the N-type semiconductor will move to the active layer and recombine in the active layer, so that the LED chip emits light.

[0003] At present, LED semiconductor chips are developing towards high power, small size (such as Mini LED, Micro LED), and high brightness. Take AlGaInP-based red light LED as an example: during mechanical processing of the substrate, such as slicing and polishing, the machine will inevitably cause scratches on the surface of the epitaxial substrate. For high-power red light LEDs, the epitaxial layer dislocation, stacking defects and other crystal defects formed with scratches and defects on the substrate surface as the starting point will affect the recombination efficiency of electrons and holes and reduce the overall component luminous efficiency; in addition, the operating temperature of high-power red light chips is also high, and high requirements are placed on the crystal quality and stability of each epitaxial layer. During epitaxial growth, the doping elements and concentrations of each epitaxial layer need to be precisely controlled, and it is particularly important to reduce lattice defects.

[0004] At present, lattice defects are usually reduced by screening substrates with low defect density or growing GaAs buffer layers; however, these two methods have the following deficiencies / disadvantages:

[0005] Since the proportion of substrates with low defect density is small and the technical difficulty is high during the substrate growth process, the cost of substrates with low defect density is high. At the same time, since the surface of GaAs substrates is easily oxidized, dislocation defects are formed along the lattice direction from the uneven oxide layer position during the subsequent growth of epitaxial materials. Therefore, even if the GaAs buffer layer structure is grown, there are still certain dislocations that affect the epitaxial layer formed subsequently, reducing its crystal quality and stability.

[0006] In view of this, the inventor specially designed a gallium arsenide-based LED epitaxial structure and LED chip, and this case was thus generated. Summary of the invention

[0007] The object of the present invention is to provide a gallium arsenide LED epitaxial structure and an LED chip to improve the crystal quality of the LED chip.

[0008] In order to achieve the above object, the technical solution adopted by the present invention is as follows:

[0009] A gallium arsenide-based LED epitaxial structure, comprising:

[0010] Gallium arsenide substrate;

[0011] An N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence on a surface of one side of the substrate;

[0012] Among them, a composite buffer layer is provided between the gallium arsenide substrate and the N-type semiconductor layer; the composite buffer layer includes a first GaAs buffer layer, a defect growth layer and a defect termination layer which are sequentially arranged on the surface of the gallium arsenide substrate, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer, and the defect termination layer terminates the growth of the crystal defects by changing the growth direction of the crystal defects.

[0013] Preferably, the crystal defects of the first GaAs buffer layer are enlarged by compressive strain caused by forming the defective growth layer with increased lattice constant by lowering the temperature.

[0014] Preferably, the defective growth layer includes a first defective growth layer and a second defective growth layer which are arranged in sequence.

[0015] Preferably, a second GaAs buffer layer is further provided on a surface of the defect termination layer which is away from the defect growth layer.

[0016] Preferably, the lattice constant of the first defective growth layer is greater than the lattice constant of the first GaAs buffer layer, and the growth temperature of the first defective growth layer is lower than the growth temperature of the first GaAs buffer layer.

[0017] Preferably, the thickness of the first defective growth layer is smaller than the thickness of the first GaAs buffer layer.

[0018] Preferably, the lattice constant of the second defective growth layer is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer is lower than the growth temperature of the first defective growth layer.

[0019] Preferably, the growth temperature of the defect termination layer is greater than the growth temperature of the first GaAs buffer layer.

[0020] Preferably, a current spreading layer is further provided on a surface of the P-type semiconductor layer facing away from the active layer.

[0021] Preferably, an etching stop layer and an N-type ohmic contact layer are further provided between the composite buffer layer and the N-type semiconductor layer.

[0022] Preferably, the first defective growth layer includes a GaInP layer.

[0023] Preferably, the second defective growth layer includes an InGaAs layer.

[0024] Preferably, the defect termination layer comprises an AlGaInP layer.

[0025] The present invention also provides a gallium arsenide LED chip, comprising:

[0026] substrate;

[0027] The epitaxial structure is arranged on the surface of the substrate, and the epitaxial structure is obtained by removing the corrosion stop layer and / or the composite buffer layer and the gallium arsenide substrate from any of the above gallium arsenide LED epitaxial structures.

[0028] Through the above technical solution, it can be known that the present invention provides a gallium arsenide LED epitaxial structure, including: a gallium arsenide substrate; an N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence on the surface of one side of the substrate; wherein a composite buffer layer is provided between the gallium arsenide substrate and the N-type semiconductor layer; the composite buffer layer includes a first GaAs buffer layer, a defect growth layer and a defect termination layer sequentially arranged on the surface of the gallium arsenide substrate, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer, and the defect termination layer terminates the growth of the crystal defects by changing the growth direction of the crystal defects. Based on the above arrangement, the crystal defects such as epitaxial layer dislocation, stacking defects and even slip formed by scratches and defects on the surface of the gallium arsenide substrate can be effectively avoided, the quality of crystal growth can be improved, and the cost increase is small. It is especially suitable for high-power LEDs and small-size (such as Mini, Micro) LEDs.

[0029] Secondly, the defective growth layer includes a first defective growth layer and a second defective growth layer arranged in sequence; further, the lattice constant of the second defective growth layer is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer is lower than the growth temperature of the first defective growth layer. Based on this arrangement, the crystal defects can be further expanded and released through the second defective growth layer, so as to maximize the crystal defects received by the subsequent defect termination layer and terminate them.

[0030] Then, a second GaAs buffer layer is provided on the surface of the defect termination layer away from the defect growth layer, and the second GaAs buffer layer can provide secondary protection for subsequent epitaxial growth (N-type semiconductor layer, active layer and P-type semiconductor layer).

[0031] The present invention also provides a gallium arsenide-based LED chip, wherein the epitaxial structure of the LED chip is obtained by removing the corrosion cutoff layer and / or the composite buffer layer and the gallium arsenide substrate from any of the gallium arsenide-based LED epitaxial structures described above, thereby achieving the above-mentioned beneficial effects at the epitaxial end, thereby improving the luminous efficiency of the LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0033] Figure 1 A schematic diagram of the structure of a gallium arsenide LED epitaxial structure provided by an embodiment of the present invention;

[0034] Explanation of symbols in the figure:

[0035] 1. Gallium arsenide substrate;

[0036] 2. Composite buffer layer;

[0037] 2.1, the first GaAs buffer layer;

[0038] 2.2, the first defective growth layer;

[0039] 2.3, the second defective growth layer;

[0040] 2.4, defect termination layer;

[0041] 2.5, second GaAs buffer layer;

[0042] 3. Corrosion cut-off layer;

[0043] 4. N-type ohmic contact layer;

[0044] 5. N-type semiconductor layer;

[0045] 6. Active layer;

[0046] 7. P-type semiconductor layer;

[0047] 8. Current expansion layer. DETAILED DESCRIPTION

[0048] To make the content of the present invention clearer, the content of the present invention is further described below in conjunction with the accompanying drawings. The present invention is not limited to this specific embodiment. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0049] A gallium arsenide-based LED epitaxial structure, comprising:

[0050] Gallium arsenide substrate 1;

[0051] An N-type semiconductor layer 5, an active layer 6 and a P-type semiconductor layer 7 are sequentially stacked on one surface of the substrate;

[0052] Among them, a composite buffer layer 2 is provided between the gallium arsenide substrate 1 and the N-type semiconductor layer 5; the composite buffer layer 2 includes a first GaAs buffer layer 2.1, a defect growth layer and a defect termination layer 2.4 which are sequentially arranged on the surface of the gallium arsenide substrate 1, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer 2.1, and the defect termination layer 2.4 terminates the growth of the crystal defects by changing the growth direction of the crystal defects.

[0053] Based on the above, in one embodiment of the present application, the crystal defects of the first GaAs buffer layer 2.1 are enlarged by the compressive strain caused by lowering the temperature to form the defective growth layer with increased lattice constant.

[0054] Based on the above content, in one embodiment of the present application, the defective growth layer includes a first defective growth layer and a second defective growth layer 2.3 which are arranged in sequence.

[0055] Based on the above, in one embodiment of the present application, a second GaAs buffer layer 2.5 is further provided on the surface of the defect termination layer 2.4 facing away from the defect growth layer.

[0056] Based on the above, in one embodiment of the present application, the lattice constant of the first defective growth layer is greater than the lattice constant of the first GaAs buffer layer 2.1, and the growth temperature of the first defective growth layer is less than the growth temperature of the first GaAs buffer layer 2.1.

[0057] Based on the above, in one embodiment of the present application, the thickness of the first defective growth layer is less than the thickness of the first GaAs buffer layer 2.1.

[0058] Based on the above, in one embodiment of the present application, the lattice constant of the second defective growth layer 2.3 is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer 2.3 is lower than the growth temperature of the first defective growth layer.

[0059] Based on the above, in one embodiment of the present application, the growth temperature of the defect termination layer 2.4 is greater than the growth temperature of the first GaAs buffer layer 2.1.

[0060] Based on the above content, in one embodiment of the present application, a current spreading layer 8 is further provided on the surface of the P-type semiconductor layer 7 facing away from the active layer 6 .

[0061] Based on the above content, in one embodiment of the present application, an etching stop layer 3 and an N-type ohmic contact layer 4 are further provided between the composite buffer layer 2 and the N-type semiconductor layer 5 .

[0062] Based on the above content, in one embodiment of the present application, the first defective growth layer includes a GaInP layer.

[0063] Based on the above, in one embodiment of the present application, the second defective growth layer 2.3 includes an InGaAs layer.

[0064] Based on the above, in one embodiment of the present application, the defect termination layer 2.4 includes an AlGaInP layer.

[0065] Based on the above content, in one embodiment of the present application, the corrosion stop layer 3 includes an N-type GaInP corrosion stop layer 3, the N-type ohmic contact layer 4 includes an N-type GaAs ohmic contact layer, the N-type semiconductor layer 5 includes an N-type AlInP layer, the active layer 6 is a superlattice multiple quantum well structure, and the P-type semiconductor layer 7 includes a P-type AlInP layer, but the present application is not limited to this.

[0066] The present invention also provides a gallium arsenide LED chip, comprising:

[0067] substrate;

[0068] The epitaxial structure disposed on the surface of the substrate is obtained by removing the corrosion stop layer 3 and / or the composite buffer layer 2 and the gallium arsenide substrate 1 from any of the above gallium arsenide LED epitaxial structures.

[0069] The embodiment of the present invention further provides a method for manufacturing a gallium arsenide-based LED epitaxial structure, the manufacturing method comprising:

[0070] S01, providing a gallium arsenide substrate 1;

[0071] S02, depositing a composite buffer layer 2 on the surface of the gallium arsenide substrate 1; the composite buffer layer 2 comprises a first GaAs buffer layer 2.1, a defect growth layer and a defect stop layer 2.4 sequentially arranged on the surface of the gallium arsenide substrate 1, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer 2.1, and the defect stop layer 2.4 stops the growth of the crystal defects by changing the growth direction of the crystal defects;

[0072] Furthermore, the crystal defects of the first GaAs buffer layer 2.1 are enlarged by the compressive strain caused by lowering the temperature to form the defective growth layer with an increased lattice constant.

[0073] Furthermore, the defective growth layer comprises a first defective growth layer and a second defective growth layer 2.3 which are arranged in sequence.

[0074] Furthermore, a second GaAs buffer layer 2.5 is provided on the surface of the defect termination layer 2.4 on a side away from the defect growth layer.

[0075] Furthermore, the lattice constant of the first defective growth layer is greater than the lattice constant of the first GaAs buffer layer 2.1, and the growth temperature of the first defective growth layer is lower than the growth temperature of the first GaAs buffer layer 2.1.

[0076] Furthermore, the thickness of the first defective growth layer is smaller than the thickness of the first GaAs buffer layer 2.1.

[0077] Furthermore, the lattice constant of the second defective growth layer 2.3 is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer 2.3 is lower than the growth temperature of the first defective growth layer.

[0078] Furthermore, the growth temperature of the defect termination layer 2.4 is greater than the growth temperature of the first GaAs buffer layer 2.1.

[0079] Furthermore, the first defective growth layer includes a GaInP layer.

[0080] Furthermore, the second defective growth layer 2.3 includes an InGaAs layer.

[0081] Furthermore, the defect stop layer 2.4 includes an AlGaInP layer.

[0082] S03, growing an etching stop layer 3 and an N-type ohmic contact layer 4;

[0083] S04, sequentially growing an N-type semiconductor layer 5, an active layer 6 and a P-type semiconductor layer 7.

[0084] In summary, specifically, the composite buffer layer 2 is completed by the following steps:

[0085] First, the first GaAs buffer layer 2.1 is formed by high-temperature and low-speed growth by setting the growth temperature to 650-750° C., the growth rate to 2-10 A / s, and the growth time to 1-3 min:

[0086] Secondly, by setting the growth temperature to 550-650°C, the growth rate to 5-15A / s, and the growth time to 30-90s, a low-temperature and high-speed growth of a GaInP layer is performed to obtain the first defective growth layer. Purpose: To grow a thin GaInP layer (furthermore, it can be GaAs) on the first GaAs buffer layer 2.1 at a low temperature and high speed. 0.3 In 0.7 P layer), of which GaAs / Ga 0.3 In 0.7 The P lattice constants are 5.65A / 5.74A respectively. Due to the accelerated growth due to cooling and the increase in the crystal unit cell, the lattice constants are not completely matched, which will cause the defects on the first GaAs buffer layer 2.1 to continue to grow and expand.

[0087] Then, the InGaAs layer (which may be InGaAs) is grown at a low temperature and high speed by setting the growth temperature to 500-600°C, the growth rate to 5-15A / s, and the growth time to 30-60s. 0.39 Ga 0.61 Purpose: To further grow a thin InGaAs layer (furthermore, it can be InGaAs) on the GaInP layer (the first defective growth layer) at low temperature and high speed. 0.39 Ga 0.61 As layer), Ga 0.3 In 0.7 P / In 0.39 Ga 0.61 As lattice constants are 5.74A / 5.81A respectively, and their lattice constants are not completely matched, which makes Ga 0.3 In 0.7 The defects in the P layer (first defective growth layer) further expand.

[0088] Next, the AlGaInP layer is grown at a high temperature and low speed by setting the growth temperature to 750-850°, the growth speed to 2-10A / s, and the growth time to 2-3min (further, the Al component of the AlGaInP layer is gradually changed from 0.5 to 0.25) to obtain the defect termination layer 2.4. Purpose: After the defects on the first GaAs buffer layer 2.1 are exposed after the growth and expansion of the first defect growth layer and the second defect growth layer 2.3, the temperature rises and the speed decreases when passing through the growth surface termination layer, and the lattice constant decreases, thereby changing its growth direction through the stress of the defect termination layer 2.4, and terminating the further growth of the defects.

[0089] Finally, the second GaAs buffer layer 2.5 is formed by high-temperature and low-speed growth by setting the growth temperature to 650-750° C., the growth speed to 2-10 A / s, and the growth time to 1-3 min.

[0090] Through the above technical solution, it can be known that the present invention provides a gallium arsenide LED epitaxial structure, comprising: a gallium arsenide substrate 1; an N-type semiconductor layer 5, an active layer 6 and a P-type semiconductor layer 7 stacked in sequence on the surface of one side of the substrate; wherein a composite buffer layer 2 is provided between the gallium arsenide substrate 1 and the N-type semiconductor layer 5; the composite buffer layer 2 comprises a first GaAs buffer layer 2.1, a defect growth layer and a defect termination layer 2.4 sequentially arranged on the surface of the gallium arsenide substrate 1, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer 2.1, and the defect termination layer 2.4 terminates the growth of the crystal defects by changing the growth direction of the crystal defects. Based on the above arrangement, the epitaxial layer dislocation, stacking defects and even slip formed by scratches and defects on the surface of the gallium arsenide substrate 1 can be effectively avoided, and the quality of crystal growth can be improved, while the cost increase is small. It is particularly suitable for high-power LEDs and small-size (such as Mini, Micro) LEDs.

[0091] Secondly, the defective growth layer includes a first defective growth layer and a second defective growth layer 2.3 which are arranged in sequence; further, the lattice constant of the second defective growth layer 2.3 is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer 2.3 is lower than the growth temperature of the first defective growth layer. Based on this arrangement, the crystal defects can be further expanded and released through the second defective growth layer 2.3, so as to maximize the crystal defects received by the subsequent defect termination layer 2.4 and terminate them.

[0092] Then, a second GaAs buffer layer 2.5 is provided on the surface of the defect termination layer 2.4 away from the defect growth layer, and the second GaAs buffer layer 2.5 can provide secondary protection for subsequent epitaxial growth (N-type semiconductor layer 5, active layer 6 and P-type semiconductor layer 7).

[0093] The present invention also provides a gallium arsenide-based LED chip, the epitaxial structure of the LED chip is obtained by removing the corrosion cutoff layer 3 and / or the composite buffer layer 2 and the gallium arsenide substrate 1 from any of the above-mentioned gallium arsenide-based LED epitaxial structures, achieving the above-mentioned beneficial effects at the epitaxial end, thereby improving the luminous efficiency of the LED chip.

[0094] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0095] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.

[0096] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A gallium arsenide LED epitaxial structure, characterized in that: include: Gallium arsenide substrate; An N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence on a surface of one side of the substrate; Among them, a composite buffer layer is provided between the gallium arsenide substrate and the N-type semiconductor layer; the composite buffer layer includes a first GaAs buffer layer, a defect growth layer and a defect termination layer which are sequentially arranged on the surface of the gallium arsenide substrate, the defect growth layer is used to expand the crystal defects of the first GaAs buffer layer, and the defect termination layer terminates the growth of the crystal defects by changing the growth direction of the crystal defects.

2. The GaAs-based LED epitaxial structure according to claim 1, characterized in that: The crystal defects of the first GaAs buffer layer are enlarged by compressive strain caused by lowering the temperature to form the defective growth layer with an increased lattice constant.

3. The GaAs-based LED epitaxial structure according to claim 1, characterized in that: The defective growth layer includes a first defective growth layer and a second defective growth layer which are sequentially arranged.

4. The GaAs-based LED epitaxial structure according to claim 1, characterized in that: A second GaAs buffer layer is also provided on the surface of the defect termination layer on a side away from the defect growth layer.

5. The GaAs-based LED epitaxial structure according to claim 2, characterized in that: The lattice constant of the first defective growth layer is greater than the lattice constant of the first GaAs buffer layer, and the growth temperature of the first defective growth layer is lower than the growth temperature of the first GaAs buffer layer.

6. The GaAs-based LED epitaxial structure according to claim 5, characterized in that: The thickness of the first defective growth layer is smaller than the thickness of the first GaAs buffer layer.

7. The GaAs-based LED epitaxial structure according to claim 3, characterized in that: The lattice constant of the second defective growth layer is greater than the lattice constant of the first defective growth layer, and the growth temperature of the second defective growth layer is lower than the growth temperature of the first defective growth layer.

8. The GaAs-based LED epitaxial structure according to claim 1, characterized in that: A growth temperature of the defect termination layer is greater than a growth temperature of the first GaAs buffer layer.

9. The GaAs-based LED epitaxial structure according to any one of claims 3, characterized in that: The first defective growth layer includes a GaInP layer.

10. The GaAs-based LED epitaxial structure according to any one of claims 3, characterized in that: The second defective growth layer includes an InGaAs layer.

11. The GaAs-based LED epitaxial structure according to any one of claims 3, characterized in that: The defect stop layer includes an AlGaInP layer.

12. The GaAs-based LED epitaxial structure according to claim 1, characterized in that: An etching stop layer and an N-type ohmic contact layer are also provided between the composite buffer layer and the N-type semiconductor layer.

13. A gallium arsenide LED chip, characterized in that: include: substrate; An epitaxial structure is arranged on the surface of the substrate, and the epitaxial structure is obtained by removing the corrosion stop layer and / or the composite buffer layer and the gallium arsenide substrate from the gallium arsenide LED epitaxial structure described in claims 1 to 12.

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