Method for testing forward voltage of source and drain of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) thick wafer

Abstract

The invention provides a source-drain forward voltage test method for an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) thick wafer, which comprises the following steps of: providing a main die and an auxiliary die which are formed on the wafer, the wafer is provided with a back sealing structure, the main die and the auxiliary die are respectively provided with a first power MOSFET and a second power MOSFET, and the drain ends of the main die and the auxiliary die are connected; obtaining the on resistance RDSON of the auxiliary die; 0 potential is applied to the grid end of the main die, turn-on voltage is applied to the grid end of the auxiliary die, test current flows in from the source end of the main die and flows out from the source end of the auxiliary die, and the source-drain forward voltage VFSD total of the main die and the auxiliary die is obtained; the source-drain forward voltage VFSD main die of the main die is obtained, the VFSD main die = VFSD total-K * RDSON auxiliary die * I-C, K is a coefficient, C is a constant, and I is the test current value of the first power MOSFET and the test current value of the second power MOSFET. According to the invention, the influence of auxiliary Die conduction voltage drop can be eliminated, and the source-drain forward voltage of the thick wafer of the power MOSFET can be accurately measured.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a method for testing the source-drain forward voltage of a MOSFET thick wafer. Background Art

[0002] The power MOSFET field effect transistor is developed on the basis of the bipolar transistor. The bipolar transistor is a current control device. When it is used, it has the defects of low current gain at high voltage and cannot work at high frequency. The power MOSFET is a voltage control device. Compared with the bipolar transistor, the power MOSFET has the advantages of high gate structure input impedance, fast switching speed and can work at high frequency. In addition, the power MOSFET also has the advantages of small on-resistance, low loss, simple driving circuit and good thermal resistance characteristics, which makes it widely used in power management, motor drive and communication.

[0003] In the manufacturing process of power MOSFET, a back seal is usually made on the back of the wafer. It uses low-pressure chemical vapor deposition technology to deposit a layer of silicon dioxide or other insulator film on the back of the wafer to suppress self-doping during epitaxial growth. For thick power MOSFET wafers with a back seal structure, when testing the source-drain forward voltage VFSD, the device drain terminal cannot be turned on due to the obstruction of the insulating layer in the back seal structure, so the source-drain forward voltage VFSD cannot be measured by testing a single device.

[0004] For thick power MOSFET wafers, the D2D (Die-To-Die) method can be used to test VFSD. The D2D test diagram is as follows: Figure 1 As shown in the figure, the principle is: two dies are tested as one die. During the test, the auxiliary die device is turned on, and the current added from the source end of the main die can be turned on through the auxiliary die, and the auxiliary die acts as the drain end of the main die. However, for power MOSFET, the voltage drop generated by the auxiliary die during the conduction process cannot be ignored, so it is necessary to consider eliminating the voltage drop generated by the auxiliary die.

[0005] In order to solve the above problems, it is necessary to propose a new method for testing the source-drain forward voltage of MOSFET thick wafers. Summary of the invention

[0006] In view of the shortcomings of the prior art mentioned above, the purpose of the present invention is to provide a method for testing the source-drain forward voltage of a MOSFET thick wafer, so as to solve the problem that the source-drain forward voltage cannot be measured by testing a single device in the prior art, and the voltage drop generated by the auxiliary Die during the conduction process will affect the measurement accuracy.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a method for testing the source-drain forward voltage of a MOSFET thick wafer, comprising:

[0008] Step 1, providing a main die and an auxiliary die formed on a wafer, wherein the wafer has a back-sealed structure, the main die and the auxiliary die are respectively formed with a first power MOSFET and a second power MOSFET, and the drain ends of the main die and the auxiliary die are connected;

[0009] Step 2: Obtain the on-resistance RDSON of the auxiliary die 辅助die ;

[0010] Step 3: Apply 0 potential to the gate terminal of the main die, apply a turn-on voltage to the gate terminal of the auxiliary die, and test the current flowing into the source terminal of the main die and out of the source terminal of the auxiliary die to obtain the source-drain forward voltage VFSD of the main die and the auxiliary die. 总 ;

[0011] Step 4: Obtain the source-drain forward voltage VFSD of the main die 主die , where VFSD 主die =VFSD 总 -K×RDSON 辅助die ×IC, K is a coefficient, C is a constant, and I is the test current value of the first and second power MOSFETs.

[0012] Preferably, the back-sealing structure in step one is an insulator film formed on the back side of the wafer.

[0013] Preferably, in step 2, the on-resistance RDSON of the auxiliary die is obtained according to the die to die test method. 辅助die .

[0014] Preferably, the first power MOSFET in step three is connected to a power supply hardware for applying a 0 potential to the gate terminal, and the second power MOSFET is connected to a power supply hardware for applying a turn-on voltage to the gate terminal.

[0015] Preferably, K and C in step 4 are obtained by data fitting.

[0016] As described above, the method for testing the source-drain forward voltage of a thick MOSFET wafer of the present invention has the following beneficial effects:

[0017] The present invention can eliminate the influence of the auxiliary Die conduction voltage drop and can accurately measure the source-drain forward voltage of a power MOSFET thick wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1Shown is a schematic diagram of a source-drain forward voltage test structure in the prior art;

[0019] Figure 2 Shown is a schematic diagram of a source-drain forward voltage testing method of the present invention;

[0020] Figure 3 Shown is a schematic diagram of the source-drain forward voltage test structure of the present invention. DETAILED DESCRIPTION

[0021] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0022] See also Figure 2 and Figure 3 The present invention provides a method for testing the source-drain forward voltage of a MOSFET thick wafer, comprising:

[0023] Step 1: Provide a main die 101 and an auxiliary die 102 formed on a wafer, wherein the wafer has a back-sealed structure, and the main die 101 and the auxiliary die 102 are respectively formed with a first power MOSFET and a second power MOSFET, and the drain ends of the main die 101 and the auxiliary die 102 are connected;

[0024] In some embodiments, the back-sealing structure in step 1 is an insulating film formed on the back side of the wafer, and the material of the insulating film is silicon dioxide or other well-known insulating materials.

[0025] Step 2: Obtain the on-resistance RDSON of the auxiliary die 102 辅助die ;

[0026] In some embodiments, in step 2, the on-resistance RDSON of the auxiliary die 102 is obtained according to the die to die test method. 辅助die .

[0027] Step 3: Apply 0 potential to the gate terminal of the main die 101, apply a turn-on voltage to the gate terminal of the auxiliary die 102, and test the current flowing into the source terminal of the main die 101 and out of the source terminal of the auxiliary die 102 to obtain the source-drain forward voltage VFSD of the main die 101 and the auxiliary die 102. 总 ;

[0028] In some embodiments, the first power MOSFET 103 is connected to a power supply hardware 105 for applying a 0 potential to the gate terminal, and the second power MOSFET 104 is connected to a power supply hardware 106 for applying a turn-on voltage to the gate terminal.

[0029] Step 4: In the test program, introduce the calculation test item to obtain the source-drain forward voltage VFSD of the main die 101 主die , where VFSD 主die =VFSD 总 -K×RDSON 辅助die ×IC, K is the coefficient, C is the constant, and I is the test current value of the first and second power MOSFETs.

[0030] In some embodiments, based on existing test data, K and C in step 4 are obtained by data fitting.

[0031] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0032] In summary, the present invention can eliminate the influence of auxiliary die conduction voltage drop and can accurately measure the source-drain forward voltage of a power MOSFET thick wafer. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0033] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for testing the source-drain forward voltage of a thick MOSFET wafer, characterized in that: include: Step 1, providing a main die and an auxiliary die formed on a wafer, wherein the wafer has a back-sealed structure, the main die and the auxiliary die are respectively formed with a first power MOSFET and a second power MOSFET, and the drain ends of the main die and the auxiliary die are connected; Step 2: Obtain the on-resistance RDSON of the auxiliary die 辅助die ; Step 3: Apply 0 potential to the gate terminal of the main die, apply a turn-on voltage to the gate terminal of the auxiliary die, and test the current flowing into the source terminal of the main die and out of the source terminal of the auxiliary die to obtain the source-drain forward voltage VFSD of the main die and the auxiliary die. 总 ; Step 4: Obtain the source-drain forward voltage VFSD of the main die 主die , where VFSD 主die =VFSD 总 -K×RDSON 辅助die ×IC, K is a coefficient, C is a constant, and I is the test current value of the first and second power MOSFETs.

2. The method for testing the source-drain forward voltage of a thick MOSFET wafer according to claim 1, characterized in that: The back seal structure in step 1 is to form an insulator film on the back side of the wafer.

3. The method for testing the source-drain forward voltage of a thick MOSFET wafer according to claim 1, characterized in that: In step 2, the on-resistance RDSON of the auxiliary die is obtained according to the die to die test method. 辅助die .

4. The method for testing the source-drain forward voltage of a thick MOSFET wafer according to claim 1, characterized in that: In step three, the first power MOSFET is connected to a power supply hardware for applying a 0 potential to the gate terminal, and the second power MOSFET is connected to a power supply hardware for applying a turn-on voltage to the gate terminal.

5. The method for testing the source-drain forward voltage of a thick MOSFET wafer according to claim 1, characterized in that: K and C in step 4 are obtained by fitting the data.

Images