Zero-sequence circulating current suppression method and device, terminal equipment and storage medium

Abstract

The invention is suitable for the technical field of converter control, and provides a zero-sequence circulating current suppression method and device, terminal equipment and a storage medium, and the method comprises the steps: collecting a first three-phase current outputted by a converter, carrying out the coordinate transformation of the first three-phase current, and generating a second three-phase current, and processing the second three-phase current according to a signal adjusting method to generate a modulation signal, and finally processing the modulation signal according to a sine pulse width modulation method to generate a pulse driving signal corresponding to the converter. Therefore, the second three-phase current is processed through a proportional integral control method and a proportional complex integral control method, so that the neutral-point potential balance of the direct-current bus capacitor can be ensured while the zero-sequence ring current between the converters is suppressed, and the efficiency of the converters and the waveform quality of the output current are improved.

Description

Technical Field

[0001] The present application belongs to the technical field of converter control, and in particular, relates to a method, device, terminal equipment and storage medium for suppressing zero-sequence circulating current. Background Art

[0002] When the three-level converter adopts the 3-phase 4-wire connection mode and operates in parallel, the zero-sequence current in the converter will affect the potential of the DC bus capacitor midpoint because the midpoint of the DC bus capacitor is connected to the system N line. The traditional circulating current suppression method can suppress the zero-sequence circulating current between converters, but it cannot ensure the potential balance of the DC bus capacitor midpoint. Summary of the invention

[0003] The embodiments of the present application provide a method, apparatus, terminal device and storage medium for suppressing zero-sequence circulating current, which can solve the problem that the current traditional circulating current suppression method can suppress zero-sequence circulating current between converters but cannot ensure the potential balance of the midpoint of the DC bus capacitor.

[0004] In the first aspect, an embodiment of the present application provides a method for suppressing zero-sequence circulating current, which is applied to any three-phase converter in a three-phase four-wire parallel connection, and the method includes: collecting the first three-phase current output by the converter, and performing coordinate transformation processing on the first three-phase current to generate a second three-phase current; processing the second three-phase current according to a signal adjustment method to generate a modulation signal, and the signal adjustment method includes a proportional-integral control method and a proportional-complex-integral control method; processing the modulation signal according to a sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter.

[0005] In a possible implementation manner of the first aspect, the second three-phase current is processed according to the signal adjustment method to generate a modulation signal, including:

[0006] Processing the second three-phase current according to the signal conditioning method and outputting an initial modulation signal;

[0007] The initial modulation signal is subjected to an inverse coordinate transformation process corresponding to the coordinate transformation process to generate a modulation signal.

[0008] Optionally, in another possible implementation of the first aspect, the second three-phase current includes a first DC component, a second DC component, and a zero-sequence current component, the initial modulation signal includes a first modulation signal, a second modulation signal, and a third modulation signal, and the second three-phase current is processed according to the signal adjustment method to output the initial modulation signal, including:

[0009] Processing the first DC component according to a proportional-integral control method and outputting a first modulation signal;

[0010] Processing the second DC component according to a proportional-integral control method and outputting a second modulation signal;

[0011] The zero-sequence current component is processed according to a proportional complex integral control method, and a third modulation signal is output.

[0012] Optionally, in another possible implementation manner of the first aspect, the processing of the first DC component according to the proportional-integral control method to output the first modulation signal includes:

[0013] Determining an error value of the first DC component according to the first DC component and a reference value of the first DC component, wherein the reference value of the first DC component is determined according to a preset active power;

[0014] A first modulation signal is output according to the error value of the first DC component, a preset first proportional gain coefficient, and a preset first integral gain coefficient.

[0015] Optionally, in another possible implementation manner of the first aspect, the processing of the second DC component according to the proportional-integral control method to output a second modulation signal includes:

[0016] determining an error value of the second DC component according to the second DC component and a reference value of the second DC component, wherein the reference value of the second DC component is determined according to a preset reactive power;

[0017] A second modulation signal is output according to the error value of the second DC component, the preset first proportional gain coefficient and the preset first integral gain coefficient.

[0018] Optionally, in another possible implementation manner of the first aspect, the zero-sequence current component is processed according to the proportional complex integral control method to output a third modulation signal, including:

[0019] A third modulation signal is output according to the zero-sequence current component, the preset second proportional gain coefficient, the preset second integral gain coefficient, and the preset complex integral control term.

[0020] Optionally, in another possible implementation manner of the first aspect, performing coordinate transformation processing on the first three-phase current to generate the second three-phase current includes:

[0021] Obtaining a point voltage of the converter, and calculating a phase angle of the converter according to the point voltage of the converter;

[0022] The first three-phase current is subjected to Parker transformation processing according to the phase angle of the converter to generate the second three-phase current.

[0023] In the second aspect, an embodiment of the present application provides a device for suppressing zero-sequence circulating current, characterized in that the device is applied to any one of the three-phase converters in which three-phase four-wires are connected in parallel, and the device includes: an acquisition module for acquiring the first three-phase current output by the converter; a first generation module for performing coordinate transformation processing on the first three-phase current to generate a second three-phase current; a second generation module for processing the second three-phase current according to a signal adjustment method to generate a modulation signal, and the signal adjustment method includes a proportional-integral control method and a proportional-complex-integral control method; a third generation module for processing the modulation signal according to a sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter.

[0024] In a possible implementation manner of the second aspect, the second generating module includes:

[0025] An output unit, used for processing the second three-phase current according to the signal adjustment method and outputting an initial modulation signal;

[0026] The first generating unit is used to perform an inverse coordinate transformation process corresponding to the coordinate transformation process on the initial modulation signal to generate a modulation signal.

[0027] Optionally, in a possible implementation manner of the second aspect, the second three-phase current includes a first DC component, a second DC component, and a zero-sequence current component, the initial modulation signal includes a first modulation signal, a second modulation signal, and a third modulation signal, and the output unit is specifically used to:

[0028] Processing the first DC component according to a proportional-integral control method and outputting a first modulation signal;

[0029] Processing the second DC component according to a proportional-integral control method and outputting a second modulation signal;

[0030] The zero-sequence current component is processed according to a proportional complex integral control method, and a third modulation signal is output.

[0031] Optionally, in another possible implementation manner of the second aspect, the processing of the first DC component according to the proportional-integral control method to output the first modulation signal includes:

[0032] Determining an error value of the first DC component according to the first DC component and a reference value of the first DC component, wherein the reference value of the first DC component is determined according to a preset active power;

[0033] A first modulation signal is output according to the error value of the first DC component, a preset first proportional gain coefficient, and a preset first integral gain coefficient.

[0034] Optionally, in another possible implementation manner of the second aspect, the processing of the second DC component according to the proportional-integral control method to output a second modulation signal includes:

[0035] determining an error value of the second DC component according to the second DC component and a reference value of the second DC component, wherein the reference value of the second DC component is determined according to a preset reactive power;

[0036] A second modulation signal is output according to the error value of the second DC component, the preset first proportional gain coefficient and the preset first integral gain coefficient.

[0037] Optionally, in another possible implementation manner of the second aspect, the zero-sequence current component is processed according to the proportional complex integral control method to output a third modulation signal, including:

[0038] A third modulation signal is output according to the zero-sequence current component, the preset second proportional gain coefficient, the preset second integral gain coefficient, and the preset complex integral control term.

[0039] Optionally, in another possible implementation manner of the second aspect, the first generating module includes:

[0040] An acquisition unit, used for acquiring a point voltage of the converter and calculating a phase angle of the converter according to the point voltage of the converter;

[0041] The second generating unit is used to perform Park transformation processing on the first three-phase current according to the phase angle of the converter to generate the second three-phase current.

[0042] In a third aspect, an embodiment of the present application provides a terminal device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the aforementioned method for suppressing zero-sequence circulating current when executing the computer program.

[0043] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method for suppressing zero-sequence circulating current as described above is implemented.

[0044] In the technical solution of the present application, the first three-phase current output by the converter is first collected, and the first three-phase current is subjected to coordinate transformation processing to generate the second three-phase current, and then the second three-phase current is processed according to the signal adjustment method to generate a modulation signal, and finally the modulation signal is processed according to the sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the three-phase converter. Thus, the second three-phase current is processed by the proportional integral control method and the proportional complex integral control method, so that the potential balance of the midpoint of the DC bus capacitor can be ensured while suppressing the zero-sequence circulating current between the converters, thereby improving the converter efficiency and the output current waveform quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 This is a topological circuit diagram of a three-level four-wire converter in parallel operation provided by an embodiment of the present application;

[0047] Figure 2 is an equivalent circuit diagram of three-level four-wire converters in parallel provided by an embodiment of the present application;

[0048] Figure 3 It is a flow chart of a method for suppressing zero-sequence circulating current provided in one embodiment of the present application;

[0049] Figure 4 is a flow chart of a method for suppressing zero-sequence circulating current provided by another embodiment of the present application;

[0050] Figure 5 is a schematic diagram of a method for suppressing zero-sequence circulating current provided in an embodiment of the present application;

[0051] Figure 6 This is a waveform diagram of output current of three inverters without zero-sequence circulating current suppression provided by an embodiment of the present application;

[0052] Figure 7 This is a schematic diagram of zero-sequence circulating current between two inverters without zero-sequence circulating current suppression provided by an embodiment of the present application;

[0053] Figure 8 This is a waveform diagram of the DC bus capacitor voltage of an inverter without zero-sequence circulating current suppression provided by an embodiment of the present application;

[0054] Fig. 9 This is a waveform diagram of output currents of three inverters after adding zero-sequence circulating current suppression provided by an embodiment of the present application;

[0055] Fig.10 This is a schematic diagram of increasing the zero-sequence circulating current to suppress the zero-sequence circulating current between two inverters provided by an embodiment of the present application;

[0056] Fig.11 This is a waveform diagram of the DC bus capacitor voltage of the inverter with increased zero-sequence circulating current suppression provided by an embodiment of the present application;

[0057] Fig.12 It is a schematic diagram of the flow of a device for suppressing zero-sequence circulating current provided in one embodiment of the present application;

[0058] Fig.13 It is a schematic diagram of the structure of the terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0059] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0060] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0061] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0062] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0063] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0064] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0065] As an important interface for energy conversion between energy storage power stations and new energy power generation, the quality of power transmission performance of the converter determines the quality of power transmission. With the continuous expansion of the scale of energy storage power stations and new energy power plants, higher requirements are also placed on the capacity of the converter. Since there are bottlenecks in the capacity and withstand voltage level of power devices and it is difficult to break through in a short time, in order to improve the reliability and modular design of system operation and meet the requirements of high power level, high efficiency and high reliability, it is an effective method to use multiple converters in parallel to form a large-capacity inverter system. Among them, the three-level converter has become an ideal choice for increasing system capacity, realizing redundant control and modular control system due to its low switching loss, low output harmonic content and large output capacity. However, when multiple converters are connected in parallel through a common AC and DC bus, zero-sequence circulating current will be generated in the parallel system due to factors such as impedance differences, inconsistent control parameters and asynchronous operation of switching devices. The appearance of zero-sequence circulating current will cause output current distortion, uneven load distribution, increased stress on switching devices, and ultimately reduce the overall efficiency of the system, affecting the normal operation of the converter parallel system. Therefore, it is very important to suppress the zero-sequence circulating current in the three-level converter parallel system.

[0066] At present, the main goal of traditional zero-sequence circulating current suppression strategies is to control the zero-sequence current difference between the controlled converter and the selected reference converter to zero. Although these methods can suppress zero-sequence circulating current between converters, the zero-sequence circulating current suppression becomes more complicated due to the difference in midpoint potential of three-level converters and the complexity of switching states. Traditional strategies have difficulty in maintaining the balance of the midpoint potential of the DC bus capacitor. The implementation of these control algorithms is relatively complex and requires the selection and switching of reference converters, which leads to great difficulties in engineering applications.

[0067] For example, Figure 1 The three-level four-wire converter parallel operation topology circuit diagram shown in the figure has an I-NPC converter topology structure for the converter, an LCL filter for the filter, the converter DC sides are connected in parallel at the DC bus, and the AC sides are connected in parallel at the common connection point of the power grid, and a three-phase four-wire connection method is adopted.

[0068] like Figure 2 The equivalent circuit diagram of the three-level four-wire converter in parallel is shown in FIG. 1 . When two converters are connected in parallel, there is a difference in the electromotive force of the bridge arm midpoints of the two converters, and a circulating current will appear between the parallel converters. When there are differences in the converter filter parameters or the power flowing through the converters is not equal, there will be a difference in the voltage drop between the bridge arm midpoint and the AC common connection point, and the electromotive force of the bridge arm midpoints of different converters connected in parallel to the same AC side will be different, which will generate a low-frequency parallel circulating current. When there is a difference in the carrier phase, for the same modulation wave, the bridge arm midpoint potential will be different in each switching cycle, and a high-frequency parallel circulating current will be generated. In addition, for three-level converters, when there is a difference in the DC bus capacitor voltage of the parallel converters, a DC bias will also be generated in the parallel circulating current.

[0069] like Figure 2 As shown, the output voltage of one phase of the three-phase converter is the electromotive force from the midpoint of the bridge arm to the neutral point of the system, which can be expressed as:

[0070]

[0071] Among them, v kn1 is the electromotive force from the midpoint of one phase bridge arm to the neutral point in the three phases ABC, k is a, b, c represents one phase in the three phases ABC respectively; V DC is the DC bus voltage; S k1 is the switching function of one of the three phases ABC, and its values ​​are -1, 0 and 1; ΔV1 represents the difference between the positive DC bus capacitor voltage and the negative DC bus capacitor voltage.

[0072] After determining that the output voltage of one phase is the electromotive force from the midpoint of the bridge arm to the neutral point of the system, the zero-sequence output voltage of the three-phase converter can be determined as:

[0073]

[0074] Furthermore, after determining the zero-sequence output voltage of each three-phase converter, the difference in electromotive force between the two converters, i.e., the excitation source of the zero-sequence circulating current, can be expressed as:

[0075]

[0076] It can be seen from the above formula that the excitation source of the zero-sequence circulating current can be divided into three main parts: 1. The component related to the capacitor voltage difference, 2. The component related to the switching function, 3. The component related to both the capacitor voltage difference and the switching function.

[0077] For the first excitation source, when the parallel converters adopt a three-phase four-wire connection method, the midpoints of the capacitors are connected through the N line, and the voltage difference between the positive and negative capacitors of each converter is equal, then the difference between the converter capacitor voltage differences will not generate zero-sequence circulating current.

[0078] For the second excitation source, the component related to the switching function in the excitation source of the zero-sequence circulating current is a high-frequency component, and the frequency is concentrated in the high-frequency band of the switching frequency. Since the filter itself has sufficient attenuation on the switching frequency signal, the zero-sequence circulating current caused by this part of the excitation source will not be output to the common connection point and the external part of the parallel converter.

[0079] For the third excitation source, the component related to both the capacitor voltage difference and the switching function will generate a zero-sequence circulating current with a third harmonic frequency. Therefore, the main excitation source for generating the zero-sequence circulating current is the component related to both the capacitor voltage difference and the switching function.

[0080] In summary, when the three-level converters are connected in parallel using a three-phase four-wire connection method, since the midpoint of the DC bus capacitor is connected to the system N line, the zero-sequence current in the converter will affect the potential of the midpoint of the DC bus capacitor. At the same time, the main control object of the zero-sequence circulating current suppression is the tripled frequency zero-sequence circulating current.

[0081] Based on this, the present application proposes a method, device, terminal equipment and storage medium for suppressing zero-sequence circulating current, so that when three-level converters are operated in parallel using a three-phase four-wire connection method, zero-sequence circulating current can be suppressed between converters, while also ensuring the balance of the midpoint potential of the DC bus capacitor.

[0082] The zero-sequence circulating current suppression method, apparatus, terminal equipment and storage medium provided in the present application are described in detail below with reference to the accompanying drawings.

[0083] The method, apparatus, terminal device and storage medium for suppressing zero-sequence circulating current provided in the present application are applied to any three-phase converter in which three-phase four-wires are connected in parallel.

[0084] Figure 3 A schematic flow chart of a method for suppressing zero-sequence circulating current provided in an embodiment of the present application is shown.

[0085] like Figure 3 As shown, the method for suppressing the zero-sequence circulating current comprises the following steps:

[0086] Step 301 : collecting the first three-phase current output by the converter, and performing coordinate transformation processing on the first three-phase current to generate the second three-phase current.

[0087] In one embodiment, the coordinate transformation processing can be a Park transformation, which can convert the first three-phase current collected on the grid side of the converter from a three-phase stationary coordinate system (ABC coordinate system) into a two-phase rotating coordinate system (dq0 coordinate system) to generate a second three-phase current, thereby converting three-phase control into two-phase control, thereby simplifying calculations and reducing analysis difficulty.

[0088] Furthermore, in a possible implementation of the embodiment of the present application, the above step 301 may include:

[0089] Step 3011, obtaining the point voltage of the converter, and calculating the phase angle of the converter according to the point voltage of the converter;

[0090] Step 3012: Perform Park transformation on the first three-phase current according to the phase angle of the converter to generate a second three-phase current.

[0091] The point voltage may refer to a voltage signal at a common connection point where the converter is connected to a power grid or other equipment.

[0092] The phase angle may refer to an angle parameter used to synchronize other signals in the system. In converter control, the point voltage may be processed by a phase-locked loop (PLL) to extract the phase angle of the point voltage signal. By determining the phase angle of the point voltage, the first three-phase current signal may be converted into the second three-phase current.

[0093] In one embodiment, the point voltage signal of the converter is first obtained, and its phase angle is calculated as θ through a phase-locked loop. Then, according to the phase angle θ, the first three-phase current (in the ABC three-phase stationary coordinate system) I a ,I b and I c Perform Park transformation to obtain the second three-phase current (dq0 two-phase rotating coordinate system) I d ,I q And I0, the specific coordinate transformation process is as follows:

[0094]

[0095] Where, I0=1 / 3(I a +I b +I c ).

[0096] In an embodiment of the present application, by acquiring a point voltage signal and calculating its phase angle, the three-phase current of the converter is converted from the ABC stationary coordinate system to the dq0 rotating coordinate system using the phase angle. The converted current components are more suitable for subsequent control and regulation.

[0097] Step 302: Process the second three-phase current according to a signal adjustment method to generate a modulation signal. The signal adjustment method includes a proportional integral control method and a proportional complex integral control method.

[0098] Among them, the proportional-integral control method can be referred to as a classic control algorithm, which is widely used in various control systems such as current, speed, and position. It consists of two parts: proportional (P) and integral (I). Among them, the proportional control amplifies the error (that is, the difference between the expected value and the actual value) through the proportional gain. The proportional control can respond to the error quickly, but it may produce a steady-state error. Among them, the integral control integrates the error through the integral gain, the purpose is to eliminate the steady-state error. The integral part can eliminate the deviation of the system by accumulating the error, but it may cause the system to respond more slowly or even oscillate. The proportional-integral control method adjusts the controller output so that the system reaches and maintains the set reference value.

[0099] Among them, the proportional complex integral control method can refer to a control method for processing more complex signals, which is particularly suitable for suppressing frequency-bearing components such as third harmonics, and also introduces a gain related to a specific frequency to enhance the suppression effect on specific frequency components.

[0100] In the embodiment of the present application, by performing proportional integral control and proportional complex integral control on the second three-phase current, a modulation signal is accurately generated to achieve stable control of the current.

[0101] Step 303: Process the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter.

[0102] The sinusoidal pulse width modulation method may refer to a technique for generating a pulse driving signal by comparing a modulation signal with a high-frequency carrier signal.

[0103] It should be noted that step 303 is to convert the modulated signal after control and adjustment into a specific pulse signal through the sinusoidal pulse width modulation (SPWM) method, and these pulse signals are used to control the on and off state of the switching device in the converter, so as to accurately adjust the output of current and voltage. The sinusoidal pulse width modulation method generates a series of pulse widths by comparing the sine wave (modulation signal) and the triangular wave (carrier) to achieve the required voltage and current output. These pulse drive signals are ultimately used to control the three bridge arms of the converter to achieve the normal operation of the converter.

[0104] The method for suppressing zero-sequence circulating current provided by the present application first collects the first three-phase current output by the converter, and performs coordinate transformation processing on the first three-phase current to generate the second three-phase current, and then processes the second three-phase current according to the signal adjustment method to generate a modulation signal, the signal adjustment method includes a proportional integral control method and a proportional complex integral control method, and finally processes the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter. Thus, the second three-phase current is processed by the proportional integral control method and the proportional complex integral control method, so that the potential balance of the midpoint of the DC bus capacitor can be ensured while suppressing the zero-sequence circulating current between the converters, thereby improving the converter efficiency and the output current waveform quality.

[0105] Figure 4 A schematic flow chart of a method for suppressing zero-sequence circulating current provided in another embodiment of the present application is shown.

[0106] like Figure 4 As shown, the method for suppressing the zero-sequence circulating current comprises the following steps:

[0107] Step 401 , collecting the first three-phase current output by the converter, and performing coordinate transformation processing on the first three-phase current to generate the second three-phase current.

[0108] The specific implementation process and principle of the above step 401 can refer to the detailed description of the above embodiment, which will not be repeated here.

[0109] Step 402: Process the second three-phase current according to the signal adjustment method and output an initial modulation signal.

[0110] Further, in a possible implementation of the embodiment of the present application, the second three-phase current includes a first DC component, a second DC component and a zero-sequence current component, the initial modulation signal includes a first modulation signal, a second modulation signal and a third modulation signal, and the above step 402 includes:

[0111] Step 4021: Process the first DC component according to a proportional-integral control method and output a first modulation signal.

[0112] Step 4022: Process the second DC component according to the proportional-integral control method and output a second modulation signal.

[0113] Step 4023, processing the zero-sequence current component according to the proportional complex integral control method, and outputting a third modulation signal.

[0114] It should be noted that the first three-phase current is decomposed into a first DC component, a second DC component and a zero-sequence current component after coordinate transformation. The proportional-integral control method can process DC signals well. By adjusting the proportional and integral parameters, accurate control without steady-state error can be achieved. Therefore, proportional-integral control of the first DC component and the second DC component is a common and effective method for controlling the output performance of the converter. The zero-sequence current component can cause imbalance and instability in the system. The midpoint potential offset of the converter capacitor is often caused by the zero-sequence component. In addition, the circulating current between converters is often a zero-sequence component. The proportional-complex-integral control method can process complex signals, including those with frequency components. By adjusting the proportional and complex integral terms, it can better control and suppress the adverse effects of the zero-sequence current on the system, effectively avoid the midpoint potential offset of the converter capacitor, and suppress the zero-sequence circulating current between converters.

[0115] In one embodiment, the first three-phase current is in the ABC three-phase stationary coordinate system, and the first three-phase current is subjected to Park transformation to generate a second three-phase current, and the second three-phase current is in the dq0 rotating coordinate system, wherein the first DC component is I d , the second DC component is I q , the zero-sequence current component is I0, and the first DC component I is controlled by the proportional integral control method. d Processing, outputting the first modulated signal V d According to the proportional integral control method, the second DC component I q Processing, outputting the second modulated signal V q , the zero-sequence current component I0 is processed according to the proportional complex integral control method, and a third modulation signal V0 is output.

[0116] In the embodiment of the present application, proportional-integral control is performed on the first DC component and the second DC component to ensure stable output of the converter, and proportional-complex-integral control is performed on the zero-sequence current component to suppress the influence of the zero-sequence current on the system stability.

[0117] Step 403: Perform an inverse coordinate transformation process corresponding to the coordinate transformation process on the initial modulation signal to generate a modulation signal.

[0118] It should be noted that the purpose of generating a modulation signal after the initial modulation signal is subjected to inverse coordinate transformation is that the switching and control operations of the converter are all performed based on the three-phase coordinate system corresponding to the first three-phase current, so the initial modulation signal needs to be converted back to the three-phase coordinate system corresponding to the first three-phase current in order to drive the actual power device. In addition, the modulation signal generated after inversion can be directly used for sinusoidal pulse width modulation (SPWM), thereby generating a switching signal suitable for controlling the converter.

[0119] In one embodiment, the inverse coordinate transformation is an inverse Parker transformation, and the initial modulation signal includes a first modulation signal V d , the second modulation signal V q And the third modulation signal V0, the modulation signal generated after the inverse Pike transform is V a 、V b and V c , the transformation process is as follows:

[0120]

[0121] Step 404: Process the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter.

[0122] The specific implementation process and principle of the above step 404 can refer to the detailed description of the above embodiment, which will not be repeated here.

[0123] The contents of the above steps 4021 to 4023 will be further explained below.

[0124] Furthermore, in a possible implementation of the embodiment of the present application, the above step 4021 further includes:

[0125] Determining an error value of the first DC component according to the first DC component and a reference value of the first DC component, wherein the reference value of the first DC component is determined according to a preset active power;

[0126] A first modulation signal is output according to the error value of the first DC component, a preset first proportional gain coefficient, and a preset first integral gain coefficient.

[0127] Among them, active power can refer to the electrical energy actually transmitted by the converter to the load or the power grid, which can be converted into mechanical energy, heat energy, light energy, etc., and directly used for work. In many control systems, the set values ​​of active power and reactive power are predetermined, usually set by the upper controller or external control system according to the power grid demand or specific operating conditions. For example, in order to maintain the stability of the power grid, the control system will set appropriate active and reactive power values ​​according to the real-time situation of the power grid.

[0128] It should be noted that the power loop calculates the reference value of the first DC component based on the preset active power. The reference value is used to achieve precise regulation of the output current. First, the power loop receives the preset active power, and then converts the preset active power into the reference value of the first DC component based on the relationship between power and current. After obtaining the reference value of the first DC component, the error value of the first DC component is generated by subtracting it from the first DC component, and then the first DC component is proportionally and integrally controlled according to the current control loop, the error value of the first DC component, the preset first proportional gain coefficient, and the preset first integral gain coefficient, and the first modulation signal is output.

[0129] In one embodiment, the output formula of the first modulated signal can be expressed as:

[0130]

[0131] Among them, U d Represented as the first modulation signal, K p1 Represented as the preset first proportional gain coefficient, is the preset first integral gain coefficient, i d,ref -i d is the error value of the first DC component.

[0132] Furthermore, in a possible implementation of the embodiment of the present application, the above step 4022 further includes:

[0133] determining an error value of the second DC component according to the second DC component and a reference value of the second DC component, wherein the reference value of the second DC component is determined according to a preset reactive power;

[0134] A second modulation signal is output according to the error value of the second DC component, the preset first proportional gain coefficient and the preset first integral gain coefficient.

[0135] Among them, reactive power refers to the part of electric energy that is repeatedly exchanged between the converter and the power grid. It does not directly do work, but is used to maintain the voltage level of the power grid and stabilize the magnetic field or electric field in the power grid.

[0136] It should be noted that the power loop calculates the reference value of the first DC component based on the preset reactive power. First, the power loop receives the preset reactive power, and then converts the preset reactive power into the reference value of the second DC component based on the relationship between power and current. After obtaining the reference value of the second DC component, the error value of the second DC component is generated by subtracting it from the second DC component, and then the second DC component is proportionally and integrally controlled according to the current control loop, the error value of the second DC component, the preset first proportional gain coefficient, and the preset first integral gain coefficient, and the second modulation signal is output.

[0137] In one embodiment, the output formula of the second modulated signal can be expressed as:

[0138]

[0139] Among them, U q Represented as the second modulation signal, K p1 Represented as the preset first proportional gain coefficient, is the preset first integral gain coefficient, i q,ref -i q is the error value of the first DC component.

[0140] Furthermore, in a possible implementation of the embodiment of the present application, the above step 4023 further includes:

[0141] A third modulation signal is output according to the zero-sequence current component, the preset second proportional gain coefficient, the preset second integral gain coefficient, and the preset complex integral control term.

[0142] It should be noted that the formula structure of the complex integral control term can amplify the signal related to the triple frequency because it specifically suppresses the harmonics related to the triple frequency in the zero-sequence current component. Therefore, in practical applications, proportional complex integral control can better maintain system stability in the presence of frequency disturbances.

[0143] In one embodiment, the measured zero-sequence current component i0 and the reference value i of the zero-sequence current component 0,ref By comparison, the error e0 of the zero-sequence current component is calculated as:

[0144] e0=i 0ref -i0

[0145] In most cases, the reference zero-sequence current i 0,ref Usually it is 0, because we hope that the zero-sequence current is as close to zero as possible to suppress the zero-sequence circulating current. The output formula of the third modulation signal can be expressed as:

[0146]

[0147] Among them, U0 represents the third modulation signal, K p2 and K i2 are respectively a preset second proportional gain coefficient and a preset second integral gain coefficient, It is the preset complex integral control item.

[0148] Figure 5 A schematic diagram of a method for suppressing zero-sequence circulating current provided in an embodiment of the present application is shown.

[0149] like Figure 5As shown, first, each converter transforms the collected grid-side three-phase current from the ABC three-phase stationary coordinate system to the dq0 two-phase rotating coordinate system (ABC-dq0 transformation) to obtain the current signal in the dq0 two-phase rotating coordinate system, and the power loop calculates the dq axis current reference command value according to the active power and reactive power commands; secondly, the dq axis current component of the current control loop adopts proportional integral control, and the 0 axis current component adopts proportional complex integral control with a larger three-times power frequency gain, and then the dq0 modulation signal output by the controller is transformed from the dq0 two-phase rotating coordinate system to the ABC three-phase stationary coordinate system (dq0-ABC transformation) to obtain the modulation signal in the ABC coordinate system, and finally, the sinusoidal pulse width modulation method is used to modulate the pulse drive signals of the three bridge arms.

[0150] Figure 6 The output current waveform of the three inverters without zero-sequence circulating current suppression is shown in FIG. Figure 6 As shown in the figure, three three-level inverters are connected in parallel in a 3-phase 4-wire connection mode. The given powers of the three inverters are 50kW, 70kW and 60kW respectively, and the inductance of the filter inverter side is 1.05 times, 0.95 times and 1 times the rated value respectively. When the three inverters are directly connected in parallel, the fundamental amplitudes of the output currents of the three inverters are 106.9A, 149.6A and 128.7A respectively, and the harmonic distortion THD of the AC side current is 13.93%, 8.83% and 7.16% respectively, of which the third harmonic content is 13.36%, 8.27% and 6.73% respectively, and the third harmonic is the main part of the harmonics.

[0151] It should be noted that the calculation method of the zero-sequence circulating current between any two inverters among the three three-level inverters is as follows:

[0152]

[0153] Among them, i jm is the m-phase current of inverter j, i kn is the n-phase current of inverter k, m and n are respectively A, B, and C phases, and the zero-sequence circulating current between the three inverters is calculated accordingly. The results are as follows: Figure 7 The schematic diagram of zero-sequence circulating current between two inverters without zero-sequence circulating current suppression is shown. The total zero-sequence circulating current amplitudes in the zero-sequence circulating current are 6.41A, 6.80A and 10.14A respectively, and the amplitudes of the triple frequency components are 3.63A, 4.49A and 7.66A respectively. Therefore, the triple frequency zero-sequence circulating current is the main component.

[0154] like Figure 8 As shown in the DC bus capacitor voltage waveform of the inverter without zero-sequence circulating current suppression, the DC bus capacitor midpoint voltage is offset multiple times and the voltage fluctuation is relatively large.

[0155] pass Figure 6-Figure 8 The above simulation analysis found that the main part of the zero-sequence circulating current is the triple frequency component. In order to suppress the triple frequency zero-sequence circulating current, a controller with a larger gain at the triple frequency can be used to track the zero-sequence circulating current of this frequency. This method uses a proportional complex integral controller as an example to suppress the zero-sequence circulating current.

[0156] like Fig. 9 As shown in the output current waveforms of the three inverters after adding zero-sequence circulating current suppression, the fundamental amplitudes of the output currents of the three inverters after adding zero-sequence circulating current suppression are 107.1A, 150.0A and 128.6A respectively, and the harmonic distortion rates THD of the AC side current are 3.70%, 2.91% and 2.54% respectively. The harmonic distortion rate THD limit of the AC side current is reduced.

[0157] like Fig.10 The schematic diagram of increasing the zero-sequence circulating current to suppress the zero-sequence circulating current between two of the three inverters is shown. The total zero-sequence circulating current amplitudes are 2.48A, 2.18A and 2.07A respectively, and the amplitudes of the triple frequency components are 0.017A, 0.012A and 0.006A respectively, and the zero-sequence circulating current is significantly reduced.

[0158] like Fig.11 As shown in the voltage waveform diagram of the DC bus capacitor of the inverter with added zero-sequence circulating current suppression, the midpoint voltage of the DC bus capacitor does not shift after adding the zero-sequence circulating current suppression, and the voltage fluctuation becomes smaller than when no zero-sequence circulating current suppression is added.

[0159] In summary, through the above simulation analysis, it can be found that the zero-sequence circulating current suppression method proposed in this application can suppress the zero-sequence circulating current between converters when the three-phase four-wire inverter is connected in parallel and operates, and realize the potential balance of the midpoint of the DC bus capacitor, thereby effectively reducing the harmonic distortion rate of the output current.

[0160] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0161] Corresponding to the method for suppressing zero-sequence circulating current in the above embodiment, Fig.12 A structural block diagram of a zero-sequence circulating current suppression device provided in an embodiment of the present application is shown. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0162] Reference Fig.12 , the device 1200 comprises:

[0163] The acquisition module 1201 is used to acquire the first three-phase current output by the converter;

[0164] A first generating module 1202, configured to perform coordinate transformation processing on the first three-phase current to generate a second three-phase current;

[0165] A second generating module 1203 is used to process the second three-phase current according to a signal adjustment method to generate a modulation signal, where the signal adjustment method includes a proportional integral control method and a proportional complex integral control method;

[0166] The third generating module 1204 is used to process the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse driving signal corresponding to the converter.

[0167] In actual use, the zero-sequence circulating current suppression device provided in the embodiment of the present application can be configured in any terminal device to execute the aforementioned zero-sequence circulating current suppression method.

[0168] The zero-sequence circulating current suppression device provided by the present application collects the first three-phase current output by the converter, performs coordinate transformation processing on the first three-phase current, generates the second three-phase current, and then processes the second three-phase current according to the signal adjustment method to generate a modulation signal, and finally processes the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter. Thus, the second three-phase current is processed by the proportional integral control method and the proportional complex integral control method, so that the potential balance of the midpoint of the DC bus capacitor can be ensured while suppressing the zero-sequence circulating current between the converters, thereby improving the converter efficiency and the output current waveform quality.

[0169] In a possible implementation of the embodiment of the present application, the second generating module 1203 includes:

[0170] An output unit, used for processing the second three-phase current according to the signal adjustment method and outputting an initial modulation signal;

[0171] The first generating unit is used to perform an inverse coordinate transformation process corresponding to the coordinate transformation process on the initial modulation signal to generate a modulation signal.

[0172] Further, in a possible implementation of the embodiment of the present application, the second three-phase current includes a first DC component, a second DC component and a zero-sequence current component, the initial modulation signal includes a first modulation signal, a second modulation signal and a third modulation signal, and the output unit is specifically used to:

[0173] Processing the first DC component according to a proportional-integral control method and outputting a first modulation signal;

[0174] Processing the second DC component according to a proportional-integral control method and outputting a second modulation signal;

[0175] The zero-sequence current component is processed according to a proportional complex integral control method, and a third modulation signal is output.

[0176] Furthermore, in another possible implementation of the embodiment of the present application, the first DC component is processed according to the proportional-integral control method to output the first modulation signal, including:

[0177] Determining an error value of the first DC component according to the first DC component and a reference value of the first DC component, wherein the reference value of the first DC component is determined according to a preset active power;

[0178] A first modulation signal is output according to the error value of the first DC component, a preset first proportional gain coefficient, and a preset first integral gain coefficient.

[0179] Furthermore, in another possible implementation of the embodiment of the present application, the second DC component is processed according to the proportional-integral control method to output a second modulation signal, including:

[0180] determining an error value of the second DC component according to the second DC component and a reference value of the second DC component, wherein the reference value of the second DC component is determined according to a preset reactive power;

[0181] A second modulation signal is output according to the error value of the second DC component, the preset first proportional gain coefficient and the preset first integral gain coefficient.

[0182] Furthermore, in another possible implementation of the embodiment of the present application, the zero-sequence current component is processed according to the proportional complex integral control method to output a third modulation signal, including:

[0183] A third modulation signal is output according to the zero-sequence current component, the preset second proportional gain coefficient, the preset second integral gain coefficient, and the preset complex integral control term.

[0184] Furthermore, in another possible implementation of the embodiment of the present application, the first generating module 1202 includes:

[0185] An acquisition unit, used for acquiring a point voltage of the converter and calculating a phase angle of the converter according to the point voltage of the converter;

[0186] The second generating unit is used to perform Park transformation processing on the first three-phase current according to the phase angle of the converter to generate the second three-phase current.

[0187] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0188] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0189] In order to implement the above embodiments, the present application also proposes a terminal device.

[0190] Fig.13 A schematic diagram of the structure of a terminal device according to an embodiment of the present application.

[0191] like Fig.13 As shown, the terminal device 200 includes:

[0192] A memory 210 and at least one processor 220, a bus 230 connecting different components (including the memory 210 and the processor 220), the memory 210 stores a computer program, and when the processor 220 executes the program, the method for suppressing zero-sequence circulating current described in the embodiment of the present application is implemented.

[0193] Bus 230 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or a local bus using any of a variety of bus architectures. For example, these architectures include but are not limited to Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MAC) bus, Enhanced ISA bus, Video Electronics Standards Association (VESA) local bus and Peripheral Component Interconnect (PCI) bus.

[0194] The terminal device 200 typically includes a variety of electronic device readable media, which can be any available media that can be accessed by the terminal device 200, including volatile and non-volatile media, removable and non-removable media.

[0195] The memory 210 may also include computer system readable media in the form of volatile memory, such as random access memory (RAM) 240 and / or cache memory 250. The terminal device 200 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 260 may be used to read and write non-removable, non-volatile magnetic media ( Fig.13 not shown, usually called a "hard drive"). Although Fig.13 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical medium) may be provided. In these cases, each drive may be connected to bus 230 via one or more data medium interfaces. Memory 210 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of the various embodiments of the present application.

[0196] A program / utility 280 having a set (at least one) of program modules 270 may be stored, for example, in the memory 210, such program modules 270 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules 270 generally perform the functions and / or methods of the embodiments described herein.

[0197] The terminal device 200 can also communicate with one or more external devices 290 (e.g., keyboard, pointing device, display 291, etc.), and can also communicate with one or more devices that enable users to interact with the terminal device 200, and / or communicate with any device that enables the terminal device 200 to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be carried out through an input / output (I / O) interface 292. In addition, the terminal device 200 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN) and / or public network, such as the Internet) through a network adapter 293. As shown in the figure, the network adapter 293 communicates with other modules of the terminal device 200 through a bus 230. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with the terminal device 200, including but not limited to: microcode, device driver, redundant processing unit, external disk drive array, RAID system, tape drive, and data backup storage system, etc.

[0198] The processor 220 executes various functional applications and data processing by running the programs stored in the memory 210 .

[0199] It should be noted that the implementation process and technical principles of the terminal equipment of this embodiment refer to the aforementioned explanation of the method for suppressing zero-sequence circulating current in the embodiment of the present application, and will not be repeated here.

[0200] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0201] An embodiment of the present application provides a computer program product. When the computer program product runs on a terminal device, the terminal device can implement the steps in the above-mentioned method embodiments when executing the computer program product.

[0202] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may at least include: any entity or device that can carry the computer program code to the camera / terminal device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0203] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0204] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0205] In the embodiments provided in the present application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0206] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0207] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for suppressing zero-sequence circulating current, characterized in that: The method is applied to any of the three-phase converters in which three-phase four-wires are connected in parallel, and the method comprises: collecting a first three-phase current output by the converter, and performing coordinate transformation processing on the first three-phase current to generate a second three-phase current; Processing the second three-phase current according to a signal conditioning method to generate a modulation signal, wherein the signal conditioning method includes a proportional integral control method and a proportional complex integral control method; The modulation signal is processed according to a sinusoidal pulse width modulation method to generate a pulse drive signal corresponding to the converter.

2. The method according to claim 1, characterized in that The processing of the second three-phase current according to the signal adjustment method to generate a modulation signal includes: Processing the second three-phase current according to the signal adjustment method and outputting an initial modulation signal; The initial modulation signal is subjected to an inverse coordinate transformation process corresponding to the coordinate transformation process to generate the modulation signal.

3. The method according to claim 2, characterized in that The second three-phase current includes a first DC component, a second DC component and a zero-sequence current component, the initial modulation signal includes a first modulation signal, a second modulation signal and a third modulation signal, and the processing of the second three-phase current according to the signal adjustment method to output the initial modulation signal includes: Processing the first DC component according to the proportional-integral control method and outputting the first modulation signal; Processing the second DC component according to the proportional-integral control method and outputting the second modulation signal; The zero-sequence current component is processed according to the proportional complex integral control method, and the third modulation signal is output.

4. The method according to claim 3, characterized in that The processing of the first DC component according to the proportional-integral control method and outputting the first modulation signal comprises: determining an error value of the first DC component according to the first DC component and a reference value of the first DC component, wherein the reference value of the first DC component is determined according to a preset active power; The first modulation signal is output according to the error value of the first DC component, a preset first proportional gain coefficient, and a preset first integral gain coefficient.

5. The method according to claim 3, characterized in that The processing of the second DC component according to the proportional-integral control method and outputting the second modulation signal comprises: determining an error value of the second DC component according to the second DC component and a reference value of the second DC component, wherein the reference value of the second DC component is determined according to a preset reactive power; The second modulation signal is output according to the error value of the second DC component, the preset first proportional gain coefficient, and the preset first integral gain coefficient.

6. The method according to claim 3, characterized in that The processing of the zero-sequence current component according to the proportional complex integral control method and outputting the third modulation signal comprises: The third modulation signal is output according to the zero-sequence current component, the preset second proportional gain coefficient, the preset second integral gain coefficient and the preset complex integral control term.

7. The method according to any one of claims 1 to 6, characterized in that: The performing coordinate transformation processing on the first three-phase current to generate a second three-phase current includes: Acquiring a point voltage of the converter, and calculating a phase angle of the converter according to the point voltage of the converter; The first three-phase current is subjected to Park transformation processing according to the phase angle of the converter to generate the second three-phase current.

8. A zero-sequence circulating current suppression device, characterized in that: The device is applied to any of the three-phase converters in which three-phase four-wires are connected in parallel, and the device comprises: A collection module, used for collecting the first three-phase current output by the converter; A first generating module, configured to perform coordinate transformation processing on the first three-phase current to generate a second three-phase current; A second generating module, configured to process the second three-phase current according to a signal adjustment method to generate a modulation signal, wherein the signal adjustment method includes a proportional integral control method and a proportional complex integral control method; The third generating module is used to process the modulation signal according to the sinusoidal pulse width modulation method to generate a pulse driving signal corresponding to the converter.

9. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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