Self-adaptive nonlinear compensation high-efficiency high-linearity circuit

Abstract

The invention discloses a high-efficiency and high-linearity circuit with self-adaptive nonlinear compensation. The high-efficiency and high-linearity circuit comprises a dynamic bias circuit unit and a radio frequency amplification circuit unit, the dynamic bias circuit unit comprises a first bias transistor and a first bias circuit, and an external Vg'direct current voltage source is connected to a grid electrode of the first bias transistor through the first bias circuit; the radio frequency amplification circuit unit comprises a second bias transistor, an input matching circuit and an output matching circuit; an external Vg direct-current voltage source is connected to the grid electrode of the second bias transistor through the input matching network; an external Vd direct-current voltage source is connected to the drain electrode of the second bias transistor through the output matching network; an input signal RFin sequentially passes through the input matching network, the second bias transistor and the output matching network to amplify an output signal RFout. According to the invention, different bias states can be realized at different injection powers, so that the efficiency and linearity in saturation and rollback states are effectively improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of monolithic microwave integrated circuits (MMICs), in particular to the technical field of high-efficiency and high-linearity monolithic microwave integrated power amplifiers, and specifically relates to a high-efficiency and high-linearity circuit with adaptive nonlinear compensation. Background Art

[0002] With the rapid development of wireless communication technology, microwave and millimeter wave monolithic integrated power amplifiers, which are core components in the system, have higher requirements for efficiency, linearity and other indicators. Since the essential properties of various processes determine the output power, linearity and other characteristics of the power amplifiers that can be developed by each process, it is necessary to improve the linearity and efficiency of the circuit from the perspective of circuit design.

[0003] In order to improve the efficiency of the power amplifier back-off area, there are envelope elimination and recovery technology, envelope tracking technology, polar coordinate technology, out-of-phase technology and Doherty technology. These technologies are relatively complex in design and difficult to implement. The traditional method of improving linearity is the relatively simple Sweet Spot technology, which uses the phase cancellation generated by different gate voltages of the front and rear stages to improve linearity. Although it will improve the linearity when the saturation back-off is about 3dB, it will deteriorate the linearity of the linear area. Summary of the invention

[0004] Technical problem to be solved: In order to improve the efficiency and linearity during back-off, the present invention proposes a high-efficiency and high-linearity circuit with adaptive nonlinear compensation, which adopts a dynamic bias structure as the adaptive nonlinear compensation of the RF amplifier transistor, and can achieve different bias states at different injection powers, thereby effectively improving the efficiency and linearity in the saturation and back-off states.

[0005] Technical solution:

[0006] In a first aspect, the present invention discloses a high-efficiency and high-linearity circuit for adaptive nonlinear compensation, wherein the high-efficiency and high-linearity circuit comprises a dynamic bias circuit unit and a radio frequency amplification circuit unit;

[0007] The dynamic bias circuit unit is composed of a first bias transistor and a first bias circuit, an external Vg' DC voltage source is connected to the gate of the first bias transistor through the first bias circuit, the drain and source of the first bias transistor are short-circuited, and the source of the first bias transistor is connected to the input matching network;

[0008] The radio frequency amplification circuit unit is composed of a second bias transistor, an input matching circuit and an output matching circuit; an external Vg DC voltage source is connected to the gate of the second bias transistor through an input matching network; an external Vd DC voltage source is connected to the drain of the second bias transistor through an output matching network; and the source of the second bias transistor is grounded;

[0009] The input signal RFin passes through the input matching network, the second bias transistor, and the output matching network in sequence to amplify the output signal RFout.

[0010] Furthermore, the first bias transistor and the second bias transistor are HEMT devices based on GaAs or GaN technology, or other microwave power transistor devices, and the number is one or more, determined according to the output power value and transistor power density.

[0011] Further, the first bias circuit includes a first inductor, a second inductor, a first capacitor and a first resistor;

[0012] The first inductor, the second inductor and the first resistor are connected in sequence, and the end of the first resistor not connected to the second inductor is connected to the external Vg' DC voltage source; the end of the first inductor not connected to the first inductor is connected to the gate of the first bias transistor; one end of the first capacitor is connected to the connection point between the first inductor and the second inductor, and the other end is grounded.

[0013] Further, the input matching network includes a first inductor, a second inductor, a third inductor, a first capacitor, a second capacitor and a first resistor;

[0014] The first inductor, the first capacitor and the second inductor are connected in sequence; the first end of the second inductor adjacent to the first capacitor is connected to an external Vg DC voltage source through a third inductor and a first resistor in sequence; the second end of the second inductor away from the first capacitor is respectively connected to the gate of the second bias transistor and the source of the first bias transistor; one end of the first inductor away from the first capacitor is connected to the input signal RFin; one end of the second capacitor is connected to the connection point of the third inductor and the first resistor, and the other end is grounded.

[0015] Further, the output matching network includes a first inductor, a second inductor, a third inductor, a first capacitor and a second capacitor;

[0016] The first inductor, the second capacitor and the third inductor are connected in sequence; one end of the first inductor away from the second capacitor is connected to the drain of the second bias transistor, and one end of the third inductor away from the second capacitor is connected to the output signal terminal;

[0017] One end of the second inductor is connected to the connection point between the first inductor and the second capacitor, and the other end is connected to an external Vd DC voltage source;

[0018] One end of the first capacitor is connected to an external Vd DC voltage source, and the other end is grounded.

[0019] In a second aspect, a radio frequency amplifier with adaptive nonlinear compensation is characterized in that the radio frequency amplifier includes an input matching network, a first transistor, a first inter-stage matching network, a second transistor, a second inter-stage matching network, a third transistor, an output matching network, a first gate bias network, a second gate bias network, a first dynamic bias circuit unit, and a second dynamic bias circuit unit;

[0020] The input matching network, the first transistor, the first inter-stage matching network, the second transistor, and the second inter-stage matching network are connected in sequence; the gate of the third-stage transistor is connected to the second inter-stage matching network, the drain of the third-stage transistor is connected to the output matching network, and the source of the third-stage transistor is grounded;

[0021] The external Vg DC voltage source is respectively connected to the input matching network, the first interstage matching network, the second interstage matching network, the first dynamic bias circuit unit and the second dynamic bias circuit unit through the first gate bias network; the external Vd DC voltage source is respectively connected to the first interstage matching network, the second interstage matching network and the output matching network through the second gate bias network;

[0022] The first dynamic bias circuit unit and the second dynamic bias circuit unit both include a first bias circuit and a bias transistor; an external Vg DC voltage source is divided and connected to the gate of the bias transistor through the first bias circuit; the drain of the bias transistor is short-circuited with the source of the bias transistor; the source of the bias transistor is connected to the second inter-stage matching network; the first gate bias network and the second gate bias network are both composed of independent gate bias circuit structures, and each stage of the gate bias circuit supplies power to each stage of the transistor.

[0023] Beneficial effects:

[0024] First, the high-efficiency and high-linearity circuit of the adaptive nonlinear compensation of the present invention adopts a dynamic bias structure as the adaptive nonlinear compensation of the RF amplifier transistor, which can achieve different bias states at different injection powers, thereby effectively improving the efficiency and linearity in the saturation and back-off states.

[0025] Secondly, the high-efficiency and high-linearity circuit of the adaptive nonlinear compensation of the present invention has a simple structure and is applicable to the design of power amplifiers of various types and frequency bands. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A block diagram of a high-efficiency and high-linearity circuit structure of an adaptive nonlinear compensation according to an embodiment of the present invention;

[0027] Figure 2A schematic diagram of a high-efficiency and high-linearity circuit for adaptive nonlinear compensation according to an embodiment of the present invention;

[0028] Figure 3 This is an equivalent compensation diagram using the diode characteristics of HEMT devices;

[0029] Figure 4 is a structural block diagram of a power amplifier according to an embodiment of the present invention;

[0030] Figure 5 This is a schematic diagram of an inter-stage matching network circuit that introduces a dynamic bias circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The following examples will enable those skilled in the art to more fully understand the present invention, but are not intended to limit the present invention in any way.

[0032] The embodiment of the present invention discloses a high-efficiency and high-linearity circuit topology structure with adaptive nonlinear compensation, which can be applied to microwave and millimeter-wave monolithic integrated power amplifier circuits, especially in the design of high-linearity and high-efficiency circuits, and adopts a dynamic bias structure as an adaptive nonlinear compensation for radio frequency amplification transistors. For details, see Figure 1 The high-efficiency and high-linearity circuit includes a dynamic bias circuit unit 101 and a radio frequency amplification circuit unit 102.

[0033] The dynamic bias circuit unit 101 is composed of a bias transistor 111 and a bias circuit 103. The external Vg' DC voltage source is connected to the gate of the bias transistor 111 through the bias circuit 103. The drain and source of the bias transistor 111 are short-circuited, and the source of the bias transistor 111 is connected to the input matching network 104.

[0034] The RF amplifier circuit unit 102 is composed of a bias transistor 211, an input matching circuit 104 and an output matching circuit 105; an external Vg DC voltage source is connected to the gate of the bias transistor 211 through the input matching network 104; an external Vd DC voltage source is connected to the drain of the bias transistor 211 through the output matching network 105; and the source of the bias transistor 211 is grounded.

[0035] The input signal RFin passes through the input matching network 104, the bias transistor 211, and the output matching network 105 in sequence to amplify the output signal RFout.

[0036] See also Figure 2The dynamic bias circuit unit 101 is composed of a transistor 111 and a bias circuit 103; a first inductor 321, a second inductor 322, a first capacitor 331 and a first resistor 341 constitute a bias circuit 103, an external Vg' DC voltage source is connected to the gate of the transistor 111 through the bias circuit 103; the drain of the transistor 111 is short-circuited with the source of the transistor 111; the source of the transistor 111 is connected to the input matching network 104 at an appropriate position.

[0037] The RF amplifier circuit unit 102 is composed of a transistor 211, an input matching circuit 104 and an output matching circuit 105; the first inductor 421, the second inductor 422, the third inductor 423, the first capacitor 431, the second capacitor 432 and the first resistor 441 constitute an input matching network 104, and an external Vg DC voltage source is connected to the gate of the transistor 211 through the input matching network 104; the first inductor 521, the second inductor 522, the third inductor 523, the first capacitor 531 and the second capacitor 532 constitute an output matching network 105, and an external Vd DC voltage source is connected to the drain of the transistor 211 through the output matching network 105; the source of the transistor 211 is appropriately grounded.

[0038] The main function of the RF amplifier circuit unit 102 is to amplify the RF signal. The input signal RFin passes through the input matching network 104, the transistor 211, and the output matching network 105 in sequence to amplify the output signal RFout.

[0039] In this embodiment, transistor 1 111 and transistor 2 211 are HEMT devices based on GaAs or GaN technology, or other microwave power transistor devices, and the number is one or more, determined according to the output power value and transistor power density.

[0040] The working principle of the present invention is as follows: when the amplifier is working, as the injected power increases, the power gain first maintains a stable value and then gradually decreases. This process is called gain compression. When the linearizer is working, as the injected power increases, the power gain gradually increases from a stable value. After adding the linearizer, the total gain of the amplifier and the linearizer will undergo a gain expansion process, thereby improving the linearity of the amplifier. The present invention utilizes the diode characteristics of the HEMT device to design a dynamic bias circuit controlled by the bias voltage difference.

[0041] like Figure 3As shown, in the present invention, both transistor one and transistor two have diode characteristics, and their capacitances are C'gs and Cgs respectively. When the input signal gradually increases, the nonlinear C'gs can compensate for Cgs, thereby improving the linearity of the output signal. When the input signal power is relatively small, the first bias transistor can be equivalent to a large resistor, and the performance of the second bias transistor is basically unchanged compared to when there is no first bias transistor, and the second bias transistor is in a linear working state; when the injected signal changes from small to large, that is, the second bias transistor gradually saturates, the first bias transistor gradually compensates for the phase and amplitude of the nonlinear distortion, and the AM-AM and AM-PM characteristics of the second bias transistor are optimized. In this process, the linearity of the signal will be better than when there is no first bias transistor.

[0042] This embodiment is based on the development of a GaAs power amplifier with an operating frequency of 19 GHz-21 GHz and a saturated output power of 24 dBm, and further describes in detail a high-efficiency and high-linearity circuit structure based on dynamic bias proposed by the present invention.

[0043] like Figure 4 As shown in the structural block diagram, the power amplifier of this embodiment can be divided into a radio frequency amplification circuit unit and a dynamic bias circuit unit. The radio frequency amplification circuit unit is designed with a matching network according to the required electrical performance, and is a three-stage amplification topology with an independent gate bias network and a drain bias network. The radio frequency signal can still be amplified without a dynamic bias circuit unit; this embodiment includes two dynamic bias circuit units, each of which is composed of a bias transistor and a bias circuit 1, and the two bias circuits 1 are connected in parallel and connected to a Vg DC voltage source.

[0044] In order to further illustrate the embodiments of the present invention, Figure 5 This is a partial circuit schematic diagram of an embodiment, and the circuit topology structure specifically shown includes a dynamic bias circuit unit, an interstage matching network 2 of the radio frequency amplifier circuit unit, a third-stage transistor, and a gate bias network. The gate bias network is composed of an independent gate bias circuit structure, and each gate bias circuit supplies power to each stage of the transistor. Both the third-stage transistor and the bias transistor use HEMT devices. The gate of the third-stage transistor is connected to the interstage matching network 2; the drain of the third-stage transistor is connected to the output matching network; the source of the third-stage transistor is grounded at a suitable position. The external Vg DC voltage source is divided and connected to the gate of the bias transistor through the bias circuit 1; the drain of the bias transistor is short-circuited with the source of the bias transistor; the source of the bias transistor is connected to the interstage matching network 2 at a suitable position.

[0045] The working process of the embodiment is analyzed as follows: as the RF power increases, under the action of the bias transistor, the third-stage transistor gradually changes from a relatively linear bias state to a bias state of Vd and Vg, so that the power and efficiency performance of the amplifier in the saturation state are almost the same as when there is no dynamic bias; and when the amplifier retreats from the saturation state, due to the change in bias, the change in linearity will be faster than the decrease in efficiency, thereby improving the efficiency and linearity performance of the amplifier when retreating.

[0046] The operating frequency, bandwidth, power, efficiency, linearity, consistency, and yield are comprehensively considered and manufactured with appropriate semiconductor technology, using GaAs or GaN materials as a substrate, but not limited to this.

[0047] The above are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should be regarded as the protection scope of the present invention.

Claims

1. A high efficiency and high linearity circuit for adaptive nonlinear compensation, characterized in that: The high-efficiency and high-linearity circuit includes a dynamic bias circuit unit and a radio frequency amplification circuit unit; The dynamic bias circuit unit is composed of a first bias transistor and a first bias circuit, an external Vg' DC voltage source is connected to the gate of the first bias transistor through the first bias circuit, the drain and source of the first bias transistor are short-circuited, and the source of the first bias transistor is connected to the input matching network; The radio frequency amplification circuit unit is composed of a second bias transistor, an input matching circuit and an output matching circuit; an external Vg DC voltage source is connected to the gate of the second bias transistor through the input matching network; The external Vd DC voltage source is connected to the drain of the second bias transistor through the output matching network; the source of the second bias transistor is grounded; The input signal RFin passes through the input matching network, the second bias transistor, and the output matching network in sequence to amplify the output signal RFout.

2. The high efficiency and high linearity circuit of adaptive nonlinear compensation according to claim 1, characterized in that: The first bias transistor and the second bias transistor are HEMT devices based on GaAs or GaN technology, or other microwave power transistor devices, and the number is one or more, determined according to the output power value and transistor power density.

3. The high efficiency and high linearity circuit of adaptive nonlinear compensation according to claim 1, characterized in that: The first bias circuit includes a first inductor, a second inductor, a first capacitor and a first resistor; The first inductor, the second inductor and the first resistor are connected in sequence, and the end of the first resistor not connected to the second inductor is connected to the external Vg' DC voltage source; the end of the first inductor not connected to the first inductor is connected to the gate of the first bias transistor; one end of the first capacitor is connected to the connection point between the first inductor and the second inductor, and the other end is grounded.

4. The high efficiency and high linearity circuit of adaptive nonlinear compensation according to claim 1, characterized in that: The input matching network includes a first inductor, a second inductor, a third inductor, a first capacitor, a second capacitor and a first resistor; The first inductor, the first capacitor and the second inductor are connected in sequence; the first end of the second inductor adjacent to the first capacitor is connected to an external Vg DC voltage source through a third inductor and a first resistor in sequence; the second end of the second inductor away from the first capacitor is respectively connected to the gate of the second bias transistor and the source of the first bias transistor; one end of the first inductor away from the first capacitor is connected to the input signal RFin; one end of the second capacitor is connected to the connection point of the third inductor and the first resistor, and the other end is grounded.

5. The high efficiency and high linearity circuit of adaptive nonlinear compensation according to claim 1, characterized in that: The output matching network includes a first inductor, a second inductor, a third inductor, a first capacitor and a second capacitor; The first inductor, the second capacitor and the third inductor are connected in sequence; one end of the first inductor away from the second capacitor is connected to the drain of the second bias transistor, and one end of the third inductor away from the second capacitor is connected to the output signal terminal; One end of the second inductor is connected to the connection point between the first inductor and the second capacitor, and the other end is connected to an external Vd DC voltage source; One end of the first capacitor is connected to an external Vd DC voltage source, and the other end is grounded.

6. A radio frequency amplifier with adaptive nonlinear compensation, characterized in that: The radio frequency amplifier includes an input matching network, a first transistor, a first inter-stage matching network, a second transistor, a second inter-stage matching network, a third transistor, an output matching network, a first gate bias network, a second gate bias network, a first dynamic bias circuit unit, and a second dynamic bias circuit unit; The input matching network, the first transistor, the first inter-stage matching network, the second transistor, and the second inter-stage matching network are connected in sequence; the gate of the third-stage transistor is connected to the second inter-stage matching network, the drain of the third-stage transistor is connected to the output matching network, and the source of the third-stage transistor is grounded; The external Vg DC voltage source is respectively connected to the input matching network, the first interstage matching network, the second interstage matching network, the first dynamic bias circuit unit and the second dynamic bias circuit unit through the first gate bias network; the external Vd DC voltage source is respectively connected to the first interstage matching network, the second interstage matching network and the output matching network through the second gate bias network; The first dynamic bias circuit unit and the second dynamic bias circuit unit both include a first bias circuit and a bias transistor; an external Vg DC voltage source is divided and connected to the gate of the bias transistor through the first bias circuit; the drain of the bias transistor is short-circuited with the source of the bias transistor; The source of the bias transistor is connected to the second inter-stage matching network; The first gate bias network and the second gate bias network are both composed of independent gate bias circuit structures, and each stage of the gate bias circuit supplies power to each stage of the transistor.

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