Baud rate adjustment method and device, electronic equipment and storage medium

Abstract

The invention discloses a baud rate adjustment method and device, electronic equipment and a storage medium. The method comprises the following steps: acquiring pulse widths of adjacent edges in a synchronous byte field of an input signal in sequence through a universal input / output interface; and adjusting an initial baud rate according to the collected pulse widths to obtain a target baud rate. According to the Baud rate adjusting method provided by the embodiment of the invention, the Baud rate can be adaptively adjusted, and the reliability of communication by adopting an LIN communication protocol is improved.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a baud rate adjustment method, device, electronic device and storage medium. Background Art

[0002] In the implementation of the LIN (Local Interconnect Network) communication protocol, it is generally required that the baud rate error between the receiving end and the sending end must meet the requirements before communication to ensure that the communication between the two parties can proceed normally. To this end, in the related technology, baud rates close to each other can be set in advance for the communicating parties. However, if the receiving end is unknown to the sending end's baud rate, the baud rate of the receiving end cannot be adjusted, which affects the normal communication between the receiving end and the sending end. Summary of the invention

[0003] In view of the above problems, the present application provides a baud rate adjustment method, device, electronic device and storage medium, which can adaptively adjust the baud rate and improve the reliability of communication using the LIN communication protocol.

[0004] In a first aspect, the present application provides a baud rate adjustment method, comprising: sequentially collecting the pulse widths of adjacent edges in a synchronization byte field of an input signal through a general input / output interface; adjusting the initial baud rate according to each of the collected pulse widths to obtain a target baud rate.

[0005] In the technical solution of the embodiment of the present application, the pulse widths of adjacent edges in the synchronization byte field of the input signal are collected in sequence through the universal input and output interface, so as to adjust the initial baud rate according to each collected pulse width and obtain the target baud rate, thereby eliminating the need to adjust or add a built-in digital circuit. It is only necessary to detect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input and output interface, and the baud rate used by the input signal at this time can be determined by using the detected pulse width, and then the baud rate is adaptively adjusted according to the baud rate used by the input signal, thereby improving the reliability of communication using the LIN communication protocol. At the same time, the cost of implementing adaptive baud rate adjustment can also be reduced.

[0006] In some embodiments, sequentially collecting the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input / output interface includes: in response to an indication signal indicating that the synchronization interval field of the input signal is received, opening the universal input / output interface, and sequentially collecting the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input / output interface. This can avoid the situation where the edge of the synchronization interval field is misjudged as the edge of the synchronization byte field due to the universal input / output interface receiving the synchronization interval field, thereby improving the accuracy of subsequent baud rate adjustment.

[0007] In some embodiments, in response to an indication signal indicating that the synchronization interval field of the input signal is received, the universal input / output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the universal input / output interface, including: in response to an indication signal indicating that a target edge of the input signal is received, the universal input / output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the universal input / output interface; wherein the target edge is a rising edge of the input signal that is spaced by a preset bit from the previous edge. This improves the reliability of the pulse widths of adjacent edges in the synchronization byte field of the input signal subsequently collected through the universal input / output interface.

[0008] In some embodiments, it is determined that the number of collected pulse widths reaches a preset number, and the initial baud rate is adjusted based on each of the collected pulse widths to determine the target baud rate before completing the reception of the synchronization byte field; wherein the preset number is negatively correlated with the reception speed of the synchronization byte field, so that the baud rate adjustment can be completed before receiving the identifier field, so that subsequent data can be received normally.

[0009] In some embodiments, adjusting the initial baud rate according to the collected pulse widths includes: filtering out abnormal pulse widths from the collected pulse widths to obtain target pulse widths; and adjusting the initial baud rate according to the target pulse widths. This can reduce the mismatch between the adjusted baud rate and the baud rate of the transmitting end that sends the input signal, improve the accuracy of the adjusted baud rate, and reduce the possibility of failing to receive the input signal normally.

[0010] In some embodiments, abnormal pulse widths are screened out for each of the collected pulse widths to obtain each target pulse width, including: obtaining each of the target pulse widths except the first pulse width from each of the collected pulse widths, thereby avoiding the influence of the pulse width corresponding to the start bit of the synchronization byte field on the baud rate calculation result, thereby improving the accuracy of the adjusted baud rate.

[0011] In some embodiments, the method further includes: in response to a prompt signal indicating completion of reception of the synchronization byte field, loading the target baud rate, thereby avoiding judging a certain edge in the synchronization byte field as the start bit of the next field, resulting in failure of normal signal transmission, thereby enabling normal data reception after loading the target baud rate.

[0012] In some embodiments, the initial baud rate is greater than or equal to 20 kbps.

[0013] In the second aspect, the present application provides a baud rate adjustment device, including: a pulse width acquisition module, used to sequentially collect the pulse widths of adjacent edges in the synchronization byte field of the input signal through a general input and output interface; a baud rate adjustment module, used to adjust the initial baud rate according to the collected pulse widths to obtain the target baud rate.

[0014] In the technical solution of the embodiment of the present application, the pulse widths of adjacent edges in the synchronization byte field of the input signal are collected in sequence through a universal input / output interface, so that the initial baud rate is adjusted according to the collected pulse widths to obtain the target baud rate. Therefore, there is no need to adjust or add a built-in digital circuit. It is only necessary to detect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input / output interface. The detected pulse width can be used to determine the baud rate used by the input signal at this time, and then the baud rate can be adaptively adjusted according to the baud rate used by the input signal, thereby improving the reliability of communication using the LIN communication protocol.

[0015] In a third aspect, the present application provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the method in the implementation of the first aspect when executing the computer program.

[0016] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, performs the method in the implementation of the first aspect.

[0017] In a fifth aspect, the present application provides a computer program product, which, when running on a computer, enables the computer to execute the method in the first aspect or any optional implementation manner of the first aspect.

[0018] In a sixth aspect, the present application provides a battery management system, including the electronic device described in the third aspect.

[0019] In the seventh aspect, the application provides an electrical device, including the battery management system described in the sixth aspect.

[0020] In the eighth aspect, the application provides an electrical device, including the battery management system described in the sixth aspect, or the electrical device described in the seventh aspect.

[0021] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Moreover, the same reference numerals are used throughout the drawings to represent the same components. In the drawings: Figure 1 A first flow chart of a baud rate adjustment method according to some embodiments of the present application; Figure 2 This is a schematic diagram of LIN communication in some embodiments of the present application; Figure 3 A schematic diagram of a frame header of an input signal according to some embodiments of the present application; Figure 4 A schematic diagram of a synchronization byte field in some embodiments of the present application; Figure 5 A schematic diagram of a synchronization interval field in some embodiments of the present application; Figure 6 A second flow chart of the baud rate adjustment method according to some embodiments of the present application; Figure 7 A schematic diagram of the structure of a baud rate adjustment device in some embodiments of the present application; Figure 8 This is a schematic diagram of the structure of an electronic device according to some embodiments of the present application.

[0023] Some of the reference numerals in the specific implementation manner are as follows: 200 - pulse width acquisition module; 201 - baud rate adjustment module; 300 - electronic device; 301 - processor; 302 - memory; 303 - communication bus. DETAILED DESCRIPTION

[0024] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0026] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0027] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0028] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0029] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0030] In the implementation of the LIN (Local Interconnect Network) communication protocol, it is generally required that the baud rate error between the receiving end and the transmitting end must meet the requirements before communication to ensure that the communication between the two parties can proceed normally. For example, in LIN2.0, the baud rate error between the receiving end and the transmitting end is required to be between 1% and 14%. To this end, in the related technology, baud rates close to each other can be set in advance for the communicating parties so that the communicating parties can communicate normally. However, if the transmitting end has set the corresponding baud rate, but the receiving end is unknown to the baud rate set for the transmitting end, the baud rate of the receiving end cannot be adjusted at this time, resulting in affecting the normal communication between the receiving end and the transmitting end.

[0031] To this end, the baud rate of the receiving end can be adaptively adjusted through the digital hardware circuit for baud rate adaptive adjustment built into the LIN transceiver chip of the receiving end. However, this method requires a built-in digital hardware circuit, and if the digital hardware circuit is not built-in, or the digital hardware circuit is not compatible with the version of the LIN communication protocol, the baud rate of the receiving end cannot be adaptively adjusted, which affects the normal communication between the receiving end and the sending end.

[0032] In response to the above technical problems, an embodiment of the present application provides a baud rate adjustment method. This method sequentially collects the pulse widths of adjacent edges in the synchronization byte field of an input signal through a universal input / output interface, and adjusts the initial baud rate according to the collected pulse widths to obtain a target baud rate. Thus, there is no need to adjust or add a built-in digital circuit. It is only necessary to detect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input / output interface. The detected pulse width can be used to determine the baud rate used by the input signal at this time, and then the baud rate can be adaptively adjusted according to the baud rate used by the input signal, thereby improving the reliability of communication using the LIN communication protocol.

[0033] The baud rate adjustment method, device, electronic device and storage medium disclosed in the embodiments of the present application can be applied to electronic devices to adjust the baud rate of the electronic devices. The electronic devices may include a LIN transceiver chip, which is an integrated circuit for a local interconnect network communication protocol, and is used to implement data transmission and reception on a LIN bus.

[0034] According to some embodiments of the present application, the present application provides a baud rate adjustment method, which can be applied to the aforementioned electronic device to adjust the baud rate of the electronic device. Figure 1 As shown, the baud rate adjustment method includes: S101, sequentially collecting pulse widths of adjacent edges in a synchronization byte field of an input signal through a general input / output interface; S102, adjusting the initial baud rate according to the collected pulse widths to obtain a target baud rate.

[0035] In some embodiments, the electronic device may be provided with a universal input / output interface capable of edge detection, and the universal input / output interface may be connected to a pin of a receiving end of the electronic device to collect a synchronization byte field of an input signal received by the receiving end of the electronic device.

[0036] For example, Figure 2As shown, the electronic device may be a receiving terminal A, which communicates with a transmitting terminal B that sends an input signal using the LIN transmission protocol. Since the signal level of the LIN transmission protocol is required to be above 12V, the signal level may not be directly connected to the pin of the receiving terminal. Therefore, a LINPHY_CTRL converter may be used between the receiving terminal A and the transmitting terminal B for communication to convert the 12V signal level into a voltage of 5V or 3.3V that can be connected to the pin of the receiving terminal A. After passing through the LINPHY_CTRL converter, the single LIN bus becomes two signal lines, which are respectively connected to the output terminal TX and the receiving terminal RX of the receiving terminal A, so that the receiving terminal A can send an output signal to the transmitting terminal B through the output terminal TX, and receive the input signal sent by the transmitting terminal B through the receiving terminal RX. The general input and output port GPIO of the receiving terminal A is connected to the input terminal RX of the receiving terminal A for receiving input signals, so as to obtain the input signal on the input terminal RX.

[0037] Since the receiving end A and the transmitting end B use the LIN transmission protocol to communicate, the input signal received by the receiving end A from the transmitting end B includes a LIN protocol frame. For the LIN protocol frame, its frame header includes a synchronization interval field, a synchronization byte field, and an identifier field, such as Figure 3 As shown. For the synchronous byte field in the input signal, it is usually a level signal of 0x55, which corresponds to 8 high and low levels with completely equal pulse widths, such as Figure 4 As shown, its pulse width may correspond to the baud rate set by the transmitter B. To this end, the edges of the synchronization byte field of the input signal may be detected in sequence through the general input and output interface to generate a capture of the timing value at each edge of the synchronization byte field, so as to determine the pulse width of the adjacent edges in the synchronization byte field according to the timing value of the adjacent edges, thereby sequentially collecting the pulse widths of the adjacent edges in the synchronization byte field.

[0038] For example, Figure 4 As shown, through the universal input and output interface, the timing value is captured starting from the start bit of the synchronization byte field. At this time, the first timing value will be captured at the falling edge starting from the start bit of the synchronization byte field, assuming that it is buff1; the second timing value will be captured at the rising edge ending at the start bit of the synchronization byte field, assuming that it is buff2. At this time, the first pulse width of the synchronization byte field can be collected based on buff2 and buff1. Similarly, the third timing value will be captured at the next falling edge of the synchronization byte field, assuming that it is buff3. At this time, the second pulse width of the synchronization byte field can be collected based on buff3 and buff2. By analogy, the pulse widths of adjacent edges in the synchronization byte field of the input signal can be collected in sequence.

[0039] After collecting multiple pulse widths, the initial baud rate of the receiving end A, that is, the electronic device, can be adjusted according to the collected pulse widths to determine the adjusted initial baud rate as the target baud rate of the electronic device. The initial baud rate refers to the baud rate loaded by the electronic device before receiving the current input signal.

[0040] Exemplarily, the target pulse width that appears most frequently among all pulse widths can be obtained to adjust the initial baud rate to the baud rate calculated by the target pulse width, and the adjusted initial baud rate is the target baud rate; alternatively, the average pulse width of each pulse width can be calculated to adjust the initial baud rate to the baud rate calculated by the average pulse width, and the adjusted initial baud rate is the target baud rate.

[0041] In order to make all baud rates that comply with the LIN communication protocol, such as the LIN2.0 communication protocol, detectable, in some embodiments, the initial baud rate is greater than or equal to 20 kbps. Since the baud rate operating range specified in the LIN2.0 communication protocol is required to be between 1 and 20 kbps, the initial baud rate is set to be greater than or equal to 20 kbps, so that the synchronization interval field formed by all baud rates below 20 kbps can always be detected, thereby making all baud rates that comply with the LIN2.0 communication protocol detectable.

[0042] After the target baud rate is obtained, the target baud rate can be loaded, and the data receiving function of the input terminal RX can be turned on, so that the input signal can be received through the input terminal RX for signal processing. At the same time, the universal input and output interface can be reset, so that after the signal frame reception of the current input signal is completed, the universal input and output interface can be reopened to collect the pulse width of the adjacent edges in the synchronization byte field of the new input signal, so as to readjust the baud rate of the electronic device, thereby realizing the adaptive adjustment of the baud rate.

[0043] Through the universal input and output interface, the pulse widths of adjacent edges in the synchronization byte field of the input signal are collected in sequence, and the initial baud rate is adjusted according to the collected pulse widths to obtain the target baud rate, so there is no need to adjust or add a built-in digital circuit. It is only necessary to detect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input and output interface, and the baud rate used by the input signal at this time can be determined by using the detected pulse width, and then the baud rate is adaptively adjusted according to the baud rate used by the input signal, thereby improving the reliability of communication using the LIN communication protocol. At the same time, the cost of implementing the adaptive baud rate adjustment can also be reduced.

[0044] In order to improve the accuracy of baud rate adjustment, in some embodiments, the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through a universal input-output interface, including: in response to an indication signal indicating that the synchronization interval field of the input signal is received, the universal input-output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the universal input-output interface.

[0045] Since the pulse width of the adjacent edges in the synchronization interval field of the input signal cannot represent the baud rate of the transmitting end B that sends the input signal, in order to avoid the universal input and output interface receiving the synchronization interval field, resulting in the edge of the synchronization interval field being misjudged as the edge of the synchronization byte field, affecting the accuracy of the subsequent baud rate adjustment, in some embodiments, before receiving the input signal, the electronic device can first close the universal input and output interface and open the input end RX to detect whether the input signal is received. Since the transmission of the synchronization interval field is before the synchronization byte field, the synchronization interval field will be detected first when the input signal is received. If the synchronization interval field is detected, it means that there is a transmission of the input signal on the LIN bus, so that when the synchronization interval field is confirmed to be received, an indication signal indicating that the synchronization interval field of the input signal is received is generated, and in response to the indication signal, the universal input and output interface is opened, and the synchronization byte field of the input signal can be received through the universal input and output interface at this time, so that the pulse width of the adjacent edges in the synchronization byte field of the input signal can be collected in sequence through the universal input and output interface. When the universal input and output interface is opened, the input end RX can be closed.

[0046] By responding to an indication signal indicating that a synchronization interval field of an input signal has been received, the general input / output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the general input / output interface, thereby avoiding the situation where the edge of the synchronization interval field is misjudged as the edge of the synchronization byte field due to the general input / output interface receiving the synchronization interval field, thereby improving the accuracy of subsequent baud rate adjustment.

[0047] In order to more accurately determine whether the synchronization interval field of the input signal is received, in some embodiments, in response to an indication signal indicating that the synchronization interval field of the input signal is received, the general input and output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the general input and output interface, including: In response to receiving an indication signal of a target edge of the input signal, the general purpose input / output interface is turned on, and pulse widths of adjacent edges in a synchronization byte field of the input signal are sequentially collected through the general purpose input / output interface; The target edge is a rising edge in the input signal that is separated from the previous edge by a preset bit position.

[0048] In some embodiments, the synchronization interval field includes a falling edge indicating a start bit and a rising edge indicating a stop bit. Based on the provisions of the LIN communication protocol, the low level in the synchronization interval field should not be less than a certain number of bits, that is, a certain number of bits should be spaced between the falling edge and the rising edge of the synchronization interval field. Taking LIN2.0 as an example, the low level in the synchronization interval field should not be less than 13 bits, that is, there should be at least 13 bits between the falling edge indicating the start bit and the rising edge indicating the stop bit. Figure 5 shown.

[0049] Based on this, before receiving an input signal, the electronic device can first close the universal input / output interface and open the input terminal RX to detect whether the input signal is received. If the input signal is detected, it can be determined whether the interval between the rising edge received at this time and the previous edge reaches the preset bit position. If the preset bit position is reached, it means that the received rising edge is the stop bit of the synchronization interval field. At this time, the rising edge can be determined as the target edge of the input signal, and an indication signal of the target edge of the received input signal is generated. In response to the indication signal, the universal input / output interface is turned on. At this time, the synchronization byte field of the input signal can be received through the universal input / output interface, so that the pulse widths of adjacent edges in the synchronization byte field of the input signal can be collected in sequence through the universal input / output interface.

[0050] Exemplarily, taking LIN2.0 as the LIN communication protocol, the preset bit position is 13 bits. When receiving the input signal, if a low level of not less than 13 bits is detected, a rising edge is received to confirm that the synchronization interval field has been received. If the rising edge is received, the rising edge can be determined as the target edge, and an indication signal of the target edge of the received input signal is generated, and the general input and output interface is turned on in response to the indication signal. In this way, the synchronization interval field of the received input signal can be accurately determined by the target edge, thereby improving the reliability of the pulse width of adjacent edges in the synchronization byte field of the input signal subsequently collected through the general input and output interface.

[0051] After each pulse width is collected through the general input and output port, the initial baud rate of the electronic device can be adjusted by each pulse width. Considering that after the synchronization byte field of the input signal, the identifier field of the input signal is received, if the baud rate adjustment is not completed when the identifier field is received, it will affect the normal reception of subsequent data. To this end, in some embodiments, it is determined that the number of pulse widths collected reaches a preset number, and the initial baud rate is adjusted according to each of the collected pulse widths to determine the target baud rate before completing the reception of the synchronization byte field; wherein the preset number is negatively correlated with the reception speed of the synchronization byte field.

[0052] In some embodiments, the preset number of pulse widths required to adjust the initial baud rate can be determined based on the receiving speed of the synchronization byte field. Exemplarily, a test can be conducted in advance to test the maximum number of pulse widths that can be used to adjust the initial baud rate at any receiving speed of the synchronization byte field without affecting the normal reception of the subsequent identifier field, so that the maximum number of pulse widths can be determined as the number of pulse widths corresponding to the receiving speed. In this way, the number of pulse widths corresponding to different receiving speeds can be obtained. The faster the receiving speed, the smaller the corresponding number of pulse widths, so as to ensure that there is enough time to adjust the baud rate before receiving the identifier field.

[0053] After receiving the synchronization byte field of the input signal through the general input and output interface, the number of pulse widths corresponding to the receiving speed can be determined according to the receiving speed of the synchronization byte field, as the preset number of pulse widths for adjusting the initial baud rate. Then, in the process of collecting the pulse widths, it is detected whether the number of collected pulse widths reaches the preset number. If it reaches the preset number, the initial baud rate is adjusted according to each of the collected pulse widths, so as to determine the target baud rate before completing the reception of the synchronization byte field, that is, before receiving the stop bit of the synchronization byte field.

[0054] For example, taking the preset number of 5 pulse widths as an example, assuming that the synchronization byte field is as follows: Figure 4As shown, when collecting the pulse width of the synchronization byte field, the timing value is captured starting from the start bit of the synchronization byte field through the general input and output interface. At this time, the first timing value will be captured at the falling edge starting from the start bit of the synchronization byte field, assuming that it is buff1; the second timing value will be captured at the rising edge ending at the start bit of the synchronization byte field, assuming that it is buff2. At this time, the first pulse width of the synchronization byte field can be collected based on buff2 and buff1, recorded as buff2; the third timing value will be captured at the next falling edge of the synchronization byte field, assuming that it is buff3. At this time, the second pulse width of the synchronization byte field can be collected based on buff3 and buff2, recorded as buff3, that is, the third timing value is captured at the moment when the second pulse width ends. By analogy, when the 7th timing value is captured, the 5th pulse width {buff2, buff3, buff4, buff5, buff6} will be collected. At this time, it can be determined that the number of collected pulse widths reaches the preset number, triggering the baud rate adjustment to adjust the initial baud rate according to the first 5 pulse widths, so as to determine the target baud rate before the capture of the 10th timing value, that is, before receiving the timing value of the stop bit of the synchronization byte field.

[0055] By determining that the number of collected pulse widths reaches a preset number, the baud rate adjustment is triggered. The initial baud rate is adjusted according to the collected pulse widths to determine the target baud rate before completing the reception of the synchronization byte field, so that the baud rate adjustment can be completed before receiving the identifier field, so that subsequent data can be received normally.

[0056] In order to further improve the accuracy of the adjusted baud rate and reduce the possibility of not being able to normally receive the input signal, in some embodiments, the initial baud rate is adjusted according to the collected pulse widths, including: screening out abnormal pulse widths of the collected pulse widths to obtain target pulse widths; and adjusting the initial baud rate according to the target pulse widths.

[0057] Exemplarily, after obtaining each pulse width, the standard deviation of each pulse width can be calculated to determine the abnormal pulse width from each pulse width according to the standard deviation of each pulse width. If the standard deviation of a certain pulse width reaches a threshold, it means that the pulse width is an abnormal pulse width. Alternatively, the variance of each pulse width can be calculated to determine the abnormal pulse width from each pulse width according to the variance of each pulse width. Alternatively, the abnormal pulse width can be screened out from each pulse width by means of an interquartile range or a box plot.

[0058] If there is an abnormal pulse width among the pulse widths, the abnormal pulse width can be screened out, and the remaining pulse widths are determined as target pulse widths, so as to adjust the initial baud rate according to the target pulse widths, thereby reducing the mismatch between the adjusted baud rate and the baud rate of the transmitting end that sends the input signal, improving the accuracy of the adjusted baud rate, and reducing the possibility of failing to receive the input signal normally.

[0059] Considering that in actual use, there is a start bit in the synchronization byte field, and after the start bit are 8 high and low levels with substantially equal pulse widths, and the configuration of the start bit clock in different devices may be different, the abnormal pulse width usually only exists in the start bit of the synchronization byte field. To this end, in some embodiments, the abnormal pulse width is screened out for each of the collected pulse widths to obtain each target pulse width, including: from each of the collected pulse widths, obtaining each of the target pulse widths except the first pulse width.

[0060] Since each pulse width is collected in the order of transmission, each pulse width can be sorted according to the order in which each pulse width is received. At this time, the first pulse width is the pulse width between the falling edge and the rising edge corresponding to the start bit. In actual use, the start bit of the synchronization byte field does not belong to a bit in 0X55. It may be configured as 0.5 clocks, 1 clock or 1.5 clocks in different devices. Therefore, the pulse width corresponding to the start bit has an error with the 8 pulse widths after the start bit. Based on this, the first pulse width, that is, the pulse width corresponding to the start bit, can be screened out as an abnormal pulse width, and the remaining pulse widths can be determined as target pulse widths to adjust the initial baud rate according to each target pulse width.

[0061] Exemplarily, assuming that 5 pulse widths {buff2, buff3, buff4, buff5, buff6} are collected, and the first pulse width buff2 is the pulse width corresponding to the start bit, then buff2 can be screened out as an abnormal pulse width to obtain the remaining 4 target pulse widths {buff3, buff4, buff5, buff6}, and the initial baud rate can be adjusted through these 4 target pulse widths, such as accumulating buff3, buff4, buff5, and buff6 and shifting them right by two places to calculate the average pulse width, so as to adjust the initial baud rate through the average pulse width.

[0062] By obtaining target pulse widths except the first pulse width from the collected pulse widths, the initial baud rate is adjusted according to the target pulse widths, thereby avoiding the influence of the pulse width corresponding to the start bit of the synchronization byte field on the baud rate calculation result, thereby improving the accuracy of the adjusted baud rate.

[0063] After the target baud rate is obtained, the target baud rate can be loaded, and the data receiving function of the input terminal of the electronic device can be turned on, so that the input signal can be received through the input terminal for signal processing. In order to enable the electronic device to receive data normally after loading the target baud rate, in some embodiments, the method further includes: in response to a prompt signal indicating that the synchronization byte field reception is completed, loading the target baud rate.

[0064] Considering that the internal clock of the input end of the electronic device only counts, after the counting is completed, it is considered that the next byte has started. Before the baud rate adjustment, the initial baud rate may not match the baud rate of the sending end that sends the input signal. At this time, the internal clock of the electronic device and the clock of the sending end may not match, that is, the bits of the two may be different. Therefore, if the target baud rate is loaded immediately after obtaining the target baud rate, a certain edge in the synchronization byte field may be judged as the start bit of the next field, resulting in failure of normal signal transmission.

[0065] Based on this, in some embodiments, the edge received by the general input and output interface can be used to detect whether the reception of the synchronization byte field is completed, that is, to detect whether the stop bit of the synchronization byte field is received. If the reception of the synchronization byte field is detected to be completed, a prompt signal indicating the completion of the reception of the synchronization byte field is generated, and in response to the prompt signal, the target baud rate is loaded, so that after the loading of the target baud rate is completed, the input terminal RX is opened for data reception.

[0066] For example, assuming that the LIN communication protocol is LIN2.0, the synchronization byte field in LIN2.0 is a level signal of 0x55, corresponding to a start bit, a stop bit, and 8 high and low levels with substantially equal pulse widths, such as Figure 4 As shown. Through the general input and output interface, the timing value is captured starting from the start bit of the synchronization byte field. At this time, the 10th timing value captured is the stop bit of the synchronization byte field. Therefore, when the 10th timing value captured through the general input and output interface is detected, it can be determined that the reception of the synchronization byte field is completed. At this time, a prompt signal can be generated, and in response to the prompt signal, the target baud rate is loaded.

[0067] By responding to the prompt signal indicating that the reception of the synchronization byte field is completed, the target baud rate is loaded, and then the target baud rate is loaded after the reception of the synchronization byte field is completed, so as to avoid judging a certain edge in the synchronization byte field as the start bit of the next field, resulting in the inability to perform normal signal transmission, thereby enabling normal data reception after loading the target baud rate.

[0068] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution in the present application will be described clearly and completely below. In some embodiments, Figure 6 As shown, the bit rate adjustment method includes: S201, in response to receiving an indication signal of a target edge of an input signal, a universal input / output interface is enabled, and pulse widths of adjacent edges in a synchronization byte field of the input signal are sequentially collected through the universal input / output interface, wherein the target edge is a rising edge in the input signal that is separated from the previous edge by a preset bit.

[0069] S202, determining whether the number of pulse widths collected reaches a preset number, if so, executing S203. The preset number is negatively correlated with the receiving speed of the synchronization byte field.

[0070] S203, acquiring target pulse widths except the first pulse width from the collected pulse widths.

[0071] S204, adjusting the initial baud rate according to each target pulse width to determine the target baud rate before completing the reception of the synchronization byte field, wherein the initial baud rate is greater than or equal to 20 kbps.

[0072] S205, in response to a prompt signal indicating completion of receiving the synchronization byte field, loading a target baud rate.

[0073] Figure 7 The present application provides a schematic diagram of the structure of a baud rate adjustment device. It should be understood that the device and Figure 1 Corresponding to the method embodiment executed in, the steps involved in the aforementioned method can be executed. The specific functions of the device can be found in the description above. To avoid repetition, the detailed description is appropriately omitted here. The device includes at least one software function module that can be stored in a memory in the form of software or firmware or solidified in the operating system (OS) of the device. Specifically, the device is used to adjust the baud rate of an electronic device. The device includes: a pulse width acquisition module 200, which is used to sequentially collect the pulse widths of adjacent edges in the synchronization byte field of an input signal through a general input and output interface; a baud rate adjustment module 201, which is used to adjust the initial baud rate according to each of the collected pulse widths to obtain a target baud rate.

[0074] In the technical solution of the embodiment of the present application, the pulse widths of adjacent edges in the synchronization byte field of the input signal are collected in sequence through a universal input / output interface, so that the initial baud rate is adjusted according to the collected pulse widths to obtain the target baud rate. Therefore, there is no need to adjust or add a built-in digital circuit. It is only necessary to detect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the universal input / output interface. The detected pulse width can be used to determine the baud rate used by the input signal at this time, and then the baud rate can be adaptively adjusted according to the baud rate used by the input signal, thereby improving the reliability of communication using the LIN communication protocol.

[0075] According to some embodiments of the present application, the pulse width acquisition module 200 is specifically used to: in response to an indication signal indicating that the synchronization interval field of the input signal is received, turn on the general input and output interface, and sequentially collect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the general input and output interface.

[0076] According to some embodiments of the present application, the pulse width acquisition module 200 is specifically used to: in response to receiving an indication signal of a target edge of the input signal, turn on the general input / output interface, and sequentially collect the pulse widths of adjacent edges in the synchronization byte field of the input signal through the general input / output interface; wherein the target edge is a rising edge in the input signal that is separated from the previous edge by a preset bit position.

[0077] According to some embodiments of the present application, the baud rate adjustment module 201 is specifically used to: determine that the number of collected pulse widths reaches a preset number, and adjust the initial baud rate based on each of the collected pulse widths to determine the target baud rate before completing the reception of the synchronization byte field; wherein the preset number is negatively correlated with the reception speed of the synchronization byte field.

[0078] According to some embodiments of the present application, the baud rate adjustment module 201 is specifically used to: screen out abnormal pulse widths of the collected pulse widths to obtain target pulse widths; and adjust the initial baud rate according to the target pulse widths.

[0079] According to some embodiments of the present application, the baud rate adjustment module 201 is specifically used to: obtain the target pulse widths except the first pulse width from the collected pulse widths.

[0080] According to some embodiments of the present application, the baud rate adjustment module 201 is further used to: load the target baud rate in response to a prompt signal indicating completion of receiving the synchronization byte field.

[0081] According to some embodiments of the present application, the initial baud rate is greater than or equal to 20 kbps.

[0082] According to some embodiments of the present application, Figure 8 As shown, the present application provides an electronic device 300, including: a processor 301 and a memory 302, the processor 301 and the memory 302 are interconnected and communicate with each other through a communication bus 303 and / or other forms of connection mechanisms (not marked), the memory 302 stores a computer program executable by the processor 301, and when the computing device is running, the processor 301 executes the computer program to execute a method executed by an external terminal in any optional implementation method, for example: through a general input and output interface, the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected; according to each of the collected pulse widths, the initial baud rate is adjusted to obtain the target baud rate.

[0083] The present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method in any of the aforementioned optional implementations is executed.

[0084] Among them, the storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable red-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.

[0085] The present application provides a computer program product. When the computer program product is run on a computer, the computer is enabled to execute the method in any optional implementation manner.

[0086] The present application provides a battery management system, which includes the electronic device in the above embodiment.

[0087] The present application provides a battery device, which includes the electronic device or the battery management system as described in the above embodiments.

[0088] The present application provides an electric device, which may be an electric device such as a vehicle, a ship or an aircraft, etc. The electric device includes a battery management system as in the above embodiment, or a battery device as in the above embodiment.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should all be included in the scope of the claims and specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A baud rate adjustment method, characterized in that: include: The pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the general input and output interface; The initial baud rate is adjusted according to the collected pulse widths to obtain the target baud rate.

2. The method according to claim 1, characterized in that The method sequentially collects the pulse widths of adjacent edges in the synchronization byte field of the input signal through the general input and output interface, including: In response to an indication signal indicating that the synchronization interval field of the input signal is received, the universal input and output interface is turned on, and the pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the universal input and output interface.

3. The method according to claim 2, characterized in that In response to an indication signal indicating that a synchronization interval field of the input signal is received, the general input and output interface is turned on, and pulse widths of adjacent edges in the synchronization byte field of the input signal are sequentially collected through the general input and output interface, including: In response to receiving an indication signal of a target edge of the input signal, the general purpose input / output interface is turned on, and pulse widths of adjacent edges in a synchronization byte field of the input signal are sequentially collected through the general purpose input / output interface; The target edge is a rising edge in the input signal that is separated from the previous edge by a preset bit position.

4. The method according to claim 1, characterized in that: According to the collected pulse widths, the initial baud rate is adjusted to obtain the target baud rate, including: Determining that the number of the collected pulse widths reaches a preset number, and adjusting the initial baud rate according to each of the collected pulse widths to determine the target baud rate before completing the reception of the synchronization byte field; The preset number is negatively correlated with a receiving speed of the synchronization byte field.

5. The method according to claim 1 or 4, characterized in that: Adjusting the initial baud rate according to the collected pulse widths includes: Screening out abnormal pulse widths for each of the collected pulse widths to obtain each target pulse width; The initial baud rate is adjusted according to each of the target pulse widths.

6. The method according to claim 5, characterized in that The abnormal pulse widths are screened out for the collected pulse widths to obtain target pulse widths, including: From the collected pulse widths, the target pulse widths except the first pulse width are obtained.

7. The method according to any one of claims 1 to 4 or 6, characterized in that: The method further comprises: The target baud rate is loaded in response to a prompt signal indicating completion of reception of the sync byte field.

8. The method according to any one of claims 1 to 4 or 6, characterized in that: The initial baud rate is greater than or equal to 20 kbps.

9. A baud rate adjustment device, characterized in that: include: A pulse width acquisition module, used for sequentially acquiring pulse widths of adjacent edges in a synchronization byte field of an input signal through a general input / output interface; The baud rate adjustment module is used to adjust the initial baud rate according to the collected pulse widths to obtain a target baud rate.

10. An electronic device comprising a processor and a memory storing a computer program, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 8 is implemented.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

12. A battery management system, characterized in that: Comprising the electronic device as claimed in claim 10.

13. A battery device, characterized in that: Comprising the battery management system as claimed in claim 12.

14. An electrical device, characterized in that: It comprises the battery management system as claimed in claim 12, or the battery device as claimed in claim 13.

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