UPS (Uninterrupted Power Supply) rapid phase locking method, device and equipment and storage medium

Abstract

The invention relates to the technical field of voltage tracking, in particular to a UPS rapid phase locking method, device and equipment and a storage medium, and the method comprises the steps: obtaining the output voltage information and output frequency of a UPS and the bypass voltage information and bypass frequency of a bypass, and determining an initial tracking step length based on the obtained output frequency; whether the output frequency is consistent with the bypass frequency is judged, if yes, output sine and cosine information is confirmed based on the output voltage information, and bypass sine and cosine information is confirmed based on the bypass voltage information; calculating a phase difference based on the output sine and cosine information and the bypass sine and cosine information; taking an absolute value of the calculated phase difference and inputting the absolute value into a PI controller to obtain an adjustment tracking step length; calculating an inversion tracking step length based on the adjustment tracking step length and the initial tracking step length; according to the method disclosed by the invention, the phase difference of each switching period of the UPS can be calculated, the inversion tracking step length is adjusted according to the real-time phase difference, and the method has the advantages of high adjustment speed and short phase locking time.

Description

Technical Field

[0001] The present invention relates to the field of voltage tracking technology, and in particular to a UPS fast phase locking method, device, equipment and storage medium. Background Art

[0002] With the growing demand for UPS products, especially in terms of reliability, expansion / redundancy and ease of maintenance, UPS modular parallel technology has become the main trend in the development of UPS power technology. In modular UPS systems, the parallel connection technology between modules is its core, which ensures the consistency of output voltages of different modules, the stability of system operation, and the balance of instantaneous output power of each module during transient load switching, thereby avoiding system failures such as overload or current limiting caused by excessive instantaneous power of a single module. Currently, industry standards stipulate that the load imbalance when modules are connected in parallel should be less than 5%.

[0003] The mathematical expression of alternating current (AC) is represented by trigonometric functions consisting of amplitude, frequency, and phase. The UPS sampling circuit can collect AC voltage values ​​in real time, and then calculate the effective value, peak value, and frequency of the AC power using software. However, accurately obtaining the specific phase value of the AC power is more complex because the AC voltage value changes over time. In the single-phase case, the exact phase cannot be obtained simply by calculating a real-time value; the phase can only be determined after calculating the peak value within the AC cycle. In addition, there are errors in the sampling itself, so the accuracy of the phase calculated using the above method is not high.

[0004] In fact, in the phase-locked algorithm, it is not necessary to accurately know the actual phase values ​​of the two alternating currents. It is only necessary to understand the phase difference between them to perform phase tracking and locking. Therefore, in conventional phase-locked control, people usually do not bother to calculate the phase value, but instead cleverly obtain the phase difference through certain algorithms.

[0005] Currently, the industry typically uses a zero-crossing capture circuit to capture the zero point of the AC power to confirm the phase difference. When the two AC power frequencies are almost the same, the phase difference can be confirmed by comparing the difference between the zero points. However, because the zero-crossing point of the AC power must be detected, the calculation and tracking and adjustment control of the phase difference can only be performed according to the AC power cycle. When the phase difference is large, the tracking cycle may take from several seconds to tens of seconds, which seriously affects the transient response performance of the current sharing. In addition, because this method relies on the hardware zero-crossing circuit and the capture unit of the control IC, the reliability requirements of the zero-crossing circuit are also relatively high.

[0006] It can be seen that the existing technology still needs to be improved and enhanced. Summary of the Invention

[0007] In order to overcome the shortcomings of the prior art, the purpose of the present invention is to provide a UPS fast phase locking method, which can calculate the phase difference for each switching cycle of the UPS and adjust the inverter tracking step size according to the real-time phase difference, with the advantages of fast adjustment speed and short phase locking time.

[0008] A first aspect of the present invention provides a UPS fast phase-locking method, comprising: obtaining output voltage information and output frequency of the UPS and bypass voltage information and bypass frequency of the bypass, and determining an initial tracking step size based on the obtained output frequency; determining whether the output frequency is consistent with the bypass frequency, and if consistent, determining output sine and cosine information based on the output voltage information, and determining bypass sine and cosine information based on the bypass voltage information; calculating a phase difference based on the output sine and cosine information and the bypass sine and cosine information; taking the absolute value of the calculated phase difference and inputting it into a PI controller to obtain an adjustment tracking step size; and calculating an inverter tracking step size based on the adjustment tracking step size and the initial tracking step size.

[0009] Optionally, in a first implementation of the first aspect of the present invention, confirming the initial tracking step based on the acquired output frequency includes: acquiring the switching frequency of sinusoidal pulse width modulation; and calculating the initial tracking step based on the acquired output frequency and the acquired switching frequency.

[0010] Optionally, in a second implementation method of the first aspect of the present invention, the output sine and cosine information is confirmed based on the output voltage information, including: obtaining the output fundamental wave, dividing an output fundamental wave period into 4096 equal parts, calculating the dq vector at each equally divided point, and calculating the output sine value and output cosine value at each equally divided point; constructing an output sine table based on each equally divided point and the output sine value corresponding to the equally divided point, and constructing an output cosine table based on each equally divided point and the output cosine value corresponding to the equally divided point; obtaining the output voltage information, and using linear interpolation to obtain the real-time output sine value and real-time output cosine value from the constructed output sine table and output cosine table; combining the real-time output sine value and real-time output cosine value to obtain the output sine and cosine information.

[0011] Optionally, in a third implementation of the first aspect of the present invention, the bypass sine and cosine information are confirmed based on the bypass voltage information, including: obtaining the bypass fundamental wave, dividing a bypass fundamental wave period into 4096 equal parts, calculating the dq vector at each equally divided point, and calculating the bypass sine value and bypass cosine value at each equally divided point; constructing a bypass sine table based on each equally divided point and the bypass sine value corresponding to the equally divided point, and constructing a bypass cosine table based on each equally divided point and the bypass cosine value corresponding to the equally divided point; obtaining the bypass voltage information, and using linear interpolation to obtain real-time bypass sine values ​​and real-time bypass cosine values ​​from the constructed bypass sine table and bypass cosine table; combining the real-time bypass sine values ​​and real-time bypass cosine values ​​to obtain the bypass sine and cosine information.

[0012] Optionally, in a fourth implementation of the first aspect of the present invention, the phase difference is calculated based on the output sine and cosine information and the bypass sine and cosine information, including: calculating the product of the real-time bypass sine value and the real-time output cosine value to obtain a first product; calculating the product of the real-time output sine value and the real-time bypass cosine value to obtain a second product; the phase difference = first product - second product.

[0013] Optionally, in the fifth implementation of the first aspect of the present invention, the determination of whether the output frequency is consistent with the bypass frequency further includes: if they are inconsistent, calculating the frequency difference between the output frequency and the bypass frequency; obtaining a reference frequency, and comparing the frequency difference and the obtained reference frequency; and calculating the inverter tracking step based on the comparison result and the initial tracking step.

[0014] Optionally, in a sixth implementation of the first aspect of the present invention, the inversion tracking step is calculated based on the comparison result and the initial tracking step, including: if the frequency difference is less than the reference frequency, the inversion tracking step = initial tracking step + frequency difference; if the frequency difference is greater than the reference frequency, the inversion tracking step = initial tracking step - frequency difference.

[0015] A second aspect of the present invention provides a UPS fast phase-locking device, comprising: an acquisition module for acquiring output voltage information and output frequency of the UPS and bypass voltage information and bypass frequency of the bypass, and determining an initial tracking step size based on the acquired output frequency; a judgment module for determining whether the output frequency is consistent with the bypass frequency; if consistent, determining output sine and cosine information based on the output voltage information, and determining bypass sine and cosine information based on the bypass voltage information; a first calculation module for calculating a phase difference based on the output sine and cosine information and the bypass sine and cosine information; an adjustment module for taking the absolute value of the calculated phase difference and inputting it into a PI controller to obtain an adjustment tracking step size; and a second calculation module for calculating an inverter tracking step size based on the adjustment tracking step size and the initial tracking step size.

[0016] A third aspect of the present invention provides a UPS fast phase locking device, comprising: a memory and at least one processor, wherein the memory stores instructions; at least one processor calls the instructions in the memory to enable the UPS fast phase locking device to perform each step of any one of the above-mentioned UPS fast phase locking methods.

[0017] A fourth aspect of the present invention provides a computer-readable storage medium having instructions stored thereon, wherein the instructions, when executed by a processor, implement the steps of any of the above-mentioned UPS fast phase locking methods.

[0018] In the technical solution of the present invention, by confirming the output sine and cosine information corresponding to the output voltage information and confirming the bypass sine and cosine information corresponding to the bypass voltage information, the phase difference within each switching cycle of the UPS can be calculated based on the output sine and cosine information and the bypass sine and cosine information, and the inverter tracking step size is adjusted according to the real-time phase difference to ensure the stability and reliability of the uninterruptible power supply during phase locking. The aforementioned adjustment mechanism has the advantages of fast adjustment speed and short phase locking time, thereby ensuring the efficient and stable operation of the UPS under various operating conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A first logic flow chart of a UPS fast phase locking method provided by an embodiment of the present invention; Figure 2 A second logic flow chart of the UPS fast phase locking method provided by an embodiment of the present invention; Figure 3 A schematic structural diagram of a UPS rapid phase locking device provided by an embodiment of the present invention; Figure 4 A schematic diagram of the structure of a UPS fast phase locking device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0020] The present invention provides a UPS fast phase lock method, apparatus, device, and storage medium. In the present invention, the terms "first," "second," "third," "fourth," and so on (if any) in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or are inherent to these processes, methods, products, or devices.

[0021] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 An embodiment of a UPS fast phase locking method according to an embodiment of the present invention includes: 101. Obtain output voltage information and output frequency of a UPS and bypass voltage information and bypass frequency of a bypass, and determine an initial tracking step size based on the obtained output frequency.

[0022] 102. Determine whether the output frequency is consistent with the bypass frequency. If they are consistent, confirm the output sine and cosine information based on the output voltage information, and confirm the bypass sine and cosine information based on the bypass voltage information. 103. Calculate a phase difference based on the output sin-cos information and the bypass sin-cos information; In this embodiment, when the calculated phase difference is negative, it indicates that the inverter phase is advanced, and when the calculated phase difference is positive, it indicates that the inverter phase is lagging.

[0023] 104. Take the absolute value of the calculated phase difference and input it into the PI controller to obtain the adjustment tracking step size; In this embodiment, the calculated phase difference or the inverted phase difference, i.e., the absolute value of the phase difference, is assigned to the input error port of a PI (proportional-integral) controller. A PI controller is a common feedback controller that effectively reduces a system's steady-state error and improves control accuracy by combining proportional and integral control methods. The proportional control component quickly adjusts the control variable based on the current error value, while the integral control component eliminates the system's accumulated error, ensuring long-term stable operation. After the phase difference value is assigned to the PI controller's input error port, the controller performs calculations based on this error value. The proportional control component outputs a corresponding adjustment variable based on the current error magnitude, aiming to reduce the error as quickly as possible, while the integral control component accumulates the error value and gradually adjusts the control variable over time to eliminate the system's accumulated error. Ultimately, the PI controller outputs an adjustment tracking step.

[0024] 105. Calculate an inversion tracking step size based on the adjustment tracking step size and the initial tracking step size; In this embodiment, the inversion tracking step size=the adjustment tracking step size+the initial tracking step size.

[0025] The present application discloses a UPS fast phase-locking method. By confirming output sine and cosine information corresponding to output voltage information and confirming bypass sine and cosine information corresponding to bypass voltage information, the phase difference within each switching cycle of the UPS can be calculated based on the output sine and cosine information and the bypass sine and cosine information. The inverter tracking step size is adjusted based on the real-time phase difference to ensure the stability and reliability of the uninterruptible power supply during phase locking. The aforementioned adjustment mechanism has the advantages of fast adjustment speed and short phase-locking time, thereby ensuring the efficient and stable operation of the UPS under various working conditions.

[0026] In this embodiment, the determining of the initial tracking step size based on the acquired output frequency specifically includes the following steps: 201. Obtaining a switching frequency of sinusoidal pulse width modulation; 202. Calculate an initial tracking step length based on the obtained output frequency and the obtained switching frequency; In this embodiment, the switching frequency is assumed to be K f , assuming the output frequency is O f , the calculation formula of the initial tracking step length Os is: .

[0027] In this embodiment, the step of confirming the output sine and cosine information based on the output voltage information specifically includes the following steps: 301. Obtain the output fundamental wave, divide one output fundamental wave period into 4096 equal parts, calculate the dq vector at each equal division point, and calculate the output sine value and output cosine value at each equal division point; In this embodiment, the output fundamental wave can be pre-set by the staff according to the inverter output characteristics of the UPS; the output fundamental wave refers to 0-2π, that is, 0-360°; by dividing an output fundamental wave period into 4096 equal parts, the subsequent table lookup accuracy can be improved, thereby improving the accuracy of the obtained output sine and cosine information.

[0028] In this embodiment, it is assumed that the output voltage information includes 、 、 , according to the space vector coordinate system conversion, the three-phase bypass vector is converted into the two-phase stationary coordinate system dq component 、 , in, ; ; 、 Model ; The output sine value and output cosine value They are: ; .

[0029] 302. Construct an output sine table based on each equally divided point and the output sine value corresponding to the equally divided point, and construct an output cosine table based on each equally divided point and the output cosine value corresponding to the equally divided point; 303 obtains output voltage information, and uses linear interpolation to obtain a real-time output sine value and a real-time output cosine value from the constructed output sine table and output cosine table; In this embodiment, a linear interpolation method is used to obtain real-time output sine values ​​and real-time output cosine values ​​from the constructed output sine table and output cosine table, which has the advantage of short processing time and ensures that the system can quickly respond to real-time data; secondly, through precise interpolation calculation, high-precision real-time output sine values ​​and real-time output cosine values ​​can be provided to improve the accuracy of the subsequently calculated phase difference, thereby improving the accuracy of the calculated inverter tracking step.

[0030] 304. Combine the real-time output sine value and the real-time output cosine value to obtain output sine and cosine information.

[0031] In this embodiment, the bypass sine and cosine information is confirmed based on the bypass voltage information, specifically including the steps of: 401. Obtain the bypass fundamental wave, divide one bypass fundamental wave cycle into 4096 equal parts, calculate the dq vector at each equal division point, and calculate the bypass sine value and bypass cosine value at each equal division point; In this embodiment, the inverter fundamental wave can be pre-set by the staff according to the bypass output characteristics of the UPS; the inverter fundamental wave refers to 0-2π, that is, 0-360°; by dividing an inverter fundamental wave cycle into 4096 equal parts, the subsequent table lookup accuracy can be improved, thereby improving the accuracy of the acquired inverter sine and cosine information.

[0032] In this embodiment, it is assumed that the inverter voltage information includes 、 、 , according to the space vector coordinate system conversion, the three-phase bypass vector is converted into the two-phase stationary coordinate system dq component 、 , in, ; ; 、 Model ; Then the inverse sine value and the inverse cosine They are: ; .

[0033] 402. Construct a bypass sine table based on each equally divided point and the bypass sine value corresponding to the equally divided point, and construct a bypass cosine table based on each equally divided point and the bypass cosine value corresponding to the equally divided point; 403. Obtain bypass voltage information, and use linear interpolation to obtain a real-time bypass sine value and a real-time bypass cosine value from the constructed bypass sine table and bypass cosine table; In this embodiment, a linear interpolation method is used to obtain real-time inverted sine values ​​and real-time inverted cosine values ​​from the constructed inverted sine table and inverted cosine table, which has the advantage of short processing time and ensures that the system can quickly respond to real-time data; secondly, through precise interpolation calculation, high-precision real-time inverted sine values ​​and real-time inverted cosine values ​​can be provided to improve the accuracy of the subsequently calculated phase difference, thereby improving the accuracy of the calculated inverted tracking step.

[0034] 404. Combine the real-time bypass sine value and the real-time bypass cosine value to obtain bypass sine and cosine information.

[0035] In this embodiment, an output sine table, an output cosine table, an inverted sine table, and an inverted cosine table are pre-constructed. When the inverter voltage information and the output voltage information are obtained, the corresponding sine values ​​and cosine values ​​can be quickly found in the tables by utilizing the four pre-constructed tables. This method not only avoids the complexity and huge computational overhead encountered in real-time calculation of trigonometric functions, but also greatly improves the operating efficiency and response speed of the entire system.

[0036] In this embodiment, the calculating the phase difference based on the output sin-cos information and the bypass sin-cos information includes: 501. Calculate the product of the real-time bypass sine value and the real-time output cosine value to obtain a first product; 502. Calculate the product of the real-time output sine value and the real-time bypass cosine value to obtain a second product; 503. The phase difference = the first product - the second product. Assume that the phase difference is ,but: ≈ .

[0037] See also Figure 2 The second embodiment of the UPS fast phase locking method in the embodiment of the present invention includes: 601. Determine whether the output frequency is consistent with the bypass frequency. If not, calculate the frequency difference between the output frequency and the bypass frequency. 602. Obtain a reference frequency, and compare the frequency difference with the obtained reference frequency; In this embodiment, the reference frequency is a design parameter of the UPS.

[0038] 603. Calculate an inversion tracking step size based on the comparison result and the initial tracking step size; Specifically, step 603 includes the following steps: 701. If the frequency difference is less than the reference frequency, the inverter tracking step size = initial tracking step size + frequency difference; 702. If the frequency difference is greater than the reference frequency, the inversion tracking step size = the initial tracking step size - the frequency difference.

[0039] The above describes the UPS fast phase locking method in the embodiment of the present invention. The following describes the UPS fast phase locking device in the embodiment of the present invention. Figure 3 , an embodiment of the UPS fast phase locking device in the embodiment of the present invention includes: An acquisition module 801 is configured to acquire output voltage information and output frequency of a UPS and bypass voltage information and bypass frequency of a bypass, and determine an initial tracking step size based on the acquired output frequency; A determination module 802 is configured to determine whether the output frequency is consistent with the bypass frequency. If consistent, the output sine and cosine information is determined based on the output voltage information, and the bypass sine and cosine information is determined based on the bypass voltage information. A first calculation module 803 is configured to calculate a phase difference based on the output sin-cos information and the bypass sin-cos information; An adjustment module 804 is configured to take the absolute value of the calculated phase difference and input it into a PI controller to obtain an adjustment tracking step size; The second calculation module 805 is configured to calculate an inversion tracking step size based on the adjustment tracking step size and the initial tracking step size.

[0040] Based on the same idea as the method in the above embodiment, the device provided in this application can implement the method in the above embodiment.

[0041] above Figure 3 The UPS fast phase locking device in the embodiment of the present invention is described in detail from the perspective of modular functional entities. The following describes the UPS fast phase locking device in the embodiment of the present invention in detail from the perspective of hardware processing.

[0042] Figure 4This is a schematic diagram of the structure of a UPS fast phase-locking device provided in an embodiment of the present invention. This UPS fast phase-locking device 900 may vary significantly depending on configuration or performance. It may include one or more central processing units (CPUs) 910 (e.g., one or more processors), memory 920, and one or more storage media 930 (e.g., one or more mass storage devices) storing application programs 933 or data 932. The memory 920 and storage medium 930 may be either transient or persistent storage. The program stored in the storage medium 930 may include one or more modules (not shown), each of which may include a series of instruction operations within the UPS fast phase-locking device 900. Furthermore, the processor 910 may be configured to communicate with the storage medium 930, executing the series of instruction operations stored in the storage medium 930 on the UPS fast phase-locking device 900 to implement the steps of the UPS fast phase-locking method provided in the aforementioned method embodiments.

[0043] The UPS fast phase lock device 900 may also include one or more power supplies 940, one or more wired or wireless network interfaces 950, one or more input and output interfaces 960, and / or one or more operating systems 931, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. It will be understood by those skilled in the art that Figure 4 The illustrated structure of the UPS fast phase lock device does not constitute a limitation on the UPS fast phase lock device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0044] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to execute the steps of the UPS fast phase-locking method.

[0045] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, devices, and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0046] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0047] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions described in the aforementioned embodiments or substitute equivalents for some of the technical features. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A UPS fast phase locking method, characterized in that: include: Obtain output voltage information and output frequency of the UPS and bypass voltage information and bypass frequency of the bypass, and confirm an initial tracking step length based on the obtained output frequency; Determine whether the output frequency is consistent with the bypass frequency. If they are consistent, confirm the output sine and cosine information based on the output voltage information, and confirm the bypass sine and cosine information based on the bypass voltage information; Calculating a phase difference based on the output sine-cosine information and the bypass sine-cosine information; The calculated phase difference is taken as an absolute value and input into the PI controller to obtain the adjustment tracking step size; An inversion tracking step size is calculated based on the adjustment tracking step size and the initial tracking step size.

2. The UPS fast phase locking method according to claim 1, characterized in that: The step of confirming the initial tracking step length based on the acquired output frequency comprises: Get the switching frequency of the sine wave pulse width modulation; An initial tracking step size is calculated based on the acquired output frequency and the acquired switching frequency.

3. The UPS fast phase locking method according to claim 1, characterized in that: The step of confirming output sine and cosine information based on output voltage information includes: Get the output fundamental wave, divide an output fundamental wave cycle into 4096 equal parts, calculate the dq vector at each equal point, and calculate the output sine value and output cosine value at each equal point; An output sine table is constructed based on each equally divided point and the output sine value corresponding to the equally divided point, and an output cosine table is constructed based on each equally divided point and the output cosine value corresponding to the equally divided point; Obtain output voltage information, and use linear interpolation to obtain real-time output sine value and real-time output cosine value from the constructed output sine table and output cosine table; The real-time output sine value and the real-time output cosine value are combined to obtain output sine-cosine information.

4. The UPS fast phase locking method according to claim 3, characterized in that: The method of confirming bypass sine and cosine information based on bypass voltage information includes: Obtain the bypass fundamental wave, divide one bypass fundamental wave cycle into 4096 equal parts, calculate the dq vector at each equally divided point, and calculate the bypass sine value and bypass cosine value at each equally divided point; A bypass sine table is constructed based on each equally divided point and the bypass sine value corresponding to the equally divided point, and a bypass cosine table is constructed based on each equally divided point and the bypass cosine value corresponding to the equally divided point; Obtain bypass voltage information, and use a linear interpolation method to obtain a real-time bypass sine value and a real-time bypass cosine value from the constructed bypass sine table and bypass cosine table; The real-time bypass sine value and the real-time bypass cosine value are combined to obtain bypass sine-cosine information.

5. The UPS fast phase locking method according to claim 4, characterized in that: The calculating the phase difference based on the output sine-cosine information and the bypass sine-cosine information comprises: Calculating the product of the real-time bypass sine value and the real-time output cosine value to obtain a first product; Calculating the product of the real-time output sine value and the real-time bypass cosine value to obtain a second product; The phase difference=first product−second product.

6. The UPS fast phase locking method according to claim 1, characterized in that: The step of determining whether the output frequency is consistent with the bypass frequency further includes: If they are inconsistent, calculate the frequency difference between the output frequency and the bypass frequency; Acquire a reference frequency, and compare the frequency difference with the acquired reference frequency; An inversion tracking step size is calculated based on the comparison result and the initial tracking step size.

7. The UPS fast phase locking method according to claim 6, characterized in that: The calculating the inversion tracking step length based on the comparison result and the initial tracking step length comprises: If the frequency difference is less than the reference frequency, the inverter tracking step length = initial tracking step length + frequency difference; If the frequency difference is greater than the reference frequency, the inverter tracking step size = initial tracking step size - frequency difference.

8. A UPS fast phase locking device, characterized in that: include: An acquisition module is used to acquire output voltage information and output frequency of the UPS and bypass voltage information and bypass frequency of the bypass, and confirm an initial tracking step length based on the acquired output frequency; A judgment module, used to judge whether the output frequency is consistent with the bypass frequency. If they are consistent, the output sine and cosine information is confirmed based on the output voltage information, and the bypass sine and cosine information is confirmed based on the bypass voltage information; A first calculation module, configured to calculate a phase difference based on the output sine-cosine information and the bypass sine-cosine information; The adjustment module is used to take the absolute value of the calculated phase difference and input it into the PI controller to obtain the adjustment tracking step length; The second calculation module is used to calculate the inversion tracking step size based on the adjustment tracking step size and the initial tracking step size.

9. A UPS fast phase locking device, characterized in that: The UPS fast phase locking device comprises: a memory and at least one processor, wherein instructions are stored in the memory; At least one of the processors calls the instructions in the memory to enable the UPS fast phase locking device to execute each step of the UPS fast phase locking method as described in any one of claims 1-7.

10. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions are executed by the processor, the various steps of the UPS fast phase locking method as described in any one of claims 1 to 7 are implemented.

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