Semiconductor detector, CT scanning equipment and detector position error measurement system

Abstract

The invention relates to a semiconductor detector, CT scanning equipment and a detector position error measurement system. The semiconductor detector is applied to CT scanning equipment and comprises a base body structure, the base body structure comprises a semiconductor crystal layer and an electrode layer set, the electrode layer set comprises a planar electrode layer and a pixel electrode layer, the semiconductor crystal layer is provided with a first face and a second face which are oppositely arranged in the thickness direction of the semiconductor crystal layer, and the planar electrode layer is laid on the first face; the pixel electrode layer comprises a plurality of pixel electrodes laid on the second surface at intervals; the protective layer is arranged on at least part of the surface of the base body structure; and the imprinting layer is formed on the side, away from the base body structure, of the protection layer, and the imprinting layer carries imprinting information. According to the semiconductor detector, marks can be engraved on the surface of the semiconductor detector on the premise that the performance of the semiconductor detector is not affected, so that information such as the crystal direction of each semiconductor detector can be quickly identified in the installation process, and the installation efficiency is improved; after the installation is completed, the information of each semiconductor detector can be identified and traced according to the mark information.

Description

Technical Field

[0001] The present application relates to the field of medical device technology, and in particular to a semiconductor detector, a CT scanning device, and a detector position error measurement system. Background Art

[0002] A semiconductor detector is a radiation detector that uses semiconductor materials as detection media. It has two electrodes with a certain bias voltage applied between the two electrodes. When incident particles enter the sensitive area of ​​the semiconductor detector, electron-hole pairs are generated. After voltage is applied to the two poles, the charge carriers drift toward the two poles, and charges are induced on the collecting electrodes, thereby forming signal pulses in the external circuit, which are collected by the instrument after passing through the amplification circuit and analysis circuit. The typical structure of a semiconductor detector used in CT scanning equipment is to set a plane electrode on the side of the semiconductor photosensitive crystal (including but not limited to cadmium zinc telluride, cadmium telluride, gallium arsenide, silicon, germanium, etc.) that absorbs X-rays, and set a pixel electrode on the other side.

[0003] For CT scanning equipment, multiple semiconductor detectors need to be spliced ​​together. For example, for a 64-row CT scanning equipment, the number of semiconductor detectors required is in the hundreds. During the manufacturing process, the crystals of these semiconductor detectors need to be installed in preset positions and directions. In the related art, since it is difficult to engrave marks on the surface of the semiconductor detector without affecting its performance, it is impossible to quickly identify information such as the crystal direction of each semiconductor detector during the installation process, which affects the installation efficiency. After the installation is completed, it is difficult to identify and trace the information of each semiconductor detector. Summary of the invention

[0004] Based on this, it is necessary to provide a semiconductor detector, a CT scanning device and a detector position error measurement system, so as to realize the imprinting and marking of the surface of the semiconductor detector without affecting the performance of the semiconductor detector, so as to facilitate the rapid identification of information such as the crystal direction of each semiconductor detector during the installation process, so as to improve the installation efficiency; and, after the installation is completed, the information of each semiconductor detector can be identified and traced according to the marking information, so that when a failure occurs in the future, the source can be traced to find the cause of the problem and summarize the experience based on this.

[0005] A semiconductor detector is applied to a CT scanning device, and the semiconductor detector comprises:

[0006] A substrate structure, comprising a semiconductor crystal layer and an electrode layer group, wherein the electrode layer group comprises a planar electrode layer and a pixel electrode layer, wherein the semiconductor crystal layer has a first surface and a second surface arranged opposite to each other along its thickness direction, the planar electrode layer is laid on the first surface, and the pixel electrode layer comprises a plurality of pixel electrodes laid on the second surface at intervals;

[0007] a protective layer disposed on at least a portion of the surface of the base structure; and

[0008] The imprinting layer is formed on a side of the protection layer away from the base structure, and the imprinting layer carries imprinting information.

[0009] The semiconductor detector described above is provided with a protective layer on at least part of the surface of the base structure, so that the base structure can be protected and isolated to prevent contamination or mechanical damage to the surface of the base structure when the imprinting layer is formed, and to avoid changes in the surface state of the detector by external air and moisture as much as possible, which is conducive to maintaining better performance of the detector. The imprinting layer is formed on the side of the protective layer away from the base structure, that is, formed on the outer surface of the protective layer. Through artificial selection in advance, the imprinting layer can carry imprinting information such as crystal direction, pixel electrode position, electrode arrangement, etc., so as to realize the marking of each semiconductor detector, so that by identifying these marks during the installation process, the semiconductor detector can be installed quickly, and the installation efficiency and installation accuracy can be improved. After the installation is completed, the information of each semiconductor detector can also be identified and traced according to the marking information, so that the source can be traced when a failure occurs in the future, the cause of the problem can be sought, and experience can be summarized based on this.

[0010] In one embodiment, the electrode layer group includes a circuit connection area for connecting to an external circuit, and a non-circuit connection area outside the circuit connection area, and the protective layer is conductive and covers the circuit connection area and / or the non-circuit connection area.

[0011] In one embodiment, the material of the protective layer is metal or doped semiconductor.

[0012] In one embodiment, the electrode layer group includes a circuit connection area for connecting to an external circuit, and a non-circuit connection area located outside the circuit connection area, the semiconductor crystal layer has an exposed surface not covered by the electrode layer group, and the protective layer is capable of insulation and covers the non-circuit connection area and / or the exposed surface.

[0013] In one embodiment, the material of the protective layer is at least one of polymer materials, silicone, aluminide, carbide, oxide, nitride, boride, fluoride, and ceramic.

[0014] In one embodiment, the Mohs hardness of the protective layer is not less than 5;

[0015] And / or, the thickness of the protective layer ranges from 10nm to 500um;

[0016] And / or, the thermal conductivity of the protective layer is less than 100 W / m·K;

[0017] And / or, the transmittance coefficient of the protective layer to visible light is less than 0.5, and the transmittance coefficient to infrared light is greater than 0.1.

[0018] In one embodiment, the thickness of the imprinting layer ranges from 10 nm to 200 um;

[0019] And / or, the transmittance coefficient of the imprinting layer to visible light is less than 0.5, and the transmittance coefficient to infrared light is greater than 0.1;

[0020] And / or, the material of the imprinting layer is at least one of ink, polymer material, ceramic, metal oxide, carbide, and semiconductor material.

[0021] A CT scanning device, comprising a plurality of semiconductor detectors; at least one of the semiconductor detectors comprises:

[0022] A substrate structure, comprising a semiconductor crystal layer and an electrode layer group, wherein the electrode layer group comprises a planar electrode layer and a pixel electrode layer, wherein the semiconductor crystal layer has a first surface and a second surface arranged opposite to each other along its thickness direction, the planar electrode layer is laid on the first surface, and the pixel electrode layer comprises a plurality of pixel electrodes laid on the second surface at intervals;

[0023] A protective layer is provided on the planar electrode layer;

[0024] A protective layer is disposed on the pixel electrode layer or a protective layer is disposed in the gap between at least two adjacent pixel electrodes;

[0025] The protective layer is used to shield the influence of external interference on the performance of the semiconductor detector.

[0026] In the above-mentioned CT scanning equipment, at least one of the semiconductor detectors is provided with a protective layer on the planar electrode layer, or on the pixel electrode layer, or in the gap between at least two adjacent pixel electrodes, so that the base structure can be protected and isolated to avoid contamination or mechanical damage to the surface of the base structure when the imprinting layer is formed, and to avoid the external air and moisture from changing the surface state of the detector as much as possible, which is conducive to maintaining the detector with better performance. The imprinting layer is formed on the side of the protective layer away from the base structure, that is, formed on the outer surface of the protective layer. Through artificial selection in advance, the imprinting layer can carry imprinting information such as crystal direction, pixel electrode position, electrode arrangement, etc., so as to realize the marking of each semiconductor detector, so that by identifying these marks during the installation process, the semiconductor detector can be quickly installed, and the installation efficiency and installation accuracy can be improved. After the installation is completed, the information of each semiconductor detector can also be identified and traced according to the marking information, so that the source can be traced when a failure occurs later, the cause of the problem can be sought, and experience can be summarized based on this.

[0027] A detector position error measurement system, the detector position error measurement system comprising:

[0028] A scanning device, used for scanning the engraved information;

[0029] A controller is communicatively connected to the scanning device, and the controller can obtain a pixel electrode position error based on the imprinting information.

[0030] The above-mentioned detector position error measurement system can scan the engraving information carried by the engraving layer through a scanning device. The controller can calculate the pixel electrode position based on the specific geometric correspondence between the engraving information and the pixel electrode position, and then compare it with the pre-set pixel electrode target position to obtain the pixel electrode position error and determine whether the flip-chip result meets the requirements.

[0031] In one embodiment, the controller obtains a first position coordinate of the imprinting layer based on the imprinting information, and obtains a second position coordinate of the pixel electrode based on the first position coordinate and a coordinate conversion relationship between the imprinting layer and the corresponding pixel electrode;

[0032] The controller compares the second position coordinates with the preset position coordinates of the pixel electrode to obtain the pixel electrode position error. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 Schematic diagram of the substrate structure of a semiconductor detector in one embodiment of the present application.

[0034] Figure 2 It is a schematic diagram of another viewing angle of the substrate structure of the semiconductor detector in one embodiment of the present application.

[0035] Figure 3 This is a front view of a semiconductor detector in one embodiment of the present application.

[0036] Figure 4 Schematic diagram of a semiconductor detector in one embodiment of the present application.

[0037] Figure 5 Schematic diagram of a detector position error measurement system in one embodiment of the present application.

[0038] Reference numerals:

[0039] 10. Semiconductor detector;

[0040] 100, substrate structure; 110, semiconductor crystal layer; 111, first surface; 112, second surface; 113, exposed surface; 120, planar electrode layer; 130, pixel electrode layer; 131, pixel electrode;

[0041] 200, protective layer;

[0042] 300, engraving layer;

[0043] 400. Scanning device. DETAILED DESCRIPTION

[0044] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0045] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0046] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0047] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0048] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0049] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0050] A semiconductor detector is a radiation detector that uses semiconductor materials as detection media. It has two electrodes with a certain bias voltage applied between the two electrodes. When incident particles enter the sensitive area of ​​the semiconductor detector, electron-hole pairs are generated. After voltage is applied to the two poles, the charge carriers drift toward the two poles, and charges are induced on the collecting electrodes, thereby forming signal pulses in the external circuit, which are collected by the instrument after passing through the amplification circuit and analysis circuit. The typical structure of a semiconductor detector is to set a plane electrode on the side of the semiconductor photosensitive crystal (including but not limited to cadmium zinc telluride, cadmium telluride, gallium arsenide, silicon, germanium, etc.) that absorbs X-rays, and set a pixel electrode on the other side.

[0051] For CT scanning equipment, such as photon counting detectors or scintillator detectors, multiple semiconductor detectors need to be spliced ​​together. For example, for a 64-row CT scanning equipment, the number of semiconductor detectors required is in the hundreds. During the manufacturing process, the crystals of these semiconductor detectors need to be installed in preset positions and directions. In the related art, since it is difficult to engrave marks on the surface of the semiconductor detector without affecting the performance of the semiconductor detector, it is impossible to quickly identify the crystal direction and other information of each semiconductor detector during the installation process, which affects the installation efficiency. After the installation is completed, it is difficult to identify and trace the information of each semiconductor detector.

[0052] Based on this, the embodiments of the present application provide a semiconductor detector, a CT scanning device and a method for manufacturing a semiconductor detector, so as to realize engraving and marking on the surface of the semiconductor detector without affecting the performance of the semiconductor detector, thereby facilitating rapid identification of information such as the crystal orientation of each semiconductor detector during the installation process, so as to improve installation efficiency and installation accuracy; and, after the installation is completed, the information of each semiconductor detector can be identified and traced according to the marking information, so that when failures occur in the future, the source can be traced to find the cause of the problem, and experience can be summarized based on this.

[0053] See also Figures 1 to 4 , the semiconductor detector 10 provided in one embodiment of the present application is applied to a CT scanning device. The semiconductor detector 10 provided in one embodiment of the present application includes a base structure 100, a protective layer 200 and an imprinting layer 300. Among them, the base structure 100 includes a semiconductor crystal layer 110 and an electrode layer group, and the electrode layer group includes a planar electrode layer 120 and a pixel electrode layer 130. The semiconductor crystal layer 110 has a first surface 111 and a second surface 112 arranged opposite to each other along its thickness direction, the planar electrode layer 120 is laid on the first surface 111, and the pixel electrode layer 130 includes a plurality of pixel electrodes 131 laid at intervals on the second surface 112. The protective layer 200 is arranged on at least part of the surface of the base structure 100. The imprinting layer 300 is formed on the side of the protective layer 200 away from the base structure 100, and the imprinting layer 300 carries imprinting information.

[0054] The semiconductor detector 10 is provided with a protective layer 200 on at least part of the surface of the base structure 100, so that the base structure 100 can be protected and isolated to prevent the surface of the base structure 100 from being polluted or mechanically damaged when the imprinting layer 300 is formed, and to prevent the external air and moisture from changing the surface state of the detector as much as possible, which is conducive to maintaining the detector with better performance. The imprinting layer 300 is formed on the side of the protective layer 200 away from the base structure 100, that is, formed on the outer surface of the protective layer 200. Through artificial selection in advance, the imprinting layer 300 can carry imprinting information such as crystal direction, pixel electrode 131 position, electrode arrangement, etc., so as to realize the marking of each semiconductor detector 10, so that by identifying these marks during the installation process, the semiconductor detector 10 can be quickly installed, and the installation efficiency and installation accuracy can be improved. After the installation is completed, the information of each semiconductor detector 10 can also be identified and traced according to the marking information, so that the source can be traced when a failure occurs later, the cause of the problem can be sought, and experience can be summarized based on this.

[0055] From the perspective of the drawings, the first surface 111 is the top surface of the semiconductor crystal layer 110 , and the second surface 112 is the bottom surface of the semiconductor crystal layer 110 .

[0056] See also Figures 1 to 4In some embodiments, the electrode layer group includes a circuit connection area for connecting to an external circuit, and a non-circuit connection area outside the circuit connection area. The protective layer 200 is conductive and covers the circuit connection area and / or the non-circuit connection area.

[0057] Specifically, according to the use principle of the semiconductor detector, it is known that a voltage needs to be applied between the pixel electrode layer 130 and the planar electrode layer 120 to allow the charge carriers to drift toward the two poles. Both the planar electrode layer 120 and the pixel electrode layer 130 have some areas for connecting to the external circuit to achieve bias application, and this area is the circuit connection area. When the protective layer 200 is made of a conductive material, if it covers the circuit connection area, then the connection with the external circuit can be achieved through the conductive protective layer 200, and the bias applied between the pixel electrode layer 130 and the planar electrode layer 120 will not be affected; if the protective layer 200 covers the non-circuit connection area, the pixel electrode layer 130 and the planar electrode layer 120 can be connected to the external circuit normally through the circuit connection area, and the bias applied between the pixel electrode layer 130 and the planar electrode layer 120 will not be affected. The protective layer 200 can also cover the circuit connection area and the non-circuit connection area at the same time, and perform multiple imprinting.

[0058] See also Figures 1 to 4 In some embodiments, the protection layer 200 is laid on a side of the planar electrode layer 120 away from the first surface 111 , and the imprinting layer 300 is formed on a side of the protection layer 200 away from the planar electrode layer 120 .

[0059] From the perspective of the attached figure, the protective layer 200 is laid on the top surface of the planar electrode layer 120, and the imprinting layer 300 is formed on the top surface of the protective layer 200. Generally, the thickness of the planar electrode layer 120 is relatively small. In the above embodiment, the protective layer 200 is laid on the outer surface of the planar electrode layer 120, so that the planar electrode layer 120 can be protected and isolated when the imprinting layer 300 is formed, so as to avoid mechanical damage or contamination to the planar electrode layer 120 during the imprinting process, thereby realizing imprinting and marking on the semiconductor detector without affecting its performance.

[0060] See also Figures 1 to 4 In some embodiments, the protective layer 200 is laid on a side of the pixel electrode layer 130 away from the second surface 112 , and the imprinting layer 300 is formed on a side of the protective layer 200 away from the pixel electrode layer 130 .

[0061] From the perspective of the accompanying drawings, the protective layer 200 is laid on the bottom surface of the pixel electrode layer 130, and the imprinting layer 300 is formed on the bottom surface of the protective layer 200. In the above embodiment, the protective layer 200 is laid on the outer surface of the pixel electrode layer 130, so that the pixel electrode layer 130 can be protected and isolated when the imprinting layer 300 is formed, so as to avoid mechanical damage or contamination to the pixel electrode layer 130 during the imprinting process, thereby realizing imprinting and marking on the semiconductor detector without affecting its performance.

[0062] Usually, there are other structures outside the pixel electrode layer 130 or the planar electrode layer 120. In some embodiments, in order to facilitate observation of the information engraved on the pixel electrode layer 130, the outer structure can be made of a transparent material.

[0063] Furthermore, in some embodiments, the conductive protection layer 200 is made of metal or doped semiconductor.

[0064] See also Figures 1 to 4 In some embodiments, the electrode layer group includes a circuit connection area for connecting to an external circuit, and a non-circuit connection area outside the circuit connection area, and the protective layer 200 can insulate and cover the non-circuit connection area.

[0065] It is understandable that when the protective layer 200 is made of insulating material, in order not to affect the bias applied between the pixel electrode layer 130 and the planar electrode layer 120, the protective layer 200 can only be set in the non-circuit connection area to ensure that the external circuit can be normally connected to the circuit connection area.

[0066] See also Figures 1 to 4 In some embodiments, the semiconductor crystal layer 110 has an exposed surface 113 that is not covered by the electrode layer group, and the protective layer 200 can be insulated and cover the exposed surface 113 .

[0067] Specifically, the semiconductor crystal layer 110 has an exposed surface 113 not covered by the planar electrode layer 120 and the pixel electrode layer 130 . The protective layer 200 is laid on the exposed surface 113 , and the protective layer 200 is insulated. The imprinting layer 300 is formed on the side of the protective layer 200 away from the exposed surface 113 .

[0068] In the embodiment shown in the drawings, the exposed surface 113 is a plurality of side walls of the semiconductor crystal layer 110. The protective layer 200 can be laid on one or more side walls of the semiconductor crystal layer 110, and the imprinting layer 300 can be formed on the outer side wall of the protective layer 200. The protective layer 200 can be insulated, thereby preventing the introduction of additional leakage current after a voltage is applied between the pixel electrode layer 130 and the planar electrode layer 120.

[0069] In the above embodiment, by setting a protective layer 200 on the exposed surface 113, the exposed surface 113 can be protected and isolated when the imprinting layer 300 is formed to prevent the exposed surface 113 from being damaged or contaminated during the imprinting process and affecting the crystal performance, thereby achieving imprinting and marking without affecting the performance of the semiconductor detector.

[0070] In some embodiments, the protection layer 200 may also cover the non-circuit connection area and the exposed surface 113 at the same time, and perform multiple imprinting.

[0071] Furthermore, in some embodiments, the insulating protective layer 200 is made of at least one of polymer materials, organic silicon, aluminide, carbide, oxide, nitride, boride, fluoride, and ceramic.

[0072] See also Figures 1 to 4 In some embodiments, the Mohs hardness of the protective layer 200 is not less than 5. The protective layer 200 has a sufficiently high hardness so as to better protect the inner structure thereof during the imprinting process and avoid mechanical damage.

[0073] In some embodiments, the thickness of the protective layer 200 ranges from 10 nm to 500 um. The protective layer 200 has a sufficient thickness to better protect the inner structure during the imprinting process to avoid mechanical damage, and to better isolate air and moisture to prevent them from penetrating the protective layer 200 and affecting the surface state of the detector.

[0074] In some embodiments, the thermal conductivity of the protective layer 200 is less than 100 W / m·K. When the protective layer 200 has a lower thermal conductivity, the heat generated during the imprinting process can be reduced from being transferred to the semiconductor crystal layer 110 , thereby reducing damage to the semiconductor crystal layer 110 .

[0075] In some embodiments, the transmittance of the protective layer 200 to visible light is less than 0.5, and the transmittance to infrared light is greater than 0.1. Generally, infrared light can improve the stability of the detector. By selecting the material of the protective layer 200 so that it has a higher transmittance to infrared light, the stability of the detector can be better improved.

[0076] In some embodiments, when the material of the protective layer 200 is oxide, it can form tellurium (Te) oxide on the surface of the detector as a passivation layer. The resistivity of the passivation layer is higher than that of the semiconductor crystal layer 110, thereby reducing the leakage current of the detector.

[0077] In some embodiments, the thickness of imprinting layer 300 ranges from 10 nm to 200 um.

[0078] When the above range is met, the engraved information is clearer and it is not easy to damage the protection layer 200.

[0079] In some embodiments, the transmittance of the imprinting layer 300 to visible light is less than 0.5, and the transmittance to infrared light is greater than 0.1. Generally, infrared light can improve the stability of the detector. By selecting the material of the imprinting layer 300 so that it has a higher transmittance to infrared light, the stability of the detector can be better improved.

[0080] In some embodiments, the material of the imprinting layer 300 is at least one of ink, polymer material, ceramic, metal oxide, carbide, and semiconductor material.

[0081] In some embodiments, the imprinting information carried by the imprinting layer 300 can be various types such as crystal number, orientation mark with specific geometric correspondence with crystal orientation and electrode arrangement, positioning mark with specific geometric correspondence with crystal pixel electrode position, etc.

[0082] See also Figures 1 to 4 The detector flipping system provided in one embodiment of the present application includes an identification device and a transportation device, wherein the identification device is used to identify the imprinted information. The transportation device is communicatively connected to the identification device, and the transportation device can transport the semiconductor detector 10 to the target flipping position based on the imprinted information.

[0083] The above-mentioned detector flip-up system can identify the imprinted information carried by the imprinting layer 300 through the identification device, and the transportation device can transport the semiconductor detector 10 to a pre-set target flip-up position based on the imprinted information, thereby quickly completing the installation of each semiconductor detector 10 and improving the installation efficiency.

[0084] Specifically, the transport device includes a mechanical arm, and a clamp or suction cup connected to the mechanical arm. When the recognition device recognizes the printed information on each semiconductor detector, the mechanical arm drives the clamp or suction cup to transport each semiconductor detector to the target flipping position on the substrate for flipping. The recognition device can be a CCD camera or a laser scanner.

[0085] See also Figures 1 to 5 A detector position error measurement system provided in one embodiment of the present application includes a scanning device 400 and a controller. The scanning device 400 is used to scan the engraved information. The controller is communicatively connected to the scanning device 400. The controller can obtain the pixel electrode position error based on the engraved information.

[0086] The above-mentioned detector position error measurement system can scan the engraving information carried by the engraving layer 300 through the scanning device 400. The controller can calculate the position of the pixel electrode 131 based on the specific geometric correspondence between the engraving information and the pixel electrode position, and then compare it with the pre-set pixel electrode target position to obtain the pixel electrode position error and determine whether the flip-chip position meets the requirements.

[0087] In some embodiments, the controller obtains the first position coordinates of the imprinting layer 300 based on the imprinting information, and obtains the second position coordinates of the pixel electrode 131 based on the first position coordinates and the coordinate conversion relationship between the imprinting layer 300 and the corresponding pixel electrode 131;

[0088] The controller compares the second position coordinates with the preset position coordinates of the pixel electrode 131 to obtain the pixel electrode position error.

[0089] Among them, the scanning device 400 is a camera, which transmits the scanned imprinting information to the controller. The coordinate conversion relationship between the imprinting layer 300 and the corresponding pixel electrode 131 is known. The imprinting information can carry the first position coordinate of the imprinting layer 300. The controller performs coordinate conversion based on the first position coordinate and the aforementioned coordinate conversion relationship to obtain the second position coordinate of the corresponding pixel electrode 131, and the preset position coordinate of the pixel electrode 131 is also known. By comparing the second position coordinate with the preset position coordinate, the pixel electrode position error can be obtained.

[0090] Specifically, for each pixel electrode 131, a specific engraved pattern is designed, such as a cross shape, a grid shape, etc., and the relationship function between the position of the engraved pattern and the position of the pixel electrode 131 is known. Specifically, assuming that the position coordinate of the i-th pixel electrode 131 is (x i ,y i ), the corresponding position coordinates of the engraved pattern are (p i ,q i ), function (p i ,q i )=f[(x i ,y i )] is known. By scanning the imprinting information carried by the imprinting layer 300 by the scanning device 400, the position coordinates (p i ,q i ). According to the inverse function of the relationship between the position of the engraved pattern and the position of the pixel electrode 131, the controller calculates the actual position coordinates of each pixel electrode 131 of the detector, that is, (x i ,y i )=f -1 [(p i ,q i )]. The controller will (xi ,y i ) is compared with the preset position coordinates of the pixel electrode 131 to obtain the pixel electrode position error and determine whether the flip-chip position meets the requirements.

[0091] See also Figures 1 to 4 The CT scanning device provided by an embodiment of the present application includes a plurality of semiconductor detectors 10; at least one semiconductor detector 10 includes a base structure 100, including a semiconductor crystal layer 110 and an electrode layer group, the electrode layer group includes a planar electrode layer 120 and a pixel electrode layer 130, the semiconductor crystal layer 110 has a first surface 111 and a second surface 112 arranged opposite to each other along its thickness direction, the planar electrode layer 120 is laid on the first surface 111, and the pixel electrode layer 130 includes a plurality of pixel electrodes 131 laid on the second surface 112 at intervals. A protective layer 200 is arranged on the planar electrode layer 120; a protective layer 200 is arranged on the pixel electrode layer 130 or a protective layer 200 is arranged in the gap between at least two adjacent pixel electrodes 131; the protective layer 200 is used to shield the influence of external interference on the performance of the semiconductor detector 10.

[0092] In the above-mentioned CT scanning device, at least one of the semiconductor detectors 10 has a protective layer 200 on the planar electrode layer 110, or on the pixel electrode layer 130, or in the gap between at least two adjacent pixel electrodes 131, so that the base structure 100 can be protected and isolated to prevent the surface of the base structure 100 from being polluted or mechanically damaged when the imprinting layer 300 is formed, and to prevent the external air and moisture from changing the surface state of the detector as much as possible, which is conducive to maintaining the detector with better performance. The imprinting layer 300 is formed on the side of the protective layer 200 away from the base structure 100, that is, formed on the outer surface of the protective layer 200. Through artificial selection in advance, the imprinting layer 300 can carry imprinting information such as crystal direction, pixel electrode 131 position, electrode arrangement, etc., so as to realize the marking of each semiconductor detector 10, so that by identifying these marks during the installation process, the semiconductor detector 10 can be quickly installed, thereby improving the installation efficiency and installation accuracy. After the installation is completed, the information of each semiconductor detector 10 can also be identified and traced based on the marking information, so that when a failure occurs later, the source can be traced to find the cause of the problem and summarize the experience based on this.

[0093] See also Figures 1 to 4 , a method for manufacturing a semiconductor detector 10 provided in an embodiment of the present application includes:

[0094] S100, preparing a protective layer 200 on the surface of the base structure 100 of the semiconductor detector 10;

[0095] S200 , engraving is performed on a side of the protection layer 200 facing away from the base structure 100 to form an engraving layer 300 , wherein the engraving layer 300 carries engraving information.

[0096] In the manufacturing method of the semiconductor detector 10, a protective layer 200 is prepared on the surface of the base structure 100, so that the base structure 100 can be protected and isolated to prevent the surface of the base structure 100 from being polluted or mechanically damaged when the imprinting layer 300 is formed, and the external air and moisture are prevented from changing the surface state of the detector as much as possible, which is conducive to maintaining the detector with better performance. The side of the protective layer 200 away from the base structure 100 is imprinted to form an imprinting layer 300. Through artificial selection in advance, the imprinting layer 300 carries imprinting information such as crystal direction, pixel electrode 131 position, electrode arrangement, etc., so as to realize the marking of each semiconductor detector 10, so that by identifying these marks during the installation process, the semiconductor detector 10 can be quickly installed, and the installation efficiency and installation accuracy can be improved. After the installation is completed, the information of each semiconductor detector 10 can also be identified and traced according to the marking information, so that the source can be traced when a failure occurs later, the cause of the problem can be sought, and experience can be summarized based on this.

[0097] In some embodiments, the protective layer 200 is prepared by spraying, brushing, spin coating, evaporation or sputtering.

[0098] For example, an oxide film is prepared on the surface of the base structure 100 as the protective layer 200 by a magnetron sputtering process, and the preferred material is aluminum oxide; the sputtering pressure is 0.1-2.0Pa, preferably 0.8Pa; the sputtering power is 10-500W, preferably 100W; the film thickness is 10nm-500um, preferably 50um.

[0099] For example, the protective layer 200 is prepared on the surface of the base structure 100 by a spraying process. The material of the protective layer 200 is a polymer material with a thickness of 50 um.

[0100] In some embodiments, imprinting layer 300 is formed by spraying or laser processing.

[0101] For example, the imprinting layer 300 is prepared by spraying, the material is butanone-based ink, and the thickness of the imprinting layer 300 is 50 um.

[0102] For example, the imprinting layer 300 is prepared by laser processing, the laser is a CO2 laser with a wavelength of 9.3 um, the material of the imprinting layer 300 is metal oxide, and the thickness of the imprinting layer 300 is 5 um.

[0103] In some embodiments, the imprinting layer 300 may chemically react with the protective layer 200 to change the surface profile, hardness, light reflection properties, or light transmission properties (in the case of laser imprinting) of the protective layer 200 .

[0104] For example, if laser processing is used to form the imprinting layer 300, and the material of the protective layer 200 is aluminum oxide, when the laser acts on the surface of the protective layer 200, the temperature in a small local area rises rapidly, causing the aluminum oxide to melt and vaporize, resulting in an imprinting layer 300 with a depth of about 5 um.

[0105] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0106] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A semiconductor detector (10), applied to a CT scanning device, characterized in that: The semiconductor detector (10) comprises: A substrate structure (100) comprises a semiconductor crystal layer (110) and an electrode layer group, the electrode layer group comprising a planar electrode layer (120) and a pixel electrode layer (130), the semiconductor crystal layer (110) having a first surface (111) and a second surface (112) arranged opposite to each other along its thickness direction, the planar electrode layer (120) being laid on the first surface (111), and the pixel electrode layer (130) comprising a plurality of pixel electrodes (131) being laid on the second surface (112) at intervals; A protective layer (200) is disposed on at least a portion of the surface of the base structure (100); and An imprinting layer (300) is formed on a side of the protective layer (200) facing away from the base structure (100), and the imprinting layer (300) carries imprinting information.

2. The semiconductor detector (10) according to claim 1, characterized in that The electrode layer group comprises a circuit connection area for connecting to an external circuit, and a non-circuit connection area outside the circuit connection area. The protective layer (200) is conductive and covers the circuit connection area and / or the non-circuit connection area.

3. The semiconductor detector (10) according to claim 2, characterized in that: The material of the protective layer (200) is metal or doped semiconductor.

4. The semiconductor detector (10) according to claim 1, characterized in that The electrode layer group includes a circuit connection area for connecting to an external circuit, and a non-circuit connection area located outside the circuit connection area. The semiconductor crystal layer (110) has an exposed surface (113) not covered by the electrode layer group. The protective layer (200) is insulated and covers the non-circuit connection area and / or the exposed surface (113).

5. The semiconductor detector (10) according to claim 4, characterized in that The material of the protective layer (200) is at least one of polymer materials, organic silicon, aluminide, carbide, oxide, nitride, boride, fluoride, and ceramic.

6. The semiconductor detector (10) according to any one of claims 1 to 5, characterized in that: The Mohs hardness of the protective layer (200) is not less than 5; And / or, the thickness of the protective layer (200) is in the range of 10nm-500um; And / or, the thermal conductivity of the protective layer (200) is less than 100 W / m·K; And / or, the transmittance coefficient of the protective layer (200) for visible light is less than 0.5, and the transmittance coefficient for infrared light is greater than 0.

1.

7. The semiconductor detector (10) according to any one of claims 1 to 5, characterized in that: The thickness of the imprinting layer (300) ranges from 10 nm to 200 um; And / or, the transmittance coefficient of the imprinting layer (300) to visible light is less than 0.5, and the transmittance coefficient to infrared light is greater than 0.1; And / or, the material of the imprinting layer (300) is at least one of ink, polymer material, ceramic, metal oxide, carbide, and semiconductor material.

8. A CT scanning device, characterized in that: The CT scanning device comprises a plurality of semiconductor detectors (10); at least one of the semiconductor detectors (10) comprises: A substrate structure (100) comprises a semiconductor crystal layer (110) and an electrode layer group, the electrode layer group comprising a planar electrode layer (120) and a pixel electrode layer (130), the semiconductor crystal layer (110) having a first surface (111) and a second surface (112) arranged opposite to each other along its thickness direction, the planar electrode layer (120) being laid on the first surface (111), and the pixel electrode layer (130) comprising a plurality of pixel electrodes (131) being laid on the second surface (112) at intervals; A protective layer (200) is provided on the planar electrode layer (120); A protective layer (200) is provided on the pixel electrode layer (130), or a protective layer (200) is provided in the gap between at least two adjacent pixel electrodes (131); The protective layer (200) is used to shield the influence of external interference on the performance of the semiconductor detector (10).

9. A detector position error measurement system based on the semiconductor detector (10) according to any one of claims 1 to 7, characterized in that: The detector position error measurement system comprises: A scanning device (400) for scanning the engraved information; A controller is communicatively connected to the scanning device (400), and the controller can obtain a pixel electrode position error based on the engraving information.

10. The detector position error measurement system of the semiconductor detector (10) according to claim 9, characterized in that: The controller obtains a first position coordinate of the imprinting layer (300) based on the imprinting information, and obtains a second position coordinate of the pixel electrode (131) based on the first position coordinate and a coordinate conversion relationship between the imprinting layer (300) and the corresponding pixel electrode (131); The controller compares the second position coordinates with the preset position coordinates of the pixel electrode (131) to obtain the pixel electrode position error.

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