Over-temperature protection circuit, over-temperature protection method and over-temperature protection device for field effect transistor, and electronic equipment
By designing the over-temperature protection circuit of the temperature monitoring and resistance adjustment unit in the field-effect transistor, the problem of field-effect transistor failure due to overheating is solved, and safe and stable operation of the circuit is achieved.
Patent Information
- Application Number
- CN202310912758.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-24
- Publication Date
- 2025-01-24
AI Technical Summary
The field effect transistor overheats under long-term current overload, resulting in failure and affecting the safety of the circuit.
Design an over -temperature protection circuit that includes the temperature monitoring unit and the resistance regulatory unit. The temperature of the crystal can be adjusted by monitoring the temperature of the crystal tube.
Effectively prevent the field effect of the field -effect transistor due to overheating and failure to ensure the safe and stable operation of the circuit.
Smart Images
Figure CN119362365A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and in particular to an over-temperature protection circuit and method, device, and electronic equipment for a field effect transistor. Background Art
[0002] Field effect transistors have the advantages of low power consumption and fast switching speed, so they are often used in power circuits. When the circuit is overloaded for a long time, the field effect transistor will also generate a lot of heat. The field effect transistor will fail due to overheating due to heat accumulation, thus affecting the safety of the circuit. Summary of the invention
[0003] The present disclosure provides a field effect transistor over-temperature protection circuit and method, device, and electronic device, the main purpose of which is to prevent the field effect transistor from failing due to overheating of the field effect transistor body.
[0004] According to a first aspect of the present disclosure, there is provided an over-temperature protection circuit for a field effect transistor, comprising: a temperature monitoring unit, a resistance adjustment unit and a field effect transistor;
[0005] The temperature monitoring unit is electrically connected to the resistance adjusting unit and is placed in close contact with the field effect transistor; the resistance adjusting unit is electrically connected to the temperature monitoring unit and the field effect transistor respectively;
[0006] The temperature monitoring unit is used to monitor the temperature of the field effect transistor and control the resistance adjustment unit to adjust the resistance value so as to control the temperature of the field effect transistor; the resistance adjustment unit is used to adjust the resistance value of the resistor electrically connected to the field effect transistor so as to control the on and off of the field effect transistor.
[0007] Optionally, the resistance adjustment unit includes at least one first adjustable resistor and at least one second adjustable resistor;
[0008] At least one of the first adjustable resistors is electrically connected to the source and gate of the field effect transistor; at least one of the second adjustable resistors is electrically connected to the gate of the field effect transistor;
[0009] The first adjustable resistor and the second adjustable resistor are used to adjust the voltage between the source and the gate of the field effect transistor.
[0010] Optionally, the temperature monitoring unit and the resistance adjusting unit are composed of a thermistor, wherein the thermistor includes a positive temperature coefficient resistor and a negative temperature coefficient resistor.
[0011] Optionally, the first adjustable resistor is a negative temperature coefficient resistor and / or the second adjustable resistor is a positive temperature coefficient resistor;
[0012] The temperature threshold interval of the negative temperature coefficient resistor is the same as the temperature threshold interval of the positive temperature coefficient resistor.
[0013] According to a second aspect of the present disclosure, there is provided an over-temperature protection method for a field effect transistor, comprising:
[0014] Obtain the body temperature of the field effect transistor;
[0015] Determining whether the temperature of the tube body exceeds a temperature threshold;
[0016] When the temperature of the tube body exceeds a temperature threshold, the field effect transistor is controlled to be disconnected.
[0017] Optionally, controlling the field effect transistor to be disconnected includes:
[0018] The voltage between the gate and the source of the field effect transistor is adjusted to control the field effect transistor to be disconnected.
[0019] Optionally, adjusting the voltage between the gate and the source of the field effect transistor to control the field effect transistor to be disconnected includes:
[0020] Adjusting the resistance of the first adjustable resistor to a smaller value and / or the resistance of the second adjustable resistor to a larger value to adjust the voltage between the gate and the source of the field effect transistor, wherein the first adjustable resistor is electrically connected to the gate and the source respectively, and the second adjustable resistor is electrically connected to the gate;
[0021] Based on the voltage between the gate and the source after adjusting the resistance value, the field effect transistor is controlled to be turned off.
[0022] According to a third aspect of the present disclosure, there is provided an over-temperature protection device for a field effect transistor, the device comprising:
[0023] An acquisition unit, used for acquiring the body temperature of the field effect transistor;
[0024] A judging unit, used to judge whether the temperature of the tube body exceeds a temperature threshold;
[0025] The control unit is used to control the field effect transistor to be disconnected when the temperature of the tube body exceeds a temperature threshold.
[0026] Optionally, the control unit is further used for:
[0027] The voltage between the gate and the source of the field effect transistor is adjusted to control the field effect transistor to be disconnected.
[0028] Optionally, the control unit is further used for:
[0029] Adjusting the resistance of the first adjustable resistor to a smaller value and / or the resistance of the second adjustable resistor to a larger value to adjust the voltage between the gate and the source of the field effect transistor, wherein the first adjustable resistor is electrically connected to the gate and the source respectively, and the second adjustable resistor is electrically connected to the gate;
[0030] Based on the voltage between the gate and the source after adjusting the resistance value, the field effect transistor is controlled to be turned off.
[0031] According to a fourth aspect of the present disclosure, there is provided an electronic device, including:
[0032] at least one processor; and
[0033] a memory communicatively connected to the at least one processor; wherein,
[0034] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method described in the second aspect.
[0035] According to a fifth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method described in the second aspect.
[0036] According to a sixth aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the method described in the second aspect is implemented.
[0037] The present disclosure provides an over-temperature protection circuit and method, device, and electronic device for a field effect transistor, wherein the circuit includes: a temperature monitoring unit, a resistance adjustment unit, and a field effect transistor; the temperature monitoring unit is electrically connected to the resistance adjustment unit and is placed in close contact with the field effect transistor; the resistance adjustment unit is electrically connected to the temperature monitoring unit and the field effect transistor, respectively; the temperature monitoring unit is used to monitor the temperature of the field effect transistor and control the resistance adjustment unit to adjust the resistance value so as to control the temperature of the field effect transistor; the resistance adjustment unit is used to adjust the resistance value of the resistor electrically connected to the field effect transistor so as to control the on-off of the field effect transistor. Compared with the related art, the embodiment of the present disclosure monitors the temperature of the field effect transistor through the temperature monitoring unit, and can control the temperature of the tube body of the field effect transistor within a reasonable range, thereby preventing the field effect transistor from failing due to overheating of the tube body and affecting the safety of the circuit.
[0038] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.
[0040] Figure 1 A schematic diagram of the structure of an over-temperature protection circuit of a field effect transistor provided in an embodiment of the present disclosure;
[0041] Figure 2 A schematic diagram of the structure of a field effect transistor based on a thermistor provided in an embodiment of the present disclosure;
[0042] Figure 3 A temperature-resistance diagram of a thermistor;
[0043] Figure 4 This is another temperature-resistance diagram of thermistor;
[0044] Figure 5 A schematic diagram of an anti-reverse circuit based on P-MOSFET;
[0045] Figure 6 A schematic diagram of an anti-reverse circuit of an over-temperature protection circuit based on a field effect transistor provided in an embodiment of the present disclosure;
[0046] Figure 7 It is a schematic diagram of a switching circuit based on P-MOSFET;
[0047] Figure 8 A schematic diagram of a switch circuit of an over-temperature protection circuit based on a field effect transistor provided in an embodiment of the present disclosure;
[0048] Fig. 9 A schematic flow chart of an over-temperature protection method for a field effect transistor provided in an embodiment of the present disclosure;
[0049] Fig.10 A schematic flow chart of another method for over-temperature protection of a field effect transistor provided in an embodiment of the present disclosure;
[0050] Fig.11 A schematic diagram of the structure of an over-temperature protection device for a field effect transistor provided in an embodiment of the present disclosure;
[0051] Fig.12 A schematic block diagram of an exemplary electronic device provided for an embodiment of the present disclosure. DETAILED DESCRIPTION
[0052] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0053] The over-temperature protection circuit and method, device, and electronic device of the field effect transistor according to the embodiments of the present disclosure are described below with reference to the accompanying drawings.
[0054] Figure 1 A schematic diagram of the structure of an over-temperature protection circuit for a field effect transistor provided in an embodiment of the present disclosure.
[0055] like Figure 1 As shown, the over-temperature protection circuit of the field effect transistor includes: a temperature monitoring unit 11, a resistance adjustment unit 12 and a field effect transistor 13;
[0056] The temperature monitoring unit 11 is electrically connected to the resistance adjusting unit 12 and is placed in close contact with the field effect transistor 13; the resistance adjusting unit 12 is electrically connected to the temperature monitoring unit 11 and the field effect transistor 13 respectively;
[0057] The temperature monitoring unit 11 is used to monitor the temperature of the field effect transistor 13 and control the resistance adjustment unit 12 to adjust the resistance value so as to control the temperature of the field effect transistor 13; the resistance adjustment unit 12 is used to adjust the resistance value of the resistor electrically connected to the field effect transistor 13 so as to control the on and off of the field effect transistor 13.
[0058] Field effect transistors can fail due to overheating due to heat accumulation, especially in the case of high current. Continuous heating can cause the temperature to exceed the limit of the oxide layer and cause current failure. Therefore, when the field effect transistor is overheated, timely cutting off the field effect transistor can effectively protect the safety of the circuit.
[0059] In the embodiment of the present disclosure, the temperature of the field effect transistor 13 is monitored by the temperature monitoring unit 11; in order to obtain a more accurate temperature value, the temperature monitoring unit 11 is placed in close contact with the field effect transistor 13. The temperature monitoring unit 11 can be a temperature measuring device composed of an infrared temperature sensor, or a simple temperature measuring device composed of a thermistor. The embodiment of the present disclosure does not constitute a limitation on the temperature monitoring unit. Because the specific temperature measuring device used is different, the distance at which the temperature monitoring unit 11 is placed in close contact with the field effect transistor 13 is also different, and the present disclosure does not limit this. When the temperature monitoring unit 11 detects that the temperature of the tube body of the field effect transistor 13 exceeds the preset threshold, the resistance adjustment unit is controlled to adjust the resistance value to change the voltage difference between the gate and the source of the field effect transistor 13. Then the on and off of the field effect transistor 13 is controlled.
[0060] The present disclosure provides an over-temperature protection circuit for a field effect transistor, the circuit comprising: a temperature monitoring unit, a resistance adjustment unit and a field effect transistor; the temperature monitoring unit is electrically connected to the resistance adjustment unit and is placed in close contact with the field effect transistor; the resistance adjustment unit is electrically connected to the temperature monitoring unit and the field effect transistor respectively; the temperature monitoring unit is used to monitor the temperature of the field effect transistor and control the resistance adjustment unit to adjust the resistance value so as to control the temperature of the field effect transistor; the resistance adjustment unit is used to adjust the resistance value of the resistor electrically connected to the field effect transistor so as to control the on-off of the field effect transistor. Compared with the related art, the embodiment of the present disclosure monitors the temperature of the field effect transistor through the temperature monitoring unit, and can control the temperature of the tube body of the field effect transistor within a reasonable range, thereby preventing the field effect transistor from failing due to overheating of the tube body and affecting the safety of the circuit.
[0061] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 1 As shown, the resistance adjustment unit 12 includes at least one first adjustable resistor 121 and at least one second adjustable resistor 122;
[0062] At least one of the first adjustable resistors 121 is electrically connected to the source and gate of the field effect transistor 13; at least one of the second adjustable resistors 122 is electrically connected to the gate of the field effect transistor;
[0063] The first adjustable resistor 121 and the second adjustable resistor 122 are used to adjust the voltage between the source and the gate of the field effect transistor 13 .
[0064] Specifically in the embodiments of the present disclosure, Figure 1As shown, by reducing the resistance of the first adjustable resistor and / or increasing the resistance of the second adjustable resistor, the voltage difference (Ugs) between the source and the gate of the field effect transistor 13 can be changed. When Ugs is greater than the driving threshold Ugs(th), the field effect transistor 13 is disconnected, so as to protect the field effect transistor 13.
[0065] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the temperature monitoring unit 11 and the resistance adjusting unit 12 are composed of thermistors, wherein the thermistors include positive temperature coefficient resistors and negative temperature coefficient resistors.
[0066] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the first adjustable resistor is a negative temperature coefficient resistor and / or the second adjustable resistor is a positive temperature coefficient resistor;
[0067] The temperature threshold interval of the negative temperature coefficient resistor is the same as the temperature threshold interval of the positive temperature coefficient resistor.
[0068] Specifically in the embodiments of the present disclosure, Figure 2 As shown, there are three parts: Q1, resistor Rn, and resistor Rp. Figure 2 In the figure, S, D, and G are the source, drain, and gate of the commonly known MOSFET, while S, D, and G0 constitute the newly defined source, drain, and gate of the MOSFET in this scheme. Q1, Rn, and Rp are closely placed in the structure, and their temperatures can be considered to be the same. Q1 is a P-channel enhancement field effect transistor (P-MOSFET); Rn is a resistor with a negative temperature coefficient (NTC); and Rp is a resistor with a positive temperature coefficient (PTC).
[0069] The characteristics of Rn are as follows Figure 3 As shown:
[0070] When the temperature is less than T1, the value of Rn basically remains at Rn1; when the temperature is greater than T1, Rn drops rapidly from Rn1 to Rn2; when the temperature is greater than T2 (T2>T1), the value of Rn remains at Rn2;
[0071] Under ideal conditions, T1 and T2 are close and can be approximated to T12, that is, when the temperature is less than T12, the value of Rn is Rn1; when the temperature is greater than T12, the value of Rn is Rn2;
[0072] The characteristics of Rp are as follows Figure 4 As shown:
[0073] When the temperature is less than T3, the value of Rp basically remains at Rp1; when the temperature is greater than T3, Rp increases rapidly from Rp1 to Rp2; when the temperature is greater than T4 (T4>T3), the value of Rp remains at Rp2;
[0074] Under ideal conditions, T3 and T4 are close and can be approximated as T34, that is, when the temperature is less than T34, the value of Rp is Rp1; when the temperature is greater than T34, the value of Rp is Rp2.
[0075] When T12 and T34 are approximately equal, it is the preset over-temperature protection threshold; that is:
[0076] T prot ≈T 12 ≈T 34
[0077] Based on the characteristics of thermistors, the resistance of thermistors will change when the temperature reaches a preset threshold. Thermistors can not only realize the temperature monitoring function of the temperature monitoring unit 11, but also realize the function of the resistance adjustment unit 12 according to the resistance of the temperature adjustment resistor.
[0078] In order to clearly illustrate the embodiments of the present disclosure, a scenario description is provided here. Figure 5 , Figure 5 It is an anti-reverse circuit based on P-MOSFET.
[0079] The driving threshold of Q1 is Vgs(th).
[0080] During normal operation, that is, when Vgs is less than or equal to Vgs(th), Q1 is turned on.
[0081] like Figure 1 , when powered on, due to the body diode conduction,
[0082] V out =V in -V dsq1 ------(1)
[0083] Vdsq1 is the conduction voltage drop of the body diode of Q1, which is relatively small compared to Vin and can be ignored in the calculation, that is,
[0084] V out ≈V in ------(2)
[0085] but,
[0086]
[0087] When Vin reaches the minimum input voltage Vinmin, Vgs is less than or equal to Vgs(th), that is,
[0088]
[0089] Then, R2 and R1 should satisfy,
[0090]
[0091] When Vin is reversely connected, Vout and ground are at the same potential, Vgs=0, Q1 is cut off, and reverse connection is prevented.
[0092] In order to prevent the field effect transistor 13 from overheating and failing when the circuit is in overcurrent condition. Figure 2 The over-temperature protection circuit of the field effect transistor shown is used to ensure that the field effect transistor will not fail due to overheating. Figure 6 It is a schematic diagram of the anti-reverse circuit of the over-temperature protection circuit based on field effect transistor.
[0093] like Figure 6 As shown, when the temperature T of Q1 is lower than the over-temperature protection threshold Tprot, that is,
[0094] T <T prot ------(6)
[0095] Rp and Rn are Rp1 and Rn1 respectively, and satisfy:
[0096]
[0097] When the temperature T of Q1 is greater than the over-temperature protection threshold Tprot, that is,
[0098] T>T prot ------(8)
[0099] Rp and Rn are Rp2 and Rn2 respectively, and satisfy:
[0100]
[0101] At this time, Q1 is disconnected.
[0102] When Q1 is disconnected, the temperature T of Q1 decreases, and (7) is satisfied. If the over-temperature condition occurs again, (9) is satisfied again.
[0103] In order to clearly illustrate the embodiments of the present disclosure, another scenario description is provided here. Figure 7 , Figure 7 It is a switching circuit based on P-MOSFET.
[0104] When Ctl is grounded, Q1 is turned on; when Ctl is in high impedance state, Q1 is turned off.
[0105] When Q1 is turned on, R2 and R1 should satisfy:
[0106]
[0107] In order to prevent the field effect transistor 13 from overheating and failing when the circuit is in overcurrent condition. Figure 2 The over-temperature protection circuit of the field effect transistor shown is used to ensure that the field effect transistor will not fail due to overheating. Figure 8 A schematic diagram of a switch circuit of an over-temperature protection circuit based on a field effect transistor.
[0108] Please refer to the derivation of (6)-(9) above, as Figure 8 As shown, when the temperature T of Q1 is lower than the over-temperature protection threshold Tprot, the following conditions must be met:
[0109]
[0110] When the temperature T of Q1 is greater than the over-temperature protection threshold Tprot, the following conditions must be met:
[0111]
[0112] When Q1 is disconnected, the temperature T of Q1 decreases. The field effect transistor 13 continues to work, and if the over-temperature protection threshold Tprot is reached again, Q1 is disconnected again.
[0113] Fig. 9 A schematic flow chart of an over-temperature protection method for a field effect transistor provided in an embodiment of the present disclosure.
[0114] like Fig. 9 As shown, the method comprises the following steps:
[0115] Step 201, obtaining the body temperature of the field effect transistor.
[0116] Field effect transistors can fail due to overheating due to heat accumulation, especially in the case of high current. Continuous heating can cause the temperature to exceed the limit of the oxide layer and cause current failure.
[0117] In the embodiments of the present disclosure, the body temperature of the field effect transistor may be obtained by using an infrared temperature sensor or other device, or by using other temperature measuring devices such as a thermistor, etc. The embodiments of the present disclosure are not limited to this.
[0118] Step 202, determining whether the tube temperature exceeds a temperature threshold.
[0119] In the embodiments of the present disclosure, the temperature threshold is the over-temperature protection threshold of the field effect transistor, which is generally set according to the parameters of the specific field effect transistor; the temperature thresholds of different field effect transistors are different, and the present disclosure does not limit this. In order to protect the field effect transistor, the temperature threshold is generally set to be lower than the temperature value of over-temperature failure. If the tube body temperature is close to the temperature threshold, it means that the field effect transistor is at risk of over-heat failure.
[0120] Step 203: When the temperature of the tube body exceeds a temperature threshold, the field effect transistor is controlled to be disconnected.
[0121] In the embodiment of the present disclosure, when it is monitored that the tube body temperature exceeds the temperature threshold, it is necessary to control the field effect transistor to be disconnected to prevent the field effect transistor from overheating and failing. When the field effect transistor is disconnected, the tube body temperature of the field effect transistor decreases. The field effect transistor continues to work, and if the tube body temperature reaches the temperature threshold again, the field effect transistor will be disconnected again. This cycle control is followed to prevent the field effect transistor from overheating and failing.
[0122] In order to clearly illustrate the embodiments of the present disclosure, the embodiments of the present disclosure provide a flow chart of another over-temperature protection method for a field effect transistor.
[0123] like Fig.10 As shown, the method comprises the following steps:
[0124] Step 301, obtaining the body temperature of the field effect transistor.
[0125] Step 302, determining whether the tube temperature exceeds a temperature threshold.
[0126] Step 303, when the temperature of the tube body exceeds the temperature threshold, adjusting the voltage between the gate and the source of the field effect transistor to control the field effect transistor to be disconnected.
[0127] As an achievable method of an embodiment of the present disclosure, the voltage between the gate and the source of the field effect transistor is adjusted to control the field effect transistor to be disconnected, including: reducing the resistance of the first adjustable resistor and / or increasing the resistance of the second adjustable resistor to adjust the voltage between the gate and the source of the field effect transistor, wherein the first adjustable resistor is electrically connected to the gate and the source, respectively, and the second adjustable resistor is electrically connected to the gate; based on the voltage between the gate and the source after adjusting the resistance, the field effect transistor is controlled to be disconnected.
[0128] Specifically, in the embodiment of the present disclosure, the voltage difference between the gate and the source is adjusted by adjusting the size of the adjustable resistor connected to the field effect transistor, thereby controlling the field effect transistor to be disconnected.
[0129] In some embodiments of the present disclosure, the field effect transistor is controlled to be turned off by adjusting the voltage applied to the gate.
[0130] It should be noted that the embodiments of the present disclosure may include multiple steps. For the convenience of description, these steps are numbered, but these numbers do not limit the execution time slots or execution order between the steps; these steps can be implemented in any order, and the embodiments of the present disclosure do not limit this.
[0131] Corresponding to the above-mentioned over-temperature protection method of the field effect transistor, the present invention also provides an over-temperature protection device for the field effect transistor. Since the device embodiment of the present invention corresponds to the above-mentioned method embodiment, the details not disclosed in the device embodiment can be referred to the above-mentioned method embodiment, and will not be repeated in the present invention.
[0132] Fig.11 A schematic diagram of the structure of an over-temperature protection device for a field effect transistor provided in an embodiment of the present disclosure is shown in FIG. Fig.11 As shown, including:
[0133] An acquisition unit 41 is used to acquire the body temperature of the field effect transistor;
[0134] A judging unit 42, used to judge whether the temperature of the tube body exceeds a temperature threshold;
[0135] The control unit 43 is used to control the field effect transistor to be disconnected when the temperature of the tube body exceeds a temperature threshold.
[0136] Furthermore, in a possible implementation of the embodiment of the present disclosure, the control unit 43 is further configured to:
[0137] The voltage between the gate and the source of the field effect transistor is adjusted to control the field effect transistor to be disconnected.
[0138] Furthermore, in a possible implementation of the embodiment of the present disclosure, the control unit 43 is further configured to:
[0139] Adjusting the resistance of the first adjustable resistor to a smaller value and / or the resistance of the second adjustable resistor to a larger value to adjust the voltage between the gate and the source of the field effect transistor, wherein the first adjustable resistor is electrically connected to the gate and the source respectively, and the second adjustable resistor is electrically connected to the gate;
[0140] Based on the voltage between the gate and the source after adjusting the resistance value, the field effect transistor is controlled to be turned off.
[0141] It should be noted that the above explanation of the method embodiment is also applicable to the device of this embodiment, and the principle is the same, which is not limited in this embodiment.
[0142] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.
[0143] Fig.12 A schematic block diagram of an example electronic device 500 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0144] like Fig.12 As shown, the device 500 includes a computing unit 501, which can perform various appropriate actions and processes according to a computer program stored in a ROM (Read-Only Memory) 502 or a computer program loaded from a storage unit 508 to a RAM (Random Access Memory) 503. In the RAM 503, various programs and data required for the operation of the device 500 can also be stored. The computing unit 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An I / O (Input / Output) interface 505 is also connected to the bus 504.
[0145] A number of components in the device 500 are connected to the I / O interface 505, including: an input unit 506, such as a keyboard, a mouse, etc.; an output unit 507, such as various types of displays, speakers, etc.; a storage unit 508, such as a disk, an optical disk, etc.; and a communication unit 509, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0146] The computing unit 501 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a CPU (Central Processing Unit), a GPU (Graphic Processing Units), various dedicated AI (Artificial Intelligence) computing chips, various computing units running machine learning model algorithms, a DSP (Digital Signal Processor), and any appropriate processor, controller, microcontroller, etc. The computing unit 501 performs the various methods and processes described above, such as an over-temperature protection method for a field effect transistor. For example, in some embodiments, the over-temperature protection method for a field effect transistor may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 508. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the computing unit 501, one or more steps of the method described above may be performed. Alternatively, in other embodiments, the computing unit 501 may be configured to execute the aforementioned over-temperature protection method for the field effect transistor in any other appropriate manner (for example, by means of firmware).
[0147] Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, FPGAs (Field Programmable Gate Arrays), ASICs (Application-Specific Integrated Circuits), ASSPs (Application Specific Standard Products), SOCs (System On Chips), CPLDs (Complex Programmable Logic Devices), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that may be executed and / or interpreted on a programmable system including at least one programmable processor that may be a dedicated or general-purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0148] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0149] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a RAM, a ROM, an EPROM (Electrically Programmable Read-Only-Memory) or a flash memory, an optical fiber, a CD-ROM (Compact Dis sc Read-Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0150] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (Cathode-Ray Tube) or LCD (Liquid Crystal Display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0151] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: LAN (Local Area Network), WAN (Wide Area Network), the Internet, and blockchain networks.
[0152] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship between the client and the server is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services ("Virtual Private Server", or "VPS" for short). The server may also be a server of a distributed system, or a server combined with a blockchain.
[0153] It should be noted that artificial intelligence is a discipline that studies how computers can simulate certain human thought processes and intelligent behaviors (such as learning, reasoning, thinking, planning, etc.), and includes both hardware-level and software-level technologies. Artificial intelligence hardware technologies generally include technologies such as sensors, dedicated artificial intelligence chips, cloud computing, distributed storage, and big data processing; artificial intelligence software technologies mainly include computer vision technology, speech recognition technology, natural language processing technology, as well as machine learning / deep learning, big data processing technology, knowledge graph technology, and other major directions.
[0154] The various numerical numbers such as first and second involved in the present disclosure are only for the convenience of description and are not used to limit the scope of the embodiments of the present disclosure, but also indicate the order of precedence.
[0155] At least one in the present disclosure may also be described as one or more, and a plurality may be two, three, four or more, which is not limited in the present disclosure. In the embodiments of the present disclosure, for a technical feature, the technical features in the technical feature are distinguished by "first", "second", "third", "A", "B", "C" and "D", etc., and there is no order of precedence or size between the technical features described by the "first", "second", "third", "A", "B", "C" and "D".
[0156] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0157] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. An over-temperature protection circuit for a field effect transistor, characterized in that: include: Temperature monitoring unit, resistance adjustment unit and field effect transistor; The temperature monitoring unit is electrically connected to the resistance adjusting unit and is placed in close contact with the field effect transistor; The resistance adjustment unit is electrically connected to the temperature monitoring unit and the field effect transistor respectively; The temperature monitoring unit is used to monitor the temperature of the field effect transistor and control the resistance adjustment unit to adjust the resistance value so as to control the temperature of the field effect transistor; The resistance adjustment unit is used to adjust the resistance value of the resistor electrically connected to the field effect transistor so as to control the on and off of the field effect transistor.
2. The over-temperature protection circuit of the field effect transistor according to claim 1, characterized in that: The resistance adjustment unit includes at least one first adjustable resistor and at least one second adjustable resistor; At least one of the first adjustable resistors is electrically connected to the source and gate of the field effect transistor; at least one of the second adjustable resistors is electrically connected to the gate of the field effect transistor; The first adjustable resistor and the second adjustable resistor are used to adjust the voltage between the source and the gate of the field effect transistor.
3. The over-temperature protection circuit of the field effect transistor according to claim 2, characterized in that: The temperature monitoring unit and the resistance adjusting unit are composed of thermistors, wherein the thermistors include positive temperature coefficient resistors and negative temperature coefficient resistors.
4. The over-temperature protection circuit of the field effect transistor according to claim 3, characterized in that: The first adjustable resistor is a negative temperature coefficient resistor and / or the second adjustable resistor is a positive temperature coefficient resistor; The temperature threshold interval of the negative temperature coefficient resistor is the same as the temperature threshold interval of the positive temperature coefficient resistor.
5. A method for over-temperature protection of a field effect transistor, characterized in that: The method comprises: Obtain the body temperature of the field effect transistor; Determining whether the temperature of the tube body exceeds a temperature threshold; When the temperature of the tube body exceeds a temperature threshold, the field effect transistor is controlled to be disconnected.
6. The method according to claim 5, characterized in that The controlling the field effect transistor to be disconnected comprises: The voltage between the gate and the source of the field effect transistor is adjusted to control the field effect transistor to be disconnected.
7. The method according to claim 6, characterized in that The step of adjusting the voltage between the gate and the source of the field effect transistor to control the field effect transistor to be disconnected comprises: Adjusting the resistance of the first adjustable resistor to a smaller value and / or the resistance of the second adjustable resistor to a larger value to adjust the voltage between the gate and the source of the field effect transistor, wherein the first adjustable resistor is electrically connected to the gate and the source respectively, and the second adjustable resistor is electrically connected to the gate; Based on the voltage between the gate and the source after adjusting the resistance value, the field effect transistor is controlled to be turned off.
8. An over-temperature protection device for a field effect transistor, characterized in that: The device comprises: An acquisition unit, used for acquiring the body temperature of the field effect transistor; A judging unit, used to judge whether the temperature of the tube body exceeds a temperature threshold; The control unit is used to control the field effect transistor to be disconnected when the temperature of the tube body exceeds a temperature threshold.
9. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 5 to 7.
10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to cause the computer to execute the method according to any one of claims 5-7.