Memory virtualization method
Patent Information
- Application Number
- CN202411505048.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-01-28
Smart Images

Figure CN119376859A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of computer technology, and in particular relates to a memory virtualization method. Background Art
[0002] Advanced RISC Machines (ARM) is a type of microprocessor. Using ARM as the central processor is the main choice for mobile and embedded systems, reflecting the high energy efficiency of the ARM architecture. The popularity of ARM makes memory virtualization technology based on the ARM architecture increasingly important.
[0003] At present, memory virtualization utilizes a Linux kernel-based virtual machine (KVM). KVM is mainly used in the X86 architecture. KVM in the X86 architecture has become a module of the Linux kernel.
[0004] However, unlike the X86 architecture, the ARM architecture does not have a unified hardware standard. The ARM market is severely fragmented, with many different vertically integrated ARM platforms, all of which are non-standard hardware. This makes it difficult to implement KVM virtualization under the ARM architecture and easily leads to system instability. Summary of the invention
[0005] The embodiment of the present invention provides a memory virtualization method, which can implement KVM under the ARM architecture and ensure the stable operation of the system kernel.
[0006] In a first aspect, an embodiment of the present invention provides a memory virtualization method, comprising:
[0007] Get the physical memory address of the host based on the advanced RISC machine architecture;
[0008] Constructing a shadow page table based on the virtual memory address in the virtual machine to be constructed and the physical memory address of the host;
[0009] Based on the shadow page table, construct a memory shared page between the virtual machine and the host, wherein the memory shared page is used to implement switching between the memory of the virtual machine and the memory of the host;
[0010] Based on the rights domain of the host, a memory protection mechanism is constructed, wherein the memory protection mechanism is used to isolate the virtual machine monitor in the host, the operating system kernel of the virtual machine, and the application program and user process in the virtual machine;
[0011] Based on the shadow page table, memory shared pages and memory protection mechanism, memory virtualization is performed on the virtual machine.
[0012] In an achievable implementation, the step of constructing a shadow page table includes:
[0013] Obtaining a method for constructing a memory page table from an operating system kernel function of the host;
[0014] Based on the construction method, a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host is established;
[0015] The shadow page table is constructed based on a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host.
[0016] In an achievable implementation, it further includes:
[0017] The page table mapping mechanism of the shadow page table is configured to be the same as the page table mapping mechanism of the client page table, and the client page table is used to record the mapping relationship between the virtual memory address in the virtual machine and the physical memory address in the virtual machine.
[0018] In an achievable implementation, constructing a memory shared page between the virtual machine and the host based on the shadow page table includes:
[0019] determining a first memory address in the host;
[0020] Determining a second memory address in the virtual machine;
[0021] Establishing a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address;
[0022] The memory shared page is created based on a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address.
[0023] In an achievable implementation, it further includes:
[0024] Configuring the memory shared page to prohibit the virtual machine from accessing it;
[0025] The memory shared page is mapped to a target memory address of the virtual machine, where the target memory address is used to obtain information in the memory shared page when the virtual machine accesses it.
[0026] In an achievable implementation, it further includes:
[0027] When the host is abnormal, saving the current execution environment of the host based on the memory shared page;
[0028] Based on the memory shared page, obtaining the physical base address of the shadow page table;
[0029] Based on the physical base address and the current execution environment of the host, switch to the execution environment of the virtual machine.
[0030] In an achievable implementation, the memory protection mechanism is constructed based on the rights domain of the host, including:
[0031] Obtaining a level one page table in the host, wherein the level one page table is used to record a mapping relationship between a virtual memory of the virtual machine and a physical memory of the host;
[0032] Allocating a corresponding rights domain for the virtual memory described by the table entry of the first-level page table;
[0033] Configure a corresponding access mode for each rights domain. The access modes of different rights domains are different.
[0034] The memory protection mechanism is constructed based on the access mode of each rights domain.
[0035] In one practicable implementation, the memory protection mechanism includes at least one of the following:
[0036] Protecting the storage space of the application in the host and the memory space in the virtual machine;
[0037] Protecting the kernel of the operating system in the virtual machine and the storage space of the application in the virtual machine;
[0038] The memory spaces between the user processes in the virtual machine are isolated from each other.
[0039] In an achievable implementation, it further includes:
[0040] determining a target address in the virtual memory address;
[0041] Mapping an interrupt handler to the target address;
[0042] When an interrupt occurs, the interrupt handler is obtained at the target address and the interrupt is processed.
[0043] In an achievable implementation, it further includes:
[0044] Configuring mapped memory for memory mapped I / O between an operating system of the virtual machine and a virtual machine monitor;
[0045] Based on the mapped memory, the interrupt is sent to the operating system of the virtual machine through the virtual machine monitor, and the interrupt is transmitted from the hardware of the host to the virtual machine monitor.
[0046] In a second aspect, an embodiment of the present invention provides a memory virtualization device, the device comprising:
[0047] The address acquisition module is used to obtain the physical memory address of the host based on the advanced reduced instruction set machine architecture.
[0048] The page table construction module is used to construct a shadow page table based on the virtual memory address in the virtual machine to be constructed and the physical memory address of the host.
[0049] The shared page construction module is used to construct a memory shared page between the virtual machine and the host based on the shadow page table. The memory shared page is used to implement the switching between the memory of the virtual machine and the memory of the host.
[0050] The memory protection module is used to build a memory protection mechanism based on the host's rights domain. The memory protection mechanism is used to isolate the virtual machine monitor in the host, the operating system kernel of the virtual machine, and the application and user process in the virtual machine.
[0051] The virtual machine construction module is used to perform memory virtualization on the virtual machine based on a shadow page table, a memory sharing page and a memory protection mechanism.
[0052] In a third aspect, an embodiment of the present invention provides an electronic device, comprising: a processor and a memory storing computer program instructions, wherein the processor is configured to read the computer program instructions to execute the above method.
[0053] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, on which computer program instructions are stored, and when the computer program instructions are executed by the electronic device, the method described above is implemented.
[0054] In a fifth aspect, an embodiment of the present invention provides a computer program product, including a computer program, which implements the above method when executed by a processor.
[0055] The memory virtualization method provided by the embodiment of the present invention can realize KVM virtualization of the host under the ARM architecture by creating shadow page tables and memory shared pages and building a memory protection mechanism by using the rights domain of the host under the ARM architecture. At the same time, the memory protection mechanism is used to isolate the virtual machine monitor, the virtual machine operating system kernel, and the application and user process in the virtual machine, ensuring that the shadow page tables of the user processes of each different operating system can remain independent and do not interfere with each other, thereby improving the stability of the virtual machine system kernel. BRIEF DESCRIPTION OF THE DRAWINGS
[0056] In order to more clearly illustrate the technical solution of the embodiment of the present invention, the following is a brief introduction to the drawings required for use in the embodiment of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0057] Figure 1 A schematic diagram of a memory virtualization method according to an embodiment of the present invention;
[0058] Figure 2 The client process storage address and shadow page representation diagram provided by the embodiment of the present invention;
[0059] Figure 3 A flowchart for creating a memory shared page provided in an embodiment of the present application;
[0060] Figure 4 A structural diagram of a memory shared page provided in an embodiment of the present application;
[0061] Figure 5 A schematic diagram of possible access permissions for memory on the ARMv5 processor architecture provided in an embodiment of the present application;
[0062] Figure 6 It is a schematic diagram of the structure of a memory virtualization device provided by an embodiment of the present invention;
[0063] Figure 7 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0064] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present invention, rather than to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention.
[0065] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0066] KVM (Kernel-based Virtual Machine) is a virtual machine based on the Linux kernel and is an open source virtual machine technology. Currently, KVM that supports the X86 architecture has become a module of the Linux kernel, and its solution is mature, stable, and efficient. However, unlike systems based on the X86 architecture, Advanced RISC Machines (ARM) do not have a unified hardware standard. The ARM market is severely fragmented, with many different vertically integrated ARM platforms, all of which are non-standard hardware. In the absence of any actual hardware standards, there is an urgent need for a KVM solution that can cross the diversity of ARM hardware.
[0067] In addition, with the development of 5G and 6G networks, computing networks have gradually become an indispensable part of people's lives. The development of computing networks has also promoted the rapid development of different computing capabilities such as cloud phones and cloud computers. In the development process of KVM memory virtualization of the ARM architecture of cloud phones, there are many bottlenecks in resource utilization efficiency and stability. These problems have greatly restricted the rapid and efficient development of computing services such as cloud phones. The existing KVM solution that supports the X86 architecture lacks relevant memory protection mechanisms and interrupt handlers, and has certain shortcomings in system robustness, reliability and memory resource utilization efficiency. This is mainly due to the following two reasons: (1) Although KVM provides a common interface that can be used by all user space emulators, the Quick EMUlator (QEMU) is the only tool that can execute these data, and once the transmitted data is lost, no relevant information will be written to the ARM hardware. (2) In the Linux kernel, there is a part of KVM code related to the specific processor architecture details. When the client operating system (i.e., the operating system running inside the virtual machine) is running, any operations related to switching the processor state, switching the memory page table, and invalidating the cache memory must support the corresponding hardware processor architecture. Although KVM that supports the X86 architecture has become a module of the Linux kernel, KVM needs to intercept the interrupt handler when executing on the ARM architecture platform. Due to the memory mapping and allocation mechanism, if KVM is used as a kernel module in this case, the kernel will be unstable.
[0068] In order to implement the KVM virtualization solution on the ARM processor hardware architecture platform and solve the problems of poor system robustness, low reliability and low efficiency of memory resource utilization, an embodiment of the present invention provides a memory virtualization solution, which requires modification of the Linux kernel carrying the KVM module, and implements the KVM memory virtualization of the ARM architecture through five aspects: creating shadow page tables, creating shared pages, memory protection mechanism, mapping interrupt handlers to virtual memory, and I / O emulators, and solves the current problems of resource utilization efficiency and stability, better improves the utilization rate of computing power networks, and provides effective technical guarantees for the rapid development of computing power networks.
[0069] The following first introduces the memory virtualization method provided by the embodiment of the present invention.
[0070] Figure 1 The flowchart of the memory virtualization method provided by the embodiment of the present invention is shown in FIG. The execution subject of the method may be an electronic device under the ARM architecture. Specifically, the electronic device may be a computer, a mobile terminal, etc. Figure 1 As shown, the method may include the following steps:
[0071] Step S110: Obtain the physical memory address of the host based on the RISC machine architecture.
[0072] First of all, it should be noted that ARM has multiple definitions in practical applications. In this embodiment, ARM refers to the processor of ARM architecture. ARM's central processing unit is the main choice for mobile and embedded systems, reflecting the high energy efficiency of ARM architecture. This embodiment studies the solution of ARM server virtualization and improves the design of ARM virtualization to improve the efficiency of ARM server hardware, realize ARM server cluster support for cloud mobile phone business, and realize partitioning, isolation, encapsulation, independence, etc. after physical machine virtualization.
[0073] In this embodiment, the physical memory address of the host is the actual physical memory address in the computer system, corresponding to the virtual memory address. The host physical address can be managed by the operating system kernel, and only privileged code (such as kernel code) can directly access the physical memory address. The application needs to indirectly access the physical memory address through system calls or other interfaces.
[0074] Step S120: construct a shadow page table based on the virtual memory address in the virtual machine to be constructed and the physical memory address of the host.
[0075] In this embodiment, the shadow page table is a set of data structures maintained by the virtual machine monitor (Virtual Machine Monitor, VMM), which can be used to convert the virtual memory address of the virtual machine into the physical memory address of the host. This embodiment implements the function of simulating the memory management unit (Memory Management Unit, MMU) in KVM by creating a shadow page table. Among them, the VMM runs on the physical host and is responsible for managing and controlling the execution of the virtual machine.
[0076] The shadow page table allows the virtual machine monitor to intercept and modify the memory access of the client operating system. The shadow page table maps the virtual memory address of the client operating system to the physical memory address of the physical host. The client operating system specifically refers to the operating system that runs in a virtualized environment as part of a virtual machine. The client operating system is like running directly on a physical computer, but it actually runs under the control of the virtual machine monitor.
[0077] In a virtualized environment, each virtual machine has its own virtual memory address, which is separate from the physical memory address of the host. In order to achieve memory isolation between the virtual machine and the host, a shadow page table needs to be created through the VMM to map the virtual memory address of the virtual machine to the physical memory address of the host. In this way, when the virtual machine tries to access its virtual memory, it actually accesses the physical memory of the host through the shadow page table.
[0078] In this embodiment, a one-to-one correspondence between virtual memory addresses and physical memory addresses can be established, and then the one-to-one correspondence can be recorded in a shadow page table. When the virtual machine accesses a virtual memory address, the corresponding physical memory address can be found through the shadow page table. Based on the found physical memory address, the virtual machine can actually access the physical memory of the host.
[0079] In this embodiment, through the shadow page table, the VMM can ensure that memory access between virtual machines and between the virtual machine and the host does not interfere with each other. In addition, the VMM can manage and allocate the physical memory resources of the host through the shadow page table to meet the needs of different virtual machines. At the same time, the shadow page table can also help the VMM implement memory protection policies, such as preventing virtual machines from accessing sensitive memory areas of the host.
[0080] Step S130: Based on the shadow page table, a memory sharing page between the virtual machine and the host is constructed, wherein the memory sharing page is used to implement switching between the memory of the virtual machine and the memory of the host.
[0081] In this embodiment, since the client operating system runs in an address space independent of the host operating system, and the ARM processor architecture needs to switch the address space when mapping the old address space and the new address space to the same virtual memory address mapping page, otherwise the result of the operation behavior will be unpredictable. For this reason, KVM needs to provide an address environment switching function, so the address environment switching function is implemented by creating a memory shared page.
[0082] The memory shared pages refer to pages that can be shared by the host operating system and the guest operating system, and are mapped to the same address space in the host operating system kernel and the guest operating system kernel.
[0083] In this embodiment, when creating a memory shared page, a physical page may be first allocated to the memory shared page based on the shadow page table, and then the allocated physical page may be mapped to the virtual address space of the host operating system kernel and the guest operating system kernel.
[0084] In addition, in some other implementations, when a process modifies data in a shared memory page, these changes are visible to all processes that own this shared memory. Therefore, a synchronization mechanism for the shared memory page needs to be established to ensure data consistency.
[0085] Step S140: construct a memory protection mechanism based on the rights domain of the host.
[0086] Step S150: Based on the shadow page table, memory shared pages and memory protection mechanism, memory virtualization is performed on the virtual machine.
[0087] Among them, the memory protection mechanism is used to isolate the virtual machine monitor in the host, the operating system kernel of the virtual machine, and the application and user processes in the virtual machine.
[0088] In this embodiment, memory protection can be implemented in the ARM architecture through rights domains. Specifically, the memory area is divided into different permission levels through rights domains, and each level corresponds to a specific access control policy. The memory space of different components is isolated to prevent illegal access and interference between different components. By setting different rights domains, the independence and security between the virtual machine monitor, the client kernel, and the client user state memory space can be ensured.
[0089] There are 16 rights domains in ARM, which are represented by Domain0 to Domain15. A table entry in the first-level page table describes a 1-megabyte virtual address segment. In the first-level table entry, 4 bits are used to identify the rights domain to which the 1-megabyte virtual address segment belongs. Each rights domain can be configured with different access modes (i.e., permission levels).
[0090] In this embodiment, the virtual machine monitor is responsible for managing all resources in the virtualized environment. In the ARM architecture, the virtual machine monitor uses the rights domain protection mechanism to isolate itself from the memory space of the client operating system to ensure the independence and security between them. The client kernel refers to the operating system kernel running in the virtualized environment. Each client operating system has its own kernel, which is scheduled and managed by the virtual machine monitor. In the ARM architecture, the client kernel is protected by the rights domain protection mechanism to ensure that its memory space is isolated from other client kernels and the memory space of the virtual machine monitor. In addition, in the virtualized environment, the user process of each client operating system has its own shadow page table, and these shadow page tables can also be kept independent and non-interfering through the rights domain protection mechanism. In this way, even if multiple client operating systems run on the same physical hardware at the same time, their user processes can maintain isolation and security from each other.
[0091] This embodiment creates shadow page tables and memory shared pages, and uses ARM rights domains to build a memory protection mechanism, which can implement a KVM virtualization solution on an ARM processor hardware architecture platform. At the same time, the memory protection mechanism is used to isolate the virtual machine monitor, the client kernel (i.e., the virtual machine operating system kernel) and the client user state memory space (i.e., the application and user process in the virtual machine). It ensures that the shadow page tables of the user processes of each different client operating system can remain independent and do not interfere with each other. Compared with the existing kvm memory virtualization solution, the system kernel stability can be improved.
[0092] The process of constructing the shadow page table is described in detail below through some embodiments.
[0093] In the present embodiment, the ARM processor hardware architecture has a two-level page table structure, the first level contains 4096 entry addresses, and the second level has 256 entry addresses. In practical applications, the Linux kernel usually needs to control each page to correspond to a page table, and needs to store more information supported by the ARM hardware platform in the page table entry. This makes the Linux kernel contain several mechanisms that enable the two levels of page tables to exist in a mutually supportive manner. In order to avoid further processing of these two page table structures and to increase the efficiency of memory allocation management at a higher level, a shadow page table can be created directly using the method of creating a memory page table in the Linux kernel function.
[0094] Among them, based on the method of creating a memory page table, the shadow page table is operated by the memory mapping mechanism of Linux to establish a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host. The shadow page table can be created by modifying the function of the memory management module in the Linux kernel. After the shadow page table is created, there is a function in KVM that can find the physical memory address of the host corresponding to the virtual memory address of the client system through the shadow page.
[0095] The embodiment of the present application directly uses the method of creating a memory page table in the Linux kernel function to create a shadow page table, which can reduce the modification process and improve the efficiency of page table creation. At the same time, creating a shadow page table can achieve memory isolation, resource management, security and performance optimization. By using the shadow page table reasonably, KVM can effectively manage and protect the memory space of each virtual machine, thereby achieving stable and reliable operation of the virtualization environment.
[0096] In other implementations, when creating a shadow page table, the page table mapping mechanism of the shadow page table needs to be configured to be the same as the page table mapping mechanism of the client page table, wherein the client page table is used to record the mapping relationship between the virtual memory address in the virtual machine and the physical memory address in the virtual machine.
[0097] In this embodiment, the page table mapping mechanism of the shadow page table is configured to be the same as the page table mapping mechanism of the client page table. Specifically, it means that the table entries of the shadow page table are of the same type as those of the client page table, that is, each item in the shadow page table has the same format and meaning as the corresponding item in the client page table.
[0098] Among them, when the client page table adopts segment descriptors, it is not easy to maintain the consistency of the table entries of the shadow page table and the table entries of the client page table. In practical applications, the Linux kernel uses 4 kilobyte pages as units, and KVM needs to obtain the physical memory page of the Linux user in order to map it to the address space of the virtual machine. However, due to limited physical memory resources and possible fragmentation and other problems, it cannot be guaranteed that there is a large enough continuous physical memory block (such as 1 megabyte) on the host to meet the memory mapping requirements. Therefore, the table entries of the shadow page table can also adopt the 4 kilobyte small page mapping mechanism to keep the same page table mapping mechanism as the client page table. That is, each entry in the shadow page table will correspond to a 4 kilobyte physical memory page.
[0099] For example, Figure 2 The client process storage address and shadow page representation diagram provided by the embodiment of the present invention are as follows: Figure 2 As shown, when the guest operating system modifies the page table, the KVM must be able to simultaneously update the shadow page table.
[0100] Among them, since the guest operating system is booted in the real mode of the ARM processor, it is necessary to first create a boot page table that maps from the guest physical address to the host physical address. Once the boot code is executed to create a basic page table data structure and enable the memory management unit, it is necessary to intercept all guest page table update operations and update the shadow page table accordingly. The guest operating system will maintain a unique page table for each process, and each page table requires a corresponding shadow page table.
[0101] The embodiment of the present application uses a small page mapping mechanism for the table entries of the shadow page table, which is the same as the page table mapping mechanism of the client page table, so that physical memory resources can be managed more flexibly and performance loss caused by memory fragmentation or discontinuity can be reduced. At the same time, this also helps to simplify the mapping relationship between the shadow page table and the client page table and reduce maintenance costs.
[0102] The following describes in detail how to create a memory shared page through some embodiments.
[0103] In this embodiment, since the client operating system runs in an address space independent of the host system, and the ARM processor architecture needs to switch the address space when mapping the old address space and the new address space to the same virtual address mapping page, otherwise the result of the operation behavior is unpredictable. Therefore, it is necessary to create a memory shared page to implement the address environment switching function.
[0104] For example, Figure 3 The flowchart for creating a memory shared page provided in the embodiment of the present application is as follows: Figure 3 As shown, it may specifically include the following steps:
[0105] Step S310: Determine a first memory address in the host.
[0106] Step S320: Determine a second memory address in the virtual machine.
[0107] Step S330: establishing a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address.
[0108] Step S340: creating a memory shared page based on the mapping relationship between the first memory address and the shared address and the mapping relationship between the second memory address and the shared address.
[0109] In this embodiment, the shared address may refer to a piece of physical memory allocated to the memory shared page before it is created. After the shared address is determined, a memory area (i.e., the first memory address) may be selected in the host and mapped to the shared address. At the same time, a memory area (i.e., the second memory address) may be selected in the virtual machine and mapped to the shared address. The specific mapping process may be implemented by modifying the page table or using a memory mapping function.
[0110] Among them, the allocation of physical memory can be achieved by calling the memory management function. In addition, the allocated physical memory should be large enough to accommodate the content of the memory shared page.
[0111] In other implementations, when creating a memory shared page, the size of the shared page may be adjusted based on specific application scenarios and requirements to ensure that the data structure or information to be shared can be accommodated.
[0112] The embodiments of the present application can realize functions such as data sharing and transmission and synchronization and switching of address environments by creating memory shared pages, thereby improving the performance and efficiency of the virtualization environment and further enhancing the security and stability of the system.
[0113] In some implementations, the memory shared page may be configured to prohibit the virtual machine from accessing it, and then the memory shared page may be mapped to a target memory address of the virtual machine, wherein the target memory address is used to obtain information in the memory shared page when the virtual machine accesses it.
[0114] In this embodiment, the shared page is set to a mode that prohibits the client operating system from accessing it, and any read and write operations of the client operating system on it will cause a page fault exception.
[0115] Specifically, KVM maps the shared memory page at different virtual addresses of the guest operating system and the host operating system, and maps the guest page table to the wrong address, so that the shared memory page is invisible to the guest operating system. In addition, for the host Linux user, the shared page uses the reserved memory area of Linux.
[0116] In order to ensure that the client operating system can still obtain the information in the memory shared page, you can select the target memory address in the virtual machine client operating system, and then map the target memory address to the memory shared page. In this way, although the virtual machine cannot directly access the memory shared page, it can obtain the information in the memory shared page through the target memory address.
[0117] The embodiment of the present application can effectively prevent the client operating system from performing illegal operations on the shared pages and protect the integrity and security of the system by configuring the memory shared pages to prohibit virtual machine access. At the same time, it also provides strong support for the address environment switching function of KVM, so that switching and synchronization operations can be smoothly performed between different virtual address spaces.
[0118] Furthermore, Figure 4 The structure diagram of the memory shared page provided in the embodiment of the present application is as follows: Figure 4 As shown, the memory shared page is a data structure used to store information required for switching between the client and host system environments. The code portion includes two table entry pointers, which are represented by _vcpu_run and _exception_return respectively.
[0119] In this embodiment, when the host is abnormal, the table entry pointer represented by _exception_return is used to save the host system environment so that the host system environment can be restored after the exception occurs. The table entry pointer represented by vcpu_run is used to switch to the client. When the control right needs to be handed over to the client, the system will use the vcpu_run pointer to jump to the client's code execution position.
[0120] Among them, when switching to the client system environment, the code in the memory shared page reads the base physical address of the first-level page table from a specific register called the Translation Table Base Register (TTBR) to correctly map the client's virtual address to the physical address when the environment switches.
[0121] Specifically, after an exception occurs, the exception handler calls the table entry pointer represented by _exception_return to save the host system environment, and the data segment at the top of the page table is used to complete the environment switch. When switching to the client system environment, the code in the shared page reads the base physical address of the first-level page table from a special register called the Translation Table Base Register (TTBR). The data segment also contains the physical base address of the shadow page table, and the environment switching code writes the base address into the hardware translation table base register. After the page table switch is completed, the stack pointer will be reclaimed by the system to ensure the independence and security of the client environment.
[0122] The embodiment of the present application can switch from the host system to the client environment through the table entry pointer and the conversion table base register in the memory shared page, and save the host system state and restore it to the host environment after an exception occurs. At the same time, the data segment in the memory shared page contains the physical base address of the shadow page table, which is used to map the virtual address of the client to the physical address, ensuring that the client can correctly access its resources.
[0123] The construction of the memory protection mechanism is introduced below through some embodiments.
[0124] In this embodiment, there are 16 rights domains in ARM, which are represented by Domain0 to Domain15. A table entry of the first-level page table describes a 1-megabyte virtual address segment. In the first-level table entry, 4 bits are used to identify the rights domain to which the 1-megabyte virtual address segment belongs. Then, the corresponding access mode is configured for each rights domain, and a memory protection mechanism is constructed based on the access mode of each rights domain.
[0125] Among them, the access modes of different rights domains are different. Each table entry in the first-level page table usually describes a larger virtual address segment (for example, a 1-megabyte virtual address segment), and each table entry contains a base address pointing to the corresponding second-level page table. The main function of the first-level page table is to provide a high-level index, through which more detailed mapping information (i.e., the second-level page table) can be quickly found.
[0126] Exemplarily, each rights domain can have the following three modes:
[0127] (1) No access mode. Any access to a page belonging to this mode will result in an error.
[0128] (2) Client mode: any process can access pages belonging to this mode.
[0129] (3) Management mode: Before accessing a page belonging to this mode, its access permissions need to be checked, and the access permissions are defined according to the processor's privilege level.
[0130] For example, Figure 5 A schematic diagram of possible access permissions for memory on the ARMv5 processor architecture provided in an embodiment of the present application, such as Figure 5 As shown, the privilege level can be divided into privileged mode and user mode. Under different access rights, the access mode can be specifically divided into "inaccessible", "readable and writable", "read-only", and "readable and writable".
[0131] In addition, since the client operating system runs in user mode, KVM needs to convert the client page table access rights to the same protection level as the shadow page table. The rights domain settings can be simply copied from the client page table, and the rights domain of the shadow page table can be directly set. The rights domain memory protection mechanism can be easily implemented in the shadow page table. However, the memory shared page and the exception response function vector table need to have privileged read and write access rights, so these pages need to be mapped using the client rights domain. Since a 1-megabyte virtual address can set a rights domain, the table entry of the first-level page table can specify the rights domain for the client page, exception vector page, or shared page. Therefore, KVM can change the rights domain of the table entry of the first-level page table to the client rights domain, and modify the access rights of the table entry of the shadow page table in the corresponding 1-megabyte address space according to the relevant configuration of the client rights domain.
[0132] Furthermore, the memory protection mechanism can be divided into the following three levels:
[0133] ①The storage space of the KVM hypervisor and the client kernel storage space are protected from each other.
[0134] ②Since the client operating system runs in user mode, KVM needs to protect the memory space of the client operating system kernel and the user process of the client operating system from each other.
[0135] ③ Maintain the memory spaces of processes in the client system user space to be independent of each other to avoid mutual interference.
[0136] In this embodiment, for the memory protection mechanism ①, this is to prevent the client operating system from directly accessing or modifying the memory space of the KVM hypervisor, thereby ensuring the stability and security of the KVM. Through this isolation, even if the client operating system has an error or is attacked by malware, it will not affect the normal operation of the KVM hypervisor. As for the memory protection mechanism ②, this is to prevent the user process of the client operating system from directly accessing or modifying the memory space of the client operating system kernel, thereby ensuring the stability and security of the client operating system. Through this isolation, even if the user process of the client operating system has an error. As for the memory protection mechanism ③, this is to prevent the memory spaces of processes in different client system user spaces from interfering with each other, thereby ensuring that each process can run independently in its own memory space. Through this isolation, even if a process has an error or is attacked by malware, it will not affect the normal operation of other processes.
[0137] The embodiment of the present application utilizes the ARM rights domain to implement a memory protection mechanism to isolate the virtual machine monitor, the client kernel and the client user-state memory space, thereby ensuring that the shadow page tables of the user processes of each different client operating system can remain independent and do not interfere with each other, so that the protection between user processes is unique to the virtual system.
[0138] In some embodiments, since an interrupt may occur, an interrupt handler needs to be mapped to the virtual memory. Specifically, a target address can be determined in the virtual memory address; then the interrupt handler is mapped to the target address. When an interrupt occurs, the interrupt handler can be obtained at the target address and the interrupt can be processed.
[0139] In this embodiment, when an interrupt occurs, the hardware usually starts executing instructions from a fixed virtual memory address, so when running the host operating system and the client operating system, the entire interrupt handler needs to be constantly mapped to the corresponding virtual memory address (ie, the target address).
[0140] Specifically, there are two different ways to implement this process for different customer systems:
[0141] The first one: For Linux systems, the highest 64 megabytes of the main memory space in Linux systems [0xFFFF0000-0xFFFFFFFE] are not used, and this part of the address space can be used by the virtual machine monitor. When an interrupt occurs, the interrupt handler either switches the kernel page table of the host operating system back and handles the interrupt, or in some cases directly handles the interrupt.
[0142] The second method: For other client operating systems, if there is no reserved address space, the memory pages occupied by the virtual machine monitor can be protected, and the memory access operation of each client kernel can be simulated. Compared with the first method, the execution efficiency of the second method is higher.
[0143] The embodiment of the present application maps an interrupt response program to the virtual memory. When an interrupt occurs, the interrupt handler either switches the kernel page table of the host operating system back and handles the interrupt, or directly handles the interrupt in some cases, or protects the memory pages occupied by the virtual machine monitor and simulates the memory access operations of each client kernel, thereby avoiding memory abnormalities.
[0144] In some embodiments, when an interrupt occurs, it is necessary to transmit the interrupt from the hardware to the virtual machine monitor (e.g., QEMU) and send the interrupt from the virtual machine monitor to the client operating system. To this end, it is necessary to configure a mapped memory for the memory-mapped I / O between the virtual machine's operating system and the virtual machine monitor; then, based on the mapped memory, the interrupt is sent to the virtual machine's operating system through the virtual machine monitor. The interrupt is transmitted from the host's hardware to the virtual machine monitor.
[0145] In this embodiment, KVM can be used to map memory for memory-mapped I / O (MMIO) between the client operating system and QEMU, transmit interrupts from hardware to QEMU, and send interrupts from QEMU to the client operating system.
[0146] Among them, the client operating system kernel believes that part of its physical memory address space is used by a device outside the hardware, and maps this part of physical memory as part of the client kernel address space. From another perspective, since allocating memory for user space processes will cause a contiguous virtual address range to use a possibly discontinuous physical memory block, QEMU also needs to allocate memory in this way. QEMU will tell KVM through the call to set the user memory area that it will emulate hardware in memory belonging to a specific virtual address area, and the client operating system can find this memory through a corresponding physical address area that it can access. KVM will create KVM memory spaces in turn to carry these contents. These are all implemented in the KVM architecture support part of the Linux kernel source code directory to ensure that these memory areas can be correctly mapped to the above shadow page tables.
[0147] The embodiment of the present application uses an I / O emulator solution, uses KVM to map memory for MMIO between the client operating system and QEMU, transmits interrupts from hardware to QEMU and sends interrupts from QEMU to the client operating system, and implements I / O emulation under the ARM architecture.
[0148] The following is an embodiment of the device of the present application, which can be used to execute the embodiment of the method of the present application. For details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the method of the present application.
[0149] Figure 6 FIG. 1 is a schematic diagram of the structure of a memory virtualization device provided by an embodiment of the present invention. Figure 6 As shown, the memory virtualization device 600 may include an address acquisition module 610 , a page table construction module 620 , a shared page construction module 630 , a memory protection module 640 and a virtual machine construction module 650 .
[0150] The address acquisition module 610 is used to acquire the physical memory address of the host based on the RISC machine architecture.
[0151] The page table construction module 620 is used to construct a shadow page table based on the virtual memory address in the virtual machine to be constructed and the physical memory address of the host.
[0152] The shared page construction module 630 is used to construct a memory shared page between the virtual machine and the host based on the shadow page table. The memory shared page is used to implement the switching between the memory of the virtual machine and the memory of the host.
[0153] The memory protection module 640 is used to construct a memory protection mechanism based on the rights domain of the host, wherein the memory protection mechanism is used to isolate the virtual machine monitor in the host, the operating system kernel of the virtual machine, and the application program and user process in the virtual machine.
[0154] The virtual machine construction module 650 is used to perform memory virtualization on the virtual machine based on the shadow page table, memory sharing page and memory protection mechanism.
[0155] In one example, the page table construction module can be specifically used to: obtain a memory page table construction method from the host's operating system kernel function; then, based on the construction method, establish a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host; and based on the mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host, construct a shadow page table.
[0156] In one example, a mechanism configuration module is also included for configuring the page table mapping mechanism of the shadow page table to be the same as the page table mapping mechanism of the client page table, where the client page table is used to record the mapping relationship between the virtual memory address in the virtual machine and the physical memory address in the virtual machine.
[0157] In one example, the shared page construction module can be specifically used to: determine a first memory address in the host and simultaneously determine a second memory address in the virtual machine; then establish a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address; and based on the mapping relationship between the first memory address and the shared address and the mapping relationship between the second memory address and the shared address, create a memory shared page.
[0158] In one example, an access control module is also included, which is used to configure the memory shared page to prohibit the virtual machine from accessing it; and map the memory shared page to the target memory address of the virtual machine, and the target memory address is used to obtain information in the memory shared page when the virtual machine accesses it.
[0159] In one example, an environment switching module is also included, which is used to save the current execution environment of the host based on the memory shared page when the host is abnormal; and obtain the physical base address of the shadow page table based on the memory shared page; and then switch to the execution environment of the virtual machine based on the physical base address and the current execution environment of the host.
[0160] In one example, the memory protection module can be used to: obtain the first-level page table in the host; then allocate the corresponding rights domain for the virtual memory described by the table entry of the first-level page table; then configure the corresponding access mode for each rights domain, and finally build a memory protection mechanism based on the access mode of each rights domain. Among them, the first-level page table is used to record the mapping relationship between the virtual memory of the virtual machine and the physical memory of the host, and the access modes of different rights domains are different.
[0161] In one example, the memory protection mechanism includes at least one of the following: protecting the storage space of the application in the host and the memory space in the virtual machine, protecting the kernel of the operating system in the virtual machine and the storage space of the application in the virtual machine, and isolating the memory space between each user process in the virtual machine.
[0162] In one example, an address mapping module is also included, which is used to determine the target address in the virtual memory address; then map the interrupt handler to the target address; and when an interrupt occurs, obtain the interrupt handler at the target address and process the interrupt.
[0163] In one example, a hardware emulation module is further included, which is used to configure a mapped memory for the memory-mapped I / O between the operating system of the virtual machine and the virtual machine monitor; then, based on the mapped memory, an interrupt is sent to the operating system of the virtual machine through the virtual machine monitor, wherein the interrupt is transmitted from the hardware of the host to the virtual machine monitor.
[0164] The device provided in the embodiment of the present application can be used to execute the method in the above embodiment. Its implementation principle and technical effect are similar and will not be repeated here.
[0165] Figure 7 Schematic diagram of the hardware structure of the electronic device provided by the embodiment of the present invention. Figure 7 As shown, the electronic device 700 may include a processor 701 and a memory 702 storing computer program instructions. Specifically, the processor 701 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiment of the present invention.
[0166] The memory 702 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 702 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In one example, the memory 702 may include a removable or non-removable (or fixed) medium, or the memory 702 is a non-volatile solid-state memory. The memory 702 may be inside or outside the integrated gateway disaster recovery device.
[0167] In one example, the memory 702 may be a read-only memory (ROM). In one example, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or a flash memory, or a combination of two or more of these.
[0168] The memory 702 may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium device, an optical storage medium device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, in general, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present disclosure.
[0169] The processor 701 implements the method in the above embodiment by reading and executing the computer program instructions stored in the memory 702 .
[0170] In one example, the electronic device 700 may further include a communication interface 703 and a bus 704. Figure 7 As shown, the processor 701, the memory 702, and the communication interface 703 are connected via a bus 704 and communicate with each other.
[0171] The communication interface 703 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiment of the present invention.
[0172] Bus 704 includes hardware, software or both, and the components of electronic equipment are coupled to each other. For example, but not limitation, bus may include accelerated graphics port (Accelerated Graphics Port, AGP) or other graphics bus, enhanced industry standard architecture (Extended Industry Standard Architecture, EISA) bus, front side bus (Front Side Bus, FSB), hypertransmission (Hyper Transport, HT) interconnection, industry standard architecture (Industry Standard Architecture, ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 704 may include one or more buses. Although the embodiment of the present invention describes and shows a specific bus, the present invention considers any suitable bus or interconnection. The electronic device can realize the memory virtualization method described in conjunction with the above embodiment.
[0173] In addition, in combination with the method in the above embodiment, the embodiment of the present invention can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, the method in the above embodiment is implemented.
[0174] The embodiments of the present application also provide a computer program product, including a computer program, which implements the method in the above embodiments when the computer program is processed and executed.
[0175] It should be clear that the present invention is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.
[0176] The functional blocks shown in the structural block diagram described above can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), appropriate firmware, plug-in, function card, etc. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or communication link by a data signal carried in a carrier. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, read-only memory (Read-Only Memory, ROM), flash memory, erasable read-only memory (Erasable ReadOnly Memory, EROM), floppy disks, compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM), optical discs, hard disks, optical fiber media, radio frequency (Radio Frequency, RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.
[0177] It should also be noted that the exemplary embodiments mentioned in the present invention describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiments, or in a different order from the embodiments, or several steps can be performed simultaneously.
[0178] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.
[0179] The above is only a specific implementation of the present invention. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the system, module and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be covered within the protection scope of the present invention.
Claims
1. A memory virtualization method, characterized in that: include: Get the physical memory address of the host based on the advanced RISC machine architecture; Constructing a shadow page table based on the virtual memory address in the virtual machine and the physical memory address of the host; Based on the shadow page table, construct a memory shared page between the virtual machine and the host, wherein the memory shared page is used to implement switching between the memory of the virtual machine and the memory of the host; Based on the rights domain of the host, a memory protection mechanism is constructed, wherein the memory protection mechanism is used to isolate the virtual machine monitor in the host, the operating system kernel of the virtual machine, and the application program and user process in the virtual machine; Based on the shadow page table, memory shared pages and memory protection mechanism, memory virtualization is performed on the virtual machine.
2. The method according to claim 1, characterized in that The step of constructing a shadow page table includes: Obtaining a method for constructing a memory page table from an operating system kernel function of the host; Based on the construction method, a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host is established; The shadow page table is constructed based on a mapping relationship between the virtual memory address of the virtual machine and the physical memory address of the host.
3. The method according to claim 1, characterized in that Also includes: The page table mapping mechanism of the shadow page table is configured to be the same as the page table mapping mechanism of the client page table, and the client page table is used to record the mapping relationship between the virtual memory address in the virtual machine and the physical memory address in the virtual machine.
4. The method according to claim 1, characterized in that: The step of constructing a memory shared page between the virtual machine and the host based on the shadow page table includes: determining a first memory address in the host; Determining a second memory address in the virtual machine; Establishing a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address; The memory shared page is created based on a mapping relationship between the first memory address and the shared address and a mapping relationship between the second memory address and the shared address.
5. The method according to claim 4, characterized in that Also includes: Configuring the memory shared page to prohibit the virtual machine from accessing it; The memory shared page is mapped to a target memory address of the virtual machine, where the target memory address is used to obtain information in the memory shared page when the virtual machine accesses it.
6. The method according to claim 4, characterized in that Also includes: When the host is abnormal, saving the current execution environment of the host based on the memory shared page; Based on the memory shared page, obtaining the physical base address of the shadow page table; Based on the physical base address and the current execution environment of the host, switch to the execution environment of the virtual machine.
7. The method according to claim 1, characterized in that The memory protection mechanism is constructed based on the rights domain of the host, including: Obtaining a level one page table in the host, wherein the level one page table is used to record a mapping relationship between a virtual memory of the virtual machine and a physical memory of the host; Allocating a corresponding rights domain for the virtual memory described by the table entry of the first-level page table; Configure a corresponding access mode for each rights domain. The access modes of different rights domains are different. The memory protection mechanism is constructed based on the access mode of each rights domain.
8. The method according to claim 7, characterized in that The memory protection mechanism includes at least one of the following: Protecting the storage space of the application in the host and the memory space in the virtual machine; Protecting the kernel of the operating system in the virtual machine and the storage space of the application in the virtual machine; The memory spaces between the user processes in the virtual machine are isolated from each other.
9. The method according to any one of claims 1 to 8, characterized in that Also includes: determining a target address in the virtual memory address; Mapping an interrupt handler to the target address; When an interrupt occurs, the interrupt handler is obtained at the target address and the interrupt is processed.
10. The method according to claim 9, characterized in that Also includes: Configuring mapped memory for memory mapped I / O between an operating system of the virtual machine and a virtual machine monitor; Based on the mapped memory, the interrupt is sent to the operating system of the virtual machine through the virtual machine monitor, and the interrupt is transmitted from the hardware of the host to the virtual machine monitor.
Citation Information
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Method for directly connecting serial port equipment to client based on ARM64 (Advanced RISC Machines 64) architecture
CN120277021A