Multi-range capacitance measurement circuit and method based on constant current charging and discharging

Abstract

The present invention discloses a multi-range capacitance measurement circuit and method based on constant current charging and discharging, and relates to the field of capacitance testing technology. The circuit includes: a power supply module, the output end of the power supply module is electrically connected to one end of the capacitance to be measured; a resistor shunt module, the input end of the resistor shunt module is electrically connected to the other end of the capacitance to be measured; an integration module, the input end of the integration module is electrically connected to the output end of the resistor shunt module; a sampling module, the input end of the sampling module is electrically connected to the output end of the integration module; a control module, which is electrically connected to the power supply module, the resistor shunt module, the integration module and the sampling module respectively; an adjustable window threshold comparison module, the first input end of the adjustable window threshold comparison module is electrically connected to the output end of the integration module, and the second input end of the adjustable window threshold comparison module is electrically connected to the control module. According to the circuit of the embodiment of the present invention, a multi-range capacitance test can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitance testing, and in particular to a multi-range capacitance value measurement circuit and method based on constant current charging and discharging. Background Art

[0002] MLCC (Multi-layer Ceramic Capacitors) is made of ceramic dielectric diaphragms with printed electrodes (inner electrodes) stacked in an offset manner, sintered at a high temperature once to form a ceramic chip, and then a metal layer (outer electrode) is sealed at both ends of the chip to form a monolithic structure, so it is also called a monolithic capacitor.

[0003] The capacitance test of MLCC capacitors is one of the most important test parameters of MLCC capacitors. For capacitance measurement, the capacitance test meters currently on the market are not only expensive, but also have a single channel and are complicated to operate, requiring professionals to operate. Especially in MLCC high-speed multi-channel measurement and sorting machines, the number of capacitance test meters required will increase, resulting in an increase in the size and components of MLCC high-speed test and sorting machines, complex processes, and high prices. At the same time, they cannot meet the needs of various customers and are difficult to be widely used. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a multi-range capacitance measurement circuit and method based on constant current charging and discharging, which can measure the capacitance values ​​of capacitors with different test ranges.

[0005] On the one hand, a multi-range capacitance measurement circuit based on constant current charging and discharging according to an embodiment of the present invention includes:

[0006] A power module, wherein an output end of the power module is electrically connected to one end of the capacitor to be measured;

[0007] A resistor shunt module, wherein the input end of the resistor shunt module is electrically connected to the other end of the capacitor to be measured, and the resistor shunt module is used to configure a shunt resistor of a corresponding resistance value according to the test range of the capacitor to be measured;

[0008] An integration module, wherein the input end of the integration module is electrically connected to the output end of the resistance shunt module, and the integration module is used to configure an integration capacitor of a corresponding capacitance value according to the test range of the capacitor to be measured, and integrate the voltage value of the capacitor to be measured according to the integration capacitor to obtain an integrated voltage value;

[0009] A sampling module, wherein an input end of the sampling module is electrically connected to an output end of the integration module, and the sampling module is used to sample the integrated voltage value to obtain sampling data;

[0010] A control module, electrically connected to the power module, the resistor shunt module, the integration module and the sampling module, respectively, the control module is used to configure the shunt resistor of the resistor shunt module, and configure the integration capacitor of the integration module, and the control module is also used to calculate the capacitance value of the capacitor to be measured according to the sampling data;

[0011] An adjustable window threshold comparison module, wherein the first input end of the adjustable window threshold comparison module is electrically connected to the output end of the integration module, the second input end of the adjustable window threshold comparison module is electrically connected to the control module, the control module is used to set the threshold range of the adjustable window threshold comparison module, and the adjustable window threshold comparison module is used to determine whether the integrated voltage value is within the threshold range.

[0012] According to some embodiments of the present invention, the further comprising:

[0013] A current limiting charging switch module, wherein the output end of the power module is electrically connected to one end of the capacitor to be measured through the current limiting charging switch module, the controlled end of the current limiting charging switch module is electrically connected to the control module, and the current limiting charging switch module is used to limit the charging current of the power module;

[0014] A current limiting discharge switch module, wherein the input end of the current limiting discharge switch module is electrically connected to one end of the capacitor to be measured, the output end of the current limiting discharge switch module is grounded, the controlled end of the current limiting discharge switch module is electrically connected to the control module, and the current limiting discharge switch module is used to limit the discharge current of the capacitor to be measured.

[0015] According to some embodiments of the present invention, the resistance shunt module includes:

[0016] An input internal resistance, one end of which is electrically connected to the other end of the capacitor to be measured, and the other end of which is electrically connected to the input end of the integration module;

[0017] The shunt resistor group includes a plurality of shunt resistor units connected in parallel, one end of each of the shunt resistor units is electrically connected to the other end of the capacitor to be measured, and the other end of each of the shunt resistor units is grounded, each of the shunt resistor units includes a first resistor and a first switching switch connected in series, a controlled end of the first switching switch is electrically connected to the control module, and the control module is used to switch the conduction state of the first switching switch to configure the shunt resistor.

[0018] According to some embodiments of the present invention, the first switching switch includes:

[0019] A first MOS transistor, wherein a gate of the first MOS transistor is electrically connected to the control module, and a source of the first MOS transistor is grounded;

[0020] A phototransistor, wherein the input end of the phototransistor is electrically connected to the drain of the first MOS tube;

[0021] a second MOS transistor, wherein a gate of the second MOS transistor is electrically connected to the first output terminal of the phototransistor, and a drain of the second MOS transistor is electrically connected to the other end of the capacitor to be measured;

[0022] a third MOS tube, wherein a gate of the third MOS tube is electrically connected to the first output end of the phototransistor, a source of the third MOS tube is electrically connected to the source of the second MOS tube, and a drain of the third MOS tube is electrically connected to the corresponding first resistor;

[0023] a first voltage stabilizing diode, wherein an anode of the first voltage stabilizing diode is electrically connected to the second output terminal of the phototransistor, and a cathode of the first voltage stabilizing diode is electrically connected to the gate of the second MOS transistor;

[0024] A second voltage stabilizing diode, wherein an anode of the second voltage stabilizing diode is electrically connected to the second output terminal of the phototransistor, and a cathode of the second voltage stabilizing diode is electrically connected to the gate of the third MOS tube.

[0025] According to some embodiments of the present invention, the first switching switch includes:

[0026] a fourth MOS tube, wherein a gate of the fourth MOS tube is electrically connected to the control module, and a source of the fourth MOS tube is grounded;

[0027] An optocoupler MOS tube, wherein the input end of the optocoupler MOS tube is electrically connected to the drain of the fourth MOS tube, the first output end of the optocoupler MOS tube is electrically connected to the other end of the capacitor to be measured, and the second output end of the optocoupler MOS tube is electrically connected to the corresponding first resistor.

[0028] According to some embodiments of the present invention, the first switching switch includes:

[0029] a fifth MOS tube, wherein a gate of the fifth MOS tube is electrically connected to the control module, and a source of the fifth MOS tube is grounded;

[0030] A relay, wherein the first control end of the relay is connected to a power supply, the second control end of the relay is electrically connected to the drain of the fifth MOS tube, the first contact of the relay is electrically connected to the other end of the capacitor to be measured, and the second contact of the relay is electrically connected to the corresponding first resistor.

[0031] According to some embodiments of the present invention, the integration module comprises:

[0032] An integral operation circuit, wherein the input end of the integral operation circuit is electrically connected to the output end of the resistance shunt module, and the output end of the integral operation circuit is electrically connected to the input end of the sampling module;

[0033] A charge clearing switch circuit is connected in parallel with the integral operation circuit, and a controlled end of the charge clearing switch circuit is electrically connected to the control module;

[0034] An integral capacitor circuit is connected in parallel with the charge zeroing switch circuit, the integral capacitor circuit includes a first capacitor and a plurality of integral capacitor units connected in parallel, each of the integral capacitor units includes a second capacitor and a second switch connected in series, the controlled end of the second switch is electrically connected to the control module, and the control module is used to switch the conduction state of the second switch to configure the integral capacitor.

[0035] According to some embodiments of the present invention, the integral operation circuit includes:

[0036] A first operational amplifier, wherein a non-inverting input terminal of the first operational amplifier is grounded, a reverse input terminal of the first operational amplifier is electrically connected to an output terminal of the resistance shunt module, and an output terminal of the first operational amplifier is electrically connected to an input terminal of the sampling module;

[0037] a first clamping diode, wherein an anode of the first clamping diode is electrically connected to the reverse input terminal of the first operational amplifier, and a cathode of the first clamping diode is grounded;

[0038] A second clamping diode, wherein an anode of the second clamping diode is grounded, and a cathode of the first clamping diode is electrically connected to a reverse input terminal of the first operational amplifier.

[0039] According to some embodiments of the present invention, a NAND gate circuit is further included, wherein a first input end of the NAND gate circuit is electrically connected to the control module, a second input end of the NAND gate circuit is electrically connected to an output end of the adjustable window threshold comparison module, and an output end of the NAND gate circuit is electrically connected to a controlled end of the charge zeroing switch circuit.

[0040] According to some embodiments of the present invention, the adjustable window threshold comparison module includes:

[0041] a non-directional amplifier circuit, wherein an input end of the non-directional amplifier circuit is electrically connected to the control module, and the non-directional amplifier circuit is used to amplify the threshold voltage output by the control module to obtain a first voltage value;

[0042] an inverter circuit, wherein an input end of the inverter circuit is electrically connected to an output end of the non-inverting amplifier circuit, and the inverter circuit is used to invert the first voltage value to obtain a second voltage value; the threshold range is a range between the second voltage value and the first voltage value;

[0043] The window comparison circuit is used to compare the integrated voltage value with the first voltage value and the second voltage value respectively, and output the comparison result to the control module.

[0044] On the other hand, a multi-range capacitance measurement method based on constant current charging and discharging according to an embodiment of the present invention is applied to the multi-range capacitance measurement circuit based on constant current charging and discharging described in the above-mentioned embodiment, comprising the following steps:

[0045] According to the test range of the capacitor to be tested, the charging voltage, the charging current, the shunt resistance of the resistance shunt module and the integral capacitance of the integral module are determined;

[0046] The power module performs constant current charging on the capacitor to be tested according to the charging voltage and the charging current;

[0047] The resistance shunt module performs current shunting via the shunt resistor;

[0048] The integration module integrates the voltage value of the capacitor to be measured according to the integration capacitor to obtain a first integrated voltage value;

[0049] The sampling module samples the first integrated voltage value to obtain first sampling data, and sends the first sampling data to the control module;

[0050] The adjustable window threshold comparison module compares the first integrated voltage value with the threshold range according to the threshold range set by the control module, and determines whether the first integrated voltage value is within the threshold range;

[0051] When the first integrated voltage value is within the threshold range, the control module calculates a first capacitance value of the capacitor to be measured according to the charging voltage, the charging current, the first sampling data and the shunt resistor.

[0052] According to some embodiments of the present invention, a constant current discharge process is further included, and the constant current discharge process includes:

[0053] Determining the discharge current according to the test range of the capacitor to be tested;

[0054] The capacitor to be tested performs constant current discharge according to the discharge current, and the resistor shunt module performs current shunting through the shunt resistor;

[0055] The integration module integrates the voltage value of the capacitor to be measured according to the integration capacitor to obtain a second integrated voltage value;

[0056] The sampling module samples the second integrated voltage value to obtain second sampling data, and sends the second sampling data to the control module;

[0057] The adjustable window threshold comparison module compares the second integrated voltage value with the threshold range to determine whether the second integrated voltage value is within the threshold range;

[0058] When the second integrated voltage value is within the threshold range, the control module calculates a second capacitance value of the capacitor to be measured according to the charging voltage, the charging current, the discharging current, the second sampling data and the shunt resistance.

[0059] According to some embodiments of the present invention, the multi-range capacitance measurement circuit includes: a current limiting charging switch module and a current limiting discharging switch module, the output end of the power supply module is electrically connected to one end of the capacitor to be measured through the current limiting charging switch module, the input end of the current limiting discharging switch module is electrically connected to one end of the capacitor to be measured, and the output end of the current limiting discharging switch module is grounded; the integration module includes a charge clearing switch circuit;

[0060] Before constant current charging, the multi-range capacitance measurement method based on constant current charging and discharging further includes the following steps:

[0061] Setting the current limiting current values ​​of the current limiting charging switch module and the current limiting discharging switch module;

[0062] Disconnect the current-limiting charging switch module, close the current-limiting discharging switch module, and close the charge clearing switch circuit;

[0063] The charge of the capacitor to be measured and the integration module are cleared by the current limiting discharge switch module and the charge clearing switch circuit;

[0064] The current limiting discharge switch module and the charge clearing switch circuit are disconnected, and the current limiting charging switch module is closed to enter the constant current charging process.

[0065] The multi-range capacitance measurement circuit and method based on constant current charging and discharging according to the embodiments of the present invention have at least the following beneficial effects: the resistance shunt module can accelerate the large current shunt of the charging and discharging process for the capacitors to be tested of different test ranges, accelerate the end of the constant current charging and discharging time, improve the measurement efficiency, and prevent the input of excessive current from burning the measurement circuit; the integration module can switch and combine different integral capacitance values ​​according to the capacitors to be tested of different test ranges, adapt to the constant current test of charging and discharging of various types of capacitors, so as to achieve multi-range capacitance testing; in the MLCC high-speed multi-channel test sorting machine, there is no need to purchase expensive capacitance test capacitance meters, and only the multi-range capacitance measurement circuit based on constant current charging and discharging with the corresponding number of channels needs to be used to complete the MLCC high-speed multi-channel capacitance measurement, while also meeting the multi-range measurement requirements; the volume of the MLCC high-speed multi-channel test sorting machine can be reduced, space can be saved, the production line automation test process is simple and the components are reduced, the cost is reduced, and it is more suitable for the use of the MLCC capacitor automation production line high-speed multi-channel test sorting machine to meet the various testing requirements of customers.

[0066] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0068] Figure 1 It is a module schematic diagram of a multi-range capacitance measurement circuit based on constant current charging and discharging according to an embodiment of the present invention;

[0069] Figure 2 It is a circuit principle diagram of a multi-range capacitance measurement circuit based on constant current charging and discharging according to an embodiment of the present invention;

[0070] Figure 3 A circuit schematic diagram of a first switch according to an embodiment of the present invention;

[0071] Figure 4 A circuit schematic diagram of a first switch according to another embodiment of the present invention;

[0072] Figure 5 A circuit schematic diagram of a first switch according to another embodiment of the present invention;

[0073] Figure 6 A circuit schematic diagram of a second switch according to an embodiment of the present invention;

[0074] Figure 7 is a circuit schematic diagram of a second switch according to another embodiment of the present invention;

[0075] Figure 8 A circuit schematic diagram of a second switch according to another embodiment of the present invention;

[0076] Fig. 9 is a circuit schematic diagram of an adjustable window threshold comparison module according to an embodiment of the present invention;

[0077] Fig.10 It is a curve diagram of charging and discharging the capacitor to be tested using a positive power supply voltage;

[0078] Fig.11 This is a graph showing the relationship between the integral voltage and the integral time when the capacitor to be measured is charged and discharged using the positive power supply voltage;

[0079] Fig.12 It is a curve diagram of charging and discharging the capacitor to be tested using a negative power supply voltage;

[0080] Fig.13 This is a graph showing the relationship between the integral voltage and the integral time when the capacitor to be measured is charged and discharged using a negative power supply voltage;

[0081] Fig.14 It is a flowchart of the steps of a multi-range capacitance measurement method based on constant current charging and discharging according to an embodiment of the present invention;

[0082] Reference numerals:

[0083] A power supply module 100 , a capacitor to be measured 200 , a resistor shunt module 300 , an integration module 400 , a sampling module 500 , an adjustable window threshold comparison module 600 , a control module 700 , a current limiting charging switch module 800 , and a current limiting charging and discharging module 900 . DETAILED DESCRIPTION

[0084] Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and are not to be construed as limitations on the present application. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0085] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0086] The terms "first", "second", "third" and "fourth" etc. in the specification and claims of the present invention and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.

[0087] Reference to "embodiments" in the present invention means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0088] The capacitance test of MLCC capacitors is one of the most important test parameters of MLCC capacitors. For capacitance measurement, the capacitance test meters currently on the market are not only expensive, but also have a single channel and are complicated to operate, requiring professionals to operate. Especially in MLCC high-speed multi-channel measurement and sorting machines, the number of capacitance test meters required will increase, resulting in an increase in the size and components of MLCC high-speed test and sorting machines, complex processes, and high prices. At the same time, they cannot meet the needs of various customers and are difficult to be widely used.

[0089] To this end, the embodiment of the present invention provides a multi-range capacitance measurement circuit and method based on constant current charging and discharging, wherein the resistance shunt module can accelerate the large current shunt of the charging and discharging process for the capacitors to be tested of different test ranges, accelerate the end of the constant current charging and discharging time, improve the measurement efficiency, and prevent the input of excessive current from burning the measurement circuit; the integration module can switch and combine different integral capacitance values ​​according to the capacitors to be tested of different test ranges, adapt to the constant current test of charging and discharging of various types of capacitors, so as to achieve multi-range capacitance testing; in the MLCC high-speed multi-channel test sorting machine, there is no need to purchase expensive capacitance test capacitance meters, and only the multi-range capacitance measurement circuit based on constant current charging and discharging of the corresponding number of channels needs to be used to complete the MLCC high-speed multi-channel capacitance measurement, while also meeting the multi-range measurement requirements; the volume of the MLCC high-speed multi-channel test sorting machine can be reduced, space can be saved, the production line automation test process is simple and the components are reduced, the cost is reduced, and it is more suitable for the use of the MLCC capacitor automation production line high-speed multi-channel test sorting machine to meet the various testing needs of customers.

[0090] The following describes in detail a multi-range capacitance measurement circuit and method based on constant current charging and discharging according to an embodiment of the present invention in conjunction with the accompanying drawings.

[0091] On the one hand, the embodiment of the present invention provides a multi-range capacitance measurement circuit based on constant current charging and discharging, such as Figure 1 As shown, the circuit includes: a power module 100, a resistor shunt module 300, an integration module 400, a sampling module 500, a control module 700 and an adjustable window threshold comparison module 600; wherein, the output end of the power module 100 is electrically connected to one end of the capacitor 200 to be measured, the other end of the capacitor 200 to be measured is electrically connected to the input end of the resistor shunt module 300, the output end of the resistor shunt module 300 is electrically connected to the input end of the integration module 400, the output end of the integration module 400 is electrically connected to the input end of the sampling module 500, and the output end of the sampling module 600 is electrically connected to the control module 700; the output end of the integration module 400 is also electrically connected to the first input end of the adjustable window threshold comparison module 600, and the second input end of the adjustable window threshold comparison module 600 is electrically connected to the control module 700.

[0092] The power module 100 may use a high-precision power supply to output an adjustable high-precision low-ripple positive and negative output power supply, thereby providing corresponding positive and negative charging voltages and charging currents for the capacitor 200 to be tested. Figure 2As shown, the output internal resistance of the power module 100 is Ro, and the voltage VCC1 provided by the power module 100 outputs the voltage VCC2 after passing through Ro. At the same time, the controlled end of the power module 100 is electrically connected to the control module 700 through the VSC, and the control module 700 can adjust the output of the power module 100 through the VSC. It should be noted that the control module 700 can be a single-chip microcomputer, PLC, FPGA, etc., which is used to control the operation of each module in the circuit, as well as to perform data processing and calculation.

[0093] Furthermore, if Figure 1 and Figure 2 As shown, in some embodiments of the present invention, a current-limiting charging switch module 800 is further provided between the power module 100 and the capacitor 200 to be measured, the output end of the power module 100 is electrically connected to one end of the capacitor 200 to be measured through the current-limiting charging switch module 800, the controlled end of the current-limiting charging switch module 800 is electrically connected to the control module 700 (through XL-RC), and the current-limiting charging switch module 800 is used to limit the charging current of the power module 100. The control module 700 can control the current-limiting charging switch module 800 to limit the charging current of the power module 100 to prevent the output current from being too high and burning the load, etc.; at the same time, the control module 700 will control the current-limiting charging switch module 800 to turn off the output of the charging voltage and the charging current in the unmeasured stage, so as to avoid the capacitor 200 (C0) to be measured from continuously increasing the pressure and current in the unmeasured stage to cause immeasurable dangers, and the control module 700 will also control the current-limiting charging switch module 800 to turn off the charging voltage and the charging current in the discharge stage.

[0094] Furthermore, if Figure 1 and Figure 2 As shown, in some embodiments of the present invention, the multi-range capacitance measurement circuit based on constant current charging and discharging also includes a current limiting discharge switch module 900, the input end of the current limiting discharge switch module 900 is electrically connected to one end of the capacitor 200 to be measured, the output end of the current limiting discharge switch module 900 is grounded, and the controlled end of the current limiting discharge switch module 900 (through XL-DC) is electrically connected to the control module 700, and the current limiting discharge switch module 900 is used to limit the discharge current of the capacitor 200 to be measured. The control module 700 can control the current limiting discharge switch module 900 to limit the discharge current to prevent the output current from being too high and burning the load; at the same time, the control module 700 will control the current limiting discharge switch module 900 to turn off the discharge in the charging measurement phase, thereby ensuring a constant flow state for charging, and turn on rapid discharge in the discharge phase; a discharge current acquisition circuit is provided in the current limiting discharge switch module 900 to check whether there is current passing through the capacitor 200 to be tested during the discharge process. If there is a discharge current, it means that the capacitor 200 to be tested still has charge; if there is no discharge current, it means that the capacitor 200 to be tested has been discharged.

[0095] Furthermore, if Figure 2 As shown, in some embodiments of the present invention, the resistor shunt module 300 includes an input internal resistor R1 and a shunt resistor group, one end of the input internal resistor R1 is electrically connected to the other end of the capacitor 200 to be measured, and the other end of the input internal resistor R1 is electrically connected to the input end of the integration module 400; the shunt resistor group includes a plurality of shunt resistor units connected in parallel, one end of each shunt resistor unit is electrically connected to the other end of the capacitor 200 to be measured, and the other end of each shunt resistor unit is grounded, each shunt resistor unit includes a first resistor and a first switch connected in series, and the controlled end of the first switch is electrically connected to the control module 700. For example, the first shunt resistor unit includes a first resistor RL1 and a first switch R-SW1 connected in series, the second shunt resistor unit includes a first resistor RL2 and a first switch R-SW2 connected in series, and the nth shunt resistor unit includes a first resistor RLn and a first switch R-SWn connected in series. The input internal resistance R1 is used to prevent the input current from being too large and burning the measurement circuit; the shunt resistor group is used to adapt to the capacitance 200 to be measured in various test ranges. For n-way shunt resistor units, the switch state of the first switch can be switched to combine 2 n A group of different shunt resistors, wherein n is an integer greater than 0, can be configured with different shunt resistors according to different test ranges, thereby utilizing the shunt resistors to speed up the large current shunting during the charging and discharging process, accelerate the end of the constant current charging and discharging time, improve the measurement efficiency, and prevent excessive current from burning the measurement circuit through the input internal resistor R1; the control module 700 matches and selects the corresponding shunt resistor for shunting by controlling the switching state of the first switching switch.

[0096] like Figure 3As shown, in some embodiments of the present invention, taking one of the first switching switches R-SW1 as an example, the first switching switch includes: a first MOS tube Q3, a phototransistor IC5, a second MOS tube Q1, a third MOS tube Q2, a first voltage regulator diode D3 and a second voltage regulator diode D4, wherein the gate of the first MOS tube Q3 is electrically connected to the control module 700 (R-CH1) through a resistor R15, the source of the first MOS tube Q3 is grounded, the drain of the first MOS tube Q3 is electrically connected to the input end (pin 2) of the phototransistor IC5 through a resistor R14, the gate of the second MOS tube Q1 is electrically connected to the first output end (pin 4) of the phototransistor IC5 through a resistor R12, and the drain of the second MOS tube Q1 is electrically connected to the capacitor 2 to be measured. 00 is electrically connected to the other end (VCC4); the gate of the third MOS tube Q2 is electrically connected to the first output end of the phototransistor IC5 through the resistor R13, the source of the third MOS tube Q2 is electrically connected to the source of the second MOS tube Q1, and the drain of the third MOS tube Q2 is electrically connected to the corresponding first resistor RL1; the anode of the first voltage zener diode D3 is electrically connected to the second output end (pin 3) of the phototransistor IC5, and the cathode of the first voltage zener diode D3 is electrically connected to the gate of the second MOS tube Q1; the anode of the second voltage zener diode D4 is electrically connected to the second output end of the phototransistor IC5, and the cathode of the second voltage zener diode D4 is electrically connected to the gate of the third MOS tube Q2; the first pin of the phototransistor IC5 is connected to the DC voltage of +5V. The remaining first switching switches can adopt the same design as R-SW1.

[0097] like Figure 4 As shown, the present invention also proposes another design of the first switch, still taking the first switch R-SW1 as an example, the first switch includes: a fourth MOS transistor Q4 and an optocoupler MOS transistor IC6, the gate of the fourth MOS transistor Q4 is electrically connected to the control module 700 through a resistor R18, the source of the fourth MOS transistor Q4 is grounded, the drain of the fourth MOS transistor Q4 is electrically connected to the input end (pin 2) of the optocoupler MOS transistor IC6 through a resistor R17, the first output end (pin 4) of the optocoupler MOS transistor IC6 is electrically connected to the other end of the capacitor 200 to be measured, the second output end (pin 3) of the optocoupler MOS transistor IC6 is electrically connected to the corresponding first resistor RL1, and the first pin of the optocoupler MOS transistor IC6 is connected to a +5V DC voltage. The remaining first switches can adopt the same design as R-SW1.

[0098] like Figure 5As shown, the present invention also proposes another design of the first switching switch, still taking the first switching switch R-SW1 as an example, the first switching switch includes: a fifth MOS tube Q5 and a relay K1, the gate of the fifth MOS tube Q5 is electrically connected to the control module 700 through a resistor R21, the source of the fifth MOS tube Q5 is grounded, the drain of the fifth MOS tube Q5 is electrically connected to the second control end (pin 4) of the relay K1, the first control end (pin 3) of the relay K1 is connected to a +5V power supply, the first contact (pin 1) of the relay K1 is electrically connected to the other end of the capacitor 200 to be measured, and the second contact (pin 2) of the relay K1 is electrically connected to one end of the corresponding first resistor RL1; a freewheeling diode D5 is provided between the pin 3 and the pin 4 of the relay K1. The remaining first switching switches can adopt the same design as R-SW1.

[0099] Furthermore, if Figure 2 As shown, in some embodiments of the present invention, the integration module 400 includes an integration operation circuit, a charge zeroing switch circuit and an integration capacitor circuit, the input end of the integration operation circuit is electrically connected to the output end of the resistance shunt module 300, and the output end of the integration operation circuit is electrically connected to the input end of the sampling module 500; the charge zeroing switch circuit is connected in parallel with the integration operation circuit, and the controlled end (C-CH0) of the charge zeroing switch circuit is electrically connected to the control module 700; the integration capacitor circuit is connected in parallel with the charge zeroing switch circuit, the integration capacitor circuit includes a first capacitor and a plurality of integration capacitor units connected in parallel, each integration capacitor unit includes a second capacitor and a second switching switch connected in series, the controlled end of the second switching switch is electrically connected to the control module 700, and the control module 700 is used to switch the conduction state of the second switching switch to configure the integration capacitor.

[0100] Specifically, the integral operation circuit is used to detect the voltage value output by the constant current charge and discharge current of the capacitor 200 to be tested after a time t. In this example, the integral operation circuit includes a first operational amplifier IC1, a first clamping diode D1, and a second clamping diode D2, wherein the same-direction input terminal (pin 3) of the first operational amplifier IC1 is grounded, the reverse input terminal (pin 2) of the first operational amplifier IC1 is electrically connected to the output terminal of the resistance shunt module 300, the output terminal (pin 6) of the first operational amplifier IC1 is electrically connected to the input terminal of the sampling module 500, and the first operational amplifier IC1 is electrically connected to the input terminal of the sampling module 500. The 7th pin of the positive power supply is connected to the DC power supply +12V, the 4th pin of the negative power supply is connected to the DC power supply -12V, the 8th pin is connected to GND, the 1st pin and the 5th pin of the zero adjustment terminal are respectively connected to the two ends of the zero adjustment potentiometer R2, and the tap in the zero adjustment potentiometer R2 is connected to the DC power supply -12V; the anode of the first clamping diode D1 is electrically connected to the reverse input terminal of the first operational amplifier IC1, and the cathode of the first clamping diode D1 is grounded; the anode of the second clamping diode D2 is grounded, and the cathode of the second clamping diode D2 is electrically connected to the reverse input terminal of the first operational amplifier IC1. The first clamping diode D1 and the second clamping diode D2 protection circuit are used to prevent the measurement signal input to the first operational amplifier IC1 from being too large, thereby burning the measurement circuit, causing harm and loss.

[0101] The integral capacitor circuit is used to switch and combine different capacitance values ​​to adapt to the charge and discharge constant current test of the capacitor 200 to be tested with various different ranges. Among them, the integral capacitor circuit includes a first capacitor CINT0 and a plurality of integral capacitor units connected in parallel, each integral capacitor unit includes a second capacitor and a second switching switch connected in series, and the controlled end of the second switching switch is electrically connected to the control module 700. For example, the first integral capacitor unit includes a second capacitor CINT1 and a second switching switch C-SW1 connected in series, the second integral capacitor unit includes a second capacitor CINT2 and a second switching switch C-SW2 connected in series, the m-1th integral capacitor unit includes a second capacitor CINTm-1 and a second switching switch C-SWm-1 connected in series, and the mth integral capacitor unit includes a second capacitor CINTm and a second switching switch C-SWm connected in series. Through the first capacitor CINT0 and the plurality of integral capacitor units, the control module 700 can control the switching states of the plurality of second switching switches, thereby combining 2 m+1 -1 capacitance value, where m is an integer greater than 0.

[0102] The charge clearing switch circuit includes a switching switch C-SW0, and the controlled end of the switching switch C-SW0 is connected to C-CH0 and the control module 700. The control module 700 can control the switching switch C-SW0 to be turned on, so as to release the charge of the integral capacitor of the integral module 400 to zero, and prepare for the integral zero state response; at the same time, the charge clearing switch circuit also includes a current acquisition circuit, which is used to detect whether there is current passing through the integral capacitor during the charge release process. If there is a release current, it means that there is still charge on the integral capacitor; if there is no discharge current, it means that the integral capacitor has been discharged.

[0103] Furthermore, the multi-range capacitance measurement circuit based on constant current charging and discharging also includes a NAND gate circuit IC2, the first input end (pin 1) of the NAND gate circuit IC2 is electrically connected to the CAP_ON / OFF pin of the control module 700, the second input end (pin 2) of the NAND gate circuit IC2 is electrically connected to the output end of the adjustable window threshold comparison module 600, and the output end (pin 3) of the NAND gate circuit IC2 is electrically connected to the controlled end (C-CH0) of the charge zeroing switch circuit. When the adjustable threshold window comparison module 600 outputs an alarm signal, the NAND gate circuit IC2 is used to control the charge zeroing switch circuit to conduct, so that the charge zeroing switch circuit clears the charge of the integral capacitor.

[0104] like Figures 6 to 8 As shown, in some embodiments of the present invention, the second switch of the integral capacitor unit can adopt a variety of different circuit designs, such as Figure 6 As shown, taking the second switch C-SW1 as an example, the second switch includes a MOS transistor Q8, a phototransistor IC7, a MOS transistor Q6, a MOS transistor Q7, a voltage regulator diode D6 and a voltage regulator diode D7, wherein the gate of the MOS transistor Q8 is electrically connected to the control module 700 (C-CH1) through a resistor R26, the source of the MOS transistor Q8 is grounded, the drain of the MOS transistor Q8 is electrically connected to the second pin of the phototransistor IC7 through a resistor R25, the gate of the MOS transistor Q6 is electrically connected to the fourth pin of the phototransistor IC7 through a resistor R23, and the drain of the MOS transistor Q6 is electrically connected to VCC6. The gate of MOS tube Q7 is electrically connected to the 4th pin of phototransistor IC7 through resistor R24, the source of MOS tube Q7 is electrically connected to the source of MOS tube Q6, and the drain of MOS tube Q7 is electrically connected to V-C1; the anode of zener diode D6 is electrically connected to the 3rd pin of phototransistor IC7, and the cathode of zener diode D6 is electrically connected to the gate of MOS tube Q6; the anode of zener diode D7 is electrically connected to the 3rd pin of phototransistor IC7, and the cathode of zener diode D7 is electrically connected to the gate of MOS tube Q7; the 1st pin of phototransistor IC7 is connected to the DC voltage of +5V. The remaining second switching switches can adopt the same design as C-SW1.

[0105] like Figure 7 As shown, the present invention also proposes another design of the second switch, still taking the second switch C-SW1 as an example, the second switch includes: MOS transistor Q9 and optocoupler MOS transistor IC8, the gate of MOS transistor Q9 is electrically connected to the control module 700 through resistor R29, the source of MOS transistor Q9 is grounded, the drain of MOS transistor Q9 is electrically connected to the second pin of optocoupler MOS transistor IC8 through resistor R28, the fourth pin of optocoupler MOS transistor IC8 is electrically connected to VCC6, the third pin of optocoupler MOS transistor IC8 is electrically connected to V-C1, and the first pin of optocoupler MOS transistor IC8 is connected to a +5V DC voltage. The remaining second switches can adopt the same design as C-SW1.

[0106] like Figure 8 As shown, the present invention also proposes another design of the second switching switch. Still taking the second switching switch C-SW1 as an example, the second switching switch includes: MOS tube Q10 and relay K2. The gate of MOS tube Q10 is electrically connected to the control module 700 through resistor R32. The source of MOS tube Q10 is grounded. The drain of MOS tube Q10 is electrically connected to the 4th pin of relay K2 through resistor R31. The 3rd pin of relay K2 is connected to the +5V power supply. The 1st pin of relay K2 is electrically connected to VCC6. The 2nd pin of relay K2 is electrically connected to V-C1. A freewheeling diode D8 is provided between the 3rd pin and the 4th pin of relay K2. The remaining second switching switches can adopt the same design as R-SW1.

[0107] Furthermore, if Fig. 9As shown, in some embodiments of the present invention, the adjustable window threshold comparison module 600 includes a same-direction amplifier circuit, an inverter circuit and a window comparison circuit. The input end of the same-direction amplifier circuit is electrically connected to the control module 700, and the same-direction amplifier circuit is used to amplify the threshold voltage (DAC1) output by the control module 700 to obtain a first voltage value (DAC_V1); the input end of the inverter circuit is electrically connected to the output end of the same-direction amplifier circuit, and the inverter circuit is used to invert the first voltage value to obtain a second voltage value (DAC_V2); the second voltage value and the first voltage value constitute a threshold range, that is, the threshold range is DAC_V2-DAC_V1; the window comparison circuit is used to compare the integrated voltage value VCC6 with the first voltage value and the second voltage value respectively, and output the comparison result to the control module 700. Specifically, the non-directional amplifier circuit includes an operational amplifier IC3B, the 5th pin of the operational amplifier IC3B is electrically connected to the DAC1 of the control module 700 through a resistor R11, the 5th pin of the operational amplifier IC3B is also grounded through a filter capacitor C1, the 6th pin of the operational amplifier IC3B is grounded through a resistor R10, and a resistor R9 is arranged between the 6th pin and the 7th pin of the operational amplifier IC3B; the output end of the operational amplifier IC3B outputs DAC_V1; the non-directional amplifier circuit is used to amplify the voltage value of DAC1 output by the control module 700 to a range of 0~12V. The inverter circuit includes an operational amplifier IC3A, the third pin of the operational amplifier IC3A is grounded, the second pin of the operational amplifier IC3A is connected to the seventh pin of the operational amplifier IC3B through a resistor R4, a resistor R3 is provided between the second pin and the first pin of the operational amplifier IC3A, the first pin of the operational amplifier IC3A outputs DAC_V2, the eighth pin of the operational amplifier IC3 is connected to a DC power supply +12V, and the fourth pin is connected to a DC power supply -12V; the inverter circuit is used to reverse the direction of the output voltage of the same-direction amplifier circuit to obtain DAC_V2. The window comparison circuit includes an operational amplifier IC4A and an operational amplifier IC4B, and the operational amplifier IC4A and the operational amplifier IC4B constitute a window comparator. The third pin of the operational amplifier IC4A is connected to VCC6 through a resistor R5, the second pin of the operational amplifier IC4A is connected to the first pin of the operational amplifier IC3A, the eighth pin of the operational amplifier IC4A is connected to a DC power supply of +12V, the fourth pin of the operational amplifier IC4A is connected to a DC power supply of -12V, and the first pin of the operational amplifier IC4A is electrically connected to the Over_CMP of the control module 700 through a resistor R8; the sixth pin of the operational amplifier IC4B is connected to VCC6 through a resistor R6, the fifth pin of the operational amplifier IC4B is connected to the seventh pin of the operational amplifier IC3B, the seventh pin of the operational amplifier IC4B is electrically connected to the Over_CMP of the control module 700 through a resistor R8, and the resistor R8 is also connected to a +3.3V power supply through a resistor R7.The function of the adjustable window threshold comparison module 600 is to compare the output voltage (VCC6) of the integration module 400 during the integration process with the first voltage value (DAC_V1) and the second voltage value (DAC_V2), and when VCC6>DAC_V1 or VCC6<DAC_V2, output an alarm signal (Over_CMP) to the control module 400, so that the control module 400 controls the charge zeroing switch circuit to clear the circuit to prevent the output voltage from exceeding the range, thereby affecting the accuracy of measuring the leakage current value of the MLCC capacitor.

[0108] Furthermore, if Figure 2 As shown, in some embodiments of the present invention, the sampling module 500 is used to sample the integrated voltage value (VCC6) output by the integration module 400. The sampling module includes an ADC converter. The sampling module 500 obtains the voltage value and time data output by the integration module 400 during the constant current charging and discharging process of the capacitor 200 to be tested through the ADC converter. The control module 700 calculates the constant current charging time and the constant current discharging time based on the data.

[0109] It should be noted that, in the above-mentioned embodiments, the small N-channel MOS tubes Q3, Q4, Q5, Q8, Q9 and Q10 etc. can all be replaced by NPN-type transistors.

[0110] The working principle of the multi-range capacitance measurement circuit based on constant current charging and discharging according to the embodiment of the present invention is as follows:

[0111] 1. The control module 700 outputs DAC1 according to the configuration, so that the threshold range of the adjustable window threshold comparison module is from DAC_V1 to DAC_V2; the "virtual short" working principle of the operational amplifier is applied: the output voltage of the operational amplifier IC3B is:

[0112] DAC_V1=DAC1*(1+R9 / R10); (1)

[0113] Let resistor R3=R4, then the output voltage of the original operational amplifier is:

[0114] DAC_V2=-DAC1*(1+R9 / R10); (2)

[0115] 2. The time period before constant current charging and discharging starts:

[0116] The control module 700 automatically configures the measurement parameters according to the test range configured by the user:

[0117] (1) The power module 100 is set to output a constant charging voltage VCC1, a constant charging current I1, and a constant discharge current I2 of the current limiting discharge switch module 900;

[0118] (2) Setting the current limiting value of the current limiting charging switch module 800 and turning off the output of the current limiting charging switch module 800, that is, disconnecting XL-SW1;

[0119] (3) Setting the current limiting value of the current limiting discharge switch module 900 and closing XL-SW2 at the same time;

[0120] (4) Automatically configure the resistance value of the shunt resistor of the resistor shunt module 300, the resistance value of the shunt resistor The resistance value of the shunt resistors RL1 to RLn connected independently or in parallel. The circuit can switch to form 2 combinations. n The resistance value of the resistor;

[0121] (5) Automatically configure the capacitance value of the integral capacitor of the integral module 400. The capacitance value formed by connecting capacitors CINT0 to CINTm independently or in parallel, CINT0 is fixed to participate in the integration and m switchable capacitors are connected in parallel, which can combine 2 m+1 -1 capacitance value;

[0122] (6) The control module 700 drives the switch C-SW0 of the charge clearing switch circuit to close through the CAP_ON / OFF signal, and starts to release the charge of the integral capacitor of the integral module 400. At the same time, the current acquisition circuit in the charge clearing switch circuit monitors the charge release of the integral capacitor. If there is a release current, it means that there is still charge in the integral capacitor; if there is no discharge current, it means that the integral capacitor has been completely discharged.

[0123] (7) When the integral capacitor is discharged, the charge clearing switch circuit reports the integral capacitor no charge flag to the control module 700 through the C-CA interface, preparing for entering the constant current charging measurement.

[0124] 3. Enter the constant current charging time period:

[0125] The control module 700 simultaneously drives the switch XL-SW2 of the current limiting discharge switch module 900 to be turned off and the switch C-SW0 of the charge clearing switch circuit to be turned off, and drives the switch XL-SW1 of the current limiting charge switch module 800 to be closed and turned on, the power module 100 outputs a constant voltage VCC1 (a positive value) and a constant current I1, and the capacitor 200 to be tested enters a constant current state for charging;

[0126] The integration module 400 starts integrating, and the sampling module 500 collects the integrated voltage value VCC6 output by the integration module 400 and the corresponding time t in real time; the adjustable window threshold comparison module 600 compares VCC6. When DAC_V2<VCC6<DAC_V1, the adjustable window threshold comparison module 600 outputs a signal Over_CMP of a high level, indicating that the voltage VCC6 output by the integration module 400 is within a reasonable range. At this time, the control module 700 calculates the change slope k1' of the integrated voltage value VCC6 (i.e. Fig.10 or Fig.12 The slash line from t0 to t1 in the figure shows:

[0127] or ; (3)

[0128] Wherein, n is an integer ≥ 1, that is, the number of acquisitions by the sampling module 500, and then compared with the slope k1± error value calculated by the configuration parameters, wherein the k1 value is calculated as shown in the following formula (10). If there are three or more consecutive k1' values ​​that are not within the k1± error range, the constant current charging time has been completed and the time t value when k1' is not within the k1± error range for the first time is recorded (that is, Fig.11 or Fig.13 At the moment t1 shown), the constant current charging time is obtained as:

[0129] t=t1-t0, since t0=0, so t=t1 (4);

[0130] When DAC_V2>VCC6 or VCC6>DAC_V1, the adjustable threshold window comparison module 600 outputs a signal Over_CMP of low level, indicating that the voltage VCC6 output by the integration module 400 has exceeded the range, and the integrated voltage value VCC6 collected by the sampling module 500 is invalid; at the same time, the adjustable threshold window comparison module 600 informs the control module 700 of the alarm processing, and the CAP_ON / OFF output of the control module 700 is low level. At this time, the output C-CH0 of the NAND gate circuit is high level, and the switch C-SW0 in the charge clearing switch circuit is closed to discharge the integration module 400;

[0131] During the constant current charging period, the circuit responds as follows:

[0132] When the power module 100 outputs a positive constant voltage VCC1, the charging process of the capacitor 200 to be tested is as follows: Fig.10 As shown in the time period t0 to t1 of the curve diagram; when the power module 100 outputs a constant voltage VCC1 as a negative voltage, the charging process of the capacitor 200 to be tested is as follows Fig.12 Fig.10The time period from t0 to t1 of the curve is shown. Applying the "virtual short" working principle of the operational amplifier, the reverse input terminal of the first operational amplifier IC1 is virtually shorted to GND, that is: VCC5 = GND (5); then the input internal resistance R1 is connected in parallel with the shunt resistor to GND, that is, the resistance after parallel connection is:

[0133] ; (6)

[0134] After the capacitor to be tested is charged with a constant current of 200, the voltage difference between the two ends is Ve1:

[0135] = ; (7)

[0136] The capacitor 200 to be tested is charged with a constant current I1 during the charging period. According to Kirchhoff's current law (KCL), the current flowing through the resistor R1 is equal to the current flowing through the integrating capacitor, that is:

[0137] ; (8)

[0138] From the above formula (8), we can get the integral capacitance The voltage on the IC1 is the voltage VCC6 output by the first operational amplifier IC1:

[0139] ; (9)

[0140] According to formula (9) is a constant, the integral time starts from 0, and after the integral of time t, the integral capacitance The voltage VCC6 on the (10) The straight line.

[0141] When the power module 100 outputs a positive voltage for charging, during the constant current charging process, the charging voltage VCC6 of the integral capacitor C' and the time t are shown in the time period t0 to t1 of the curve diagram of FIG11. When the power module 100 outputs a negative voltage for charging, during the constant current charging process, the charging voltage VCC6 of the integral capacitor C' and the time t are shown in the time period t0 to t1 of the curve diagram of FIG11.

[0142] In the constant current charging process, the capacitor 200 to be tested is charged with a charge of q, and the constant current charging process has:

[0143] ; (11)

[0144] And because the definition formula of capacitor is:

[0145] ; (12)

[0146] Where Q is the charge and U is the voltage.

[0147] In summary, when the constant current charging of the capacitor 200 to be tested ends, the voltage across the capacitor 200 to be tested is U=Ve1, and after time t1, the charge of the capacitor 200 to be tested is Q=q; then according to the above formulas (4), (7), (11) and (12), the capacitance of the capacitor 200 to be tested is calculated as:

[0148] ; (13)

[0149] 4. Transition period from the end of constant current charging to the beginning of constant current discharging:

[0150] After the capacitor 200 to be tested is charged with constant current, the response generated in the circuit is the full response of the first-order circuit. The current that continues to charge in the circuit is Ic1, and the voltage on the capacitor 200 to be tested is Uc1. Fig.10 or Fig.12 The curve diagram of the measured capacitance charge and discharge time is shown in the time period from t1 to t2, and their expressions are as follows:

[0151] ; (14)

[0152] ; (15)

[0153] At time t2, the voltage across the capacitor 200 to be tested is Vec2, that is:

[0154] ; (16)

[0155] After the constant current charging is completed, after a period of time, when time t2 is reached, the CAP_ON / OFF signal drives the switch C-SW0 in the charge clearing switch circuit to close, and the charge of the integral capacitor begins to be released. At the same time, the current acquisition circuit in the charge clearing switch circuit monitors the charge release of the integral capacitor. If there is a release current, it means that there is still charge on the integral capacitor; if there is no discharge current, it means that the integral capacitor has been discharged; until the integral capacitor has been discharged, the charge clearing switch circuit reports the integral capacitor no charge flag to the control module 700 through the C-CA interface, preparing for entering the constant current discharge.

[0156] 5. Constant current discharge time period:

[0157] The control module 700 simultaneously drives the switch XL-SW1 of the current limiting charging switch module 800 to be disconnected and the switch C-SW0 in the charge clearing switch circuit to be disconnected, and drives the switch XL-SW2 of the current limiting discharge switch module 900 to be closed and turned on, and the constant discharge current I2 of the current limiting discharge switch module 900, the capacitor 200 to be tested enters the constant current state discharge. The integration module 400 starts integration, and the sampling module 500 collects VCC6 and the corresponding time t in real time; when DAC_V2<VCC6<DAC_V1, the adjustable window threshold comparison module 600 outputs the signal Over_CMP as a high level, indicating that VCC6 is within a reasonable range, and the control module 700 calculates the change slope k2' of VCC6 (that is, Fig.11 or Fig.13 The slash line from t2 to t3 in the figure shows:

[0158] ; (17)

[0159] Wherein, m is an integer ≥ 1, which is the number of acquisitions by the sampling module 500, t2<t m <t3; and then compare it with the slope k2± error value calculated by the configuration parameters, where the k2 value is calculated as described in the following formula (24). If the k2' value is not within the k2± error range for 3 or more consecutive times, the constant current charging time has been completed and the time t when k2' is not within the k2± error range for the first time is recorded (i.e. Fig.12 or Fig.14 At the moment t3 shown in the figure), the constant current discharge time is obtained to be t=t3-t2 (18).

[0160] When DAC_V2>VCC6 or VCC6>DAC_V1, the output signal Over_CMP is low level, indicating that VCC6 has exceeded the range and the VCC6 voltage value collected by the sampling module 500 is invalid; at the same time, the control module 700 is informed of the alarm processing, and the CAP_ON / OFF output of the control module 700 is low level. At this time, the output C-CH0 of the NAND gate circuit is high level, and the switch C-SW0 in the charge clearing switch circuit is closed to discharge the integral capacitor.

[0161] During the constant current discharge period, the circuit responds as follows:

[0162] When the power module 100 outputs a positive voltage for charging, the constant current discharge process is as follows: Fig.10 As shown in the time period from t2 to t3 of the curve diagram; when the power module 100 outputs a negative voltage for charging, its constant current state discharge process is as follows Fig.12As shown in the time period from t2 to t3 of the curve graph. Applying the "virtual short" working principle of the operational amplifier, the reverse input terminal of the first operational amplifier IC1 is virtually shorted to GND, that is, VCC5=GND (19); then the input internal resistance R1 is connected in parallel with the shunt resistor to GND, that is, the resistance after parallel connection is:

[0163] ; (20)

[0164] The voltage difference between the two ends of the capacitor 200 under test at the end of constant current discharge is Ve3:

[0165]

[0166] The capacitor 200 to be tested starts to discharge at a constant current I2 from time t2, and during the discharge period, according to Kirchhoff's current law (KCL), the current flowing through the resistor R1 is equal to the current flowing through the integrating capacitor, that is:

[0167] (I2* )÷R1= ;(twenty two)

[0168] From the above formula (22), the voltage on the integrating capacitor C', i.e. VCC6, can be obtained as:

[0169] ;(twenty three)

[0170] According to formula (23) is a constant, the integration time starts from t2, after time t integration, the voltage VCC6 on the integration capacitor C' has a slope K2= (24). When the power module 100 outputs a positive voltage for charging and a constant current discharge process, the charging voltage VCC6 of the integral capacitor C' and the time t are shown in the curve below: Fig.11 When the power module 100 outputs a negative voltage for charging, during the constant current discharge process, the charging voltage VCC6 of the integral capacitor C' and the time t are shown in the curve as follows: Fig.13 As shown in the time period t2 to t3 of the curve graph.

[0171] During the constant current discharge process, the charge released by the capacitor 200 to be tested is q2, so the constant current discharge process is:

[0172] ; (25)

[0173] And because the definition formula of capacitor is:

[0174] ; (26)

[0175] In summary, when the constant current discharge of the capacitor 200 to be tested ends, the voltage across the capacitor 200 to be tested is U=Ve3. After the time t3-t2, the charge of the capacitor 200 to be tested is q2=Q2. The capacitance of the capacitor 200 to be tested is calculated by the formulas (18), (21), (25) and (26) as follows:

[0176] ; (27)

[0177] 6. Time period from the end of constant current discharge to the end of discharge:

[0178] After the constant current discharge is completed, after a period of time, the control module 700 drives the switch C-SW0 in the charge clearing switch circuit to close through the CAP_ON / OFF signal, and starts to release the charge of the integral capacitor. At the same time, the current acquisition circuit in the charge clearing switch circuit monitors the charge release of the integral capacitor. If there is a release current, it means that there is still charge on the integral capacitor; if there is no discharge current, it means that the integral capacitor has been discharged; until the integral capacitor has been discharged, the charge clearing switch circuit reports the integral capacitor no charge flag to the control module through the C-CA interface, preparing for the next constant current charging measurement.

[0179] In order to obtain higher measurement accuracy, the above steps may be followed to perform measurements multiple times, discard the highest value and the lowest value, and then take the average value of the remaining data as the capacitance of the capacitor 200 to be measured.

[0180] According to the multi-range capacitance measurement circuit based on constant current charging and discharging of the embodiment of the present invention, the resistance shunt module 300 can accelerate the large current shunt of the charging and discharging process for the capacitors to be tested of different test ranges, accelerate the end of the constant current charging and discharging time, improve the measurement efficiency, and prevent the input of excessive current from burning the measurement circuit; the integration module 400 can switch and combine different integral capacitance values ​​according to the capacitors to be tested of different test ranges, adapt to the constant current test of charging and discharging of various types of capacitors, so as to achieve multi-range capacitance testing; in the MLCC high-speed multi-channel test sorting machine, there is no need to purchase expensive capacitance test capacitance meters, and only the multi-range capacitance measurement circuit based on constant current charging and discharging of the corresponding number of channels needs to be used to complete the MLCC high-speed multi-channel capacitance measurement, and also meet the multi-range measurement; it can reduce the volume of the MLCC high-speed multi-channel test sorting machine, save space, simplify the production line automation test process and reduce components, reduce costs, and is more suitable for the use of the MLCC capacitor automation production line high-speed multi-channel test sorting machine to meet various customer testing needs.

[0181] On the other hand, based on the above-mentioned multi-range capacitance measurement circuit based on constant current charging and discharging, the embodiment of the present invention also proposes a multi-range capacitance measurement method based on constant current charging and discharging, such as Fig.14 As shown, the method comprises the following steps:

[0182] Step S100: Determine the charging voltage, charging current, shunt resistance of the resistance shunt module 300 and integration capacitance of the integration module 400 according to the test range of the capacitor 200 to be tested;

[0183] Step S200: the power module 100 performs constant current charging on the capacitor to be tested according to the charging voltage and the charging current;

[0184] Step S300: the resistor shunt module 300 performs current shunt through a shunt resistor;

[0185] Step S400: the integration module 400 integrates the voltage value of the capacitor 200 to be measured according to the integration capacitance to obtain a first integrated voltage value;

[0186] Step S500: the sampling module 500 samples the first integrated voltage value to obtain first sampling data, and sends the first sampling data to the control module 700;

[0187] Step S600: the adjustable window threshold comparison module 600 compares the first integrated voltage value with the threshold range according to the threshold range set by the control module 700 to determine whether the first integrated voltage value is within the threshold range;

[0188] Step S700: When the first integrated voltage value is within the threshold range, the control module 700 calculates the first capacitance value of the capacitor 200 to be measured according to the charging voltage, the charging current, the first sampling data and the shunt resistance.

[0189] Specifically, the control module 700 automatically configures the measurement parameters according to the test range configured by the user: the power module 100 is set to output a constant charging voltage VCC1, a constant charging current I1, and a shunt resistor of the resistor shunt module 300 and the integral capacitor of the integral module 400 The capacitor 200 to be tested is charged in a constant current state through the power module 100 .

[0190] It should be noted that before constant current charging, the following four steps are also included:

[0191] (1) Setting the current limiting current value of the current limiting charging switch module and the current limiting discharging switch module;

[0192] (2) Disconnect the current-limiting charging switch module, close the current-limiting discharging switch module, and close the charge clearing switch circuit;

[0193] (3) The charge of the capacitor to be measured and the integration module are cleared through the current limiting discharge switch module and the charge clearing switch circuit;

[0194] (4) Disconnect the current limiting discharge switch module and the charge clearing switch circuit, close the current limiting charging switch module, and enter the constant current charging process.

[0195] Before constant current charging, the control module 700 sets the current limiting current value of the current limiting charging switch module 800, and at the same time turns off the output of the current limiting charging switch module 800, that is, disconnects XL-SW1; the control module 700 sets the current limiting current value of the current limiting discharge switch module 900, and at the same time closes XL-SW2; the control module 700 drives the switch C-SW0 of the charge zeroing switch circuit to close through the CAP_ON / OFF signal, and starts to release the charge of the integral capacitor of the integral module 400. At the same time, the current acquisition circuit in the charge zeroing switch circuit monitors the charge release of the integral capacitor. If there is a release current, it means that there is still charge on the integral capacitor; if there is no discharge current, it means that the integral capacitor has been discharged; when the integral capacitor is discharged, the charge zeroing switch circuit reports the integral capacitor no charge flag to the control module 700 through the C-CA interface, preparing for entering the constant current charging measurement.

[0196] After entering the constant current state charging, the control module 700 simultaneously drives the switch XL-SW2 of the current limiting discharge switch module 900 to be disconnected and the switch C-SW0 of the charge clearing switch circuit to be disconnected, and drives the switch XL-SW1 of the current limiting charging switch module 800 to be closed and turned on, and the power module 100 outputs a constant voltage VCC1 (a positive value) and a constant current I1, and the capacitor 200 to be tested enters the constant current state charging. For the constant current state charging process, please refer to the description of point 3 (entering the constant current state charging time period) above. Finally, the control module 700 calculates the first capacitance value of the capacitor 200 to be tested according to the charging voltage, charging current, first sampling data and shunt resistance. The formula is the above formula (13), that is:

[0197] .

[0198] After the constant current charging is completed, after a period of time, when time t2 is reached, the CAP_ON / OFF signal drives the switch C-SW0 in the charge clearing switch circuit to close, and the charge of the integral capacitor begins to be released. At the same time, the current acquisition circuit in the charge clearing switch circuit monitors the charge release of the integral capacitor. If there is a release current, it means that there is still charge on the integral capacitor; if there is no discharge current, it means that the integral capacitor has been discharged; until the integral capacitor has been discharged, the charge clearing switch circuit reports the integral capacitor no charge flag to the control module 700 through the C-CA interface, preparing for entering the constant current discharge.

[0199] In some embodiments of the present invention, the constant current discharge process includes the following six steps:

[0200] (1) Determine the discharge current based on the test range of the capacitor 200;

[0201] (2) The capacitor 200 to be tested is discharged in a constant current state according to the discharge current, and the resistor shunt module 300 shunts the current through the shunt resistor;

[0202] (3) The integration module 400 integrates the voltage value of the capacitor to be measured according to the integration capacitor to obtain a second integrated voltage value;

[0203] (4) The sampling module 500 samples the second integrated voltage value to obtain second sampling data, and sends the second sampling data to the control module 700;

[0204] (5) The adjustable window threshold comparison module 600 compares the second integrated voltage value with the threshold range to determine whether the second integrated voltage value is within the threshold range;

[0205] (6) When the second integrated voltage value is within the threshold range, the control module 700 calculates the second capacitance value of the capacitor to be measured according to the charging voltage, the charging current, the discharging current, the second sampling data and the shunt resistance.

[0206] It should be noted that the specific process of the constant current discharge is described in point 5 (constant current discharge time period) above. Finally, the control module 700 calculates the second capacitance value of the capacitor to be measured according to the charging voltage, charging current, discharge current, second sampling data and shunt resistance. The formula is the above formula (27), that is:

[0207] .

[0208] According to the multi-range capacitance measurement method based on constant current charging and discharging of the embodiment of the present invention, the resistance shunt module 300 can accelerate the large current shunt of the charging and discharging process for the capacitors to be tested of different test ranges, accelerate the end of the constant current charging and discharging time, improve the measurement efficiency, and prevent the input of excessive current from burning the measurement circuit; the integration module 400 can switch and combine different integral capacitance values ​​according to the capacitors to be tested of different test ranges, adapt to the constant current test of charging and discharging of various types of capacitors, so as to achieve multi-range capacitance testing; in the MLCC high-speed multi-channel test sorting machine, there is no need to purchase expensive capacitance test capacitance meters, and only needs to use the multi-range capacitance capacitance measurement circuit based on constant current charging and discharging of the corresponding number of channels to complete the MLCC high-speed multi-channel capacitance measurement, and also meet the multi-range measurement; it can reduce the volume of the MLCC high-speed multi-channel test sorting machine, save space, simplify the production line automation test process and reduce components, reduce costs, and is more suitable for the use of the MLCC capacitor automation production line high-speed multi-channel test sorting machine to meet various customer testing needs.

[0209] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions under the shared conditions without violating the spirit of the present invention. These equivalent deformations or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A multi-range capacitance measurement circuit based on constant current charging and discharging, characterized in that: include: A power module, wherein an output end of the power module is electrically connected to one end of the capacitor to be measured; A resistor shunt module, wherein the input end of the resistor shunt module is electrically connected to the other end of the capacitor to be measured, and the resistor shunt module is used to configure a shunt resistor of a corresponding resistance value according to the test range of the capacitor to be measured; An integration module, wherein the input end of the integration module is electrically connected to the output end of the resistance shunt module, and the integration module is used to configure an integration capacitor of a corresponding capacitance value according to the test range of the capacitor to be measured, and integrate the voltage value of the capacitor to be measured according to the integration capacitor to obtain an integrated voltage value; A sampling module, wherein the input end of the sampling module is electrically connected to the output end of the integration module, and the sampling module is used to sample the integrated voltage value to obtain sampling data; A control module, electrically connected to the power module, the resistor shunt module, the integration module and the sampling module, respectively, the control module is used to configure the shunt resistor of the resistor shunt module, and configure the integration capacitor of the integration module, and the control module is also used to calculate the capacitance value of the capacitor to be measured according to the sampling data; An adjustable window threshold comparison module, wherein the first input end of the adjustable window threshold comparison module is electrically connected to the output end of the integration module, the second input end of the adjustable window threshold comparison module is electrically connected to the control module, the control module is used to set the threshold range of the adjustable window threshold comparison module, and the adjustable window threshold comparison module is used to determine whether the integrated voltage value is within the threshold range.

2. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 1 is characterized in that: Also includes: A current limiting charging switch module, wherein the output end of the power module is electrically connected to one end of the capacitor to be measured through the current limiting charging switch module, the controlled end of the current limiting charging switch module is electrically connected to the control module, and the current limiting charging switch module is used to limit the charging current of the power module; A current limiting discharge switch module, wherein the input end of the current limiting discharge switch module is electrically connected to one end of the capacitor to be measured, the output end of the current limiting discharge switch module is grounded, the controlled end of the current limiting discharge switch module is electrically connected to the control module, and the current limiting discharge switch module is used to limit the discharge current of the capacitor to be measured.

3. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 1 is characterized in that: The resistance shunt module comprises: An input internal resistance, one end of which is electrically connected to the other end of the capacitor to be measured, and the other end of which is electrically connected to the input end of the integration module; The shunt resistor group includes a plurality of shunt resistor units connected in parallel, one end of each of the shunt resistor units is electrically connected to the other end of the capacitor to be measured, and the other end of each of the shunt resistor units is grounded, each of the shunt resistor units includes a first resistor and a first switching switch connected in series, a controlled end of the first switching switch is electrically connected to the control module, and the control module is used to switch the conduction state of the first switching switch to configure the shunt resistor.

4. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 3 is characterized in that: The first switching switch comprises: A first MOS transistor, wherein a gate of the first MOS transistor is electrically connected to the control module, and a source of the first MOS transistor is grounded; A phototransistor, wherein the input end of the phototransistor is electrically connected to the drain of the first MOS tube; a second MOS transistor, wherein a gate of the second MOS transistor is electrically connected to the first output terminal of the phototransistor, and a drain of the second MOS transistor is electrically connected to the other end of the capacitor to be measured; a third MOS tube, wherein a gate of the third MOS tube is electrically connected to the first output end of the phototransistor, a source of the third MOS tube is electrically connected to the source of the second MOS tube, and a drain of the third MOS tube is electrically connected to the corresponding first resistor; a first voltage stabilizing diode, wherein an anode of the first voltage stabilizing diode is electrically connected to the second output terminal of the phototransistor, and a cathode of the first voltage stabilizing diode is electrically connected to the gate of the second MOS transistor; A second voltage stabilizing diode, wherein an anode of the second voltage stabilizing diode is electrically connected to the second output terminal of the phototransistor, and a cathode of the second voltage stabilizing diode is electrically connected to the gate of the third MOS tube.

5. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 3 is characterized in that: The first switching switch comprises: a fourth MOS tube, wherein a gate of the fourth MOS tube is electrically connected to the control module, and a source of the fourth MOS tube is grounded; An optocoupler MOS tube, wherein the input end of the optocoupler MOS tube is electrically connected to the drain of the fourth MOS tube, the first output end of the optocoupler MOS tube is electrically connected to the other end of the capacitor to be measured, and the second output end of the optocoupler MOS tube is electrically connected to the corresponding first resistor.

6. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 3 is characterized in that: The first switching switch comprises: a fifth MOS tube, wherein a gate of the fifth MOS tube is electrically connected to the control module, and a source of the fifth MOS tube is grounded; A relay, wherein the first control end of the relay is connected to a power supply, the second control end of the relay is electrically connected to the drain of the fifth MOS tube, the first contact of the relay is electrically connected to the other end of the capacitor to be measured, and the second contact of the relay is electrically connected to the corresponding first resistor.

7. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 1 is characterized in that: The integration module comprises: An integral operation circuit, wherein the input end of the integral operation circuit is electrically connected to the output end of the resistance shunt module, and the output end of the integral operation circuit is electrically connected to the input end of the sampling module; A charge clearing switch circuit is connected in parallel with the integral operation circuit, and a controlled end of the charge clearing switch circuit is electrically connected to the control module; An integral capacitor circuit is connected in parallel with the charge zeroing switch circuit, the integral capacitor circuit includes a first capacitor and a plurality of integral capacitor units connected in parallel, each of the integral capacitor units includes a second capacitor and a second switch connected in series, the controlled end of the second switch is electrically connected to the control module, and the control module is used to switch the conduction state of the second switch to configure the integral capacitor.

8. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 7 is characterized in that: The integral operation circuit comprises: A first operational amplifier, wherein a non-inverting input terminal of the first operational amplifier is grounded, a reverse input terminal of the first operational amplifier is electrically connected to an output terminal of the resistance shunt module, and an output terminal of the first operational amplifier is electrically connected to an input terminal of the sampling module; a first clamping diode, wherein an anode of the first clamping diode is electrically connected to the reverse input terminal of the first operational amplifier, and a cathode of the first clamping diode is grounded; A second clamping diode, wherein an anode of the second clamping diode is grounded, and a cathode of the first clamping diode is electrically connected to a reverse input terminal of the first operational amplifier.

9. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 7, characterized in that: It also includes a NAND gate circuit, a first input end of the NAND gate circuit is electrically connected to the control module, a second input end of the NAND gate circuit is electrically connected to the output end of the adjustable window threshold comparison module, and an output end of the NAND gate circuit is electrically connected to the controlled end of the charge zeroing switch circuit.

10. The multi-range capacitance measurement circuit based on constant current charging and discharging according to claim 1, characterized in that: The adjustable window threshold comparison module comprises: a non-directional amplifier circuit, wherein an input end of the non-directional amplifier circuit is electrically connected to the control module, and the non-directional amplifier circuit is used to amplify the threshold voltage output by the control module to obtain a first voltage value; an inverter circuit, wherein an input end of the inverter circuit is electrically connected to an output end of the non-inverting amplifier circuit, and the inverter circuit is used to invert the first voltage value to obtain a second voltage value; the threshold range is a range between the second voltage value and the first voltage value; The window comparison circuit is used to compare the integrated voltage value with the first voltage value and the second voltage value respectively, and output the comparison result to the control module.

11. A multi-range capacitance measurement method based on constant current charging and discharging, applied to the multi-range capacitance measurement circuit based on constant current charging and discharging as claimed in any one of claims 1 to 10, characterized in that: The following steps are involved: According to the test range of the capacitor to be tested, the charging voltage, the charging current, the shunt resistance of the resistance shunt module and the integral capacitance of the integral module are determined; The power module performs constant current charging on the capacitor to be tested according to the charging voltage and the charging current; The resistance shunt module performs current shunting via the shunt resistor; The integration module integrates the voltage value of the capacitor to be measured according to the integration capacitor to obtain a first integrated voltage value; The sampling module samples the first integrated voltage value to obtain first sampling data, and sends the first sampling data to the control module; The adjustable window threshold comparison module compares the first integrated voltage value with the threshold range according to the threshold range set by the control module, and determines whether the first integrated voltage value is within the threshold range; When the first integrated voltage value is within the threshold range, the control module calculates a first capacitance value of the capacitor to be measured according to the charging voltage, the charging current, the first sampling data and the shunt resistance.

12. The multi-range capacitance measurement method based on constant current charging and discharging according to claim 11, characterized in that: It also includes a constant current discharge process, which includes: Determining the discharge current according to the test range of the capacitor to be tested; The capacitor to be tested performs constant current discharge according to the discharge current, and the resistor shunt module performs current shunting through the shunt resistor; The integration module integrates the voltage value of the capacitor to be measured according to the integration capacitor to obtain a second integrated voltage value; The sampling module samples the second integrated voltage value to obtain second sampling data, and sends the second sampling data to the control module; The adjustable window threshold comparison module compares the second integrated voltage value with the threshold range to determine whether the second integrated voltage value is within the threshold range; When the second integrated voltage value is within the threshold range, the control module calculates a second capacitance value of the capacitor to be measured according to the charging voltage, the charging current, the discharging current, the second sampling data and the shunt resistance.

13. The multi-range capacitance measurement method based on constant current charging and discharging according to claim 11, characterized in that: The multi-range capacitance measurement circuit comprises: a current limiting charging switch module and a current limiting discharging switch module, the output end of the power supply module is electrically connected to one end of the capacitor to be measured through the current limiting charging switch module, the input end of the current limiting discharging switch module is electrically connected to one end of the capacitor to be measured, and the output end of the current limiting discharging switch module is grounded; the integration module comprises a charge clearing switch circuit; Before constant current charging, the multi-range capacitance measurement method based on constant current charging and discharging further includes the following steps: Setting the current limiting current values ​​of the current limiting charging switch module and the current limiting discharging switch module; Disconnect the current-limiting charging switch module, close the current-limiting discharging switch module, and close the charge clearing switch circuit; The charge of the capacitor to be measured and the integration module are cleared by the current limiting discharge switch module and the charge clearing switch circuit; The current limiting discharge switch module and the charge clearing switch circuit are disconnected, and the current limiting charging switch module is closed to enter the constant current charging process.

Images