Expansion board card, peripheral equipment safety detection device and method and medium

Abstract

The invention provides an expansion board card, a peripheral equipment safety detection device, a peripheral equipment safety detection method and a medium. The expansion board card comprises a first expansion connector, a microcontroller, a first power supply connector, a current monitoring chip, a storage chip, an input and output expansion chip and a peripheral equipment slot, the voltage output end of the power connector is connected with the microcontroller, and peripheral equipment is connected to the peripheral equipment slot; the current monitoring chip is connected with the microcontroller based on a current interface, the input and output expansion chip is connected with the microcontroller based on an input and output expansion interface, the peripheral equipment slot is connected with the microcontroller based on a peripheral equipment interface, and the storage chip is connected with the microcontroller based on a storage interface. The microcontroller is connected with the first expansion connector based on the microcontroller interface. And a function of monitoring the power supply current of the board card to the peripheral equipment and obtaining the current state of the expansion board card are added, so that a hardware basis is provided for realizing the safety detection of the peripheral equipment.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to an expansion board, a peripheral device security detection device, method and medium. Background Art

[0002] With the rapid development of the server industry, Internet and communication customers have more and more requirements for data processing. Therefore, in more and more business scenarios, external expansion boards are added to the motherboard to expand the motherboard's business capabilities.

[0003] By connecting expansion boards to the motherboard and inserting peripheral devices such as smart network cards into the PCIe device slots provided by the expansion boards, the business functions of the motherboard can be greatly expanded. However, there are currently many abnormal situations when assembling expansion boards and peripheral devices in the server, which causes the peripheral devices to fail to operate normally.

[0004] Therefore, there is an urgent need for a board and a safety detection device and a safety detection method that can support safety detection of peripheral devices on an expansion board to solve the problem. Summary of the invention

[0005] Based on this, it is necessary to provide an expansion board, peripheral device safety detection device, method and medium to address the technical issues.

[0006] In a first aspect, the present application provides an expansion board, the expansion board comprising a first expansion connector, a microcontroller, a first power connector, a current monitoring chip, a memory chip, an input / output expansion chip, and a peripheral device slot;

[0007] The microcontroller provides a storage interface, an input / output expansion interface, a peripheral device interface and a current interface; the first expansion connector provides a microcontroller interface; the voltage output end of the power connector is connected to the microcontroller; and the peripheral device slot is connected to a peripheral device;

[0008] The current monitoring chip is connected to the microcontroller based on the current interface, the input / output expansion chip is connected to the microcontroller based on the input / output expansion interface, the peripheral device slot is connected to the microcontroller based on the peripheral device interface, the storage chip is connected to the microcontroller based on the storage interface, and the microcontroller is connected to the first expansion connector based on the microcontroller interface.

[0009] In some embodiments, the voltage output terminal of the first power connector is connected to the input terminal of a linear regulator;

[0010] The output end of the linear regulator is connected to the microcontroller.

[0011] In a second aspect, the present application provides a peripheral device safety detection device, including a mainboard and the above-mentioned expansion board;

[0012] The mainboard includes a second expansion connector, a second NCSI connector, a central processing unit, a baseboard management controller, a complex programmable logic device, a second power connector and a power management chip;

[0013] The second expansion connector is connected to the first expansion connector via a cable, the second expansion connector is connected to the central processing unit via a cable, the second expansion connector is connected to the complex programmable logic device via a cable, and the second expansion connector is connected to the baseboard management controller via a cable;

[0014] The second NCSI connector is connected to the first NCSI connector on the peripheral device connected to the peripheral device slot in the expansion board through a cable, and the second NCSI connector is connected to the complex programmable logic device through a cable;

[0015] The input end of the power management chip is connected to an external power source, and the output end of the power management chip is connected to a voltage input end of the second power connector;

[0016] The voltage input terminal of the first power connector is connected to the voltage output terminal of the second power connector.

[0017] In some embodiments, the second expansion connector is connected to the peripheral device slot via a cable;

[0018] The mainboard transmits a designated signal to the first expansion connector on the expansion board through the second expansion connector;

[0019] The second expansion connector transmits the designated signal to the peripheral device connected to the peripheral device slot.

[0020] In a third aspect, the present application provides a peripheral device security detection method, when the server is powered on and in a server shutdown state, the method comprises:

[0021] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0022] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0023] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0024] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0025] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0026] In some embodiments, the microcontroller obtains a peripheral device presence signal in the expansion chip, and if the peripheral device presence signal is at a low level, determines that the first bit in the register is 1, otherwise it is 0;

[0027] The microcontroller obtains the expansion board in-position signal in the expansion chip, and if the expansion board in-position signal is at a low level, determines that the second bit in the register is 1, otherwise it is 0;

[0028] The microcontroller obtains the current value in the current monitoring chip, and determines that the third bit in the register is 1 if the current value in the current monitoring chip is within a preset range, otherwise it is 0;

[0029] The microcontroller obtains device information of the peripheral device connected to the peripheral device slot and determines whether the peripheral device is a preset peripheral device. If the peripheral device is a preset peripheral device, the fourth bit in the register is determined to be 1, otherwise it is 0.

[0030] In some embodiments, determining the card status of the expansion card according to the value of the designated bit includes:

[0031] If there is a value other than 1 in the values ​​of the designated bits, it is determined that the board state of the expansion board is an abnormal board state;

[0032] If the values ​​of the designated bits are all 1, it is determined that the board state of the expansion board is a normal board state.

[0033] In some embodiments, the complex programmable logic device determines the device state of the peripheral device according to the connection state and the board state and a preset judgment rule, and the abnormal state includes a first abnormal state and a second abnormal state, including:

[0034] If the connection state is an interrupted state and the board state is a normal board state, determining that the device state of the peripheral device is a first abnormal state;

[0035] If the connection state is an interrupted state and the board state is an abnormal board state, determining that the device state of the peripheral device is a first abnormal state;

[0036] If the connection state is a normal state and the board state is an abnormal board state, determining that the device state of the peripheral device is a second abnormal state;

[0037] If the connection status is a normal status and the board status is a normal board status, then it is determined that the device status of the peripheral device is a normal status.

[0038] In some embodiments, in response to detecting that the device state of the peripheral device is an abnormal state, triggering the complex programmable logic device to perform an abnormal operation includes:

[0039] In response to detecting that the device state of the peripheral device is a first abnormal state, triggering the complex programmable logic device to perform a power-off operation and notifying the baseboard management controller to issue an alarm;

[0040] In response to detecting that the device state of the peripheral device is a second abnormal state, the complex programmable logic device is triggered to perform a power-off operation.

[0041] In a fourth aspect, the present application provides a computer program product, which implements the steps of the following method when the computer program is executed by a processor:

[0042] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0043] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0044] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0045] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0046] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0047] In a fifth aspect, the present application provides a peripheral device safety detection system, including:

[0048] A preparation module, used for obtaining a connection status between the first NCSI connector and the second NCSI connector based on a complex programmable logic device;

[0049] The preparation module is further used to read the value of a specified bit in the register in the microcontroller based on the complex programmable logic device and determine the board state of the expansion board according to the value of the specified bit;

[0050] A judgment module, used for judging the device state of the peripheral device based on the complex programmable logic device according to the connection state and the board state and a preset judgment rule, wherein the device state includes a safe state and an abnormal state;

[0051] A security module, configured to trigger the complex programmable logic device to perform a power supply operation in response to detecting that the device state of the peripheral device is a security state;

[0052] The security module is further configured to trigger the complex programmable logic device to perform an abnormal operation in response to detecting that the device state of the peripheral device is an abnormal state.

[0053] In a sixth aspect, the present application provides an electronic device, the electronic device comprising:

[0054] one or more processors;

[0055] and a memory associated with one or more processors, the memory being used to store program instructions, which, when read and executed by the one or more processors, perform the following operations:

[0056] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0057] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0058] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0059] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0060] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0061] In a seventh aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, and the computer program enables a computer to perform the following operations:

[0062] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0063] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0064] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0065] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0066] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0067] The beneficial effects achieved by this application are:

[0068] The present application provides an expansion board, a peripheral device safety detection device, a method and a medium, wherein the expansion board includes a first expansion connector, a microcontroller, a first power connector, a current monitoring chip, a memory chip, an input / output expansion chip and a peripheral device slot; the microcontroller provides a storage interface, an input / output expansion interface, a peripheral device interface and a current interface, the first expansion connector provides a microcontroller interface, the voltage output end of the power connector is connected to the microcontroller, and a peripheral device is connected to the peripheral device slot; the current monitoring chip is connected to the microcontroller based on the current interface, the input / output expansion chip is connected to the microcontroller based on the input / output expansion interface, the peripheral device slot is connected to the microcontroller based on the peripheral device interface, the memory chip is connected to the microcontroller based on the storage interface, and the microcontroller is connected to the first expansion connector based on the microcontroller interface. The present application designs an expansion board, adds a power supply current monitoring function for peripheral devices, and increases the acquisition of the current expansion board status by using a microcontroller, so as to provide a hardware basis for realizing safety detection of peripheral devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0069] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0070] Figure 1 This is a schematic diagram of an expansion card topology provided in an embodiment of the present application;

[0071] Figure 2 This is another expansion card topology diagram provided in an embodiment of the present application;

[0072] Figure 3 It is a schematic diagram of a peripheral device safety detection device provided in an embodiment of the present application;

[0073] Figure 4 It is a schematic diagram of a peripheral device security detection method provided by an embodiment of the present application;

[0074] Figure 5 This is an architecture diagram of a peripheral device safety detection system provided in an embodiment of the present application;

[0075] Figure 6 This is a structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0076] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0077] It should be understood that in the description of the present application, unless the context clearly requires otherwise, words such as "include", "comprises", and the like in the entire specification and claims should be interpreted as inclusive rather than exclusive or exhaustive; that is, the meaning of "including but not limited to".

[0078] It should also be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, "plurality" means two or more.

[0079] It should be noted that the terms "S1", "S2", etc. are only used for the purpose of describing the steps, and do not specifically refer to the order or sequence, nor are they used to limit the present application. They are only for the convenience of describing the method of the present application, and cannot be understood as indicating the order of the steps. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present application.

[0080] Embodiment 1

[0081] like Figure 1 As shown in the expansion board topology diagram, an embodiment of the present application provides an expansion board, specifically including: the expansion board includes a first expansion connector, a microcontroller (MCU, Microcontroller Unit), a first power connector, a current monitoring chip, a storage chip, an input and output expansion chip and a peripheral device slot.

[0082] Among them, the first expansion connector is MCIO CONN (Multi-Client I / O Connector), that is, a multi-client input / output connector. This connector is mainly used in high-performance computing environments such as servers and workstations to expand input / output (I / O) functions. The design purpose of the MCIO connector is to improve the flexibility and scalability of the system, especially when it is necessary to support multiple client devices. It can be understood that in other specific implementation scenarios, the above-mentioned first expansion connector can also use other connectors that support multiple client devices, and this application does not limit this. The above-mentioned power connector (PWR CONN, Power Connector) is a key component in electrical equipment for connecting the power cord and the internal circuit of the equipment; it is responsible for introducing an external power supply (such as AC power, battery, etc.) into the equipment and providing power supply to various parts of the equipment. The above-mentioned input and output expansion chip is an I / O expansion chip, which is used to expand the input and output interface of the device. In this application, it is used to obtain the presence signal of the peripheral device connected to the peripheral device slot, the presence signal of the expansion board, and the board identification, etc. The storage chip (EEPROM) is used to store the firmware for the operation of the microcontroller.

[0083] The microcontroller provides a storage interface, an input / output expansion interface, a peripheral device interface, and a current interface. The first expansion connector provides a microcontroller interface. The voltage output end of the power connector is connected to the microcontroller. The peripheral device slot is connected to a peripheral device, wherein the peripheral device includes a PCIe device such as a smart network card. The current monitoring chip is connected to the microcontroller based on the current interface, the input / output expansion chip is connected to the microcontroller based on the input / output expansion interface, the peripheral device slot is connected to the microcontroller based on the peripheral device interface, the storage chip is connected to the microcontroller based on the storage interface, and the microcontroller is connected to the first expansion connector based on the microcontroller interface.

[0084] In a specific implementation scenario, the current monitoring chip is connected to the current interface through an I2C cable (i.e., Current_Slot_I2C cable) to achieve connection with the microcontroller; the input and output expansion chip is connected to the input and output expansion interface through an I2C cable to achieve connection with the microcontroller; the peripheral device slot is connected to the peripheral device interface through an I2C cable to achieve connection with the microcontroller; the storage chip is connected to the storage interface through an I2C cable to achieve connection with the microcontroller, and the microcontroller is connected to the first expansion connector through an I2C cable microcontroller interface. At this time, the interfaces are all interfaces that support the I2C communication standard. It is understandable that in some other implementation scenarios, the connection of the above components can also be achieved through other cables such as PCIe cables, and the interface is adaptively modified to the communication standard interface supported by the cable.

[0085] The present application designs an expansion board, adds a power supply current monitoring function to peripheral devices through a current monitoring chip, and uses a microcontroller to increase the acquisition of the current expansion board status, thereby providing a hardware basis for realizing safety detection of peripheral devices.

[0086] Embodiment 2

[0087] Based on the above embodiments, Figure 2 As shown in the expansion board topology diagram shown in the figure, the embodiment of the present application also provides an expansion board. In this embodiment, the voltage output end of the first power connector is connected to the input end of the linear regulator; the output end of the linear regulator is connected to the microcontroller, and the remaining structure is the same as the above. Figure 1 The expansion board shown is the same. Among them, the linear regulator is preferably an LDO regulator, that is, LDO (Low Dropout Regulator), which is a simple linear regulator, which is widely used in many electronic devices due to its simple structure, low cost and low noise characteristics. The embodiment of the present application converts the output P3V3_STBY of the first power connector into a corresponding voltage to power the MCU through LDO, thereby achieving stable power supply to the MCU, and even when the input voltage and the output voltage differ very little, a stable output voltage can still be maintained.

[0088] Embodiment 3

[0089] Based on the above embodiments, Figure 3The topological diagram of the security detection device shown in the figure, the embodiment of the present application also provides a peripheral device security detection device, including a mainboard and the expansion board disclosed in the above-mentioned embodiment one and embodiment two; the mainboard includes a second expansion connector, a second NCSI connector, a central processing unit, a baseboard management controller, a complex programmable logic device (CPLD, Complex Programmable Logic Device), a second power connector and a power management chip (VR, Voltage Regulator); the second expansion connector is connected to the first expansion connector through a cable, the second expansion connector is connected to the central processing unit through a cable, the second expansion connector is connected to the complex programmable logic device through a cable, and the second expansion connector is connected to the baseboard management controller through a cable; the second NCSI connector is connected to the first NCSI connector on the peripheral device connected to the peripheral device slot in the expansion board through a cable, and the second NCSI connector is connected to the complex programmable logic device through a cable; the input end of the power management chip is connected to the external power supply, and the output end of the power management chip is connected to the voltage input end of the second power connector; the voltage input end of the first power connector is connected to the voltage output end of the second power connector. Among them, the NCSI (Network Controller Sideband Interface) connector allows the BMC in the motherboard to communicate with peripheral devices through the NCSI protocol through the connection of the first NCSI connector and the second NCSI connector, thereby realizing the out-of-band management function, and the server can be monitored and managed even when the server operating system is not running.

[0090] The present application designs a peripheral device security detection device to enhance the device architecture of logic judgment and identification, thereby providing hardware support for on-site detection of peripheral devices and providing security protection for peripheral devices.

[0091] Wherein, the second expansion connector is connected to the peripheral device slot through a cable; the mainboard transmits a specified signal to the first expansion connector on the expansion board through the second expansion connector; the second expansion connector transmits a specified signal to the peripheral device connected to the peripheral device slot. In some implementation scenarios, the above-mentioned mainboard also includes a PCH (Platform Controller Hub, platform controller hub), which is not shown in the figure, for obtaining the connection status through the first NCSI connector and the second NCSI connector. Wherein, the above-mentioned specified signals include but are not limited to X8 / X16 high-speed CPIE signals, 100M clocks, Throttle signals (frequency reduction signals), reset signals, and Wake signals related to CPU, PCH, and CPLD. The mainboard realizes the normal operation of the expansion board by efficiently transmitting a variety of important signals to the expansion board, and ensures the stability and scalability of the system.

[0092] In a specific implementation scenario, the motherboard connects the X8 / X16 high-speed CPIE signals, 100M clock, Throttle signal (frequency reduction signal), reset signal and Wake signal related to the CPU, PCH and CPLD to the MCIO Conn high-speed connector on the Riser board through MCIO Conn and cable 1, so as to realize the interconnection between the motherboard and the expansion board; the first NCSI connector and the second NCSI connector are used to connect the PCIE devices (i.e. peripheral devices) in the motherboard end and the expansion board, and provide NCSI signals, UART signals and NCSI in-place signals, etc.; the PWR power connector is used to provide P12V\P3V3\P3V3_STBY power supply; the CPLD is used to receive the NCSI in-place signal, output the enable signal to control the VR chip to output P12V and P3V3 to power the peripheral devices and perform logical judgment, etc.; the CPU and MCIO Conn are interconnected through high-speed PCIE for device identification; the BMC is used to identify the presence and information of peripheral devices, etc.

[0093] In a specific implementation scenario, the expansion board connects the X8 / X16 high-speed CPIE signal, 100M clock, Throttle signal (frequency reduction signal), reset signal and Wake signal to the PCIe device Slot (i.e., peripheral device slot) through MCIO Conn; the first NCSI connector on the PCIE device is the NCSI interface on the PCIE device; the first power connector is used to receive the current transmitted by the second power connector and provide power to the expansion board; LDO is used to convert P3V3_STBY into a corresponding voltage to power the MCU; the current monitoring chip is connected to the MCU through I2C to monitor the power supply of P12V and P3V3_STBY; the MCU is connected to the PCIE device Slot through I2C to read peripheral device information; the EEPROM is connected to the MCU through I2C to store the firmware when the MCU is running; the MCU reads the PCIE Slot in-place signal, the expansion board in-place signal and the board identification of the IO expansion chip through I2C.

[0094] Embodiment 4

[0095] like Figure 4 The schematic diagram of the peripheral device safety detection method shown is applied to the peripheral device safety detection device disclosed in the above-mentioned embodiment 3, and implements the safety detection of the peripheral device when the server is powered on and in the server shutdown state, including the following contents:

[0096] S1. Obtaining the connection status between the first NCSI connector and the second NCSI connector based on a complex programmable logic device.

[0097] The present application also proposes to perform the following operations before obtaining the connection status of the first NCSI connector and the second NCSI connector based on a complex programmable logic device: trigger the microcontroller to read the board identification stored in the expansion chip and compare the board identification with the preset board identification; if the board identification is inconsistent with the preset board identification, trigger the complex programmable logic device to perform an alarm operation; if the board identification is consistent with the preset board identification, trigger the complex programmable logic device to obtain the connection status of the first NCSI connector and the second NCSI connector. Before performing a security check on the peripheral devices connected to the expansion board, detect whether the board connected to the mainboard at this time is the expected board. If not, there is no need to perform subsequent security checks. By adding pre-judgment logic, meaningless detection operations on peripheral devices are avoided, and waste of resources is avoided.

[0098] S2, reading the value of the specified bit in the register in the microcontroller based on the complex programmable logic device and judging the board status of the expansion board according to the value of the specified bit.

[0099] It is worth noting that there is no execution order between the above steps S1 and S2. Step S1 and step S2 can be executed simultaneously, or step S1 can be executed first and then step S2, or step S2 can be executed first and then step S1.

[0100] The method for determining the value of a specified bit in the register in the above microcontroller includes:

[0101] The microcontroller obtains the peripheral device in-position signal in the extension chip. If the peripheral device in-position signal is low, the first bit in the register is determined to be 1, otherwise it is 0. The microcontroller obtains the extension board in-position signal in the extension chip. If the extension board in-position signal is low, the second bit in the register is determined to be 1, otherwise it is 0. The microcontroller obtains the current value in the current monitoring chip. If the current value in the current monitoring chip is within the preset range, the third bit in the register is determined to be 1, otherwise it is 0, wherein the preset range is set by a technician in this field according to the actual scenario, and this application does not limit this. The microcontroller obtains the device information of the peripheral device connected to the peripheral device slot and determines whether the peripheral device is a preset peripheral device. If the peripheral device is a preset peripheral device, the fourth bit in the register is determined to be 1, otherwise it is 0, that is, if the preset peripheral device is a smart network card, the microcontroller determines whether the connected device is a smart network card after obtaining the device information of the peripheral device. If so, the fourth bit is set to 1, and if not, the fourth bit is set to 0. The present application obtains the information required to determine the status of the board through a microcontroller and defines different bits in the register to represent different meanings, thereby realizing rapid recording and calling of the board status information, speeding up subsequent judgments and facilitating the transmission of subsequent information to the baseboard management controller, making it easier for staff to check the cause of the abnormality.

[0102] It is understandable that the first bit, the second bit, the third bit and the fourth bit together constitute the designated bit. The present application does not limit the order of the four bits constituting the designated bit, and does not limit the positions of the selected first bit, second bit, third bit and fourth bit in the register. For example, the 0th to 3rd bits in the register can be selected and formed in the order of the first bit, the second bit, the third bit and the fourth bit, or they can be randomly selected. For ease of viewing, in some implementation scenarios, the 0th to 3rd bits in the register are preferentially selected and formed in the order of the first bit, the second bit, the third bit and the fourth bit.

[0103] The above-mentioned judging the board state of the expansion board according to the value of the designated bit includes: if there is a value other than 1 in the value of the designated bit, judging the board state of the expansion board is an abnormal board state; if the values ​​of the designated bits are all 1, judging the board state of the expansion board is a normal board state.

[0104] S3. Based on the complex programmable logic device, the device status of the peripheral device is judged according to the connection status, the board status and the preset judgment rules. The device status includes a safe status and an abnormal status.

[0105] The above-mentioned complex programmable logic device determines the device state of the peripheral device according to the connection state and the board state and the preset judgment rules, and the abnormal state includes the first abnormal state and the second abnormal state, including:

[0106] If the connection status is an interrupted status and the board status is a normal board status, the device status of the peripheral device is judged to be a first abnormal status; if the connection status is an interrupted status and the board status is an abnormal board status, the device status of the peripheral device is judged to be a first abnormal status; if the connection status is a normal status and the board status is an abnormal board status, the device status of the peripheral device is judged to be a second abnormal status; if the connection status is a normal status and the board status is a normal board status, the device status of the peripheral device is judged to be a normal status.

[0107] S4. In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation.

[0108] S5. In response to detecting that the device state of the peripheral device is an abnormal state, triggering the complex programmable logic device to perform an abnormal operation.

[0109] In response to detecting that the device state of the peripheral device is in an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation, including: in response to detecting that the device state of the peripheral device is in a first abnormal state, the complex programmable logic device is triggered to perform a power-off operation and notify the baseboard management controller to issue an alarm; in response to detecting that the device state of the peripheral device is in a second abnormal state, the complex programmable logic device is triggered to perform a power-off operation, that is, the complex programmable logic device performs a logical judgment and forces the enable signal of the P12V and P3V3 VR chips that control the output to the peripheral device to be pulled low. That is, in the second abnormal state, there is no power supply, but the BMC does not record abnormal information and does not issue an alarm.

[0110] In a specific implementation scenario, if all the bits in the above-mentioned specified bits are 1, it means that the connected expansion board and peripheral devices are correct, and the connection status of the first NCSI connector and the second NCSI connector is normal, and the data information recorded in the specified bits is passed to the BMC through I2C, and the BMC does not record or issue any alarms.

[0111] In a specific implementation scenario, if only the first bit in the specified bits is 0, it means that the peripheral device is not in place. If the connection status of the first NCSI connector and the second NCSI connector is in an interrupted state, the CPLD needs to perform a power-off operation after logical judgment, forcibly pull down the enable signals of the P12V and P3V3VR chips that control the output to the peripheral device, and pass the data information to the BMC through I2C. The BMC records that the smart network card is not in place but the NCSI is now in place. The signal is low and an alarm is issued; if the connection status of the first NCSI connector and the second NCSI connector is normal, that is, the NCSI in place signal is high, the BMC does not record and does not issue any alarm.

[0112] In a specific implementation scenario, if the third bit is 0 and the remaining bits are 1, it means that the power supply current of the peripheral device is abnormal, and the connection status of the first NCSI connector and the second NCSI connector is interrupted. At this time, after the CPLD logic judgment, it is necessary to force the enable signal of the P12V and P3V3 VR chips that control the output to the smart network card to be pulled low, and the data information is passed to the BMC through I2C. The BMC records the power supply abnormality of the smart network card and issues a serious alarm; if the connection status of the first NCSI connector and the second NCSI connector is normal, the BMC does not record and does not issue any alarm.

[0113] In a specific implementation scenario, if the value of the specified bit composition is FFFF or an unfixed value, it means that both the peripheral device and the expansion board are not in place. If the connection status of the first NCSI connector and the second NCSI connector is in an interrupted state, the CPLD logic judgment needs to force the enable signal of the P12V and P3V3 VR chips that control the output to the smart network card to be pulled low, and the data information is passed to the BMC through I2C. The BMC records that the smart network card and the riser card are not in place but the NCSI is now in place. The signal is low and an alarm is issued; if the NCSI in place signal is high at this time (that is, if the connection status of the first NCSI connector and the second NCSI connector is normal), the BMC does not record and does not issue any alarm.

[0114] Through the above operations, this application avoids peripheral device abnormalities and transmits the judgment information corresponding to the register to the BMC through I2C for recording and alarming, thereby solving the risk of misidentification of power supply and power supply abnormalities when the server is equipped with peripheral devices.

[0115] Embodiment 5

[0116] The present application also provides a computer program, which implements the following steps when the computer program is executed by a processor:

[0117] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0118] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0119] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0120] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0121] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0122] In some implementation scenarios, when the computer program is executed by a processor, the steps of the following method are also implemented:

[0123] The microcontroller obtains a peripheral device presence signal in the expansion chip, and if the peripheral device presence signal is at a low level, determines that the first bit in the register is 1, otherwise it is 0;

[0124] The microcontroller obtains the expansion board in-position signal in the expansion chip, and if the expansion board in-position signal is at a low level, determines that the second bit in the register is 1, otherwise it is 0;

[0125] The microcontroller obtains the current value in the current monitoring chip, and determines that the third bit in the register is 1 if the current value in the current monitoring chip is within a preset range, otherwise it is 0;

[0126] The microcontroller obtains device information of the peripheral device connected to the peripheral device slot and determines whether the peripheral device is a preset peripheral device. If the peripheral device is a preset peripheral device, the fourth bit in the register is determined to be 1, otherwise it is 0.

[0127] In some implementation scenarios, when the computer program is executed by a processor, the steps of the following method are also implemented:

[0128] If there is a value other than 1 in the values ​​of the designated bits, it is determined that the board state of the expansion board is an abnormal board state;

[0129] If the values ​​of the designated bits are all 1, it is determined that the board state of the expansion board is a normal board state.

[0130] In some implementation scenarios, when the computer program is executed by a processor, the steps of the following method are also implemented:

[0131] If there is a value other than 1 in the values ​​of the designated bits, it is determined that the board state of the expansion board is an abnormal board state;

[0132] If the values ​​of the designated bits are all 1, it is determined that the board state of the expansion board is a normal board state.

[0133] In some implementation scenarios, when the computer program is executed by a processor, the steps of the following method are also implemented:

[0134] In response to detecting that the device state of the peripheral device is a first abnormal state, triggering the complex programmable logic device to perform a power-off operation and notifying the baseboard management controller to issue an alarm;

[0135] In response to detecting that the device state of the peripheral device is a second abnormal state, the complex programmable logic device is triggered to perform a power-off operation.

[0136] Embodiment 6

[0137] Corresponding to the above-mentioned embodiment, Figure 5 As shown, the present application also provides a peripheral device safety detection system, including:

[0138] A preparation module 510, configured to obtain a connection status between the first NCSI connector and the second NCSI connector based on a complex programmable logic device;

[0139] The preparation module 510 is further used to read the value of a specified bit in the register in the microcontroller based on the complex programmable logic device and determine the card status of the expansion card according to the value of the specified bit;

[0140] A judgment module 520, configured to judge the device state of the peripheral device based on the complex programmable logic device according to the connection state and the board state and a preset judgment rule, wherein the device state includes a safe state and an abnormal state;

[0141] A safety module 530, configured to trigger the complex programmable logic device to perform a power supply operation in response to detecting that the device state of the peripheral device is a safety state;

[0142] The security module 530 is further configured to trigger the complex programmable logic device to perform an abnormal operation in response to detecting that the device state of the peripheral device is an abnormal state.

[0143] In some implementation scenarios, the system also includes a setting module, which is used to trigger the microcontroller to obtain the peripheral device presence signal in the extension chip. If the peripheral device presence signal is at a low level, the first bit in the register is determined to be 1, otherwise it is 0; the microcontroller obtains the expansion board presence signal in the extension chip. If the expansion board presence signal is at a low level, the second bit in the register is determined to be 1, otherwise it is 0; the microcontroller obtains the current value in the current monitoring chip. If the current value in the current monitoring chip is within a preset range, the third bit in the register is determined to be 1, otherwise it is 0; the microcontroller obtains the device information of the peripheral device connected to the peripheral device slot and determines whether the peripheral device is a preset peripheral device. If the peripheral device is a preset peripheral device, the fourth bit in the register is determined to be 1, otherwise it is 0.

[0144] In some implementation scenarios, the judgment module 520 is also used to judge that the board state of the expansion board is an abnormal board state if there is a value other than 1 in the value of the designated bit; if the values ​​of the designated bits are all 1, then judge that the board state of the expansion board is a normal board state.

[0145] In some implementation scenarios, the judgment module 520 is also used to: if the connection status is an interrupted state and the board card status is a normal board card status, then judge that the device status of the peripheral device is a first abnormal state; if the connection status is an interrupted state and the board card status is an abnormal board card status, then judge that the device status of the peripheral device is a first abnormal state; if the connection status is a normal state and the board card status is an abnormal board card status, then judge that the device status of the peripheral device is a second abnormal state; if the connection status is a normal state and the board card status is a normal board card status, then judge that the device status of the peripheral device is a normal state.

[0146] In some implementation scenarios, the security module 530 is also used to: in response to detecting that the device state of the peripheral device is a first abnormal state, trigger the complex programmable logic device to perform a power-off operation and notify the baseboard management controller to issue an alarm; in response to detecting that the device state of the peripheral device is a second abnormal state, trigger the complex programmable logic device to perform a power-off operation.

[0147] Embodiment 7

[0148] Corresponding to all embodiments, an embodiment of the present application provides an electronic device, including: one or more processors; and a memory associated with the one or more processors, the memory is used to store program instructions, and when the program instructions are read and executed by the one or more processors, the following operations are performed:

[0149] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0150] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0151] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0152] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0153] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0154] in, Figure 6 The architecture of the electronic device is exemplarily shown, which may include a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, and a memory 620. The processor 610, the video display adapter 611, the disk drive 612, the input / output interface 613, the network interface 614, and the memory 620 may be communicatively connected via a bus 630.

[0155] Among them, the processor 610 can be implemented by a general-purpose CPU (Central Processing Unit), a microcontroller, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solution provided in this application.

[0156] The memory 620 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 620 can store an operating system 621 for controlling the execution of the electronic device 600, and a basic input and output system (BIOS) 622 for controlling the low-level operations of the electronic device 600. In addition, a web browser 623, a data storage management system 624, and an icon font processing system 525, etc. can also be stored. The icon font processing system 625 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided in the present application is implemented by software or firmware, the relevant program code is stored in the memory 620 and is called and executed by the processor 610.

[0157] The input / output interface 613 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.

[0158] The network interface 614 is used to connect to a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).

[0159] The bus 630 comprises a pathway for transmitting information between the various components of the device (eg, the processor 610, the video display adapter 611, the disk drive 612, the input / output interface 613, the network interface 614, and the memory 620).

[0160] In addition, the electronic device 600 can also obtain information on specific collection conditions from the virtual resource object collection condition information database for use in condition judgment, etc.

[0161] It should be noted that, although the device only shows a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, a memory 620, a bus 630, etc., in the specific implementation process, the device may also include other components necessary for normal execution. In addition, it can be understood by those skilled in the art that the device may also only include components necessary for implementing the solution of the present application, and does not necessarily include all the components shown in the figure.

[0162] It can be seen from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on this understanding, the technical solution of the present application can essentially or in other words, the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a disk, an optical disk, etc., including several instructions for a computer device (which can be a personal computer, a cloud service end, or a network device, etc.) to execute the methods of various embodiments of the present application or certain parts of the embodiments.

[0163] Embodiment 8

[0164] Corresponding to all embodiments, the embodiments of the present application further provide a computer-readable storage medium, characterized in that it stores a computer program, and the computer program enables a computer to perform the following operations:

[0165] Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device;

[0166] Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit;

[0167] Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state;

[0168] In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation;

[0169] In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

[0170] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, in which the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0171] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. An expansion card, characterized in that: The expansion board includes a first expansion connector, a microcontroller, a first power connector, a current monitoring chip, a memory chip, an input / output expansion chip, and a peripheral device slot; The microcontroller provides a storage interface, an input / output expansion interface, a peripheral device interface and a current interface; the first expansion connector provides a microcontroller interface; the voltage output end of the power connector is connected to the microcontroller; and the peripheral device slot is connected to a peripheral device; The current monitoring chip is connected to the microcontroller based on the current interface, the input / output expansion chip is connected to the microcontroller based on the input / output expansion interface, the peripheral device slot is connected to the microcontroller based on the peripheral device interface, the storage chip is connected to the microcontroller based on the storage interface, and the microcontroller is connected to the first expansion connector based on the microcontroller interface.

2. The expansion board according to claim 1, characterized in that: The voltage output end of the first power connector is connected to the input end of the linear regulator; The output end of the linear regulator is connected to the microcontroller.

3. A peripheral device safety detection device, characterized in that: The device comprises a mainboard and an expansion card as claimed in claim 1 or 2; The mainboard includes a second expansion connector, a second NCSI connector, a central processing unit, a baseboard management controller, a complex programmable logic device, a second power connector and a power management chip; The second expansion connector is connected to the first expansion connector via a cable, the second expansion connector is connected to the central processing unit via a cable, the second expansion connector is connected to the complex programmable logic device via a cable, and the second expansion connector is connected to the baseboard management controller via a cable; The second NCSI connector is connected to the first NCSI connector on the peripheral device connected to the peripheral device slot in the expansion board through a cable, and the second NCSI connector is connected to the complex programmable logic device through a cable; The input end of the power management chip is connected to an external power source, and the output end of the power management chip is connected to a voltage input end of the second power connector; The voltage input terminal of the first power connector is connected to the voltage output terminal of the second power connector.

4. The device according to claim 3, characterized in that The second expansion connector is connected to the peripheral device slot via a cable; The mainboard transmits a designated signal to the first expansion connector on the expansion board through the second expansion connector; The second expansion connector transmits the designated signal to the peripheral device connected to the peripheral device slot.

5. A peripheral device safety detection method, applied to the peripheral device safety detection device according to claim 3 or 4, characterized in that: When the server is powered on and in a server shutdown state, the method includes: Acquire the connection status between the first NCSI connector and the second NCSI connector based on the complex programmable logic device; Reading the value of a specified bit in a register in a microcontroller based on a complex programmable logic device and judging the card state of the expansion card according to the value of the specified bit; Based on the complex programmable logic device, judging the device state of the peripheral device according to the connection state, the board state and the preset judgment rule, the device state includes a safe state and an abnormal state; In response to detecting that the device state of the peripheral device is a safe state, triggering the complex programmable logic device to perform a power supply operation; In response to detecting that the device state of the peripheral device is an abnormal state, the complex programmable logic device is triggered to perform an abnormal operation.

6. The method according to claim 5, characterized in that The method includes a method for determining the value of a specified bit in a register in the microcontroller: The microcontroller obtains a peripheral device presence signal in the expansion chip, and if the peripheral device presence signal is at a low level, determines that the first bit in the register is 1, otherwise it is 0; The microcontroller obtains the expansion board in-position signal in the expansion chip, and if the expansion board in-position signal is at a low level, determines that the second bit in the register is 1, otherwise it is 0; The microcontroller obtains the current value in the current monitoring chip, and determines that the third bit in the register is 1 if the current value in the current monitoring chip is within a preset range, otherwise it is 0; The microcontroller obtains device information of the peripheral device connected to the peripheral device slot and determines whether the peripheral device is a preset peripheral device. If the peripheral device is a preset peripheral device, the fourth bit in the register is determined to be 1, otherwise it is 0.

7. The method according to claim 6, characterized in that The step of determining the card status of the expansion card according to the value of the designated bit includes: If there is a value other than 1 in the values ​​of the designated bits, it is determined that the board state of the expansion board is an abnormal board state; If the values ​​of the designated bits are all 1, it is determined that the board state of the expansion board is a normal board state.

8. The method according to claim 5, characterized in that The complex programmable logic device determines the device state of the peripheral device according to the connection state and the board state and a preset judgment rule, and the abnormal state includes a first abnormal state and a second abnormal state, including: If the connection state is an interrupted state and the board state is a normal board state, determining that the device state of the peripheral device is a first abnormal state; If the connection state is an interrupted state and the board state is an abnormal board state, determining that the device state of the peripheral device is a first abnormal state; If the connection state is a normal state and the board state is an abnormal board state, determining that the device state of the peripheral device is a second abnormal state; If the connection status is a normal status and the board status is a normal board status, then it is determined that the device status of the peripheral device is a normal status.

9. The method according to claim 8, characterized in that The method of triggering the complex programmable logic device to perform an abnormal operation in response to detecting that the device state of the peripheral device is an abnormal state includes: In response to detecting that the device state of the peripheral device is a first abnormal state, triggering the complex programmable logic device to perform a power-off operation and notifying the baseboard management controller to issue an alarm; In response to detecting that the device state of the peripheral device is a second abnormal state, the complex programmable logic device is triggered to perform a power-off operation.

10. A computer-readable storage medium, characterized in that: The computer stores a computer program, which enables a computer to execute the method according to any one of claims 5 to 9.

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