Processor architecture performance optimization method, related device and storage medium

Abstract

The invention discloses a processor architecture performance optimization method, a related device and a storage medium, and the method comprises the steps: generating an initial architecture configuration parameter set of a target processor architecture, and carrying out the RTL simulation of the configuration parameter set, and obtaining the current training data; performing iterative training on the prediction model by using the current training data; performing iterative optimization on the initialized prediction architecture configuration parameter set by using a heuristic algorithm until a performance prediction result of reasoning the optimized configuration parameter set by the prediction model meets a performance optimization target; performing RTL simulation by using the current initialized prediction architecture configuration parameter set to verify whether a performance optimization target is met; if the performance optimization target is not met, adding the current initialized prediction architecture configuration parameter set into the initialized architecture configuration parameter set, and returning to carry out RTL simulation on the initialized architecture configuration parameter set; and if the performance optimization target is met, determining an output result according to the current initialization prediction architecture configuration parameter set.

Description

Technical Field

[0001] The present application relates to the field of processor development technology, and in particular to a processor architecture performance optimization method and related devices and storage media. Background Art

[0002] A processor architecture will integrate multiple hardware components, and these hardware components usually have configurable parameters, so a processor architecture has multiple parameters that need to be configured. Since the configurable parameters of a hardware component will not only affect its own operation, but also affect the operation of other related hardware components, thus affecting the performance of the entire processor architecture, the configuration of various parameters determines the performance of the processor architecture.

[0003] Currently, the configuration of various parameters of the processor architecture is mainly done by relevant developers setting a parameter set based on their experience, then testing the performance of the parameter set after it is applied to the processor architecture, and adjusting the parameter values ​​in the parameter set accordingly based on the test results until it is determined that the performance of the processor architecture has reached a better result.

[0004] However, with the rapid growth of computing power demand in the field of artificial intelligence, the complexity of AI processor architecture is growing exponentially. Not only the number of hardware components has increased, but also the types of hardware components have increased, the nesting levels have deepened, and the complexity of the relationships between hardware components has increased. This makes it difficult to select the correct optimization direction from various optimization directions to optimize various parameters and obtain better results using existing methods, and the efficiency of the entire process is relatively low. Summary of the invention

[0005] Based on the above-mentioned deficiencies of the prior art, the present application provides a processor architecture performance optimization method and related devices and storage media to solve the problem that the prior art cannot efficiently optimize processor performance.

[0006] In order to achieve the above objectives, this application provides the following technical solutions:

[0007] The first aspect of the present application provides a method for optimizing processor architecture performance, comprising:

[0008] Generate an initialization architecture configuration parameter set for the target processor architecture;

[0009] Perform RTL simulation using the current initialization architecture configuration parameter set to obtain simulation performance results corresponding to the current initialization architecture configuration parameter set;

[0010] Iteratively training the prediction model using the current set of initialization architecture configuration parameters and its corresponding simulation performance results until the prediction model passes model verification;

[0011] Generate an initialization prediction architecture configuration parameter set;

[0012] Based on the performance prediction result obtained by the trained prediction model through performance reasoning on the initialization prediction architecture configuration parameter set, the initialization prediction architecture configuration parameter set is iteratively optimized using a heuristic algorithm until the performance prediction result obtained by the prediction model through performance reasoning on the initialization prediction architecture configuration parameter set meets the performance optimization goal;

[0013] Perform RTL simulation using the current set of initialization prediction architecture configuration parameters to obtain simulation performance results corresponding to the current set of initialization prediction architecture configuration parameters;

[0014] Determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal;

[0015] If it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization goal, then the current initialization prediction architecture configuration parameter set is added to the current initialization architecture configuration parameter set, and the step of performing RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set is returned to be executed;

[0016] If it is determined that the simulation performance result corresponding to the current set of initialization prediction architecture configuration parameters meets the performance optimization goal, the output result of the configuration parameters of the target processor architecture is determined according to the current set of initialization prediction architecture configuration parameters.

[0017] Optionally, in the above processor architecture performance optimization method, generating an initialization architecture configuration parameter set of a target processor architecture includes:

[0018] Determine various key parameters of the target processor architecture and value ranges of various key parameters; wherein the key parameters refer to specified configurable parameters that have an impact on the performance of the target processor architecture;

[0019] Selecting multiple values ​​of each key parameter from the value range of each key parameter;

[0020] The values ​​of each of the key parameters are combined to obtain an initialization architecture configuration parameter set of the target processor architecture.

[0021] Optionally, in the above-mentioned processor architecture performance optimization method, the use of the current initialization architecture configuration parameter set and its corresponding simulation performance results to iteratively train the prediction model until the prediction model passes the model verification further includes:

[0022] The current set of initialization architecture configuration parameters is normalized, and the simulation performance results corresponding to the current set of initialization architecture configuration parameters are logarithmically transformed.

[0023] Optionally, in the above-mentioned processor architecture performance optimization method, the performance prediction result obtained by performing performance reasoning on the initialization prediction architecture configuration parameter set based on the trained prediction model, and iteratively optimizing the initialization prediction architecture configuration parameter set using a heuristic algorithm until the performance prediction result obtained by performing performance reasoning on the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal, including:

[0024] Using the trained prediction model to perform performance reasoning on the current set of configuration parameters of the initialization prediction architecture to obtain a current performance prediction result;

[0025] Determine whether the current prediction result meets the performance optimization goal;

[0026] If it is determined that the current prediction result does not meet the performance optimization goal, based on the deviation between the current prediction result and the performance optimization goal, the current set of configuration parameters of the initialized prediction architecture is optimized using a heuristic algorithm, and the step of performing performance reasoning on the current set of configuration parameters of the initialized prediction architecture using the trained prediction model to obtain the current performance prediction result is returned to execute;

[0027] If it is determined that the current prediction result meets the performance optimization goal, the iterative optimization is terminated and the current initialization prediction architecture configuration parameter set is output.

[0028] Optionally, in the above processor architecture performance optimization method, before optimizing the current set of initialized prediction architecture configuration parameters using a heuristic algorithm based on the deviation between the current prediction result and the performance optimization target, the method further includes:

[0029] Determining whether the number of consecutive optimizations of the initialization prediction architecture configuration parameter set has reached a preset optimization limit number;

[0030] If it is determined that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has not reached the preset optimization limit number, then the method of optimizing the current initialization prediction architecture configuration parameter set based on the deviation between the current prediction result and the performance optimization target by using a heuristic algorithm is executed;

[0031] If it is determined that the number of continuous optimizations of the initialization prediction architecture configuration parameter set reaches a preset optimization limit, the step of ending the iterative optimization and outputting the current initialization prediction architecture configuration parameter set is executed.

[0032] Optionally, in the above-mentioned processor architecture performance optimization method, the determining whether the current prediction result meets the performance optimization goal includes:

[0033] Calculating a current comprehensive performance value based on the current prediction result, and determining whether the current comprehensive performance value satisfies a preset stop iteration strategy; wherein the stop iteration strategy is set based on the performance optimization target;

[0034] If the current comprehensive performance value satisfies the preset stop iteration strategy, it is determined that the current prediction result meets the performance optimization goal;

[0035] If the current comprehensive performance value does not satisfy the preset stop iteration strategy, it is determined that the current prediction result does not meet the performance optimization goal.

[0036] Optionally, in the above-mentioned processor architecture performance optimization method, the output result of determining the configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set includes:

[0037] In the vicinity of the performance space, the vicinity of the initialized predicted architecture configuration parameter set is generalized and valued according to a preset ratio, and the generalized architecture configuration parameter set is used as an output result of the configuration parameters of the target processor architecture.

[0038] A second aspect of the present application provides a processor architecture performance optimization device, comprising:

[0039] A first generating unit, configured to generate an initialization architecture configuration parameter set of a target processor architecture;

[0040] A first simulation unit, used to perform RTL simulation using the current initialization architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization architecture configuration parameter set;

[0041] A model training unit, used to iteratively train the prediction model using the current set of initialization architecture configuration parameters and the corresponding simulation performance results, until the prediction model passes the model verification;

[0042] A second generating unit, used to generate an initialization prediction architecture configuration parameter set;

[0043] an iterative optimization unit, configured to iteratively optimize the initialization prediction architecture configuration parameter set by using a heuristic algorithm based on the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the trained prediction model, until the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal;

[0044] A second simulation unit is used to perform RTL simulation using the current initialization prediction architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization prediction architecture configuration parameter set;

[0045] A verification unit, used to determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal;

[0046] An adding unit, used for adding the current initialization prediction architecture configuration parameter set to the current initialization architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization target, and returning to the first simulation unit to perform the RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set;

[0047] The result determination unit is used to determine the output results of the configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization target.

[0048] Optionally, in the above-mentioned processor architecture performance optimization device, the first generating unit includes:

[0049] A parameter information determination unit, which determines various key parameters of the target processor architecture and value ranges of various key parameters; wherein the key parameters refer to specified configurable parameters that have an impact on the performance of the target processor architecture;

[0050] A selection unit, used to select multiple values ​​of each of the key parameters from the value range of each of the key parameters;

[0051] The combining unit is used to combine the values ​​of each of the key parameters to obtain an initialization architecture configuration parameter set of the target processor architecture.

[0052] Optionally, in the above-mentioned processor architecture performance optimization device, it also includes:

[0053] The preprocessing unit is used to normalize the current initialization architecture configuration parameter set and perform logarithmic transformation on the simulation performance result corresponding to the current initialization architecture configuration parameter set.

[0054] Optionally, in the above-mentioned processor architecture performance optimization device, the iterative optimization unit includes:

[0055] An inference unit, used to perform performance inference on the current set of configuration parameters of the initialization prediction architecture using the trained prediction model to obtain a current performance prediction result;

[0056] An optimization target judgment unit, used to judge whether the current prediction result meets the performance optimization target;

[0057] an optimization unit, configured to optimize the current set of configuration parameters of the initialization prediction architecture using a heuristic algorithm based on a deviation between the current prediction result and the performance optimization target when it is determined that the current prediction result does not meet the performance optimization target, and return to execute the reasoning unit;

[0058] The output unit is used to end the iterative optimization and output the current set of configuration parameters of the initialization prediction architecture when it is determined that the current prediction result meets the performance optimization goal.

[0059] Optionally, in the above-mentioned processor architecture performance optimization device, it also includes:

[0060] A times judgment unit is used to judge whether the number of continuous optimizations of the initialization prediction architecture configuration parameter set has reached a preset optimization limit number; wherein, if it is judged that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has not reached the preset optimization limit number, the optimization unit executes the step of optimizing the current initialization prediction architecture configuration parameter set based on the deviation between the current prediction result and the performance optimization target using a heuristic algorithm; if it is judged that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has reached the preset optimization limit number, the output unit executes the step of ending the iterative optimization and outputting the current initialization prediction architecture configuration parameter set.

[0061] Optionally, in the above-mentioned processor architecture performance optimization device, the optimization target determination unit includes:

[0062] Calculating a current comprehensive performance value based on the current prediction result, and determining whether the current comprehensive performance value satisfies a preset stop iteration strategy; wherein the stop iteration strategy is set based on the performance optimization target;

[0063] If the current comprehensive performance value satisfies the preset stop iteration strategy, it is determined that the current prediction result meets the performance optimization goal;

[0064] If the current comprehensive performance value does not satisfy the preset stop iteration strategy, it is determined that the current prediction result does not meet the performance optimization goal.

[0065] Optionally, in the above-mentioned processor architecture performance optimization device, the result determination unit includes:

[0066] The result determination subunit is used to generalize and take values ​​of the adjacent range of the initialized predicted architecture configuration parameter set according to a preset ratio within the adjacent range of the performance space, and use the generalized architecture configuration parameter set as the output result of the configuration parameters of the target processor architecture.

[0067] A third aspect of the present application provides an electronic device, including:

[0068] Memory and processor;

[0069] Wherein, the memory is used to store programs;

[0070] The processor is used to execute the program, and when the program is executed, it is specifically used to implement the processor architecture performance optimization method as described in any one of the above.

[0071] A fourth aspect of the present application provides a computer storage medium for storing a computer program, which, when executed by a processor, is used to implement a processor architecture performance optimization method as described in any one of the above.

[0072] The present application provides a processor architecture performance optimization method, which first generates an initialization architecture configuration parameter set of a target processor architecture. Then, the current initialization architecture configuration parameter set is used for RTL simulation to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set, and the current initialization architecture configuration parameter set and its corresponding simulation performance result are used to iteratively train the prediction model until the prediction model passes the model verification, thereby obtaining the performance that can be achieved by the configuration parameters. Then, the initialization prediction architecture configuration parameter set is generated, and the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set based on the trained prediction model is used, and the initialization prediction architecture configuration parameter set is iteratively optimized using a heuristic algorithm until the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal, thereby combining the reasoning of the prediction model with the heuristic algorithm to quickly analyze the parameter set that can meet the performance optimization goal using the performance prediction result. Then, the current initialization prediction architecture configuration parameter set is used for RTL simulation to obtain the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set, and it is judged whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal, so as to verify whether the currently analyzed parameter set meets the performance optimization goal. If it is determined that the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set do not meet the performance optimization goal, then the current initialization prediction architecture configuration parameter set is added to the current initialization architecture configuration parameter set, and the step of performing RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance results corresponding to the current initialization architecture configuration parameter set is returned, so that the prediction model can be further optimized and analyzed again. If it is determined that the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set meet the performance optimization goal, the output results of the configuration parameters of the target processor architecture are determined based on the current initialization prediction architecture configuration parameter set, thereby quickly determining the configuration parameters that can enable the target processor architecture to accurately achieve better performance, effectively improving the efficiency and accuracy of parameter optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0074] Figure 1 A flowchart of a processor architecture performance optimization method provided in an embodiment of the present application;

[0075] Figure 2 A flowchart of a method for generating an initialization architecture configuration parameter set provided in an embodiment of the present application;

[0076] Figure 3 A flowchart of a method for optimizing an initialization prediction architecture configuration parameter set provided in an embodiment of the present application;

[0077] Figure 4 A schematic diagram of the architecture of a processor architecture performance optimization device provided in an embodiment of the present application;

[0078] Figure 5 A schematic diagram of the architecture of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0079] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0080] In this application, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0081] The present application embodiment provides a method for optimizing processor architecture performance, such as Figure 1 As shown, the specific steps include:

[0082] S101. Generate an initialization architecture configuration parameter set of a target processor architecture.

[0083] The target processor architecture refers to the processor architecture whose parameters currently need to be optimized so as to optimize its performance.

[0084] It should be noted that in the embodiment of the present application, the performance that can be achieved by the target processor architecture is determined by the architecture configuration parameters through the model, so it is necessary to train the model using training data so that it can accurately predict the performance. Therefore, for each parameter that affects the performance of the target processor architecture, different values ​​can be taken for each parameter, thereby obtaining multiple groups of architecture configuration parameters. The first set of architecture configuration parameters constitutes an initialization architecture configuration parameter set.

[0085] Optionally, in another embodiment of the present application, a specific implementation of step S101 is as follows: Figure 2 As shown, the following steps are included:

[0086] S201. Determine various key parameters of the target processor architecture and value ranges of the various key parameters.

[0087] Among them, the key parameters refer to the specified configurable parameters that have an impact on the performance of the target processor architecture. Optionally, all configurable parameters that affect the performance of the target processor architecture can be determined as key parameters, or only the configurable parameters that have a greater impact on the performance of the target processor architecture can be selected as key configurations.

[0088] Since the configuration of each parameter needs to be within the allowed range, it is necessary to determine the value range of each key parameter to avoid the situation where the value exceeds the range and causes configuration errors.

[0089] S202: Select multiple values ​​of each key parameter from the value range of each key parameter.

[0090] It should be noted that since the value range of key parameters may be relatively large or continuous, and only a sufficient amount of training data is needed during model training to ensure that the model training meets the requirements, considering issues such as processing efficiency and resource usage, it is only necessary to select multiple values ​​of each key parameter to form a configuration parameter combination.

[0091] Optionally, if the values ​​in the value range are limited and relatively few, all of them can be selected. If the values ​​in the value range are large or continuous, the points can be selected evenly, that is, a value in the value range is selected at intervals of a certain size.

[0092] S203 , combining the values ​​of the key parameters to obtain an initialization architecture configuration parameter set of the target processor architecture.

[0093] Specifically, the values ​​of each key parameter are cross-combined to obtain multiple groups of configuration parameters, that is, each group of configuration parameters includes a value of each key parameter, and each group of configuration parameters together constitutes an initialization architecture configuration parameter set.

[0094] S102: Perform RTL simulation using the current initialization architecture configuration parameter set to obtain simulation performance results corresponding to the current initialization architecture configuration parameter set.

[0095] It should be noted that since the initialization architecture configuration parameter set may continue to add data in the future, each time a simulation is performed, the current latest initialization architecture configuration parameter set is used to perform RTL simulation to obtain the simulation performance results corresponding to the current latest initialization architecture configuration parameter set.

[0096] Specifically, by means of RTL simulation, the performance achieved by the target processor architecture when each set of architecture configuration parameters in the current initialization architecture configuration parameter set is applied to the target processor architecture is determined, thereby obtaining the simulation performance result corresponding to the current initialization architecture configuration parameter set.

[0097] As for the parameters that reflect the performance of the target processor architecture, they can be set according to the characteristics of the target processor architecture and specific needs. For example, for the AI ​​processor used in the Prefetch scenario, the three performance parameters of Chip read and write bandwidth extremes, Cluster read and write bandwidth extremes, and total bandwidth can be determined. Then, based on the expectations for the three performance parameters, such as the larger the TotalBw, the better, and the smaller the ChipPtp and ClusterPtp, the better, a comprehensive performance index is calculated. Therefore, the comprehensive performance indicators corresponding to each set of architecture configuration parameters can be determined by simulation, thereby obtaining the simulation performance results corresponding to the current set of initialized architecture configuration parameters.

[0098] Optionally, in order to better utilize the current initialization architecture configuration parameter set and its corresponding simulation performance results to train the model, in another embodiment of the present application, before executing step S103, the acquired data may be further preprocessed. Optionally, in another embodiment of the present application, the method of preprocessing the data includes:

[0099] The current initialization architecture configuration parameter set is normalized, and the simulation performance results corresponding to the current initialization architecture configuration parameter set are logarithmically transformed.

[0100] Since there are usually many configuration parameters, and the encoding methods of each configuration parameter have wide diversity and dimensional differences, in an embodiment of the present application, the data in the current initialization architecture configuration parameter set is normalized, and each configuration parameter is uniformly mapped to a preset interval, for example, to the interval of [-1,1], thereby ensuring the consistency and comparability of the data. The simulation performance results corresponding to the current initialization architecture configuration parameter set are logarithmically transformed, thereby alleviating the adverse effects that extreme values ​​may have on the model training process, and effectively improving the stability and convergence speed of model training. In addition, since the dynamic range of the predicted value is reduced, the accuracy of the model prediction is further enhanced, so that the model can more finely capture the complex relationship between the data and improve the overall prediction ability and accuracy.

[0101] S103, using the current set of initialized architecture configuration parameters and their corresponding simulation performance results, iteratively train the prediction model until the prediction model passes model verification.

[0102] Specifically, the previous initialization architecture configuration parameter set can be used as the input of the prediction model, and the performance of the target processing architecture that belongs to the prediction model can be predicted. Then, based on the deviation of the output performance of the target processing architecture and the simulation performance result corresponding to the current initialization architecture configuration parameter set, that is, based on the error of the output of the prediction model, it is verified whether the prediction accuracy of the prediction model meets the requirements. Optionally, the error of the prediction model can be calculated specifically by an error function. Among them, for example, in regression problems, MSE mean square error, R 2 In the prediction problem, the error function can be set by using key indicators such as accuracy, F1 score, confusion matrix, etc. to ensure that the model performance meets the expected standards.

[0103] If the prediction accuracy of the verification model does not meet the requirements, the prediction model is adjusted based on the error of the output of the prediction model. The adjustment of the prediction model includes but is not limited to model structure adjustment, model parameter adjustment, and optimization algorithm adjustment. After the prediction model is adjusted, the prediction model is trained again until the prediction accuracy of the verification model meets the requirements. Then, the relevant information of the currently verified prediction model, such as model scale, model structure, model configuration parameters, etc., can be locked to obtain a trained prediction model.

[0104] Among them, the prediction model can be selected according to the target processor and requirements, so its specific form includes but is not limited to statistical and machine learning models, such as linear regression, random forest, gradient boosting tree, deep learning network, etc., or physical-based models, such as models that combine domain-specific principles and spatial characteristics, or hybrid models, etc.

[0105] S104: Generate an initialization prediction architecture configuration parameter set.

[0106] It should be noted that after the prediction model is trained, the performance of the configuration parameters can be predicted through the prediction model, so as to find the configuration parameters that meet the performance optimization goals. Therefore, it is necessary to generate an initialization prediction architecture configuration parameter set as the initial input of the prediction model.

[0107] S105. Based on the trained prediction model, the performance prediction result obtained by performance reasoning on the initialization prediction architecture configuration parameter set is used, and the initialization prediction architecture configuration parameter set is iteratively optimized using a heuristic algorithm until the performance prediction result obtained by the prediction model through performance reasoning on the initialization prediction architecture configuration parameter set meets the performance optimization goal.

[0108] Specifically, the initialization prediction architecture configuration parameter set is input into the trained prediction model, and performance reasoning is performed through the prediction model to obtain the current performance prediction result, that is, the size of the performance index achieved by the target processor architecture using the initialization prediction architecture configuration parameter set. Then, it is determined whether the current performance prediction result meets the performance optimization goal. If it is determined that the current performance prediction result does not meet the performance optimization goal, the current initialization prediction architecture configuration parameter set is adjusted and optimized using a heuristic algorithm. Then, it is input into the trained prediction model again for the next iterative optimization, until the performance prediction result obtained by the prediction model performing performance reasoning on the initialization prediction architecture configuration parameter set meets the performance optimization goal.

[0109] Among them, for optimizing the initialization prediction architecture configuration parameter set, corresponding adjustment strategies and algorithms can be used according to specific engineering problems, such as particle swarm optimization algorithm, ant colony algorithm, simulated annealing algorithm, etc.

[0110] Optionally, in another embodiment of the present application, a specific implementation of step S105 is as follows: Figure 3 As shown, the following steps are included:

[0111] S301. Use the trained prediction model to perform performance reasoning on the current initialization prediction architecture configuration parameter set to obtain the current performance prediction result.

[0112] Specifically, the current initialization prediction architecture configuration parameter set is input into the trained prediction model, and the performance prediction result corresponding to the current initialization prediction architecture configuration parameter set is input through the prediction model, that is, the current performance prediction result.

[0113] S302: Determine whether the current prediction result meets the performance optimization goal.

[0114] Among them, the performance optimization target can be set according to the characteristics and requirements of the target processor architecture.

[0115] If it is determined that the current prediction result does not meet the performance optimization target, step S303 is executed. If it is determined that the current prediction result has met the performance optimization target, step S304 is executed.

[0116] Optionally, in another embodiment of the present application, a specific implementation of step S302 includes:

[0117] The current comprehensive performance value is calculated based on the current prediction result, and it is determined whether the current comprehensive performance value meets the preset stop iteration strategy.

[0118] Among them, the stopping iteration strategy is set based on the performance optimization goal.

[0119] Specifically, if the current comprehensive performance value satisfies the preset stop iteration strategy, it is determined that the current prediction result satisfies the performance optimization target. If the current comprehensive performance value does not satisfy the preset stop iteration strategy, it is determined that the current prediction result does not meet the performance optimization target.

[0120] It should be noted that in different scenarios, the strategies for optimizing hardware architecture performance goals will show significant differences, specifically single performance goal or multiple performance goals. When the optimization goal is only a single performance indicator, the strategy design is relatively straightforward and can focus directly on a specific indicator. However, when faced with multiple interrelated or conflicting performance goals, strategy design becomes more complex and requires balancing the weights and priorities of each performance goal.

[0121] In the embodiment of the present application, a calculation comprehensive performance value is defined for each specified performance index item to achieve comprehensive performance measurement. Therefore, the current comprehensive performance value can be calculated based on the current prediction result, for example, each performance index item is weighted. Then, based on the current comprehensive performance value, it is determined whether the preset stop iteration strategy is met. For example, whether the current comprehensive performance value is greater than a threshold, or whether the current sum performance value converges, etc.

[0122] Optionally, in order to avoid unlimited iterative optimization, in another embodiment of the present application, before executing step S303, the following may be further performed:

[0123] Determine whether the number of consecutive optimizations of the initialization prediction architecture configuration parameter set has reached a preset optimization limit.

[0124] If it is determined that the number of continuous optimizations of the initialization prediction architecture configuration parameter set does not reach the preset optimization limit number, step S303 is executed.

[0125] If it is determined that the number of consecutive optimizations of the initialization prediction architecture configuration parameter set reaches the preset optimization limit number, step S304 is executed.

[0126] S303: Based on the deviation between the current prediction result and the performance optimization target, the current initialization prediction architecture configuration parameter set is optimized using a heuristic algorithm.

[0127] After optimizing the current initialization prediction architecture configuration parameter set, it is necessary to return to execute step S301.

[0128] S304, ending the iterative optimization and outputting the current initialization prediction architecture configuration parameter set.

[0129] S106 , performing RTL simulation using the current initialization prediction architecture configuration parameter set to obtain simulation performance results corresponding to the current initialization prediction architecture configuration parameter set.

[0130] It should be noted that the output of the current initialization prediction architecture configuration parameter set is to quickly determine the parameter set that theoretically meets the performance optimization goal by continuously inferring the corresponding performance results through the prediction model. Considering that there may be differences between reality and theory, in order to effectively ensure that the current initialization prediction architecture configuration parameter set actually meets the performance optimization goal. Therefore, it is also necessary to use the current initialization prediction architecture configuration parameter set for RTL simulation to verify it through simulation.

[0131] S107: Determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal.

[0132] If it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization goal, it means that the analysis result does not actually meet the performance optimization goal and needs to be re-analyzed, so step S108 is executed at this time. If it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal, step S109 can be executed.

[0133] S108. Add the current initialization prediction architecture configuration parameter set to the current initialization architecture configuration parameter set.

[0134] Since the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set do not actually meet the performance optimization goal, it means that the prediction accuracy of the prediction model is not enough, so it needs to be trained again, and then the trained prediction model is used again to analyze the configuration parameter set. Since the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set do not meet the performance optimization goal, it means that the performance results of the prediction model reasoning about the current initialization prediction architecture configuration parameter set are not accurate enough, so the current initialization prediction architecture configuration parameter set is added to the current initialization architecture configuration parameter set, and the prediction model is trained, which can improve the accuracy of the prediction model.

[0135] Therefore, after executing step S108, it is necessary to return to step S102 and perform analysis again.

[0136] S109: Determine output results of configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set.

[0137] Since it is verified that the current set of initialization prediction architecture configuration parameters has met the performance optimization goal, the output results of the configuration parameters of the target processor architecture can be determined based on the current set of initialization prediction architecture configuration parameters.

[0138] Optionally, the current initialization prediction architecture configuration parameter set may be directly used as the output of the final configuration parameters of the target processor architecture. Of course, the configuration parameters of the target processor architecture may also be further selected based on the current initialization prediction architecture configuration parameter set.

[0139] Optionally, in another embodiment of the present application, a specific implementation of step S109 includes:

[0140] In the vicinity of the performance space, the vicinity of the initialized predicted architecture configuration parameter set is generalized and valued according to a preset ratio, and the generalized architecture configuration parameter set is used as the output result of the configuration parameters of the target processor architecture.

[0141] Since the initialization prediction architecture configuration parameter set is a configuration parameter set that meets the performance optimization goal, but it is not necessarily the best, its adjacent configuration parameters can also make the target processing architecture meet the optimization goal, and may even have higher performance. Therefore, in order to give users more choices, the adjacent range of the initialization prediction architecture configuration parameter set is generalized and valued at a preset ratio in a certain range. For example, the range is valued at a ratio of 1:10, and then output with the current initialization prediction architecture configuration parameter set as the output result.

[0142] The embodiment of the present application provides a processor architecture performance optimization method, which first generates an initialization architecture configuration parameter set of a target processor architecture. Then, the current initialization architecture configuration parameter set is used for RTL simulation to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set, and the current initialization architecture configuration parameter set and its corresponding simulation performance result are used to iteratively train the prediction model until the prediction model passes the model verification, thereby obtaining the performance that can be achieved by the configuration parameters. Then, the initialization prediction architecture configuration parameter set is generated, and the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set based on the trained prediction model is used, and the initialization prediction architecture configuration parameter set is iteratively optimized using a heuristic algorithm until the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal, thereby combining the reasoning of the prediction model with the heuristic algorithm to quickly analyze the parameter set that can meet the performance optimization goal using the performance prediction result. Then, the current initialization prediction architecture configuration parameter set is used for RTL simulation to obtain the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set, and it is judged whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal, so as to verify whether the currently analyzed parameter set meets the performance optimization goal. If it is determined that the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set do not meet the performance optimization goal, then the current initialization prediction architecture configuration parameter set is added to the current initialization architecture configuration parameter set, and the step of performing RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance results corresponding to the current initialization architecture configuration parameter set is returned, so that the prediction model can be further optimized and analyzed again. If it is determined that the simulation performance results corresponding to the current initialization prediction architecture configuration parameter set meet the performance optimization goal, the output results of the configuration parameters of the target processor architecture are determined based on the current initialization prediction architecture configuration parameter set, thereby quickly determining the configuration parameters that can enable the target processor architecture to accurately achieve better performance, effectively improving the efficiency and accuracy of parameter optimization.

[0143] Another embodiment of the present application provides a processor architecture performance optimization device, such as Figure 4 As shown, including:

[0144] The first generating unit 401 is used to generate an initialization architecture configuration parameter set of a target processor architecture.

[0145] The first simulation unit 402 is used to perform RTL simulation using the current initialization architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization architecture configuration parameter set.

[0146] The model training unit 403 is used to iteratively train the prediction model using the current set of initialization architecture configuration parameters and its corresponding simulation performance results until the prediction model passes the model verification.

[0147] The second generating unit 404 is used to generate an initialization prediction architecture configuration parameter set.

[0148] The iterative optimization unit 405 is used to iteratively optimize the initialized prediction architecture configuration parameter set by using a heuristic algorithm based on the performance prediction result obtained by performance reasoning on the initialized prediction architecture configuration parameter set based on the trained prediction model, until the performance prediction result obtained by the prediction model by performance reasoning on the initialized prediction architecture configuration parameter set meets the performance optimization goal.

[0149] The second simulation unit 406 is used to perform RTL simulation using the current initialization prediction architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization prediction architecture configuration parameter set.

[0150] The verification unit 407 is used to determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal.

[0151] Adding unit 408 is used to add the current initialization prediction architecture configuration parameter set to the current initialization architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization target, and return to the first simulation unit to perform RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set.

[0152] The result determination unit 409 is used to determine the output result of the configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization target.

[0153] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the first generating unit includes:

[0154] The parameter information determination unit determines various key parameters of the target processor architecture and the value range of each key parameter, wherein the key parameter refers to a specified configurable parameter that has an impact on the performance of the target processor architecture.

[0155] The selection unit is used to select multiple values ​​of each key parameter from the value range of each key parameter.

[0156] The combination unit is used to combine the values ​​of various key parameters to obtain an initialization architecture configuration parameter set of the target processor architecture.

[0157] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the device further includes:

[0158] The preprocessing unit is used to normalize the current initialization architecture configuration parameter set and perform logarithmic transformation on the simulation performance results corresponding to the current initialization architecture configuration parameter set.

[0159] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the iterative optimization unit includes:

[0160] The inference unit is used to use the trained prediction model to perform performance inference on the current initialization prediction architecture configuration parameter set to obtain the current performance prediction result.

[0161] The optimization target judgment unit is used to judge whether the current prediction result meets the performance optimization target.

[0162] The optimization unit is used to optimize the current initialization prediction architecture configuration parameter set using a heuristic algorithm based on the deviation between the current prediction result and the performance optimization target when it is determined that the current prediction result does not meet the performance optimization target, and return to the execution reasoning unit.

[0163] The output unit is used to end the iterative optimization and output the current initialization prediction architecture configuration parameter set when it is determined that the current prediction result meets the performance optimization goal.

[0164] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the device further includes:

[0165] The number judgment unit is used to judge whether the number of continuous optimizations of the initialization prediction architecture configuration parameter set has reached the preset optimization limit number. If it is judged that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has not reached the preset optimization limit number, the optimization unit performs optimization of the current initialization prediction architecture configuration parameter set using a heuristic algorithm based on the deviation between the current prediction result and the performance optimization target. If it is judged that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has reached the preset optimization limit number, the output unit performs the step of ending the iterative optimization and outputting the current initialization prediction architecture configuration parameter set.

[0166] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the optimization target determination unit includes:

[0167] The current comprehensive performance value is calculated based on the current prediction result, and it is determined whether the current comprehensive performance value satisfies the preset stop iteration strategy, wherein the stop iteration strategy is set based on the performance optimization goal.

[0168] If the current comprehensive performance value satisfies the preset stop iteration strategy, it is determined that the current prediction result meets the performance optimization goal.

[0169] If the current comprehensive performance value does not meet the preset stop iteration strategy, it is determined that the current prediction result does not meet the performance optimization goal.

[0170] Optionally, in the processor architecture performance optimization device provided in another embodiment of the present application, the result determination unit includes:

[0171] The result determination subunit is used to generalize the value of the adjacent range of the initialized predicted architecture configuration parameter set in the adjacent range of the performance space according to a preset ratio, and use the generalized architecture configuration parameter set as the output result of the configuration parameters of the target processor architecture.

[0172] It should be noted that the specific working process of each unit provided in the above embodiments of the present application can refer to the implementation process of the corresponding steps in the above method embodiments, and will not be repeated here.

[0173] Another embodiment of the present application provides an electronic device, such as Figure 5 As shown, including:

[0174] Memory 501 and processor 502 .

[0175] The memory 501 is used to store programs.

[0176] The processor 502 is used to execute the program stored in the memory 501. When the program is executed, it is specifically used to implement the processor architecture performance optimization method provided in any one of the above embodiments.

[0177] Another embodiment of the present application provides a computer storage medium for storing a computer program. When the computer program is executed by a processor, it is used to implement a processor architecture performance optimization method as provided in any of the above embodiments.

[0178] Computer storage media includes permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include temporary computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0179] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0180] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for optimizing processor architecture performance, characterized in that: include: Generate an initialization architecture configuration parameter set for the target processor architecture; Perform RTL simulation using the current initialization architecture configuration parameter set to obtain simulation performance results corresponding to the current initialization architecture configuration parameter set; Iteratively training the prediction model using the current set of initialization architecture configuration parameters and its corresponding simulation performance results until the prediction model passes model verification; Generate an initialization prediction architecture configuration parameter set; Based on the trained prediction model, the performance prediction result obtained by performance reasoning on the initialization prediction architecture configuration parameter set is used, and the initialization prediction architecture configuration parameter set is iteratively optimized using a heuristic algorithm until the performance prediction result obtained by the prediction model through performance reasoning on the initialization prediction architecture configuration parameter set meets the performance optimization goal; Perform RTL simulation using the current set of initialization prediction architecture configuration parameters to obtain simulation performance results corresponding to the current set of initialization prediction architecture configuration parameters; Determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal; If it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization goal, then the current initialization prediction architecture configuration parameter set is added to the current initialization architecture configuration parameter set, and the step of performing RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set is returned to be executed; If it is determined that the simulation performance result corresponding to the current set of initialization prediction architecture configuration parameters meets the performance optimization goal, the output result of the configuration parameters of the target processor architecture is determined according to the current set of initialization prediction architecture configuration parameters.

2. The method according to claim 1, characterized in that The generating of the initialization architecture configuration parameter set of the target processor architecture comprises: Determine various key parameters of the target processor architecture and value ranges of various key parameters; wherein the key parameters refer to specified configurable parameters that have an impact on the performance of the target processor architecture; Selecting multiple values ​​of each key parameter from the value range of each key parameter; The values ​​of each of the key parameters are combined to obtain an initialization architecture configuration parameter set of the target processor architecture.

3. The method according to claim 1, characterized in that The method of iteratively training the prediction model by using the current set of initialization architecture configuration parameters and the corresponding simulation performance results until the prediction model passes the model verification further includes: The current set of initialization architecture configuration parameters is normalized, and the simulation performance results corresponding to the current set of initialization architecture configuration parameters are logarithmically transformed.

4. The method according to claim 1, characterized in that: The performance prediction result obtained by performing performance reasoning on the initialization prediction architecture configuration parameter set based on the trained prediction model, and iteratively optimizing the initialization prediction architecture configuration parameter set using a heuristic algorithm until the performance prediction result obtained by performing performance reasoning on the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal, including: Using the trained prediction model to perform performance reasoning on the current set of configuration parameters of the initialization prediction architecture to obtain a current performance prediction result; Determine whether the current prediction result meets the performance optimization goal; If it is determined that the current prediction result does not meet the performance optimization goal, based on the deviation between the current prediction result and the performance optimization goal, the current set of configuration parameters of the initialized prediction architecture is optimized using a heuristic algorithm, and the step of performing performance reasoning on the current set of configuration parameters of the initialized prediction architecture using the trained prediction model to obtain the current performance prediction result is returned to execute; If it is determined that the current prediction result meets the performance optimization goal, the iterative optimization is terminated and the current initialization prediction architecture configuration parameter set is output.

5. The method according to claim 4, characterized in that Before optimizing the current set of configuration parameters of the initialization prediction architecture by using a heuristic algorithm based on the deviation between the current prediction result and the performance optimization target, the method further includes: Determining whether the number of consecutive optimizations of the initialization prediction architecture configuration parameter set has reached a preset optimization limit number; If it is determined that the number of continuous optimizations of the initialization prediction architecture configuration parameter set has not reached the preset optimization limit number, then the method of optimizing the current initialization prediction architecture configuration parameter set based on the deviation between the current prediction result and the performance optimization target by using a heuristic algorithm is executed; If it is determined that the number of continuous optimizations of the initialization prediction architecture configuration parameter set reaches a preset optimization limit, the step of ending the iterative optimization and outputting the current initialization prediction architecture configuration parameter set is executed.

6. The method according to claim 4, characterized in that The determining whether the current prediction result meets the performance optimization goal includes: Calculating a current comprehensive performance value based on the current prediction result, and determining whether the current comprehensive performance value satisfies a preset stop iteration strategy; wherein the stop iteration strategy is set based on the performance optimization target; If the current comprehensive performance value satisfies the preset stop iteration strategy, it is determined that the current prediction result meets the performance optimization goal; If the current comprehensive performance value does not satisfy the preset stop iteration strategy, it is determined that the current prediction result does not meet the performance optimization goal.

7. The method according to claim 1, characterized in that The output result of determining the configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set includes: In the vicinity of the performance space, the vicinity of the initialized predicted architecture configuration parameter set is generalized and valued according to a preset ratio, and the generalized architecture configuration parameter set is used as an output result of the configuration parameters of the target processor architecture.

8. A processor architecture performance optimization device, characterized in that: include: A first generating unit, configured to generate an initialization architecture configuration parameter set of a target processor architecture; A first simulation unit, used to perform RTL simulation using the current initialization architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization architecture configuration parameter set; A model training unit, used to iteratively train the prediction model using the current set of initialization architecture configuration parameters and the corresponding simulation performance results, until the prediction model passes the model verification; A second generating unit, used to generate an initialization prediction architecture configuration parameter set; an iterative optimization unit, configured to iteratively optimize the initialization prediction architecture configuration parameter set by using a heuristic algorithm based on the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the trained prediction model, until the performance prediction result obtained by the performance reasoning of the initialization prediction architecture configuration parameter set by the prediction model meets the performance optimization goal; A second simulation unit is used to perform RTL simulation using the current initialization prediction architecture configuration parameter set to obtain a simulation performance result corresponding to the current initialization prediction architecture configuration parameter set; A verification unit, used to determine whether the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization goal; An adding unit, used for adding the current initialization prediction architecture configuration parameter set to the current initialization architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set does not meet the performance optimization target, and returning to the first simulation unit to perform the RTL simulation using the current initialization architecture configuration parameter set to obtain the simulation performance result corresponding to the current initialization architecture configuration parameter set; The result determination unit is used to determine the output results of the configuration parameters of the target processor architecture according to the current initialization prediction architecture configuration parameter set when it is determined that the simulation performance result corresponding to the current initialization prediction architecture configuration parameter set meets the performance optimization target.

9. An electronic device, characterized in that: include: Memory and processor; Wherein, the memory is used to store programs; The processor is used to execute the program, and when the program is executed, it is specifically used to implement the processor architecture performance optimization method as described in any one of claims 1 to 7.

10. A computer storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, is used to implement the processor architecture performance optimization method as described in any one of claims 1 to 7.

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