Display device
By setting hole areas and boundary areas in the display area of the display panel, and setting curved or bent signal lines in the boundary area, the problem of uneven brightness caused by the sensor area is solved, and the image uniformity and overall image of the display panel are improved quality.
Patent Information
- Application Number
- CN202411608157.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2019-09-24
- Filing Date
- 2020-06-16
- Publication Date
- 2025-02-07
AI Technical Summary
Setting the sensor area in the display area of the display panel causes the structure of the signal lines and sub-pixels to be different from other areas, which reduces the quality of the display area and may lead to uneven brightness of the image.
By setting the hole area and the boundary area in the display area of the display panel, the boundary area contacts the outer periphery of the hole area, and a signal line for driving the sub-pixels is provided in the boundary area, so that the signal line can be bent or bent and connected to Subpixels located outside the hole area.
This solution effectively improves the uniformity of the image displayed by the subpixels around the hole area, prevents the reduction of brightness due to an increase in the signal line load, and improves the overall quality of the display panel.
Smart Images

Figure CN119400095A_ABST
Abstract
Description
[0001] This application is a divisional application of the original invention patent application with application number 202010548287.7 (application date: June 16, 2020, invention name: display device). Technical Field
[0002] Embodiments relate to a display device. Background Art
[0003] As the information society develops, the demand for various types of image display devices is increasing. In this regard, a range of display devices such as liquid crystal display (LCD) devices and organic light emitting diode (OLED) display devices have been widely used.
[0004] Such a display device may include a display panel having a plurality of sub-pixels for displaying an image and a plurality of driving circuits for driving the sub-pixels provided on the display panel.
[0005] In addition, the display device may provide a function of detecting an object approaching the display panel, performing input processing based on detection information, or capturing an image of the object approaching the display panel and displaying the captured image on the display panel.
[0006] Therefore, depending on the required functions, the display device may include sensors such as proximity sensors and camera sensors. In addition, such sensors may be arranged in a frame area of the display panel, on which no image is displayed.
[0007] Alternatively, in some cases, a camera sensor or the like may be located in a portion of a display area of a display panel where an image is displayed, in order to prevent an increase in a bezel area of the display panel.
[0008] In this case, since the sensor region in which the sensor is provided exists in the display region in which display operation components such as signal lines and sub-pixels are provided, it may be difficult to provide the display operation components in the display region, which is problematic.
[0009] In addition, due to the presence of the sensor area, the structure of signal lines, sub-pixels, etc. arranged around the sensor area may be different from that in other areas. Therefore, the presence of the sensor in the display area may reduce the quality of the display panel. Summary of the invention
[0010] Embodiments provide an arrangement structure of signal lines including a sensor area provided in a display area of a display panel, the arrangement structure enabling driving of sub-pixels provided around the sensor area.
[0011] The embodiment provides a solution capable of improving the uniformity of an image displayed by sub-pixels located around a sensor area in a display area.
[0012] According to one aspect, an embodiment may provide a display device comprising: a display panel in which a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels are arranged; at least one hole area located in a display area of the display panel; and a boundary area arranged to contact the periphery of the hole area.
[0013] In a display device, the plurality of data lines may include: a plurality of first data lines, through which data voltages are provided to first color sub-pixels among a plurality of sub-pixels, a portion of each of the plurality of first data lines being arranged in the boundary area; and a plurality of second data lines, through which data voltages are provided to second color sub-pixels among the plurality of sub-pixels, a portion of each of the plurality of second data lines being arranged in the boundary area, the plurality of second data lines being arranged on a layer different from a layer on which the plurality of first data lines are arranged.
[0014] The gate line may be disposed on a layer different from a layer on which the data line is disposed. A vertical distance between the second data line and the gate line may be greater than a vertical distance between the first data line and the gate line.
[0015] Here, the first data line may supply a data voltage to the red sub-pixel and the blue sub-pixel, and the second data line may supply a data voltage to the green sub-pixel.
[0016] According to another aspect, an embodiment may provide a display device including: at least one hole area disposed in a display area; a border area disposed in contact with an outer periphery of the at least one hole area; and a plurality of data lines, each of the plurality of data lines having a portion disposed in the border area, at least a portion of the portion being curved. Two adjacent data lines among the plurality of data lines may be disposed on different layers.
[0017] According to an embodiment, a boundary area can be set outside a hole area where a camera sensor, etc. is provided in a display area of a display panel, and a signal line for display operation can be set in the boundary area, thereby providing a signal line arrangement structure through which sub-pixels located around the hole area are driven.
[0018] Additionally, data lines disposed in the boundary region around the hole region may be disposed on different layers according to sub-pixels driven by the data lines, thereby reducing a load increase otherwise caused by an increase in the length of the data lines disposed in the boundary region.
[0019] Therefore, a reduction in brightness that would otherwise be caused by an increase in the load of the data lines through which the sub-pixels located around the hole area are driven can be prevented, thereby improving the uniformity of an image displayed by the sub-pixels around the hole area. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and other objects, features and advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which:
[0021] Figure 1 schematically shows a configuration of a display device according to an embodiment;
[0022] Figure 2 shows a circuit structure of a sub-pixel in a display device according to an embodiment and a driving time of the sub-pixel;
[0023] Figure 3 A structure in which a hole area is provided in a display area of a display device according to an embodiment is shown;
[0024] Figure 4 shows a structure in which a signal line is provided in a boundary area around a hole area provided in a display area of a display device according to an embodiment;
[0025] Figure 5 Another structure in which a signal line is provided in a boundary region around a hole region provided in a display region of a display device according to an embodiment is shown;
[0026] Figure 6 shows an arrangement structure of data lines driving sub-pixels located around a hole area provided in a display area of a display device according to an embodiment;
[0027] Figure 7 Another structure in which a data line is disposed in a boundary region around a hole region disposed in a display region of a display device according to an embodiment is shown;
[0028] Figure 8 shows the data line settings located at Figure 7 The external and internal structures of the boundary region around the hole region are shown;
[0029] Fig. 9 shows a structure in which a data line is disposed in a boundary region between two hole regions; and
[0030] Fig.10 and Fig.11 Shown by Figure 7 An example of improving brightness uniformity in a display area by using the arrangement structure of data lines shown. DETAILED DESCRIPTION
[0031] In the following description of examples or embodiments of the present invention, reference will be made to the accompanying drawings, in which specific examples or embodiments that can be implemented are shown by way of illustration, and wherein the same reference numerals and symbols may be used to represent the same or similar components even when the same reference numerals and symbols are shown in different drawings from each other. In addition, in the following description of examples or embodiments of the present invention, when it is determined that the detailed description of the well-known functions and components incorporated herein may make the subject matter in some embodiments of the present invention unclear, the description will be omitted. Terms such as "including", "having", "containing", "consisting of", "consisting of" and "formed of" used herein are generally intended to allow the addition of other components unless the term is used together with the term "only". As used herein, the singular form is intended to include the plural form unless the context clearly indicates otherwise.
[0032] Terms such as "first", "second", "A", "B", "(A)" or "(B)" may be used herein to describe elements of the present invention. Each of these terms is not used to limit the nature, order, sequence or quantity of the elements, but is only used to distinguish the corresponding elements from other elements.
[0033] When it is mentioned that a first element is "connected or coupled to", "contacted or overlapped", etc. with a second element, it should be interpreted that not only the first element can be "directly connected or coupled to" or "directly contacted or overlapped" with the second element, but also a third element can be "inserted" between the first element and the second element, or the first element and the second element can be "connected or coupled to", "contacted or overlapped" with each other via a fourth element, etc. Here, the second element can be included in at least one of the two or more elements that are "connected or coupled to", "contacted or overlapped", etc. with each other.
[0034] When time-related terms such as "after", "successively after", "after", "before", etc. are used to describe a process or operation of an element or configuration, or a flow or step in an operation, processing, or manufacturing method, these terms may be used to describe non-sequential or non-sequential processes or operations unless the terms "directly" or "immediately" are used together.
[0035] In addition, when any dimension, relative dimension, etc. is mentioned, it should be considered that the numerical value or corresponding information (e.g., level, range, etc.) of the element or feature includes a tolerance or error range that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is specified. In addition, the term "may" fully includes all meanings of the term "can".
[0036] Figure 1The configuration of the display device 100 according to the embodiment is schematically shown.
[0037] Reference Figure 1 The display device 100 according to the embodiment includes a display panel 110 including a plurality of sub-pixels SP, and a gate driver 120 , a data driver 130 , a controller 140 , and the like for driving the display panel 110 .
[0038] The display panel 110 may include a display area A / A serving as an image display area in which a plurality of sub-pixels SP are disposed and a non-display area N / A outside the display area A / A in which signal lines and the like are disposed.
[0039] A plurality of gate lines GL and a plurality of data lines DL are disposed in the display area A / A of the display panel 110. The sub-pixels SP may be disposed in areas where the gate lines GL and the data lines DL cross.
[0040] Each sub-pixel SP may include a light emitting device ED, and two or more sub-pixels SP may constitute a single pixel.
[0041] The gate driver 120 is controlled by the controller 140 , and controls a driving time of a plurality of sub-pixels SP by sequentially outputting scan signals to a plurality of gate lines GL provided in the display panel 110 .
[0042] The gate driver 120 may include one or more gate driver integrated circuits (GDICs), and may be located on one side or both sides of the display panel 110 depending on a driving method.
[0043] The data driver 130 receives image data from the controller 140 and converts the image data into an analog data voltage Vdata. In addition, the data driver 130 outputs the data voltage Vdata to each data line DL at a time point when a scan signal is applied through the gate line GL, so that the subpixel SP exhibits a light emission intensity corresponding to the image data.
[0044] The data driver 130 may include one or more source driver integrated circuits (SDICs).
[0045] The controller 140 provides various control signals to the gate driver 120 and the data driver 130 to control operations of the gate driver 120 and the data driver 130 .
[0046] The controller 140 controls the gate driver 120 to output a scan signal at a time point defined by a frame. The controller 140 receives image data from an external source, converts the image data into a data signal format readable by the data driver 130, and outputs the converted image data to the data driver 130.
[0047] In addition to image data, the controller 140 also receives various timing signals from an external source (eg, a host system). The timing signals may include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input data enable signal DE, a clock signal CLK, and the like.
[0048] The controller 140 may generate various control signals according to various timing signals received from an external source and output the control signals to the gate driver 120 and the data driver 130 .
[0049] For example, the controller 140 outputs various gate control signals GCS (including a gate start pulse GSP, a gate shift clock signal, a gate output enable signal GOE, etc.) to control the gate driver 120 .
[0050] Here, the gate start pulse GSP controls the operation start time of one or more GDICs of the gate driver 120. The gate shift clock GSC is a clock signal generally input to one or more GDICs to control the shift time of the scan signal. The gate output enable signal GOE specifies the timing information of one or more GDICs.
[0051] In addition, the controller 140 outputs various data control signals DCS (including a source start pulse SSP, a source sampling clock SSC, a source output enable signal SOE, etc.) to control the data driver 130 .
[0052] Here, the source start pulse SSP controls a data sampling start time of one or more SDICs of the data driver 130. The source sampling clock SSC is a clock signal that controls a sampling time of data in each SDIC.
[0053] The display device 100 may further include a power management integrated circuit (PMIC) that supplies various forms of voltage or current to the display panel 110 , the gate driver 120 , the data driver 130 , etc., or controls various types of voltage or current to be supplied thereto.
[0054] In addition to the gate lines GL and the data lines DL, voltage lines through which various signals or voltages are supplied may be provided on the display panel 110. A light emitting device ED, a transistor for driving the light emitting device ED, and the like may be provided in each sub-pixel SP.
[0055] Figure 2 A circuit structure of each sub-pixel SP in the display device 100 according to the embodiment and a driving time of the sub-pixel SP are shown.
[0056] Reference Figure 2, the light emitting device ED may be disposed in the sub-pixel SP of the display panel 110. In addition, a driving transistor DRT driving the light emitting device ED by current control may be disposed in the sub-pixel SP.
[0057] The light emitting device ED disposed in the sub-pixel SP may be an organic light emitting diode (OLED), and in some cases, may be a light emitting diode (LED), a micro light emitting diode (μLED), or the like.
[0058] Furthermore, in the sub-pixel SP, one or more transistors may be provided in addition to the driving transistor DRT. A storage capacitor Cstg or the like for maintaining a voltage of a gate node of the driving transistor DRT may also be provided in the sub-pixel SP.
[0059] Figure 2 7T1C structure including 7 transistors including a driving transistor DRT and 1 storage capacitor Cstg is provided in the sub-pixel SP. However, the structure of the sub-pixel SP in the display device 100 according to the embodiment is not limited thereto. Figure 2 It is illustrated that the sub-pixel SP is implemented as a P-type metal oxide semiconductor (PMOS) transistor, but at least one transistor provided in the sub-pixel SP may be implemented as an N-type metal oxide semiconductor (NMOS).
[0060] The light emitting device ED may include an anode electrically connected to the driving transistor DRT and a cathode supplied with a base voltage Vss.
[0061] The driving transistor DRT may be electrically connected to a driving voltage line DVL through which a driving voltage Vdd is applied and the light emitting device ED. In addition, the driving transistor DRT may be electrically connected to a data line DL through which a data voltage Vdata is applied. Furthermore, a gate node of the driving transistor DRT may be electrically connected to a storage capacitor Cstg and an initialization voltage line IVL.
[0062] The first transistor T1 may be controlled by the scan signal SCAN(N) and electrically connect the first node N1 and the second node N2 of the driving transistor DRT. The first transistor T1 may control a voltage obtained by performing a threshold voltage Vth of the driving transistor DRT on the data voltage Vdata to be applied to the gate node of the driving transistor DRT.
[0063] The second transistor T2 may be controlled by the scan signal SCAN(N-1) and electrically connects the first node N1 of the driving transistor DRT and the initialization voltage line IVL. The second transistor T2 may be used to initialize the voltage of the gate node of the driving transistor DRT.
[0064] The third transistor T3 may be controlled by the scan signal SCAN(N) and electrically connects the third node N3 of the driving transistor DRT and the data line DL. In addition, the fourth transistor T4 may be controlled by the scan signal EM and electrically connects the third node N3 of the driving transistor DRT and the driving voltage line DVL.
[0065] The fifth transistor T5 may be controlled by the scan signal EM and electrically connects the second node N2 of the driving transistor DRT and the light emitting device ED. The fifth transistor T5 may control the light emitting time of the light emitting device ED.
[0066] The sixth transistor T6 may be controlled by the scan signal SCAN(N) and electrically connects the anode of the light emitting device ED and the initialization voltage line IVL. The sixth transistor T6 may be used to initialize the voltage of the anode of the light emitting device ED.
[0067] Describing the driving method of the sub-pixel SP, the sub-pixel SP may be driven such that a driving period thereof is divided into an initialization period, a data writing period, and a light emitting period during a single image frame period.
[0068] During initialization, a scan signal SCAN(N-1) having a low level may be provided to the subpixel SP, thereby turning on the second transistor T2. As the second transistor T2 is turned on, an initialization voltage Vin1 may be applied to the gate node of the driving transistor DRT.
[0069] After initialization is completed, during data writing, a scan signal SCAN(N-1) having a high level and a scan signal SCAN(N) having a low level may be provided to the subpixel SP. In addition, the second transistor T2 may be turned off, and the first transistor T1, the third transistor T3, and the sixth transistor T6 may be turned on.
[0070] As the first transistor T1 is turned on, the first node N1 and the second node N2 of the driving transistor DRT are electrically connected.
[0071] In addition, as the third transistor T3 is turned on, the data voltage Vdata can be applied to the first node N1, i.e., the gate node, of the driving transistor DRT through the driving transistor DRT and the first transistor T1. At this time, a voltage obtained by reflecting the threshold voltage Vth of the driving transistor DRT to the data voltage Vdata can be applied to the gate node of the driving transistor DRT, so that compensation for the threshold voltage of the driving transistor DRT can be performed.
[0072] In addition, as the sixth transistor T6 is turned on during the data writing period, the anode of the light emitting device ED can be initialized by the initialization voltage Vini. That is, during the data writing period, the operation of applying a voltage to the gate node of the driving transistor DRT and the operation of initializing the anode of the light emitting device ED can be performed simultaneously.
[0073] During the light emission period, the scan signal SCAN(N-1) having a high level and the scan signal SCAN(N) having a high level may be provided to the subpixel SP, and the scan signal EM having a low level may be provided to the subpixel SP. Therefore, the first transistor T1, the third transistor T3, and the sixth transistor T6 may be turned off, and the fourth transistor T4 and the fifth transistor T5 may be turned on.
[0074] As the fourth transistor T4 is turned on, the driving voltage Vdd can be provided to the third node N3 of the driving transistor DRT, and a voltage difference between the first node N1 and the third node N3 of the driving transistor DRT can be generated by the data voltage Vdata and the driving voltage Vdd, so that a current in response to the data voltage Vdata can flow through the driving transistor DRT.
[0075] As the fifth transistor T5 is turned on, a current in response to the data voltage Vdata may be supplied to the light emitting device ED, and the light emitting device ED may exhibit a light emission intensity corresponding to the data voltage Vdata.
[0076] In addition, the display device 100 according to the embodiment may include an area for a sensor such as a camera sensor in the display area A / A of the display panel 110 where the above-mentioned sub-pixels SP are provided.
[0077] For example, the sub-pixel SP may not be provided in the display area A / A of the display panel 110. In addition, the area where the sub-pixel SP is not provided may be open so that a sensor such as a camera sensor may be provided in the open area. That is, the hole area HA may be provided in the display area A / A, and the sensor may be provided in the hole area HA.
[0078] In this case, in the process of setting the display operation components such as electrodes or signal lines, the display operation configuration may not be set in the corresponding area. That is, the electrodes, signal lines, etc. may be set in the display area A / A so that an image is displayed on the remaining part of the display area A / A except for the part of the display area A / A where the hole area HA is to be set.
[0079] Since the hole area HA is disposed in a portion of the display area A / A and the sensor is disposed in the hole area HA, the width of the entire non-display area N / A of the display panel 110 may be prevented from increasing due to the disposition of the sensor.
[0080] Figure 3 A structure in which the hole area HA is provided in the display area A / A of the display device 100 according to the embodiment is shown.
[0081] Reference Figure 3 , a portion of the display area A / A of the display panel 110 may be a hole area HA in which a camera sensor, etc. is disposed. In addition, a boundary area BA may be disposed around the hole area HA.
[0082] The boundary area BA may be in contact with the outer circumference of the hole area HA and located between the hole area HA and a portion of the display area A / A where the sub-pixel SP is disposed.
[0083] The boundary area BA may include a first boundary area BA1 in which signal lines for driving a camera sensor or the like disposed in the hole area HA are disposed, and a second boundary area BA2 in which signal lines for driving sub-pixels SP disposed around the hole area HA are disposed.
[0084] Here, the hole area HA and the first boundary area BA1 may be open areas so that the camera sensor is disposed therein. That is, in the case where the hole area HA and the first boundary area BA1 are open, the area where the sensor unit of the camera sensor is disposed may be referred to as the hole area HA, and the area where the frame of the camera sensor is disposed may be referred to as the first boundary area BA1.
[0085] The second boundary area BA2 located around the hole area HA may be an area where a signal line for driving the sub-pixel SP in the display area A / A is disposed. Since the hole area HA is located in the display area A / A, the signal line connected to the specific sub-pixel SP located around the hole area HA may not be located in the hole area HA. Therefore, the second boundary area BA2 may be disposed around the hole area HA, and display operation signal lines such as the gate line GL and the data line DL may be disposed in the second boundary area BA2.
[0086] The hole area HA provided in the display area A / A may be a single area or a plurality of areas according to the type, number, etc. of sensors provided in the display area A / A.
[0087] For example, refer to Figure 3In EX 1, a single hole area HA may be provided in the display area A / A of the display panel 110. A first boundary area BA1 and a second boundary area BA2 may be provided around the hole area HA. In addition, a sub-pixel SP or the like may be provided outside the second boundary area BA2. That is, the periphery of the boundary area BA may be spaced apart from the periphery of the display area A / A.
[0088] In another example, referring to Figure 3 As in EX2, two hole areas HA may be provided in the display area A / A of the display panel 110. The first hole area HA1 and the second hole area HA2 may have the same shape and size, or may have different shapes and sizes as in EX2.
[0089] A first boundary area BA1 provided with signal lines for driving sensors disposed in the first hole area HA1 and the like may be located around the first hole area HA1. A second boundary area BA2 provided with signal lines for driving sensors disposed in the second hole area HA2 and the like may be located around the second hole area HA2.
[0090] The second boundary area BA2 may be located outside the first boundary area BA1. In addition, the sub-pixel SP may be disposed in the remaining portion of the display area A / A except the hole area HA and the boundary area BA to display an image.
[0091] Therefore, since no signal lines for driving the sub-pixels SP around the hole area HA may be disposed in the hole area HA, the signal lines may be disposed in the boundary area BA around the hole area HA and connected to the sub-pixels SP outside the boundary area BA.
[0092] Figure 4 A structure in which a signal line according to an embodiment is provided in a boundary area BA around a hole area HA provided in a display area A / A of the display device 100 is shown.
[0093] Reference Figure 4 , the gate lines GL may be disposed in one direction in the display area A / A of the display panel 110 , and the data lines DL may be disposed in a direction crossing the gate lines GL.
[0094] In addition, in the case where the hole area HA is located in the display area A / A, signal lines such as the gate line GL and the data line DL may be disposed to pass through the boundary area BA located around the hole area HA.
[0095] For example, the gate line GL through which the scan signal SCAN is applied may be disposed in the boundary area BA located around the hole area HA. The gate line GL may be disposed in the boundary area BA in a shape bent along the outer peripheral shape of the hole area HA. In addition, a portion of each gate line GL extending outward from the boundary area BA may have a bent shape.
[0096] That is, each gate line GL disposed in the boundary area BA may have a bent shape with a bent portion connected to the sub-pixel SP while maintaining a constant distance from other gate lines GL.
[0097] In addition, the data lines DL through which the data voltage Vdata is applied may be disposed in the boundary area BA located around the hole area HA. The data lines DL disposed in the boundary area BA may also have a bent shape. In addition, a portion of each data line DL extending outward from the boundary area BA may have a bent shape.
[0098] The gate lines GL and the data lines DL as described above may be disposed on different layers in the display panel 110 .
[0099] For example, refer to Figure 4 1-1', a buffer layer BUF and the like may be disposed on a substrate SUB, and a gate line GL may be disposed on the buffer layer BUF. An insulating layer ILD may be disposed on the gate line GL, and a data line DL may be disposed on the insulating layer ILD. In addition, a passivation layer PAS may be disposed on the data line DL.
[0100] Since the gate line GL and the data line DL are disposed on different layers and bent in the boundary area BA, the gate line GL and the data line may be connected to the sub-pixel SP located outside the hole area HA.
[0101] Since the gate line GL and the data line DL are disposed along the periphery of the hole area HA in the boundary area BA, the gate line GL and the data line DL may be longer than other signal lines disposed outside the boundary area BA. In addition, the increase in the length of the signal line may increase the load of the signal line. In particular, the increase in the load of the data line DL providing the data voltage Vdata may result in a decrease in the brightness of the sub-pixel SP.
[0102] The embodiment provides a solution capable of preventing the quality of an image displayed around the hole area HA from being deteriorated while including the hole area HA in which a sensor or the like can be disposed in the display area A / A.
[0103] Figure 5Another structure in which a signal line according to an embodiment is provided in a boundary area BA located around a hole area HA provided in a display area A / A of the display device 100 is shown.
[0104] Reference Figure 5 The hole area HA in which the sensor and the like are disposed may be located in the display area A / A of the display panel 110. The boundary area BA may be located around the hole area HA while being in contact with the outer periphery of the hole area HA.
[0105] The gate lines GL, the data lines DL, etc. for driving the sub-pixels SP located around the hole area HA may be disposed in the boundary area BA.
[0106] For example, the gate lines GL through which the scan signal SCAN is applied may be arranged in one direction while each including a bent portion and a bent portion in the boundary area BA. In addition, the data lines DL through which the data voltage Vdata is supplied may be arranged in a direction crossing the gate lines GL while each including a bent portion and a bent portion in the boundary area BA.
[0107] Here, a specific data line DL among the plurality of data lines DL disposed in the boundary area BA may be disposed on a different layer.
[0108] Reference Figure 5 , the insulating layer ILD may be disposed on the gate line GL, and the first data line DL1 may be disposed on the insulating layer ILD. The first passivation layer PAS1 may be disposed on the first data line DL1, and the second data line DL2 may be disposed on the first passivation layer PAS1. In addition, the second passivation layer PAS2 may be disposed on the second data line DL2.
[0109] Here, the first data line DL1 and the second data line DL2 may be made of the same material.
[0110] In addition, since the second data line DL2 is located above the first data line DL1 , a vertical distance d2 between the second data line DL2 and the gate line GL may be greater than a vertical distance d1 between the first data line DL1 and the gate line GL.
[0111] As the distance between the second data line DL2 and the gate line GL located below the second data line DL2 increases, parasitic capacitance that may be generated between the second data line DL2 and the gate line GL may be reduced, and a load of the second data line DL2 may be reduced.
[0112] That is, the embodiment can increase the distance between a specific data line DL among the multiple data lines DL arranged in the boundary area BA located around the hole area HA and a signal line (such as a gate line GL) arranged on a layer different from the layer where the data line DL is located, thereby preventing an increase in load caused by an increase in the length of the data line DL.
[0113] Therefore, it is possible to prevent the luminance of the sub-pixel SP disposed in the region adjacent to the hole region HA from being deteriorated due to an increase in the load of the data line DL through which the data voltage Vdata is supplied to the sub-pixel SP.
[0114] Furthermore, a load of a specific data line DL driving a sub-pixel SP having a significant influence on brightness among the plurality of data lines DL may be reduced, thereby increasing the effect of improving brightness around the hole area HA.
[0115] Figure 6 An arrangement structure of data lines DL driving sub-pixels SP located around a hole area HA provided in a display area A / A of the display device 100 according to an embodiment is shown.
[0116] Reference Figure 6 , the red sub-pixel RSP, the green sub-pixel GSP, and the blue sub-pixel BSP may be arranged in the display area A / A of the display panel 110. Here, the red sub-pixel RSP and the blue sub-pixel BSP may be arranged to alternate with each other so as to be driven by the first data line DL1. In addition, the green sub-pixel GSP may be arranged on the same column so as to be driven by the second data line DL2.
[0117] The peak wavelength of light emitted by the green subpixel GSP may be smaller than the peak wavelength of light emitted by the red subpixel RSP and greater than the peak wavelength of light emitted by the blue subpixel BSP. In addition, brightness may be changed by the intensity of light emitted by the green subpixel GSP.
[0118] Therefore, the second data line DL2 driving the green subpixel GSP may be disposed on a layer above the first data line DL1 driving the red and blue subpixels RSP and BSP to reduce a load of the second data line DL2 and increase brightness of an area driven by the corresponding data line DL.
[0119] As described above, in a structure in which signal lines driving subpixels SP located around the hole area HA may be disposed in the boundary area BA and connected to the subpixels SP, a layer in which a specific signal line is disposed may be adjusted, thereby preventing image quality from being degraded due to an increase in load.
[0120] In addition, the above-described arrangement structure of the data lines DL may be applied to a case where a plurality of hole areas HA are provided in the display area A / A of the display panel 110 .
[0121] Figure 7 Another structure in which the data line DL according to the embodiment is disposed in the boundary area BA around the hole area HA disposed in the display area A / A of the display device 100 is shown.
[0122] Reference Figure 7 , the first hole area HA1 and the second hole area HA2 may be provided in the display area A / A.
[0123] The boundary area BA may be disposed around the first hole area HA1 and the second hole area HA2 to contact the outer periphery of the first hole area HA1 and the outer periphery of the second hole area HA2. In the boundary area BA, gate lines GL connected to the sub-pixels SP located on one side (e.g., left side) and the other side (e.g., right side) of the hole area HA may be disposed.
[0124] In addition, in the boundary area BA, data lines DL connected to the sub-pixels SP located at one side (eg, above) and the other side (eg, below) of the hole area HA may be disposed.
[0125] A portion of each data line DL disposed in the boundary area BA may include a portion having a bent shape. In addition, a portion of each data line DL extending outward from the boundary area BA may include a portion having a meander shape.
[0126] Here, the first data lines DL1 driving the red sub-pixels RSP and the blue sub-pixels BSP and the second data lines DL2 driving the green sub-pixels GSP may be disposed alternately with each other. In addition, the second data lines DL2 may be disposed on a layer above the first data lines DL1.
[0127] This therefore increases the distance of the second data line DL2 to the signal line disposed on the layer below the data line DL. In addition, the increase in the distance of the second data line DL2 to the signal line disposed on the layer below the data line DL can reduce the load of the second data line DL2.
[0128] Therefore, it is possible to prevent a load from increasing by increasing the length of the second data line DL2 disposed in the boundary area BA, thereby preventing a brightness of the sub-pixel SP driven by the second data line DL2 from decreasing.
[0129] In addition, for the purpose of uniform brightness or easy arrangement of signal lines, the first and second data lines DL1 and DL2 may be disposed in a predetermined pattern in a specific area (eg, an area outside the boundary area BA or a portion of the boundary area BA between the hole areas HA1 and HA2).
[0130] Figure 8 The data line DL is shown to be arranged at Figure 7 The external and internal structures of the border area BA around the hole area HA are shown.
[0131] Reference Figure 8 , illustrates an example structure of the data lines DL disposed in the boundary area BA located on the left side of the first hole area HA1 and in a portion of the display area A / A located outside the boundary area BA.
[0132] The data lines DL connected to the sub-pixels SP disposed above the first hole area HA1 and the sub-pixels SP disposed below the first hole area HA1 may be disposed to bypass the first hole area HA1. The length of the bent portion of the data line DL may increase as it is closer to the periphery of the first hole area HA1. In addition, the length of the bent portion of the data line DL may decrease as it is closer to the periphery of the boundary area BA.
[0133] Here, although the distance between the bent portions of the data lines DL may be reduced due to the width of the boundary area BA, the distance between the linear portions of the data lines DL disposed outside the boundary area BA may be constant.
[0134] Therefore, the data lines DL may be disposed in the boundary area BA in a structure that bypasses the hole area HA and is connected to the sub-pixels SP disposed above and below the hole area HA to drive the corresponding sub-pixels SP.
[0135] In addition, since the second data line DL2 driving the green sub-pixel GSP is disposed on the upper layer, the load of the second data line DL2 through which the data voltage Vdata is supplied to the green sub-pixel GSP can be reduced, thereby preventing the brightness of the area driven by the data line DL partially disposed in the boundary area BA from being reduced.
[0136] Furthermore, for ease of arranging signal lines, the data lines DL disposed outside the boundary area BA may be disposed in the same pattern as the data lines DL disposed in the boundary area BA. That is, the first data lines DL1 and the second data lines DL2 located outside the boundary area BA may be disposed on different layers.
[0137] Therefore, the display device 100 according to the embodiment may provide an arrangement structure in which two data lines DL disposed adjacent to each other are disposed on different layers.
[0138] Fig. 9 A structure in which the data line DL is disposed in the boundary area BA between two hole areas HA is shown.
[0139] Reference Fig. 9 , shows an exemplary structure in which the data line DL is disposed in a boundary area BA between the first hole area HA1 and the second hole area HA2.
[0140] In the area between the first hole area HA1 and the second hole area HA2, certain data lines DL may have a shape bent along the outer peripheral shape of the first hole area HA1, and other data lines DL may have a shape bent along the outer peripheral shape of the second hole area HA2. Therefore, the data lines DL bent in opposite directions may be disposed in the boundary area BA between the first hole area HA1 and the second hole area HA2.
[0141] The data lines DL may be disposed in a curved shape in the boundary area BA between the first hole area HA1 and the second hole area HA2 so that the distance between the data lines DL may be reduced in the boundary area BA. In addition, the linear portion of the data line DL extending outward from the boundary area BA may be connected to the sub-pixel SP located outside the boundary area BA while having a constant distance.
[0142] Here, in the boundary area BA between the first hole area HA1 and the second hole area HA2, two adjacent data lines DL may be bent in opposite directions. In addition, since the first data line DL1 and the second data line DL2 are arranged to alternate with each other, the adjacent data lines DL bent in opposite directions may be arranged on different layers.
[0143] As described above, the display device 100 according to the embodiment provides a structure including the hole area HA in the display area A / A, so that the sensor can be disposed in the display area A / A. In addition, a structure is provided in which a signal line for display operation is disposed in the boundary area BA located outside the hole area HA, thereby providing a structure capable of driving a signal line of a sub-pixel SP located around the hole area HA.
[0144] In addition, a layer provided with data lines DL driving sub-pixels SP displaying specific colors may be adjusted to reduce a load of the data lines DL, so that an increase in load caused by the data lines DL provided to bypass the hole area HA may be reduced, and uniformity of brightness appearing around the hole area HA may be improved.
[0145] Fig.10 and Fig.11 Shown by Figure 7 An example of improving the brightness uniformity in the display area A / A by using the arrangement structure of the data lines DL shown.
[0146] Reference Fig.10, an example case where the data driver 130 supplying the data voltage Vdata to the data line DL is located under the display area A / A. Since the data line DL is disposed in the boundary area BA located around the hole area HA, where the load increases with the increase in length, an area with low brightness exhibited by the sub-pixel SP driven by the data line DL may occur.
[0147] That is, when the hole area HA, the boundary area BA, etc. are set at a certain distance from the periphery of the display area A / A, a specific sub-pixel SP can be driven by the data line DL set in the boundary area BA between the hole area HA, etc. and the periphery of the display area A / A.
[0148] In addition, since the data lines DL driving the sub-pixels SP are disposed in the boundary area BA where the load increases, the area of the sub-pixels SP driven by the corresponding data lines DL may have low brightness.
[0149] According to an embodiment, among the data lines DL disposed in the boundary area BA, the second data line DL2 driving the green subpixel GSP may be located on a layer capable of reducing a load of the second data line DL2, thereby preventing luminance reduction from occurring in an area around the hole area HA.
[0150] Furthermore, even when the hole area HA is disposed adjacent to the periphery of the display area A / A, the embodiments may be applied when there are subpixels SP driven by the data lines DL disposed in the boundary area BA between the hole area HA and the periphery of the display area A / A.
[0151] For example, Fig.11 As shown, the border area BA may be located around the hole area HA such that a portion of the border area BA contacts the outer periphery of the display area A / A.
[0152] In this case, when the periphery of the boundary area BA includes a curved portion, the image display subpixel SP may be disposed between the periphery of the boundary area BA and the periphery of the display area A / A. In addition, the data line DL driving the corresponding subpixel SP may be disposed in the boundary area BA while bypassing the hole area HA.
[0153] Here, the second data line DL2 driving the green subpixel GSP may be disposed on a layer different from the layer on which the first data line DL1 driving the red and blue subpixels RSP and BSP are disposed, thereby preventing a reduction in brightness caused by an increase in load of the data line DL in a corresponding region.
[0154] According to the embodiments as described above, a structure in which a sensor may be disposed in the display area A / A may be provided by disposing the hole area HA in a portion of the display area A / A of the display panel 110 .
[0155] In addition, the embodiment may provide an arrangement structure of signal lines capable of driving sub-pixels SP located around the hole area HA by providing the boundary area BA outside the hole area HA and enabling the display operation signal lines disposed in the boundary area BA to have a bent shape.
[0156] In addition, embodiments may provide a structure in which a specific data line DL driving a green subpixel GSP among data lines DL disposed in the boundary area BA to drive subpixels SP outside the boundary area BA is disposed on a layer different from a layer in which other data lines DL are disposed.
[0157] Therefore, a solution capable of preventing the load of the data line DL driving the green subpixel GSP from increasing, thereby preventing the luminance of the subpixel SP driven by the corresponding data line DL from decreasing and reducing luminance unevenness occurring around the hole area HA may be provided.
[0158] The above description has been given to enable any technician in the field to implement and use the technical ideas of the present invention, and the above description has been provided in the context of specific applications and their requirements. Various modifications, additions and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the present invention. The above description and the accompanying drawings provide examples of the technical ideas of the present invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of the present invention. Therefore, the scope of the present invention is not limited to the embodiments shown, but conforms to the widest scope consistent with the claims. The scope of protection of the present invention should be interpreted based on the attached claims, and all technical ideas within their equivalent ranges should be interpreted as included within the scope of the present invention.
[0159] CROSS-REFERENCE TO RELATED APPLICATIONS
[0160] This application claims priority to Korean Patent Application No. 10-2019-0117722, filed on September 24, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein.
Claims
1. A display device, comprising: A display panel having a display area, wherein a plurality of sub-pixels are arranged above a substrate; at least one hole area, the at least one hole area being surrounded by the display area; a boundary region, the boundary region being disposed between the at least one hole region and the display region; a first data line disposed on the display area and the boundary area and providing a data voltage to a first group of the plurality of sub-pixels; as well as a second data line disposed on the display area and the boundary area and providing the data voltage to a second group of the plurality of sub-pixels, Wherein, a vertical distance between the second data line and the substrate is different from a vertical distance between the first data line and the substrate.
2. The display device according to claim 1, wherein: Each of the plurality of sub-pixels comprises: a driving transistor for driving the light emitting device and comprising a gate electrode, a first electrode, and a second electrode; a first transistor connected between the gate electrode and the second electrode of the driving transistor; a second transistor connected between the gate electrode of the driving transistor and an initialization voltage line; a third transistor connected between the first electrode of the driving transistor and one of the first data line and the second data line; a fourth transistor connected between a power supply voltage line and the first electrode of the driving transistor; a fifth transistor connected between the second electrode of the driving transistor and an anode of the light emitting device; and A sixth transistor is connected between the initialization voltage line and the anode.
3. The display device according to claim 2, further comprising: a first gate line disposed on the display area and extending to the boundary area, and providing a first EM signal to a third group of the plurality of sub-pixels; as well as A second gate line is disposed on the display area and extends to the boundary area, and provides a second EM signal to the third group of the plurality of sub-pixels.
4. The display device according to claim 3, wherein: The fifth transistor is turned on in response to the first EM signal or the second EM signal from the first gate line or the second gate line.
5. The display device according to claim 1, wherein: The first group of the plurality of sub-pixels includes at least one first color sub-pixel and at least one second color sub-pixel, and The second group of the plurality of sub-pixels includes at least one third color sub-pixel that is different from the first color sub-pixel and the second color sub-pixel.
6. The display device according to claim 5, wherein: A peak wavelength of light emitted by the third color sub-pixel is smaller than a peak wavelength of light emitted by the first color sub-pixel and larger than a peak wavelength of light emitted by the second color sub-pixel.
7. The display device according to claim 1, wherein: The first data lines and the second data lines are alternately arranged.
8. The display device according to claim 7, wherein: The first group of the plurality of sub-pixels and the second group of the plurality of sub-pixels are alternately arranged.
9. A display device, comprising: A display panel, the display panel comprising a substrate, a display area is defined on the substrate, and a plurality of sub-pixels are arranged in the display area; at least one hole area, the at least one hole area being surrounded by the display area; a boundary region, the boundary region being disposed between the at least one hole region and the display region; at least one gate line, the at least one gate line providing a scanning signal or a light emitting signal to a first group of sub-pixels among the plurality of sub-pixels; a first data line, the first data line being disposed on the display area and the boundary area, the first data line being configured to provide a first data voltage to a second group of sub-pixels among the plurality of sub-pixels, the second group of sub-pixels including at least one first color sub-pixel and at least one second color sub-pixel; as well as a second data line, the second data line being disposed on the display area and the boundary area, the second data line being configured to provide a second data voltage to a third group of sub-pixels among the plurality of sub-pixels, the third group of sub-pixels including at least one third color sub-pixel different from the first color sub-pixel and the second color sub-pixel, Wherein, in the boundary area, a vertical distance between the second data line and the substrate is different from a vertical distance between the first data line and the substrate, and Each data line passing through the boundary area is any one of the first data line for providing the first data voltage to the second group of sub-pixels and the second data line for providing the second data voltage to the third group of sub-pixels.
10. The display device according to claim 9, wherein: A peak wavelength of light emitted by the third color sub-pixel is smaller than a peak wavelength of light emitted by the first color sub-pixel and larger than a peak wavelength of light emitted by the second color sub-pixel.
11. The display device according to claim 9, wherein: The first data lines and the second data lines are alternately arranged.
12. The display device according to claim 9, wherein: The second group of the plurality of sub-pixels and the third group of the plurality of sub-pixels are alternately arranged in an extending direction of the at least one gate line.
13. The display device according to claim 12, wherein: The at least one first color sub-pixel and the at least one second color sub-pixel are alternately arranged in an extending direction of the first data line.
14. The display device according to claim 12, wherein: The at least one third color sub-pixel is arranged in a same column in an extending direction of the second data line.
15. The display device according to claim 9, wherein: Each of the plurality of sub-pixels comprises: a driving transistor for driving the light emitting device and comprising a gate electrode, a first electrode, and a second electrode; a first transistor connected between the gate electrode and the second electrode of the driving transistor; a second transistor connected between the gate electrode of the driving transistor and an initialization voltage line; a third transistor connected between the first electrode of the driving transistor and one of the first data line and the second data line; a fourth transistor connected between a power supply voltage line and the first electrode of the driving transistor; a fifth transistor connected between the second electrode of the driving transistor and an anode of the light emitting device; and A sixth transistor is connected between the initialization voltage line and the anode.
16. The display device according to claim 15, wherein: The fifth transistor is turned on in response to the light emission signal from the at least one gate line.
Citation Information
Patent Citations
Wireless charging device, wireless charging method, and charging standby equipment
KR1020190117722A
Cited By
Display device
EP4783800A1