Integrated passive device filter based on TGV technology

Abstract

The invention belongs to the technical field of microwave integrated circuit chip design, and discloses an integrated passive device filter based on a TGV process. The integrated passive device filter comprises a GSG signal port, a three-dimensional inductor and a capacitor. The dielectric substrate is made of a glass material, so that the dielectric loss of the device can be reduced; a three-dimensional inductance structure mode is adopted, so that the Q value of the filter can be improved; a physical symmetric structure is adopted, so that cross mixing coupling of non-adjacent resonant circuits is easy to realize to improve out-of-band rejection performance; the integrated passive device is realized in a TGV process mode, high integration and miniaturization can be realized, the integrated passive device can be integrated in a radio frequency receiving and transmitting module in a chip flip-chip bonding or bonding mode, the packaging area and the wiring length are reduced, and meanwhile, the signal delay and the power consumption are reduced.

Description

Technical Field

[0001] The invention mainly relates to the technical field of microwave integrated circuit chip design, and in particular to an integrated passive device filter based on a TGV process. Background Art

[0002] With the development of thin film technology, lithography technology and laser technology, new impetus has been injected into the integration technology of passive devices. The new generation of electronic assembly and integration technology represented by TGV, TSV and TCV has become a new development direction for device miniaturization and three-dimensional system packaging. The application of new 5G frequency bands and the requirements of many new technologies have made high-performance miniaturized advanced RF packaging a hot topic in research. Integrated passive device (IPD) technology is very conducive to system integration and can solve the problem of large size of passive devices. From the perspective of three-dimensional integration technology, in addition to two-dimensional (XY direction) integration, the components in the package body are further developed in the Z-axis direction to form a three-dimensional high-density microelectronic package, which greatly reduces the package area and wiring length, while reducing the signal delay and power consumption, and achieving higher performance with a smaller volume. In order to meet the design goals of high performance, miniaturization and low cost, integrated passive device technology has been widely used in the design of passive devices.

[0003] In response to the technical requirements of miniaturization of phased array radar systems, filters are being developed in the direction of miniaturization, but there are problems of compromise in filter materials, size, electrical performance, etc. Compared with LTCC filters, integrated passive device processes are easier to miniaturize RF devices, system packaging, and have good processing accuracy consistency; compared with acoustic filters, integrated passive device filters are not limited to the use of frequency bands and bandwidths; compared with high-resistance silicon materials on silicon-based substrates, glass materials have the characteristics of low loss and good stability. Based on the above, an integrated passive device filter based on TGV process is designed. Summary of the invention

[0004] The purpose of the present invention is to provide an integrated passive device filter based on the TGV process. On the basis of the Chebyshev bandpass filter, the filter controls the transmission zero point by adopting circuit topology and physical structure to better achieve low loss and high rectangular coefficient performance, and the overall structure is compact, highly integrated and miniaturized.

[0005] To achieve the above object, the present invention provides an integrated passive device filter based on TGV technology, including three-dimensional inductors and capacitors; The left and right ends of the filter are both provided with signal ports; The signal port at the left end of the filter is respectively connected to one end of the first three-dimensional inductor L1, the lower plate metal layer of the first capacitor C1, and the lower plate metal layer of the second capacitor C2, and the other end of the first three-dimensional inductor L1 is respectively connected to the upper plate metal layer of the second capacitor C2, the upper plate metal layer of the third capacitor C3, and the upper plate metal layer of the seventh capacitor C7 by means of a bridge, and the upper plate metal layer of the first capacitor C1 is grounded; The lower plate metal layer of the third capacitor C3 is respectively connected to one end of the second three-dimensional inductor L2, the lower plate metal layer of the fourth capacitor C4, the lower plate metal layer of the fifth capacitor C5, and the lower plate metal layer of the sixth capacitor C6, the other end of the second three-dimensional inductor L2 is grounded by a bridge, and the upper plate metal layer of the fourth capacitor C4 is grounded; The upper plate metal layer of the fifth capacitor C5 is respectively connected to one end of the third three-dimensional inductor L3, the upper plate metal layer of the eighth capacitor C8, and the upper plate metal layer of the ninth capacitor C9, the other end of the third three-dimensional inductor L3 is grounded by a bridge, and the lower plate metal layer of the eighth capacitor C8 is grounded by a bridge; The signal port at the right end of the filter is respectively connected to one end of the fifth three-dimensional inductor L5, the lower plate metal layer of the fifteenth capacitor C15, and the lower plate metal layer of the fourteenth capacitor C14, and the other end of the fifth three-dimensional inductor L5 is respectively connected to the upper plate metal layer of the fourteenth capacitor C14, the upper plate metal layer of the thirteenth capacitor C13, and the upper plate metal layer of the eleventh capacitor C11 by means of a bridge, and the upper plate metal layer of the fifteenth capacitor C15 is grounded; The lower plate metal layer of the thirteenth capacitor C13 is respectively connected to one end of the fourth three-dimensional inductor L4, the lower plate metal layer of the twelfth capacitor C12, the lower plate metal layer of the ninth capacitor C9, and the lower plate metal layer of the tenth capacitor C10. The other end of the fourth three-dimensional inductor L4 is grounded by a bridge, and the upper plate metal layer of the twelfth capacitor C12 is grounded.

[0006] Furthermore, it also includes a substrate, on which the circuit structure of the three-dimensional inductor and capacitor is etched, and the substrate material is glass.

[0007] Furthermore, the signal port at the left end of the filter is respectively connected to one end of the first three-dimensional inductor L1, the lower plate metal layer of the first capacitor C1, and the lower plate metal layer of the second capacitor C2 by realizing vertical interconnection of the inductors through glass via technology; The signal port at the right end of the filter is respectively connected to one end of the fifth three-dimensional inductor L5, the lower plate metal layer of the fifteenth capacitor C15, and the lower plate metal layer of the fourteenth capacitor C14 by realizing vertical interconnection of the inductors through glass via technology.

[0008] Furthermore, the capacitor is a MIM flat plate capacitor, and the material of the intermediate dielectric layer is silicon nitride.

[0009] Furthermore, the lower plate metal layer of the seventh capacitor C7 is connected in series with the lower plate metal layer of the eleventh capacitor C11 , and the upper plate metal layer of the sixth capacitor C6 is connected in series with the upper plate metal layer of the tenth capacitor C10 .

[0010] Furthermore, the signal ports provided at both the left and right ends of the filter are GSG signal ports.

[0011] Furthermore, the structures of the three-dimensional inductor, capacitor, and GSG signal port in the filter are physically symmetrical about the center of the filter.

[0012] Beneficial effects: The present invention provides an integrated passive device filter based on the TGV process, which adopts glass material as a dielectric substrate to reduce the dielectric loss of the device; adopts a three-dimensional inductor structure to improve the Q value of the filter; adopts a physically symmetrical structure and utilizes a cross-hybrid coupling method to realize a transmission zero point, which not only realizes a single transmission zero point by utilizing an LC parallel circuit in a main transmission link, but also utilizes a symmetrical structure to independently provide a transmission zero point through a single capacitor in a non-adjacent resonant circuit, and can also adjust and balance the coupling between two inductors, and is easy to realize cross-hybrid coupling of non-adjacent resonant circuits to improve out-of-band suppression performance; the integrated passive device is realized by the TGV process, which can achieve high integration and miniaturization, and can be integrated in a radio frequency transceiver module by flip-chip welding or bonding, which reduces the packaging area and wiring length, and reduces the signal delay and power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is the circuit schematic of the integrated passive device filter based on the TGV process; Figure 2 This is a capacitor model diagram of an integrated passive device filter based on TGV technology; Figure 3 This is the inductance model diagram of the integrated passive device filter based on the TGV process; Figure 4 It is a schematic diagram of the three-dimensional structure of the integrated passive device filter based on the TGV process; Figure 5 It is a simulation and measured processing result diagram of the structure involved in the embodiment of the present invention; Figure 6 This is a physical structure diagram of an integrated passive device filter based on TGV technology.

[0015] Description of reference numerals: Among them: 1 is the first capacitor C1; 2 is the second capacitor C2; 3 is the first three-dimensional inductor L1; 4 is the second three-dimensional inductor L2; 5 is the third capacitor C3; 6 is the fourth capacitor C4; 7 is the fifth capacitor C5; 8 is the seventh capacitor C7; 9 is the eighth capacitor C8; 10 is the sixth capacitor C6; 11 is the twelfth capacitor C12; 12 is the tenth capacitor C10; 13 is the ninth capacitor C9; 14 is the third three-dimensional inductor L3; 15 is the eleventh capacitor C11; 16 is the fourteenth capacitor C14; 17 is the fifth three-dimensional inductor L5; 18 is the fifteenth capacitor C15; 19 is the thirteenth capacitor C13; 20 is the fourth three-dimensional inductor L4; 21 is the GSG signal port at the left end of the filter; 22 is the GSG signal port at the right end of the filter. DETAILED DESCRIPTION

[0016] The preferred mechanism and implementation method of the present invention are further described below in conjunction with the accompanying drawings and specific implementation methods.

[0017] With the development of thin film technology, lithography technology and laser technology, new impetus has been injected into the integration technology of passive devices. The new generation of electronic assembly and integration technology represented by TGV, TSV and TCV has become a new development direction for device miniaturization and three-dimensional system packaging. The application of new 5G frequency bands and the requirements of many new technologies have made high-performance miniaturized advanced RF packaging a hot research topic.

[0018] TGV process (Through Glass Via, glass through hole technology) is a process used for integrated circuit packaging, mainly used to connect chips and external circuits. The main process steps of TGV include: 1. Substrate preparation; 2. Hole production; 3. Metal filling; 4. Grinding and polishing; 5. Electroplating; 6. Post-processing. The preparation methods of TGV through holes include sandblasting, mechanical drilling, dry etching, wet etching, focused discharge, etc.

[0019] TSV (Through Silicon Via) is a new three-dimensional integrated circuit technology solution. It is the only vertical electrical interconnection technology and one of the key technologies for realizing 3D advanced packaging. TSV technology realizes vertical electrical interconnection of silicon vias by filling conductive materials such as copper, tungsten, and polysilicon. TSV can maximize the density of chip stacking in the three-dimensional direction, minimize the interconnection lines between chips, and minimize the external dimensions, significantly improve chip speed, and reduce chip power consumption. Therefore, it has become one of the most eye-catching technologies in current electronic packaging technology.

[0020] TCV (Through Ceramic Via) is a new interconnection technology used in high-density three-dimensional packaging. It uses ceramic vias to achieve vertical conduction between circuits and between circuits and additional units, so that the circuit volume is extended in three dimensions to maximize the structural density. This technology has broad application prospects in microwave circuits, optical communications, micro-electromechanical systems and other fields.

[0021] The Q value of a filter, also known as the quality factor, is an important parameter that measures the selectivity of the filter. The higher the Q value, the better the selectivity of the filter, and the more accurately it can separate signals of a specific frequency. In electronic circuits, the concept of Q value is widely used in components such as inductors, capacitors, resonators, and filters and oscillation circuits composed of them. For a bandpass filter, the Q value is defined as the ratio of the center frequency to the bandwidth between the 3dB frequency points on both sides. The larger this ratio is, the higher the frequency resolution of the filter, which means that the filter can more accurately distinguish close frequency components. For example, a filter with a center frequency of 500Hz and a -3dB bandwidth of 10Hz has a Q value of 50.

[0022] A lumped component is a component whose size is much smaller than the wavelength relative to the circuit's operating frequency, and whose impact on the circuit can be ideally equivalent to a point. In the product design process, many passive components are selected for research and development, among which the three most commonly used components are resistors, capacitors, and inductors. Compared with distributed components (such as transmission lines), lumped components (such as resistors, capacitors, and inductors) are analyzed based on points in space, and the interconnection models in signal integrity are described based on lumped components and distributed components.

[0023] A flat plate capacitor is the simplest capacitor consisting of two parallel metal plates that are very close to each other with a layer of insulating material (dielectric) sandwiched between them. The two metal plates are called the plates of a parallel capacitor.

[0024] MIM flat plate capacitors are also called plate capacitors. They have a more precise capacitance value and do not change with bias voltage.

[0025] Three-dimensional inductors are mainly used for multi-layer chip stacking and have achieved high-density integration. The design and manufacturing technology of three-dimensional inductors has made significant progress in recent years, especially the application of through-silicon via (TSV) technology, making three-dimensional spiral inductors a new choice. Three-dimensional inductors can provide higher quality factors and self-resonant frequencies, and are suitable for circuit designs that require high performance; the three-dimensional structure reduces parasitic coupling and improves the stability and efficiency of the circuit; three-dimensional inductors are widely used in low-noise amplifiers, power amplifiers, filters, oscillators, impedance matching networks, and DC-DC converters in analog, RF, and microwave circuits.

[0026] like Figures 1 to 6 As shown, an embodiment of the present invention discloses a technical solution of an integrated passive device filter based on a TGV process. Figure 1 This is the circuit schematic of the integrated passive device filter based on the TGV process; Figure 2 This is a capacitor model diagram of an integrated passive device filter based on TGV technology; Figure 3 This is the inductance model diagram of the integrated passive device filter based on the TGV process; Figure 4 It is a schematic diagram of the three-dimensional structure of the integrated passive device filter based on the TGV process; Figure 5 It is a simulation and measured processing result diagram of the structure involved in the embodiment of the present invention; Figure 6 This is the physical structure diagram of the integrated passive device filter based on the TGV process. Example

[0027] An integrated passive device filter based on TGV process, including a substrate, 5 three-dimensional inductors and 15 capacitors; The capacitor is a MIM flat plate capacitor, and the material of the intermediate dielectric layer is silicon nitride; The left and right ends of the filter are both provided with signal ports; The signal port at the left end of the filter is respectively connected to one end of the first three-dimensional inductor L1, the lower plate metal layer of the first capacitor C1, and the lower plate metal layer of the second capacitor C2 through a glass through-hole, and the other end of the first three-dimensional inductor L1 is respectively connected to the upper plate metal layer of the second capacitor C2, the upper plate metal layer of the third capacitor C3, and the upper plate metal layer of the seventh capacitor C7 through a bridge, and the upper plate metal layer of the first capacitor C1 is grounded; The lower plate metal layer of the third capacitor C3 is respectively connected to one end of the second three-dimensional inductor L2, the lower plate metal layer of the fourth capacitor C4, the lower plate metal layer of the fifth capacitor C5, and the lower plate metal layer of the sixth capacitor C6, the other end of the second three-dimensional inductor L2 is grounded by a bridge, and the upper plate metal layer of the fourth capacitor C4 is grounded; The upper plate metal layer of the fifth capacitor C5 is respectively connected to one end of the third three-dimensional inductor L3, the upper plate metal layer of the eighth capacitor C8, and the upper plate metal layer of the ninth capacitor C9, the other end of the third three-dimensional inductor L3 is grounded by a bridge, and the lower plate metal layer of the eighth capacitor C8 is grounded by a bridge; The signal port at the right end of the filter is respectively connected to one end of the fifth three-dimensional inductor L5, the lower plate metal layer of the fifteenth capacitor C15, and the lower plate metal layer of the fourteenth capacitor C14 through a glass through-hole method, and the other end of the fifth three-dimensional inductor L5 is respectively connected to the upper plate metal layer of the fourteenth capacitor C14, the upper plate metal layer of the thirteenth capacitor C13, and the upper plate metal layer of the eleventh capacitor C11 through a bridge method, and the upper plate metal layer of the fifteenth capacitor C15 is grounded; The lower plate metal layer of the thirteenth capacitor C13 is respectively connected to one end of the fourth three-dimensional inductor L4, the lower plate metal layer of the twelfth capacitor C12, the lower plate metal layer of the ninth capacitor C9, and the lower plate metal layer of the tenth capacitor C10. The other end of the fourth three-dimensional inductor L4 is grounded by a bridge, and the upper plate metal layer of the twelfth capacitor C12 is grounded.

[0028] The circuit structure of three-dimensional inductance and capacitance is etched on the substrate, and the substrate material is glass.

[0029] The lower plate metal layer of the seventh capacitor C7 is connected in series with the lower plate metal layer of the eleventh capacitor C11 , and the upper plate metal layer of the sixth capacitor C6 is connected in series with the upper plate metal layer of the tenth capacitor C10 .

[0030] The structures of the three-dimensional inductor, capacitor, and GSG signal port in the filter are physically symmetrical about the center of the filter. Example

[0031] This embodiment is basically the same as the embodiment 1, except that a method for manufacturing an integrated passive device filter based on the TGV process is provided, including 5 three-dimensional inductors and 15 capacitors, wherein the three-dimensional inductors are wound into a cube shape, and the lumped parameter capacitor elements are all MIM flat plate capacitors. The implementation scheme can be divided into the following steps: Step 1: Use circuit simulation software to extract target values ​​of 3D inductance and capacitance; According to the electrical performance index requirements of the filter, the achievable initial values ​​of capacitance and inductance are obtained through circuit simulation. According to the initial values ​​of the components in the target circuit, the capacitance and three-dimensional inductance models are established in the electromagnetic simulation software to obtain the required target values. According to the capacitance and three-dimensional inductance values ​​extracted by the two-port function, various sub-functions are built in the circuit simulation software for simulation optimization. Due to the influence of parasitic parameters, ensure that each parameter meets the electrical performance indicators, and further determine the physical model size of each capacitor and three-dimensional inductor in the filter. The circuit principle is as follows: Figure 1 shown.

[0032] Step 2: Extract capacitance and three-dimensional inductance using electromagnetic simulation software; According to the initial values ​​of the circuit components, select the appropriate capacitance and inductance models. The capacitance model adopts the MIM flat capacitor form, the upper and lower plate layers are metal materials, and the middle dielectric layer is SIN. The inductance model uses glass through-hole technology to make a three-dimensional inductor, which has the characteristics of high Q value and high integration. The capacitance and inductance models are as follows: Figure 2 , 3 shown.

[0033] Step 3: Build and co-optimize the filter physical model According to the properties of each component in the circuit schematic, a total of five three-dimensional inductors and fifteen capacitors are built. The structure is the same as that of Example 1. Through the coordinated simulation optimization of electromagnetic simulation software and circuit simulation software, the electrical performance indicators such as center frequency, bandwidth, insertion loss, and out-of-band suppression are finally obtained. The overall filter model is as follows Figure 4 shown.

[0034] The sizes of all capacitor and inductor models in this embodiment have been optimized in the electromagnetic simulation software. The specific physical sizes of the capacitor and inductor models are shown below: The metal layer of the first capacitor C1 has a length of 80.5 um and a width of 80.5 um; The metal layer of the second capacitor C2 has a length of 129.5 um and a width of 129.5 um; The metal layer of the third capacitor C3 has a length of 181 um and a width of 181 um; The metal layer of the fourth capacitor C4 has a length of 113 um and a width of 113 um; The metal layer of the fifth capacitor C5 has a length of 117 um and a width of 117 um; The metal layer of the seventh capacitor C7 has a length of 80.5 um and a width of 80.5 um; The metal layer of the eighth capacitor C8 has a length of 123 um and a width of 123 um; The metal layer of the sixth capacitor C6 has a length of 140.5 um and a width of 140.5 um; The metal layer of the twelfth capacitor C12 has a length of 113 um and a width of 113 um; The metal layer of the tenth capacitor C10 has a length of 140.5 um and a width of 140.5 um; The metal layer of the ninth capacitor C9 has a length of 117 um and a width of 117 um; The metal layer of the eleventh capacitor C11 has a length of 80.5um and a width of 80.5um; The metal layer of the fourteenth capacitor C14 has a length of 129.5 um and a width of 129.5 um; The metal layer of the fifteenth capacitor C15 has a length of 80.5 um and a width of 80.5 um; The metal layer of the thirteenth capacitor C13 has a length of 181 um and a width of 181 um; The first three-dimensional inductor L1 has a line width of 100um, a length of 500um, a height of 330um, and 4 turns; The second three-dimensional inductor L2 has a line width of 100um, a length of 610um, a height of 330um, and 4 turns; The third three-dimensional inductor L3 has a line width of 100um, a length of 580um, a height of 330um, and a number of turns of 5.5 turns; The fifth three-dimensional inductor L5 has a line width of 100um, a length of 500um, a height of 330um, and a number of turns of 4; The fourth three-dimensional inductor L4 has a line width of 100 um, a length of 610 um, a height of 330 um, and a number of turns of 4; GSG signal port 21, its pad size is 300um×188um; The pad size of the GSG signal port 22 is 300um×188um.

[0035] Step 4: Filter simulation and measurement results analysis; Figure 5 , 6 They are the comparison chart of electromagnetic simulation software optimization and measured curve, and the physical picture of the tape-out. It can be seen that the frequency, bandwidth, and out-of-band suppression of the filter's simulation optimization are basically consistent with the measured indicators. The working frequency band is 540MHz~920MHz, the center loss is less than 1.0dB, the out-of-band suppression meets more than 30dB, and the size is 3mm×3mm×0.4mm. In summary, the integrated passive device filter based on the TGV process of the present invention is a high-Q value, compact structure, and miniaturized filter. It is easy to integrate into the RF transceiver module and meet the technical requirements of the miniaturization of the phased array radar system.

[0036] The present invention provides an integrated passive device filter based on a TGV process, which adopts a glass material as a dielectric substrate to reduce the dielectric loss of the device; adopts a three-dimensional inductor structure to improve the Q value of the filter; adopts a physically symmetrical structure to easily realize cross-hybrid coupling of non-adjacent resonant circuits to improve out-of-band suppression performance; adopts a TGV process to realize integrated passive devices, which can achieve high integration and miniaturization, and can be integrated in a radio frequency transceiver module through chip flip-chip welding or bonding, thereby reducing the packaging area and wiring length, and simultaneously reducing the signal delay and power consumption.

[0037] Finally, it should be noted that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or make equivalent substitutions for some of the technical features therein. However, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An integrated passive device filter based on TGV technology, characterized in that: Includes three-dimensional inductance and capacitance; The left and right ends of the filter are both provided with signal ports; The signal port at the left end of the filter is respectively connected to one end of the first three-dimensional inductor L1, the lower plate metal layer of the first capacitor C1, and the lower plate metal layer of the second capacitor C2, and the other end of the first three-dimensional inductor L1 is respectively connected to the upper plate metal layer of the second capacitor C2, the upper plate metal layer of the third capacitor C3, and the upper plate metal layer of the seventh capacitor C7 by means of a bridge, and the upper plate metal layer of the first capacitor C1 is grounded; The lower plate metal layer of the third capacitor C3 is respectively connected to one end of the second three-dimensional inductor L2, the lower plate metal layer of the fourth capacitor C4, the lower plate metal layer of the fifth capacitor C5, and the lower plate metal layer of the sixth capacitor C6, the other end of the second three-dimensional inductor L2 is grounded by a bridge, and the upper plate metal layer of the fourth capacitor C4 is grounded; The upper plate metal layer of the fifth capacitor C5 is respectively connected to one end of the third three-dimensional inductor L3, the upper plate metal layer of the eighth capacitor C8, and the upper plate metal layer of the ninth capacitor C9, the other end of the third three-dimensional inductor L3 is grounded by a bridge, and the lower plate metal layer of the eighth capacitor C8 is grounded by a bridge; The signal port at the right end of the filter is respectively connected to one end of the fifth three-dimensional inductor L5, the lower plate metal layer of the fifteenth capacitor C15, and the lower plate metal layer of the fourteenth capacitor C14, and the other end of the fifth three-dimensional inductor L5 is respectively connected to the upper plate metal layer of the fourteenth capacitor C14, the upper plate metal layer of the thirteenth capacitor C13, and the upper plate metal layer of the eleventh capacitor C11 by means of a bridge, and the upper plate metal layer of the fifteenth capacitor C15 is grounded; The lower plate metal layer of the thirteenth capacitor C13 is respectively connected to one end of the fourth three-dimensional inductor L4, the lower plate metal layer of the twelfth capacitor C12, the lower plate metal layer of the ninth capacitor C9, and the lower plate metal layer of the tenth capacitor C10. The other end of the fourth three-dimensional inductor L4 is grounded by a bridge, and the upper plate metal layer of the twelfth capacitor C12 is grounded.

2. The integrated passive device filter based on TGV process according to claim 1, characterized in that: It also includes a base plate, on which the circuit structure of three-dimensional inductance and capacitance is etched, and the base plate is made of glass.

3. The integrated passive device filter based on TGV process according to claim 2, characterized in that: The signal port at the left end of the filter is respectively connected to one end of the first three-dimensional inductor L1, the lower plate metal layer of the first capacitor C1, and the lower plate metal layer of the second capacitor C2 by using glass through-hole technology to realize vertical interconnection of the inductors; The signal port at the right end of the filter is respectively connected to one end of the fifth three-dimensional inductor L5, the lower plate metal layer of the fifteenth capacitor C15, and the lower plate metal layer of the fourteenth capacitor C14 by realizing vertical interconnection of the inductors through glass via technology.

4. The integrated passive device filter based on TGV process according to claim 1, characterized in that: The capacitor is a MIM flat plate capacitor, and the material of the intermediate dielectric layer is silicon nitride.

5. The integrated passive device filter based on TGV process according to claim 1, characterized in that: The lower plate metal layer of the seventh capacitor C7 is connected in series with the lower plate metal layer of the eleventh capacitor C11 , and the upper plate metal layer of the sixth capacitor C6 is connected in series with the upper plate metal layer of the tenth capacitor C10 .

6. The integrated passive device filter based on TGV process according to claim 1, characterized in that: The signal ports provided at both the left and right ends of the filter are GSG signal ports.

7. The integrated passive device filter based on TGV process according to claim 5, characterized in that: The structures of the three-dimensional inductor, capacitor and GSG signal port in the filter are physically symmetrical about the center of the filter.

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