Packaging structure of power semiconductor device and packaging process thereof

Abstract

The invention relates to the technical field of semiconductors, in particular to a packaging structure and a packaging process of a power semiconductor device, the packaging structure comprises an upper bridge FRD chip, an upper bridge IGBT chip, a lower bridge FRD chip, a lower bridge IGBT chip, an upper bridge frame, a lower bridge frame, a DBC board, a bottom board and a plastic packaging frame, and the packaging process comprises the following steps: S1, mounting the chips; s2, bonding is carried out; s3, carrying out stacking; s4, sintering; s5, plastic packaging, electroplating, rib cutting, testing and packaging are carried out. The packaging integration level is high, the half-bridge function can be achieved in a single device, and in other words, packaging of two IGBT chips and two FRD chips is achieved in the single device; the electrical function of the device can be changed; a half-bridge function can be realized by using a single bridge connection component; a single device can realize two independent devices without using a bridge connection part, so that the occupied space of the devices in a circuit board is reduced; and the heat dissipation performance is improved: the heat dissipation fins of the device can face the reverse direction of the PCB by controlling the bending direction of the pins, and the optimal heat dissipation effect is achieved by externally connecting the heat dissipation fins.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a packaging structure of a power semiconductor device and a packaging process thereof. Background Art

[0002] At present, there is basically no insulating device in the industry that can realize a single-tube IGBT half-bridge structure. The main reason is that it is difficult to realize the insulating packaging structure and the connection between the upper and lower bridges in a single device; the existing technology can only realize the parallel packaging of a single IGBT chip and a single FRD chip in a single plastic package device; the existing technology single device cannot realize the half-bridge function; the existing technology single IGBT device cannot realize the function of two single tubes (a single IGBT chip and a single FRD chip packaged in parallel). Summary of the invention

[0003] In order to solve the above technical problems, the present invention mainly designs the product structure and related process, and uses the soft solder automatic chip loading process and the aluminum wire bonding process to achieve precise positioning, low thermal resistance, and low-ohmic contact connection; uses customized materials (DBC) and uses the sintering process to achieve an insulating packaging structure with good thermal conductivity; uses the designed lead frame to use the bonding and sintering processes to achieve low-ohmic contact connection between the upper and lower bridges, thereby satisfying the single device to achieve the half-bridge and insulation functions, and through appropriate process adjustments, the functions of two IGBT single tubes (integrated FRD devices) can also be achieved; this technology is widely applicable to IGBT high-power semiconductor devices;

[0004] The present invention provides a packaging structure of a power semiconductor device and a packaging process thereof. The packaging structure comprises: an upper bridge FRD chip, an upper bridge IGBT chip, a lower bridge FRD chip, a lower bridge IGBT chip, an upper bridge frame, a lower bridge frame, a DBC board, a bottom board and a plastic packaging frame. The upper bridge frame and the lower bridge frame are symmetrically arranged. The upper bridge FRD chip and the upper bridge IGBT chip are arranged side by side on the upper bridge frame. The lower bridge IGBT chip and the lower bridge FRD chip are arranged side by side on the lower bridge frame. The upper bridge frame and the lower bridge frame are respectively fixedly connected to the DBC boards at the bottom. The two DBC boards are arranged side by side and fixedly connected to the bottom board. The plastic packaging frame is coated on a packaging unit formed by the upper bridge FRD chip, the upper bridge IGBT chip, the lower bridge FRD chip, the lower bridge IGBT chip, the upper bridge frame, the lower bridge frame, the DBC board and the bottom board.

[0005] Preferably, the packaging structure further comprises a bridge connection, one end of the bridge connection is connected to the upper bridge FRD chip, and the other end of the bridge connection is connected to the welding area of ​​the lower bridge frame.

[0006] Preferably, during the stacking process, the upper bridge FRD chip surface, the lower bridge frame connection part titration and the bridge connection metal installation process are removed, and only the bridge connection metal is not sintered, so that two IGBT insulation devices exist in a single device.

[0007] Preferably, the steps of the packaging process are:

[0008] S1: Chip loading process: Use high-temperature solder using an automatic chip loading machine to load IGBT and FRD chips according to process requirements, and perform parallel welding in the chip loading area at the upper bridge frame welding position and the lower bridge frame welding position;

[0009] S2: Bonding process: Use an automatic bonding machine to bond according to the process, and bond the upper bridge IGBT chip, the upper bridge FRD chip, the lower bridge IGBT chip, and the lower bridge FRD chip as required, thereby completing the bonding work of the upper bridge device and the lower bridge device;

[0010] S3: Stacking process:

[0011] (1) Use an automatic dispensing machine to drip solder in the vacant position of the FRD chip where the upper bridge device is bonded and in the welding design area of ​​the lower bridge device frame;

[0012] (2) Using an automatic pick-up machine to place the base frame in a limiting fixture, and stacking welding pieces and DBC boards in sequence at the welding position between the upper surface of the base frame and the lower surface of the DBC board, and stacking welding pieces at the welding position on the upper surface of the DBC board;

[0013] (3) Use the limiting function of the limiting fixture to place the upper bridge components and the lower bridge components after solder dripping into the limiting fixture to ensure that the lower surface of the upper bridge frame chip loading area, the lower surface of the lower bridge frame chip loading area and the solder pads placed on the DBC board are accurately positioned;

[0014] (4) Use automatic equipment to accurately place the bridge connection in the solder drop soldering area jumper;

[0015] S4: Sintering process: Use an automatic vacuum sintering furnace to weld or sinter according to process conditions to sinter the components that have completed the stacking process;

[0016] S5: The following parts can be further processed: plastic encapsulation, electroplating, rib cutting, testing, and packaging. The process is consistent with the conventional device manufacturing process.

[0017] The beneficial effects of the present invention are:

[0018] 1. High packaging integration: The half-bridge function can be realized in a single device, that is, the packaging of two IGBT chips and two FRD chips can be realized in a single device;

[0019] 2. The electrical functions of the device can be changed: a single device using a bridge connection component can realize a half-bridge function; a single device without a bridge connection component can realize two independent devices (devices with integrated single IGBT and single FRD chip packaging), reducing the space occupied by the device in the circuit board;

[0020] 3. Improved heat dissipation performance: By controlling the bending direction of the pins, the device's own heat sink can be directed in the opposite direction of the PCB, and the best heat dissipation effect can be achieved through an external heat sink;

[0021] 4. The present invention is widely applicable to IGBT high-power semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present invention.

[0023] Figure 1 The present invention is a schematic diagram of the structure of the slide frame;

[0024] Figure 2 It is a structural schematic diagram of an embodiment of the invention;

[0025] Figure 3 for Figure 2 Internal side view of the plastic frame;

[0026] Figure 4 It is a schematic diagram of the overall structure after packaging of an embodiment of the present invention;

[0027] Figure 5 for Figure 4 Side view of

[0028] In the figure:

[0029] 1-upper bridge frame, 101-upper bridge frame welding position, 102-upper bridge FRD chip, 103-upper bridge I GBT chip, 104-upper bridge bonding wire;

[0030] 2-lower bridge frame, 201-lower bridge frame welding position, 202-lower bridge I GBT chip, 203-lower bridge FRD chip, 204-lower bridge bonding wire;

[0031] 3-Plastic frame,

[0032] 4- Bottom plate,

[0033] 5-DBC board,

[0034] 6-Bridge connection,

[0035] 7-Welding area; DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solution of the present device, the present device is further described in detail below in conjunction with the accompanying drawings.

[0037] A packaging structure of a power semiconductor device and a packaging process thereof, the packaging structure comprising: an upper bridge FRD chip 102, an upper bridge IGBT chip 103, a lower bridge FRD chip 203, a lower bridge IGBT chip 202, an upper bridge frame 1, a lower bridge frame 2, a DBC board 5, a bottom plate 4 and a plastic packaging frame 3, the upper bridge frame 1 and the lower bridge frame 2 are symmetrically arranged to form a wafer carrier frame, the upper bridge FRD chip 102 and the upper bridge IGBT chip 103 are arranged side by side on the upper bridge frame 1, the lower bridge IGBT chip 202 and the lower bridge FRD chip 203 are arranged side by side on the lower bridge frame 2, the upper bridge frame 1 and the lower bridge frame 2 are respectively fixedly connected with DBC boards 5 at the bottom, the two DBC boards 5 are arranged side by side, and the bottom is fixedly connected with the bottom, the bottom plate 4 is a copper frame structure, and the plastic packaging frame 3 is coated on the upper bridge FRD chip 102, the upper bridge IGBT chip 103 and the lower bridge IGBT chip 202. The GBT chip 103 , the lower bridge FRD chip 203 , the lower bridge IGBT chip 202 , the upper bridge frame 1 , the lower bridge frame 2 , the DBC board 5 and the bottom board 4 form a packaging unit.

[0038] In some embodiments, the packaging structure further includes a bridge connection 6 , which is a metal connection between the upper bridge and the lower bridge. One end of the bridge connection 6 is connected to the upper bridge FRD chip 102 , and the other end is connected to the welding area 7 of the lower bridge frame 2 .

[0039] In some embodiments, the steps of the packaging process are:

[0040] S1: Die Bonding process: Using an automatic die bonder and high temperature (260-280°C) solder PbSnAg, IGBT and FRD chips are bonded (Die Bond) according to the process requirements, solder thickness (20-75μm), track temperature (280-360°C), ejector pin height (50-100), and parallel soldering is performed in the chip carrier area at the upper bridge frame welding position 101 and the lower bridge frame welding position 201;

[0041] S2: Bonding process: using an automatic bonding machine according to the process bonding (Wire bond), the upper bridge IGBT chip 103, the upper bridge FRD chip 102, the lower bridge IGBT chip 202, and the lower bridge FRD chip 203 are bonded and connected through the upper bridge bonding wire 104 and the lower bridge bonding wire 204 as required, thereby completing the bonding work of the upper bridge device and the lower bridge device;

[0042] S3: Stacking process:

[0043] (1) Use an automatic dispensing machine to perform solder titration in the vacant position of the FRD chip where the upper bridge device is bonded and in the welding design area of ​​the lower bridge device frame. The titration operation can be performed at room temperature, and the titration amount needs to be controlled;

[0044] (2) Using an automatic pick-up machine, place the base plate 4 frame in a limiting fixture. The limiting fixture is a fixture that can achieve precise positioning and stacking sintering through a limiting design. The welding pieces and DBC board 5 are stacked in sequence at the welding position between the upper surface of the base plate 4 frame and the lower surface of the DBC board 5. The welding pieces are stacked at the welding position on the upper surface of the DBC board 5. The low-temperature welding pieces are placed between the upper surface of the base plate 4 frame and the DBC board 5 and between the DBC board 5 and the lower surface of the wafer carrier frame.

[0045] (3) Using the limiting function of the limiting fixture, the upper bridge components and the lower bridge components after solder dripping are placed in the limiting fixture, and the frame and fixture structure are used to ensure the precise positioning relationship between the lower surface of the wafer loading area of ​​the upper bridge frame 1, the lower surface of the wafer loading area of ​​the lower bridge frame 2, and the solder pads placed on the DBC board 5;

[0046] (4) Use automatic equipment to accurately place the bridge connection 6 on the solder drop welding area 7 jumper (cl ip) to ensure that the bridge connection 6 metal forms a good low-ohmic contact with the FRD chip and the lower bridge frame 2 after sintering;

[0047] S4: Sintering process: Use an automatic vacuum sintering furnace to weld or sinter according to the process conditions, and sinter the components that have completed the stacking process at a sintering temperature of (260-380°C);

[0048] S5: The following parts can be further processed: plastic encapsulation, electroplating, rib cutting, testing, and packaging. The process is consistent with the conventional device manufacturing process.

[0049] In some embodiments, during the stacking process, the surface of the upper bridge FRD chip 102, the titration of the connection part of the lower bridge frame 2 and the bridge connection 6 metal installation process are removed, and only the bridge connection 6 metal (jumper clip) is not sintered, so as to achieve the functional requirement of having two IGBT (integrated FRD) insulation devices in a single device.

[0050] The above embodiments only express several implementation methods of the present invention, and the description is relatively specific, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention; therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A packaging structure of a power semiconductor device and a packaging process thereof, characterized in that: The packaging structure includes: an upper bridge FRD chip, an upper bridge IGBT chip, a lower bridge FRD chip, a lower bridge IGBT chip, an upper bridge frame, a lower bridge frame, a DBC board, a bottom plate and a plastic packaging frame. The upper bridge frame and the lower bridge frame are symmetrically arranged. The upper bridge FRD chip and the upper bridge IGBT chip are arranged side by side on the upper bridge frame, and the lower bridge IGBT chip and the lower bridge FRD chip are arranged side by side on the lower bridge frame. The upper bridge frame and the lower bridge frame are respectively fixedly connected to the DBC boards at the bottom. The two DBC boards are arranged side by side and fixedly connected to the bottom with the bottom. The plastic packaging frame is coated on the packaging unit formed by the upper bridge FRD chip, the upper bridge IGBT chip, the lower bridge FRD chip, the lower bridge IGBT chip, the upper bridge frame, the lower bridge frame, the DBC board and the bottom plate.

2. A packaging structure and packaging process of a power semiconductor device according to claim 1, characterized in that: The packaging structure further includes a bridge connection, one end of which is connected to the upper bridge FRD chip, and the other end of which is connected to the welding area of ​​the lower bridge frame.

3. The packaging structure and packaging process of a power semiconductor device according to claim 1, characterized in that: During the stacking process, the upper bridge FRD chip surface, the lower bridge frame connection part titration and the bridge connection metal installation process are removed, and only the bridge connection metal is not sintered, resulting in two IGBT insulation devices in a single device.

4. The packaging structure and packaging process of a power semiconductor device according to claim 1, characterized in that: The steps of the packaging process are as follows: S1: Chip loading process: Use high-temperature solder using an automatic chip loading machine to load IGBT and FRD chips according to process requirements, and perform parallel welding in the chip loading area at the upper bridge frame welding position and the lower bridge frame welding position; S2: Bonding process: Use an automatic bonding machine to bond according to the process, and bond the upper bridge IGBT chip, the upper bridge FRD chip, the lower bridge IGBT chip, and the lower bridge FRD chip as required, thereby completing the bonding work of the upper bridge device and the lower bridge device; S3: Stacking process: (1) Use an automatic dispensing machine to drip solder in the vacant position of the FRD chip where the upper bridge device is bonded and in the welding design area of ​​the lower bridge device frame; (2) Using an automatic pick-up machine to place the base frame in a limiting fixture, and stacking welding pieces and DBC boards in sequence at the welding position between the upper surface of the base frame and the lower surface of the DBC board, and stacking welding pieces at the welding position on the upper surface of the DBC board; (3) Use the limiting function of the limiting fixture to place the upper bridge components and the lower bridge components after solder dripping into the limiting fixture to ensure that the lower surface of the upper bridge frame chip loading area, the lower surface of the lower bridge frame chip loading area and the solder pads placed on the DBC board are accurately positioned; (4) Use automatic equipment to accurately place the bridge connection in the solder drop soldering area jumper; S4: Sintering process: Use an automatic vacuum sintering furnace to weld or sinter according to process conditions to sinter the components that have completed the stacking process; S5: The following parts can be further processed: plastic encapsulation, electroplating, rib cutting, testing, and packaging. The process is consistent with the conventional device manufacturing process.

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