Display substrate, manufacturing method thereof and display device

Abstract

The invention provides a display substrate, a manufacturing method thereof and a display device, and belongs to the technical field of display, the display substrate comprises a display area and a non-display area, the non-display area is provided with a plurality of gate driving units, a plurality of data driving units and wires, the wires comprise first wires used for connecting the gate driving units and the data driving units, and second wires used for connecting different data driving units; the non-display area comprises a plurality of non-splicing exposure areas and splicing exposure areas located between the non-splicing exposure areas, the wires of the non-splicing exposure areas are formed through one-time exposure, and the wires of the splicing exposure areas are formed through multiple times of exposure. The pattern of the second wire in the splicing exposure area is the same as that of the first wire. The splicing exposure mode is flexible, and splicing exposure of various types of display products can be achieved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, and a display device. Background Art

[0002] Various display devices have become an indispensable part of our daily life. Thin Film Transistor Liquid Crystal Display (TFT-LCD) has been widely used due to its mature production technology, diverse product forms, and strong product reliability. With the rapid development of display technology, consumers are increasingly demanding high-definition and large-size display devices. However, for G8.5, the effective area of ​​a conventional mask is only 1320*1108mm. In order to realize large-size (≥65-inch) TFT-LCD display devices, splicing exposure must be used.

[0003] At present, the mainstream splicing exposure methods include Field Diaphragm Edge (FDE) + Variable Field Stop (VFS). The VFS baffle can be moved within a certain range to control the position of the splicing exposure area. However, since the coverage area of ​​VFS is limited, it cannot meet the splicing exposure requirements of all large-size products. Summary of the invention

[0004] The embodiments of the present invention provide a display substrate and a manufacturing method thereof, and a display device, which are used to solve the problem that the existing splicing exposure method is difficult to meet the splicing exposure requirements of all large-size products.

[0005] In order to solve the above-mentioned technical problems, the present invention is achieved as follows:

[0006] In a first aspect, an embodiment of the present invention provides a display substrate, comprising a display area and a non-display area, wherein the non-display area is provided with a plurality of gate driving units, a plurality of data driving units and wirings, the wirings comprising a first wiring for connecting the gate driving unit and the data driving unit, and a second wiring for connecting different data driving units; the non-display area comprises a plurality of non-splicing exposure areas and a splicing exposure area located between the non-splicing exposure areas, the wirings in the non-splicing exposure areas are formed by a single exposure, and the wirings in the splicing exposure areas are formed by multiple exposures, and the pattern of the second wirings in the splicing exposure area is the same as the pattern of the first wirings.

[0007] Optionally, the second routing line in the non-splicing exposure area is a whole film layer.

[0008] Optionally, the second routing line of the splicing exposure area is connected to the second routing line of the non-splicing exposure area.

[0009] Optionally, the first wiring includes at least one of the following: a clock signal CLK line, a frame start signal STV line, and a power supply VDD line;

[0010] and / or

[0011] The second wiring is a common electrode COM wiring.

[0012] In a second aspect, an embodiment of the present invention provides a display device, comprising the display substrate as described in the first aspect.

[0013] In a third aspect, an embodiment of the present invention provides a method for manufacturing a display substrate, wherein the display substrate includes a display area and a non-display area, wherein the non-display area includes a plurality of non-splicing exposure areas and a splicing exposure area located between the non-splicing exposure areas, and the manufacturing method includes:

[0014] forming a plurality of gate driving units, a plurality of data driving units and wirings in the non-display area, wherein the wirings include first wirings for connecting the gate driving units and the data driving units, and second wirings for connecting different data driving units;

[0015] The routing line in the non-splicing exposure area is formed by one exposure, the routing line in the splicing exposure area is formed by multiple exposures, and the pattern of the second routing line in the splicing exposure area is the same as the pattern of the first routing line.

[0016] Optionally, forming a wiring in the non-display area includes:

[0017] forming a metal film layer;

[0018] forming a photoresist layer on the metal film layer;

[0019] Adopting a splicing exposure machine and a mask to expose the photoresist layer, wherein the photoresist layer is spliced ​​and exposed by moving the mask, the photoresist layer in the non-splicing exposure area is exposed once, and the photoresist layer in the splicing exposure area is exposed multiple times;

[0020] Developing the exposed photoresist layer to form a photoresist layer pattern;

[0021] The metal film layer not covered by the photoresist layer pattern is etched to form the second wiring.

[0022] Optionally, the stitching exposure machine adopts a field aperture edge FDE and a variable area shielding VFS structure, and the stitching exposure area corresponds to the VFS.

[0023] Optionally, the second routing line in the non-splicing exposure area is a whole film layer.

[0024] Optionally, the second routing line of the splicing exposure area is connected to the second routing line of the non-splicing exposure area.

[0025] In an embodiment of the present invention, by setting the pattern of the second wiring used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first wiring used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, thereby improving the flexibility of splicing exposure and being suitable for more display products. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0027] Figure 1 It is a structural schematic diagram of a splicing exposure machine according to an embodiment of the present invention;

[0028] Figure 2 Schematic diagram of the exposure principle of a mask according to an embodiment of the present invention;

[0029] Figure 3 A schematic diagram of a method for splicing exposure of a display substrate according to an embodiment of the present invention;

[0030] Figure 4 A schematic diagram of a circuit design for a non-display area of ​​a display substrate in a related solution;

[0031] Figure 5 A schematic diagram showing a method for manufacturing a substrate in a related scheme;

[0032] Figure 6 is a schematic flow chart of a method for manufacturing a display substrate according to an embodiment of the present invention;

[0033] Figure 7 is a schematic structural diagram of a display substrate according to an embodiment of the present invention;

[0034] Figure 8 is a schematic structural diagram of a display substrate according to another embodiment of the present invention;

[0035] Fig. 9 FIG. 4 is a schematic diagram of a method for manufacturing a display substrate according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] The principle of the splicing exposure machine is first explained below.

[0038] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of a splicing exposure machine according to an embodiment of the present invention. Several concepts related to the splicing exposure machine are introduced below:

[0039] Lens: Also called projection lens. The splicing exposure machine includes multiple lenses, which are arranged in an array. Please refer to Figure 1 The exposure machine includes 11 lenses (M1-M11), which are arranged in 2 rows. Adjacent lenses in the same row are arranged at intervals. In lenses in different rows, the center of one lens and the center of a gap between two adjacent lenses in another row are on a straight line.

[0040] Field Diaphragm Edge (FDE), such as Figure 1 As shown, the light intensity of the energy transition gray zone at the edge of the lens gradually changes from 100% to 0% from the center of the lens to the outside. When the energy transition gray zones of different lenses are superimposed together, the light intensity at all positions is consistent with that at the center of the lens.

[0041] Variable Field Stop (VFS): VFS is set on the blind, and its movable blind area is located within a certain range near the center of M2 and M10 (VFS effective moving range is 80mm); the light intensity in the VFS blind area gradually changes from 0% to 100% from the center of the blind to the outside; the splicing exposure method of VFS+FDE or VFS+VFS can achieve the light intensity of two exposures being superimposed, and the light intensity is consistent with the center of the lens.

[0042] Blind: Figure 1 X Blind and Y Blind in are used to control the exposure area.

[0043] Figure 2 FIG. 1 is a schematic diagram of the exposure principle of the mask according to an embodiment of the present invention, Figure 2 As can be seen from the figure, when the device is exposed, from top to bottom are Mask, Lens, and substrate (plate, such as glass substrate). The exposure light is emitted by the device and then projected onto the substrate through Mask and Lens. Figure 2 It can be seen that the pattern on the substrate is formed after four splicing exposures.

[0044] Please refer to Figure 3 , Figure 3 Schematic diagram of a method for splicing exposure of a display substrate according to an embodiment of the present invention, wherein: Figure 3 On the left is the splicing exposure machine, in the middle is the mask, and on the right is the pattern formed by exposure on the display substrate. Figure 3 As shown, the splicing line of the splicing exposure in the embodiment of the present invention is not a line, that is, it is not a seamless splicing in the geometric sense, but is actually an area ( Figure 3 The area where 1 and 2 are located) is also called a splicing exposure area, or a splicing gray area in the embodiment of the present invention.

[0045] The splicing exposure area in the embodiment of the present invention needs to meet the following conditions:

[0046] 1. The pattern at the bottom of region A is exactly the same as the pattern at the top of region B, that is, the patterns in each region 1 and the patterns in each region 2 are consistent.

[0047] 2. After the corresponding areas at the lower end of area A and the upper end of area B are spliced, the light intensity passing through the spliced ​​exposure area is exactly the same as that of the non-spliced ​​exposure area, thereby achieving uniformity of the effective pattern.

[0048] The design of the mask used for splicing exposure must meet the following requirements:

[0049] 1. Considering the display area (AA), area C must be an integer multiple of the pixel setting area.

[0050] 2. Considering the GOA (Gate On Array, integrating gate drive on the display substrate) area, region C must be an integer multiple of the minimum period of GOA.

[0051] 3. Considering the OLB (Outer Lead Bonding) pad and the fanout pattern on the data DP side, area C must be an integer multiple of COF (Chip On Flex, or, Chip On Film). The DP side can also be described as the Data Pad side, that is, the data line crimping area side.

[0052] like Figure 4 The figure shows a schematic diagram of the circuit design of the non-display area of ​​the display substrate in the related scheme. The COF signal line (i.e., the PLG (Patten line on Glass) routing in the left / right area of ​​the lower non-display area of ​​the display substrate) involves the communication signal between the Data COF unit and the Gate COF / GOA unit, so the Pattern design is relatively complex. The routing between the COFs in the middle area of ​​the lower non-display area of ​​the display substrate only involves the communication signal between the Data COFs (generally the COM signal line), and the Pattern design is relatively simple (the COM signal line is generally a whole piece of metal, which helps to reduce the peripheral COM resistance and ensure the uniformity of the COM voltage in the display area). Therefore, considering that the Pattern design of the left / right area is inconsistent with that of the middle area, the conventional method of splicing exposure requires that the above-mentioned splicing exposure area must be located in the middle area, that is, the Pattern of the lower end of area A and the upper end of area B need to be exactly the same. This type of splicing exposure method has low flexibility and cannot achieve splicing exposure of all products. For example, if the two VFS exposures are located in the left area and the middle area respectively, splicing exposure cannot be performed. In addition, due to the limitation of the splicing exposure area, the number of splicing exposures is relatively large, such as Figure 5 As shown, taking the B10 86-inch product as an example, four exposures are required vertically to form a complete 86-inch display substrate. Figure 5 In the figure, the left side is the mask plate, and the right side is the pattern of the display substrate formed after four exposures.

[0053] To solve the above problems, please refer to Figure 6 , an embodiment of the present invention provides a method for manufacturing a display substrate, wherein the display substrate includes a display area and a non-display area (please refer to Figure 7 The display substrate includes a display area 10 and a non-display area 20), wherein the non-display area includes a plurality of non-stitching exposure areas and a splicing exposure area located between the non-stitching exposure areas, which can be referred to Figure 3 , Figure 3 In the example, the area where area 1 and area 2 are located is a splicing exposure area, and the other areas are non-splicing exposure areas. The manufacturing method includes:

[0054] Step S1: forming a plurality of gate driving units, a plurality of data driving units and routing lines in the non-display area, wherein the routing lines include a first routing line for connecting the gate driving unit and the data driving unit, and a second routing line for connecting different data driving units; wherein the routing lines in the non-splicing exposure area are formed by a single exposure, and the routing lines in the splicing exposure area are formed by multiple exposures, and the pattern of the second routing lines in the splicing exposure area is the same as the pattern of the first routing lines.

[0055] The gate driving unit may be a Gate COF / GOA, and the data driving unit may be a Data COF.

[0056] The first routing can refer to Figure 7 In 31, optionally, the first wiring includes at least one of the following: a clock signal (CLK) line, a frame start signal (STV) line, and a power supply (VDD) line.

[0057] Optionally, the second wiring may be a common electrode (COM) wiring.

[0058] In an embodiment of the present invention, the pattern of the second routing line in the splicing exposure area is the same as the pattern of the first routing line, including: the line width, line spacing, and number of lines of the second routing line in the splicing exposure area are all the same as the line width, line spacing, and number of lines of the first routing line.

[0059] In an embodiment of the present invention, by setting the pattern of the second wiring used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first wiring used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, thereby improving the flexibility of splicing exposure and being suitable for more display products.

[0060] For example, taking the B10 75-inch display product as an example, the specifications of the display substrate are provided to customers, and its splicing exposure area is located at the COF area on the left / right side. Since the wiring pattern of the conventionally designed COF area is inconsistent with the wiring pattern of the middle COF area, the exposure scheme cannot be implemented by using conventional splicing exposure means. In the embodiment of the present invention, since the wiring pattern of the COF area is consistent with the wiring pattern of the middle COF area, the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, and can also be set in the middle COF area, which can increase the compatibility of display products and realize the diversification of splicing products.

[0061] In addition, the splicing exposure area of ​​the conventional splicing exposure method is limited to the middle COF part, the splicing area is small, and more splicing exposure times are required for the same size; the splicing exposure method in the embodiment of the present invention is not limited by COF, the effective pattern can cover the effective exposure area of ​​the Mask, the splicing area is large, and the number of splicing exposure times required for the same size product is small, which improves the factory production capacity. Taking the B10 85-inch display product as an example, it only takes 6 exposures to achieve it, while the conventional splicing exposure method requires 8 exposures, saving 25% of production capacity.

[0062] In the embodiment of the present invention, optionally, forming a wiring in the non-display area includes:

[0063] Step S11: forming a metal film layer;

[0064] Step S12: forming a photoresist layer on the metal film layer;

[0065] Step S13: exposing the photoresist layer using a splicing exposure machine and a mask, wherein the photoresist layer is spliced ​​and exposed by moving the mask, the photoresist layer in the non-splicing exposure area is exposed once, and the photoresist layer in the splicing exposure area is exposed multiple times;

[0066] Step S14: developing the exposed photoresist layer to form a photoresist layer pattern;

[0067] Step S15: etching the metal film layer not covered by the photoresist layer pattern to form the second wiring.

[0068] In the embodiment of the present invention, optionally, the first routing line and the second routing line may also be formed by using the same metal film layer. In the above step S15, the metal film layer not covered by the photoresist layer pattern is etched to form the first routing line and the second routing line.

[0069] In the embodiment of the present invention, optionally, the stitching exposure machine adopts a field stop edge (FDE) and a variable field shading (VFS) structure, and the stitching exposure area corresponds to the VFS.

[0070] In the embodiment of the present invention, optionally, the second wiring of the non-splicing exposure area is a whole film layer, so as to ensure that the resistance of the second wiring is minimized. That is to say, in the embodiment of the present invention, only the second wiring of the splicing exposure area is grooved, and the second wiring of the non-splicing exposure area is not grooved, and the second wiring of the non-splicing exposure area remains a whole film layer.

[0071] In an embodiment of the present invention, optionally, the second routing line of the splicing exposure area is connected to the second routing line of the non-splicing exposure area, so that the second routing lines of the splicing exposure area can be short-circuited in the non-splicing exposure area and connected to the same COM signal. When the second routing line is a COM routing line, the compensation effect of the COM electrode in the display area is effectively increased, the uniformity of the COM voltage in the display area is ensured, and the probability of defective products caused by uneven COM voltage is reduced.

[0072] Please refer to Figure 7 and Figure 8 As shown, the embodiment of the present invention further provides a display substrate, including a display area 10 and a non-display area 20, wherein the non-display area 20 is provided with a plurality of gate driving units (see Figure 8 GOA in), multiple data-driven units (see Figure 8 The COF) and routing in the non-display area 20 include a first routing line 31 for connecting the gate driving unit and the data driving unit, and a second routing line 32 for connecting different data driving units; the non-display area 20 includes a plurality of non-splicing exposure areas 21 and a splicing exposure area 22 located between the non-splicing exposure areas 21, the routing lines of the non-splicing exposure areas 21 are formed by one exposure, the routing lines of the splicing exposure areas 22 are formed by multiple exposures, and the pattern of the second routing lines 32 in the splicing exposure areas 22 is the same as the pattern of the first routing lines 31.

[0073] It should be noted that in the embodiments of the present invention Figure 7 and Figure 8 The splicing direction of the display panels is from left to right or from right to left.

[0074] In an embodiment of the present invention, by setting the pattern of the second wiring used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first wiring used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, thereby improving the flexibility of splicing exposure and being suitable for more display products.

[0075] In the embodiment of the present invention, optionally, the second wiring 32 of the non-splicing exposure area 21 is a whole film layer, so as to ensure that the resistance of the second wiring 32 is minimized.

[0076] In the embodiment of the present invention, optionally, the second routing line 32 of the splicing exposure area 22 is connected to the second routing line 32 of the non-splicing exposure area 21, so that the second routing lines of the splicing exposure area can be short-circuited in the non-splicing exposure area and connected to the same COM signal. When the second routing line is a Com routing line, the compensation effect of the COM electrode in the display area can be effectively increased, the uniformity of the COM voltage in the display area can be ensured, and the probability of defective products caused by uneven COM voltage can be reduced.

[0077] In the embodiment of the present invention, optionally, the first wiring includes at least one of the following: a clock signal (CLK) line, a frame start signal (STV) line, and a power supply (VDD) line.

[0078] In the embodiment of the present invention, optionally, the second wiring may be a common electrode (COM) wiring.

[0079] In the embodiment of the present invention, optionally, the width of the gray area of ​​the device lens is generally 16.8 mm (±8.4 mm). Taking into account device fluctuations, the width of the splicing exposure area is usually set to 30 mm (±15 mm).

[0080] An embodiment of the present invention further provides a display device, comprising the display substrate in any of the above embodiments. The display device may be a display panel, or a display device including a display panel, such as a liquid crystal display device or an electronic paper display product.

[0081] The display substrate, manufacturing method, and display device of the embodiments of the present invention have the following beneficial effects:

[0082] 1. The second trace between the middle COF is slotted in the splicing exposure area, so that the splicing exposure area is not limited to the area where the middle COF is located. This can effectively reduce the number of splicing exposures for large-size products and improve factory production capacity. Taking the B10 75-inch product as an example, only two exposures are required to form a complete 75-inch display substrate (such as Fig. 9 As shown, Fig. 9 The left side of the middle is the mask, and the right side shows the pattern formed by the splicing exposure of the display substrate. After scan1 and scan2, the completed pattern can be formed. Fig. 9 Scan3 is only used to form a mark on the display substrate.

[0083] 2. For some special products, exposure cannot be achieved by conventional design methods, but the method described in the embodiments of the present invention can increase product compatibility and achieve diversified splicing products. Taking B10 75 inches as an example, the specifications of the display substrate are provided to customers, and its splicing exposure area is located at the COF on the left / right side. The exposure solution cannot be achieved by conventional splicing means.

[0084] 3. In the design scheme in the embodiment of the present invention, the second wiring in the splicing exposure area is given a COM signal, and the second wiring is short-circuited outside the splicing exposure area, which can effectively increase the compensation effect of the COM electrode in the display area and reduce the probability of defects caused by uneven COM voltage.

[0085] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A display substrate, characterized in that: It includes a display area and a non-display area, the non-display area is provided with a plurality of gate driving units, a plurality of data driving units and wirings, the wirings include a first wiring for connecting the gate driving unit and the data driving unit, and a second wiring for connecting different data driving units; the non-display area includes a plurality of non-splicing exposure areas and a splicing exposure area located between the non-splicing exposure areas, the wirings in the non-splicing exposure areas are formed by a single exposure, the wirings in the splicing exposure areas are formed by multiple exposures, and the pattern of the second wirings in the splicing exposure area is the same as the pattern of the first wirings.

2. The display substrate according to claim 1, characterized in that: The second wiring of the non-splicing exposure area is a whole film layer.

3. The display substrate according to claim 2, characterized in that: The second routing line of the splicing exposure area is connected to the second routing line of the non-splicing exposure area.

4. The display substrate according to any one of claims 1 to 3, characterized in that: The first wiring includes at least one of the following: a clock signal CLK line, a frame start signal STV line, and a power supply VDD line; and / or The second wiring is a common electrode COM wiring.

5. A display device, characterized in that: Comprising the display substrate as described in any one of claims 1-4.

6. A method for manufacturing a display substrate, characterized in that: The display substrate comprises a display area and a non-display area, wherein the non-display area comprises a plurality of non-splicing exposure areas and a splicing exposure area located between the non-splicing exposure areas, and the manufacturing method comprises: forming a plurality of gate driving units, a plurality of data driving units and wirings in the non-display area, wherein the wirings include first wirings for connecting the gate driving units and the data driving units, and second wirings for connecting different data driving units; The routing line in the non-splicing exposure area is formed by one exposure, the routing line in the splicing exposure area is formed by multiple exposures, and the pattern of the second routing line in the splicing exposure area is the same as the pattern of the first routing line.

7. The method according to claim 6, characterized in that Forming a wiring in the non-display area includes: forming a metal film layer; forming a photoresist layer on the metal film layer; Adopting a splicing exposure machine and a mask to expose the photoresist layer, wherein the photoresist layer is spliced ​​and exposed by moving the mask, the photoresist layer in the non-splicing exposure area is exposed once, and the photoresist layer in the splicing exposure area is exposed multiple times; Developing the exposed photoresist layer to form a photoresist layer pattern; The metal film layer not covered by the photoresist layer pattern is etched to form the second wiring.

8. The method according to claim 7, characterized in that The splicing exposure machine adopts a field aperture edge FDE and a variable area shielding VFS structure, and the splicing exposure area corresponds to the VFS.

9. The method according to claim 6, characterized in that The second wiring of the non-splicing exposure area is a whole film layer.

10. The method according to claim 6, characterized in that The second routing line of the splicing exposure area is connected to the second routing line of the non-splicing exposure area.

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