High-performance band-gap reference circuit applied to CMOS image sensor

Abstract

The invention discloses a high-performance band-gap reference circuit applied to a complementary metal oxide semiconductor (CMOS) image sensor, which comprises a starting circuit, a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a reference voltage generating circuit and a temperature coefficient compensating circuit, the positive temperature coefficient current generating circuit generates positive temperature coefficient current, the negative temperature coefficient current generating circuit generates negative temperature coefficient current, and the reference voltage generating circuit generates reference voltage irrelevant to temperature coefficient first order by superposing the positive temperature coefficient current and the negative temperature coefficient current and then flowing through an internal resistor of the reference voltage generating circuit. The temperature coefficient compensation circuit provides high-order temperature compensation for the positive temperature coefficient current or the negative temperature coefficient current through a multi-section curvature compensation mode, and corrects the temperature coefficient of the reference voltage; the reference voltage adjusting circuit has the advantages of being adjustable in reference voltage, simple in structure, small in layout area, high in precision and strong in robustness.

Description

Technical Field

[0001] The invention relates to a bandgap reference circuit, and in particular to a high-performance bandgap reference circuit applied to a CMOS image sensor. Background Art

[0002] In the readout circuit of a CMOS image sensor, the bandgap reference circuit is an important component of its internal analog-to-digital converter, and its accuracy determines the output accuracy of the CMOS image sensor. In order to ensure the output accuracy of the CMOS image sensor, the voltage or current output by the bandgap reference circuit needs to maintain high accuracy and strong stability.

[0003] The existing bandgap reference circuits are divided into voltage-mode bandgap reference circuits and current-mode bandgap reference circuits. Since the traditional voltage-mode bandgap reference circuit can only generate a reference voltage output close to 1.2V, the current-mode bandgap reference circuit can generate a reference voltage of any value between the power supply and the ground, and can output a positive temperature coefficient current or a negative temperature coefficient current, which is more functional than the voltage-mode bandgap reference circuit. However, the existing bandgap reference circuit has a nonlinear dependence between temperature and the voltage difference between the base and emitter of the transistor. The output reference voltage has a convex or concave relationship with the operating temperature, and the output reference voltage has a large temperature drift. In addition, the deviation of the process angle and the matching of the circuit components will also deteriorate the temperature variation characteristics of the reference voltage, which ultimately leads to low accuracy and robustness.

[0004] Currently, compensating the bandgap reference output voltage temperature coefficient is the key to improving the performance of the bandgap reference circuit. There are two main traditional bandgap reference temperature compensation schemes: adding an on-chip temperature coefficient adjustment circuit based on fuse trimming or an on-chip temperature coefficient adjustment circuit based on laser trimming to the bandgap reference circuit. However, the structures of these two schemes will make the bandgap reference circuit more complicated, the layout area will increase significantly, and they can often only improve the first-order and second-order terms in the nonlinear dependency relationship, which is single and affected by the deviation of the process angle, and the compensation effect is not obvious. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a high-performance bandgap reference circuit for CMOS image sensors which has a simple structure, a small layout area, high precision and strong robustness while having an adjustable reference voltage function.

[0006] The technical solution adopted by the present invention to solve the above technical problems is: a high-performance bandgap reference circuit applied to a CMOS image sensor, comprising a startup circuit, a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a reference voltage generating circuit and a temperature coefficient compensation circuit; the startup circuit is used to provide a startup current for the positive temperature coefficient current generating circuit, so that the positive temperature coefficient current generating circuit starts normally; the positive temperature coefficient current generating circuit utilizes the voltage difference ΔV between two transistors with different current densities therein BE Generates a positive temperature coefficient current and outputs it to the reference voltage generating circuit, where ΔV BE The voltage difference between the base and emitter of one transistor in the two transistors and the voltage difference between the base and emitter of the other transistor; the negative temperature coefficient current generating circuit generates a negative temperature coefficient current by using the voltage difference between the base and emitter of a single transistor in the positive temperature coefficient current generating circuit, and outputs it to the reference voltage generating circuit; the first-order terms of the coefficients of the negative temperature coefficient current and the positive temperature coefficient current are equal in magnitude, but opposite in sign; the reference voltage generating circuit generates a reference voltage output that is independent of the first order of the temperature coefficient by superimposing the positive temperature coefficient current and the negative temperature coefficient current and passing them through its internal resistance; the temperature coefficient compensation circuit is used to provide high-order temperature compensation for the positive temperature coefficient current or the negative temperature coefficient current in a preset operating temperature range through a multi-segment curvature compensation method, and correct the temperature coefficient of the reference voltage output by the reference voltage generating circuit.

[0007] The startup circuit has a power supply terminal, a ground terminal, a startup voltage input terminal and a startup current output terminal. The negative temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a negative temperature coefficient current output terminal and a negative temperature coefficient voltage input terminal. The positive temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a startup current input terminal, a feedback voltage output terminal, a positive temperature coefficient current output terminal and a negative temperature coefficient voltage output terminal. The reference voltage generating circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a reference voltage output terminal. The temperature coefficient compensation circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a compensation current output terminal. The power supply terminal of the startup circuit, the power supply terminal of the negative temperature coefficient current generating circuit, the power supply terminal of the positive temperature coefficient current generating circuit, the power supply terminal of the reference voltage generating circuit and the power supply terminal of the temperature coefficient compensation circuit are connected, and the connection terminal is the power supply terminal of the high-performance bandgap reference circuit, which is used to access the power supply voltage VDD; the ground terminal of the startup circuit, the ground terminal of the negative temperature coefficient current generating circuit, the positive temperature coefficient current generating circuit, the reference voltage generating circuit, and the temperature coefficient compensation circuit are connected. The ground terminal of the digital current generating circuit, the ground terminal of the reference voltage generating circuit and the ground terminal of the temperature coefficient compensation circuit are connected, and the connection end is the ground terminal of the high-performance bandgap reference circuit, which is used for grounding; the starting voltage input terminal of the starting circuit is connected to the feedback voltage output terminal of the positive temperature coefficient current generating circuit; the starting current output terminal of the starting circuit is connected to the starting current input terminal of the positive temperature coefficient current generating circuit; the negative temperature coefficient voltage input terminal of the negative temperature coefficient current generating circuit is connected to the negative temperature coefficient voltage output terminal of the positive temperature coefficient current generating circuit; the negative temperature coefficient current output terminal of the negative temperature coefficient current generating circuit, the negative temperature coefficient current input terminal of the reference voltage generating circuit and the negative temperature coefficient current input terminal of the temperature coefficient compensation circuit are connected; the positive temperature coefficient current output terminal of the positive temperature coefficient current generating circuit, the positive temperature coefficient current input terminal of the reference voltage generating circuit and the positive temperature coefficient current input terminal of the temperature coefficient compensation circuit are connected; the reference voltage output terminal of the reference voltage generating circuit is connected to the compensation current output terminal of the temperature coefficient compensation circuit.

[0008] The startup circuit comprises a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube, wherein the first MOS tube and the second MOS tube are both PMOS tubes, the third MOS tube and the fourth MOS tube are both NMOS tubes, the source of the first MOS tube is the power supply end of the startup circuit, the gate and the drain of the first MOS tube are connected to the source of the second MOS tube, the gate of the second MOS tube is connected to the gate of the third MOS tube, and the connection end thereof is the startup voltage input end of the startup circuit; the drain of the second MOS tube and the drain of the third MOS tube are connected to the gate of the fourth MOS tube, the source of the third MOS tube is connected to the source of the fourth MOS tube, and the connection end thereof is the ground end of the startup circuit; the drain of the fourth MOS tube is the startup current output end of the startup circuit.

[0009] The two transistors with different current densities in the positive temperature coefficient current generating circuit are respectively called the first transistor and the second transistor. The positive temperature coefficient current generating circuit also includes a fifth MOS tube, a sixth MOS tube, a first resistor, a first capacitor and a first operational amplifier. The first operational amplifier has an input current bias terminal, a first bias voltage terminal, a second bias voltage terminal, a third bias voltage terminal, a positive input terminal, a reverse input terminal and an output terminal. The input current bias terminal of the first operational amplifier is used to connect the bias current to make it work normally. The first bias voltage terminal of the first operational amplifier is used to connect the first bias voltage. The second bias voltage terminal of the first operational amplifier is used to connect the second bias voltage. The third bias voltage terminal of the first operational amplifier is used to connect the third bias voltage. The first bias voltage is used to make the first bias voltage terminal of the first operational amplifier work normally. The second bias voltage is used to make the second bias voltage terminal of the first operational amplifier work normally. The third bias voltage is used to make the third bias voltage terminal of the first operational amplifier work normally. The fifth MOS tube and the sixth MOS tube are both PMOS tubes. The source of the fifth MOS tube is The gate of the fifth MOS tube, the source of the sixth MOS tube and one end of the first capacitor are connected, and the connection end thereof is the power supply end of the positive temperature coefficient current generating circuit; the drain of the fifth MOS tube and one end of the first resistor are connected to the positive input end of the first operational amplifier, and the connection end thereof is the feedback voltage output end of the positive temperature coefficient current generating circuit; the drain of the sixth MOS tube and the collector of the second transistor are connected to the reverse input end of the first operational amplifier, and the connection end thereof is the negative temperature coefficient voltage output end of the positive temperature coefficient current generating circuit; the gate of the fifth MOS tube, the gate of the sixth MOS tube and the other end of the first capacitor are connected to the output end of the first operational amplifier, and the connection end thereof is both the start-up current input end of the positive temperature coefficient current generating circuit and the positive temperature coefficient current output end of the positive temperature coefficient current generating circuit; the collector of the first transistor is connected to the other end of the first resistor, the base of the first transistor is connected to the emitter and the base of the second transistor is connected to the emitter, and the connection end thereof is the ground end of the positive temperature coefficient current generating circuit.

[0010] The negative temperature coefficient current generating circuit comprises a seventh MOS tube, a second capacitor, a second operational amplifier and a second resistor. The second operational amplifier has the same structure as the first operational amplifier. The seventh MOS tube is a PMOS tube. The source of the seventh MOS tube is connected to one end of the second capacitor, and its connection end is the power supply end of the negative temperature coefficient current generating circuit. The gate of the seventh MOS tube and the output end of the second operational amplifier are connected to the other end of the second capacitor, and their connection end is the negative temperature coefficient current output end of the negative temperature coefficient current generating circuit. The drain of the seventh MOS tube, the positive input end of the second operational amplifier and one end of the second resistor are connected. The reverse input end of the second operational amplifier is the negative temperature coefficient voltage input end of the negative temperature coefficient current generating circuit. The other end of the second resistor is the ground end of the negative temperature coefficient current generating circuit.

[0011] The resistor in the reference voltage generating circuit is called a third resistor. The reference voltage generating circuit further includes an eighth MOS tube and a ninth MOS tube. Both the eighth MOS tube and the ninth MOS tube are PMOS tubes. The source of the eighth MOS tube is connected to the source of the ninth MOS tube, and the connection end thereof is the power supply end of the reference voltage generating circuit. The gate of the eighth MOS tube is the negative temperature coefficient current input end of the reference voltage generating circuit. The drain of the eighth MOS tube, the drain of the ninth MOS tube and one end of the third resistor are connected, and the connection end thereof is the reference voltage output end of the reference voltage generating circuit, which is used to output the reference voltage. The gate of the ninth MOS tube is the positive temperature coefficient current input end of the reference voltage generating circuit. The other end of the third resistor is the ground end of the reference voltage generating circuit.

[0012] The temperature coefficient compensation circuit comprises a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube, a fifteenth MOS tube, a sixteenth MOS tube, a seventeenth MOS tube, an eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a twenty-first MOS tube, wherein the tenth MOS tube, the eleventh MOS tube, the twelfth MOS tube, the fifteenth MOS tube, the sixteenth MOS tube, the seventeenth MOS tube, the eighteenth MOS tube and the twenty-first MOS tube are all PMOS tubes, and the thirteenth MOS tube , the fourteenth MOS tube, the nineteenth MOS tube and the twentieth MOS tube are all NMOS tubes; the source of the tenth MOS tube, the source of the eleventh MOS tube, the source of the twelfth MOS tube, the source of the fifteenth MOS tube, the source of the sixteenth MOS tube, the source of the seventeenth MOS tube, the source of the eighteenth MOS tube and the source of the twenty-first MOS tube are connected, and the connection end thereof is the power supply end of the temperature coefficient compensation circuit, the gate of the tenth MOS tube, the gate and drain of the eleventh MOS tube, the drain of the twelfth MOS tube The drain of the thirteenth MOS tube is connected to the drain of the thirteenth MOS tube, the drain of the tenth MOS tube is connected to the drain of the sixteenth MOS tube, and the connection end thereof is the compensation current output end of the temperature coefficient compensation circuit; the gate of the twelfth MOS tube is connected to the gate of the twenty-first MOS tube, and the connection end thereof is the negative temperature coefficient current input end of the temperature coefficient compensation circuit; the source of the thirteenth MOS tube, the source of the fourteenth MOS tube, the source of the nineteenth MOS tube and the source of the twentieth MOS tube are connected, and the connection end thereof is the ground end of the temperature coefficient compensation circuit; The gate of the thirteenth MOS tube, the gate and drain of the fourteenth MOS tube, and the drain of the fifteenth MOS tube are connected, the gate of the fifteenth MOS tube is connected to the gate of the eighteenth MOS tube, and the connection end thereof is the positive temperature coefficient current input end of the temperature coefficient compensation circuit; the gate of the sixteenth MOS tube, the gate and drain of the seventeenth MOS tube, the drain of the eighteenth MOS tube, and the drain of the nineteenth MOS tube are connected, the gate of the nineteenth MOS tube, the gate and drain of the twentieth MOS tube, and the drain of the twenty-first MOS tube are connected.

[0013] The first operational amplifier includes a twenty-second MOS tube, a twenty-third MOS tube, a twenty-fourth MOS tube, a twenty-fifth MOS tube, a twenty-sixth MOS tube, a twenty-seventh MOS tube, a twenty-eighth MOS tube, a twenty-ninth MOS tube, a thirtieth MOS tube, a thirty-first MOS tube and a thirty-second MOS tube. The twenty-second MOS tube, the twenty-third MOS tube, the twenty-fourth MOS tube, the twenty-fifth MOS tube, the twenty-sixth MOS tube, the twenty-seventh MOS tube and the twenty-eighth MOS tube are all PMOS tubes. The twenty-ninth MOS tube, the thirtieth MOS tube, the thirty-first MOS tube and the twenty-third MOS tube are all PMOS tubes. The thirty-second MOS tubes are all NMOS tubes, the source of the twenty-second MOS tube, the source of the twenty-fifth MOS tube and the source of the twenty-sixth MOS tube are connected, and the connection end is the power supply end of the first operational amplifier, the gate of the twenty-second MOS tube is the input current bias end of the first operational amplifier, the drain of the twenty-second MOS tube, the source of the twenty-third MOS tube and the source of the twenty-fourth MOS tube are connected, the gate of the twenty-third MOS tube is the positive input end of the first operational amplifier, the gate of the twenty-fourth MOS tube is connected to the reverse input end of the first operational amplifier, and the drain of the twenty-third MOS tube is connected to the reverse input end of the first operational amplifier. The gate of the twenty-fifth MOS tube, the gate of the twenty-sixth MOS tube, the drain of the twenty-seventh MOS tube and the drain of the twenty-ninth MOS tube are connected, the drain of the twenty-fifth MOS tube is connected to the source of the twenty-seventh MOS tube, the drain of the twenty-sixth MOS tube is connected to the source of the twenty-eighth MOS tube, the gate of the twenty-seventh MOS tube and the drain of the twenty-eighth MOS tube are connected, and the gate of the twenty-seventh MOS tube and the drain of the twenty-eighth MOS tube are connected. The gate of the twenty-eighth MOS tube is connected to the drain of the thirtieth MOS tube, and the connection end thereof is the first bias voltage end of the first operational amplifier; the drain of the twenty-eighth MOS tube is connected to the drain of the thirtieth MOS tube, and the connection end thereof is the output end of the first operational amplifier; the gate of the twenty-ninth MOS tube is connected to the gate of the thirtieth MOS tube, and the connection end thereof is the second bias voltage end of the first operational amplifier; the gate of the thirty-first MOS tube is connected to the gate of the thirty-second MOS tube, and the connection end thereof is the third bias voltage end of the first operational amplifier; the source of the thirty-first MOS tube is connected to the source of the thirty-second MOS tube, and the connection end thereof is the ground end of the first operational amplifier.

[0014] Compared with the prior art, the present invention has the advantages that a bandgap reference circuit is formed by a startup circuit, a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a reference voltage generating circuit and a temperature coefficient compensation circuit. The startup circuit provides a startup current for the positive temperature coefficient current generating circuit, so that the positive temperature coefficient current generating circuit starts normally. The positive temperature coefficient current generating circuit utilizes the voltage difference ΔV between two transistors with different current densities therein. BE A positive temperature coefficient current is generated and output to a reference voltage generating circuit. A negative temperature coefficient current generating circuit generates a negative temperature coefficient current by using the voltage difference between the base and emitter of a single transistor in the positive temperature coefficient current generating circuit, and outputs it to the reference voltage generating circuit. The first-order terms of the coefficients of the negative temperature coefficient current and the positive temperature coefficient current are equal in magnitude, but opposite in sign. The reference voltage generating circuit generates a reference voltage output that is independent of the first order of the temperature coefficient by superimposing the positive temperature coefficient current and the negative temperature coefficient current and passing them through its internal resistance. The temperature coefficient compensation circuit compensates the positive temperature coefficient current or the negative temperature coefficient current by multi-segment curvature compensation within a preset operating temperature range. The flow provides high-order temperature compensation, corrects the temperature coefficient of the reference voltage output by the reference voltage generating circuit, and makes the reference voltage output by the reference voltage generating circuit adjustable. The temperature coefficient compensation circuit can be integrated in the chip. Compared with adding an on-chip temperature coefficient adjustment circuit based on fuse adjustment or laser adjustment, the structure is simpler and the layout area is small. The temperature coefficient compensation circuit uses a multi-segment curvature compensation method introduced in different temperature ranges to weaken the influence of the output reference voltage and the temperature-related high-order terms, thereby improving the reference voltage's resistance to temperature changes. Therefore, while having the function of adjustable reference voltage, the present invention has a simple structure, a small layout area, high precision, and strong robustness. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A circuit diagram of a high performance bandgap reference circuit applied to a CMOS image sensor of the present invention;

[0016] Figure 2 A circuit diagram of a first operational amplifier of a high-performance bandgap reference circuit applied to a CMOS image sensor of the present invention;

[0017] Figure 3 The present invention is a curve comparison diagram of the high-performance bandgap reference circuit applied to a CMOS image sensor according to the present invention, which changes with temperature before and after the temperature coefficient compensation circuit is introduced. DETAILED DESCRIPTION

[0018] The present invention is further described in detail below with reference to the accompanying drawings.

[0019] Embodiment 1: A high-performance bandgap reference circuit for a CMOS image sensor, comprising a startup circuit, a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a reference voltage generating circuit and a temperature coefficient compensation circuit; the startup circuit is used to provide a startup current for the positive temperature coefficient current generating circuit, so that the positive temperature coefficient current generating circuit starts normally; the positive temperature coefficient current generating circuit utilizes a voltage difference ΔV between two transistors with different current densities therein BE Generates a positive temperature coefficient current and outputs it to the reference voltage generation circuit, where ΔV BE It is the difference between the voltage difference between the base and the emitter of one transistor in the two transistors and the voltage difference between the base and the emitter of the other transistor; the negative temperature coefficient current generating circuit uses the voltage difference between the base and the emitter of a single transistor in the positive temperature coefficient current generating circuit to generate a negative temperature coefficient current, and outputs it to the reference voltage generating circuit; the first-order terms of the coefficients of the negative temperature coefficient current and the positive temperature coefficient current are equal in magnitude, but opposite in sign; the reference voltage generating circuit generates a reference voltage output that is independent of the first order of the temperature coefficient by superimposing the positive temperature coefficient current and the negative temperature coefficient current and passing them through its internal resistance; the temperature coefficient compensation circuit is used to provide high-order temperature compensation for the positive temperature coefficient current or the negative temperature coefficient current in a preset operating temperature range through a multi-segment curvature compensation method, and correct the temperature coefficient of the reference voltage output by the reference voltage generating circuit.

[0020] In this embodiment, through the negative temperature coefficient current generating circuit and the positive temperature coefficient current generating circuit, it is possible to generate a positive temperature coefficient current or a negative temperature coefficient current separately, and at the same time, the positive temperature coefficient current and the negative temperature coefficient current can be combined in a certain proportion to form a zero temperature coefficient current, and the functionality is strong. The temperature coefficient compensation circuit provides high-order temperature compensation for the positive temperature coefficient current or the negative temperature coefficient current through a multi-segment curvature compensation method within a preset operating temperature range, corrects the temperature coefficient of the reference voltage output by the reference voltage generating circuit, and makes the reference voltage output by the reference voltage generating circuit adjustable. The temperature coefficient compensation circuit can be integrated in the chip. Compared with adding an on-chip temperature coefficient adjustment circuit based on fuse adjustment or laser adjustment, the structure is simpler and the layout area is small. The temperature coefficient compensation circuit uses a multi-segment curvature compensation method introduced in different temperature ranges to weaken the influence of the output reference voltage and the higher-order terms related to temperature, thereby improving the resistance of the reference voltage to temperature changes, and has higher accuracy and stronger robustness.

[0021] Embodiment 2: This embodiment is basically the same as Embodiment 1, except that: in this embodiment, the startup circuit has a power supply terminal, a ground terminal, a startup voltage input terminal and a startup current output terminal, the negative temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a negative temperature coefficient current output terminal and a negative temperature coefficient voltage input terminal, the positive temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a startup current input terminal, a feedback voltage output terminal, a positive temperature coefficient current output terminal and a negative temperature coefficient voltage output terminal, the reference voltage generating circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a reference voltage output terminal, the temperature coefficient compensation circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a compensation current output terminal, the power supply terminal of the startup circuit, the power supply terminal of the negative temperature coefficient current generating circuit, the power supply terminal of the positive temperature coefficient current generating circuit, the power supply terminal of the reference voltage generating circuit and the power supply terminal of the temperature coefficient compensation circuit are connected, and the connection terminal is the power supply terminal of the high-performance bandgap reference circuit, which is used to connect to the power supply voltage VDD; the ground terminal of the startup circuit, The ground terminal of the negative temperature coefficient current generating circuit, the ground terminal of the positive temperature coefficient current generating circuit, the ground terminal of the reference voltage generating circuit and the ground terminal of the temperature coefficient compensation circuit are connected, and the connection end is the ground terminal of the high-performance bandgap reference circuit, which is used for grounding; the starting voltage input terminal of the starting circuit is connected to the feedback voltage output terminal of the positive temperature coefficient current generating circuit; the starting current output terminal of the starting circuit is connected to the starting current input terminal of the positive temperature coefficient current generating circuit; the negative temperature coefficient voltage input terminal of the negative temperature coefficient current generating circuit is connected to the negative temperature coefficient voltage output terminal of the positive temperature coefficient current generating circuit; the negative temperature coefficient current output terminal of the negative temperature coefficient current generating circuit, the negative temperature coefficient current input terminal of the reference voltage generating circuit and the negative temperature coefficient current input terminal of the temperature coefficient compensation circuit are connected; the positive temperature coefficient current output terminal of the positive temperature coefficient current generating circuit, the positive temperature coefficient current input terminal of the reference voltage generating circuit and the positive temperature coefficient current input terminal of the temperature coefficient compensation circuit are connected; the reference voltage output terminal of the reference voltage generating circuit is connected to the compensation current output terminal of the temperature coefficient compensation circuit.

[0022] Embodiment 3: This embodiment is basically the same as Embodiment 2, except that: in this embodiment, Figure 1As shown, the startup circuit includes a first MOS tube M1, a second MOS tube M2, a third MOS tube M3 and a fourth MOS tube M4. The first MOS tube M1 and the second MOS tube M2 are both PMOS tubes, the third MOS tube M3 and the fourth MOS tube M4 are both NMOS tubes, the source of the first MOS tube M1 is the power supply end of the startup circuit, the gate and the drain of the first MOS tube M1 are connected to the source of the second MOS tube M2, the gate of the second MOS tube M2 is connected to the gate of the third MOS tube M3, and the connection end thereof is the startup voltage input end of the startup circuit; the drain of the second MOS tube M2 and the drain of the third MOS tube M3 are connected to the gate of the fourth MOS tube M4, the source of the third MOS tube M3 is connected to the source of the fourth MOS tube M4, and the connection end thereof is the grounding end of the startup circuit; the drain of the fourth MOS tube M4 is the startup current output end of the startup circuit.

[0023] In this embodiment, Figure 1As shown, two transistors with different current densities in the positive temperature coefficient current generating circuit are respectively called the first transistor and the second transistor. The positive temperature coefficient current generating circuit also includes a fifth MOS tube M5, a sixth MOS tube M6, a first resistor R1, a first capacitor C1 and a first operational amplifier AMP1. The first operational amplifier AMP1 has an input current bias terminal, a first bias voltage terminal, a second bias voltage terminal, a third bias voltage terminal, a positive input terminal, a reverse input terminal and an output terminal. The input current bias terminal of the first operational amplifier AMP1 is used to access a bias current for normal operation. The first bias voltage terminal of the first operational amplifier AMP1 is used to access a first bias voltage. The second bias voltage terminal of the first operational amplifier AMP1 is used to access a second bias voltage. The third bias voltage terminal of the first operational amplifier AMP1 is used to access a third bias voltage. The first bias voltage is used to enable the first bias voltage terminal of the first operational amplifier AMP1 to work normally. The second bias voltage is used to enable the second bias voltage terminal of the first operational amplifier AMP1 to work normally. The third bias voltage is used to enable the third bias voltage terminal of the first operational amplifier AMP1 to work normally. The fifth MOS tube M5 and the sixth MOS tube M6 are all PMOS tubes, the source of the fifth MOS tube M5, the source of the sixth MOS tube M6 and one end of the first capacitor C1 are connected, and the connection end is the power supply end of the positive temperature coefficient current generating circuit, the drain of the fifth MOS tube M5 and one end of the first resistor R1 are connected to the positive input end of the first operational amplifier AMP1, and the connection end is the feedback voltage output end of the positive temperature coefficient current generating circuit; the drain of the sixth MOS tube M6, the collector of the second transistor and the reverse input end of the first operational amplifier AMP1 are connected, and the connection end is the positive temperature coefficient current generating circuit. The negative temperature coefficient voltage output end of the positive temperature coefficient current generating circuit; the gate of the fifth MOS tube M5, the gate of the sixth MOS tube M6, the other end of the first capacitor C1 and the output end of the first operational amplifier AMP1 are connected, and their connection ends are both the starting current input end of the positive temperature coefficient current generating circuit and the positive temperature coefficient current output end of the positive temperature coefficient current generating circuit; the collector of the first transistor is connected to the other end of the first resistor R1, the base and emitter of the first transistor and the base and emitter of the second transistor are connected, and their connection ends are the grounding end of the positive temperature coefficient current generating circuit.

[0024] In this embodiment, Figure 1As shown, the negative temperature coefficient current generating circuit includes a seventh MOS tube M7, a second capacitor C2, a second operational amplifier AMP2 and a second resistor R2. The second operational amplifier AMP2 has the same structure as the first operational amplifier AMP1. The seventh MOS tube M7 is a PMOS tube. The source of the seventh MOS tube M7 is connected to one end of the second capacitor C2, and its connection end is the power supply end of the negative temperature coefficient current generating circuit. The gate of the seventh MOS tube M7 and the output end of the second operational amplifier AMP2 are connected to the other end of the second capacitor C2, and its connection end is the negative temperature coefficient current output end of the negative temperature coefficient current generating circuit; the drain of the seventh MOS tube M7 and the positive input end of the second operational amplifier AMP2 are connected to one end of the second resistor R2, and the reverse input end of the second operational amplifier AMP2 is the negative temperature coefficient voltage input end of the negative temperature coefficient current generating circuit; the other end of the second resistor R2 is the grounding end of the negative temperature coefficient current generating circuit.

[0025] In this embodiment, Figure 1 As shown, the resistor in the reference voltage generating circuit is called the third resistor R3, and the reference voltage generating circuit also includes an eighth MOS tube M8 and a ninth MOS tube M9, both of which are PMOS tubes, the source of the eighth MOS tube M8 is connected to the source of the ninth MOS tube M9, and the connection end thereof is the power supply end of the reference voltage generating circuit, and the gate of the eighth MOS tube M8 is the negative temperature coefficient current input end of the reference voltage generating circuit; the drain of the eighth MOS tube M8, the drain of the ninth MOS tube M9 and one end of the third resistor R3 are connected, and the connection end thereof is the reference voltage output end of the reference voltage generating circuit, which is used to output the reference voltage; the gate of the ninth MOS tube M9 is the positive temperature coefficient current input end of the reference voltage generating circuit; and the other end of the third resistor R3 is the grounding end of the reference voltage generating circuit.

[0026] In this embodiment, Figure 1As shown, the temperature coefficient compensation circuit includes a tenth MOS tube M10, an eleventh MOS tube M11, a twelfth MOS tube M12, a thirteenth MOS tube M13, a fourteenth MOS tube M14, a fifteenth MOS tube M15, a sixteenth MOS tube M16, a seventeenth MOS tube M17, an eighteenth MOS tube M18, a nineteenth MOS tube M19, a twentieth MOS tube M20 and a twenty-first MOS tube M21, a tenth MOS tube M10, an eleventh MOS tube M11, a twelfth MOS tube M12, a fifteenth MOS tube M15, a sixteenth MOS tube M16, a seventeenth MOS tube M17, an eighteenth MOS tube M18 and The twenty-first MOS tube M21 is a PMOS tube, the thirteenth MOS tube M13, the fourteenth MOS tube M14, the nineteenth MOS tube M19 and the twentieth MOS tube M20 are all NMOS tubes; the source of the tenth MOS tube M10, the source of the eleventh MOS tube M11, the source of the twelfth MOS tube M12, the source of the fifteenth MOS tube M15, the source of the sixteenth MOS tube M16, the source of the seventeenth MOS tube M17, the source of the eighteenth MOS tube M18 and the source of the twenty-first MOS tube M21 are connected, and the connection end is the power supply end of the temperature coefficient compensation circuit, the gate ... The gate and drain of the S tube M11, the drain of the twelfth MOS tube M12, and the drain of the thirteenth MOS tube M13 are connected; the drain of the tenth MOS tube M10 is connected to the drain of the sixteenth MOS tube M16, and the connection end thereof is the compensation current output end of the temperature coefficient compensation circuit; the gate of the twelfth MOS tube M12 is connected to the gate of the twenty-first MOS tube M21, and the connection end thereof is the negative temperature coefficient current input end of the temperature coefficient compensation circuit; the source of the thirteenth MOS tube M13, the source of the fourteenth MOS tube M14, the source of the nineteenth MOS tube M19, and the source of the twentieth MOS tube M20 are connected, and the connection end thereof is the temperature coefficient compensation circuit. The ground terminal of the compensation circuit is connected; the gate of the thirteenth MOS tube M13, the gate and the drain of the fourteenth MOS tube M14, and the drain of the fifteenth MOS tube M15 are connected, the gate of the fifteenth MOS tube M15 is connected to the gate of the eighteenth MOS tube M18, and the connection end thereof is the positive temperature coefficient current input terminal of the temperature coefficient compensation circuit; the gate of the sixteenth MOS tube M16, the gate and the drain of the seventeenth MOS tube M17, the drain of the eighteenth MOS tube M18, and the drain of the nineteenth MOS tube M19 are connected, the gate of the nineteenth MOS tube M19, the gate and the drain of the twentieth MOS tube M20, and the drain of the twenty-first MOS tube M21 are connected.

[0027] Since the voltage difference between the base and the emitter of the transistor is generally about 0.7V, when the power supply voltage VDD connected to the power supply end of the startup circuit is 3.3V or above, the first MOS tube M1 is connected in a diode form, which can reduce the static power consumption of the startup circuit. During the power-on process of the bandgap reference circuit, if the bandgap reference is not started, the second MOS tube M2 pulls up the gate of the fourth MOS tube M4, and pulls down the positive temperature coefficient current output end of the positive temperature coefficient current generating circuit, so as to ensure the normal establishment of the bandgap reference; the width-to-length ratio of the third MOS tube M3 is set to be much larger than the width-to-length ratio of the second MOS tube M2, that is, the driving capability of the second MOS tube M2 is smaller, so as to ensure that the fourth MOS tube M4 can be turned off after the power supply voltage VDD is powered on and the bandgap reference circuit works normally.

[0028] The positive temperature coefficient current generating circuit adopts the folded common source and common gate structure of the P-type input pair tube, and uses the virtual short and virtual break characteristics of the first operational amplifier AMP1 to clamp the voltage of its positive input terminal and reverse input terminal, so that the positive input terminal and reverse input terminal of the first operational amplifier AMP1 are connected in the positive temperature coefficient current generating circuit loop to meet the positive feedback less than the negative feedback. The positive temperature coefficient current generating circuit uses the difference ΔV between the base and emitter voltage of the first transistor and the second transistor. BE The ratio of the resistance value of the first resistor R1 generates a positive temperature coefficient current. The first capacitor C1 pushes the main pole of the entire loop of the positive temperature coefficient current generating circuit to a lower frequency, thereby improving the stability of the bandgap reference circuit.

[0029] The negative temperature coefficient current generating circuit utilizes the virtual short and virtual open characteristics of the second operational amplifier AMP2 to clamp the voltages of its positive input terminal and reverse input terminal. The connection method of the positive input terminal and reverse input terminal of the second operational amplifier AMP2 satisfies the positive feedback being less than the negative feedback in the positive temperature coefficient current generating circuit loop. The negative temperature coefficient current generating circuit utilizes the ratio of the voltage difference between the base and the emitter of the second transistor and the resistance value of the second resistor R2 to generate a negative temperature coefficient current. The second capacitor C2 pushes the main pole of the entire loop of the negative temperature coefficient current generating circuit to a lower frequency, thereby improving the stability of the bandgap reference circuit.

[0030] The reference voltage generating circuit obtains a reference voltage VREF that is independent of the temperature first-order coefficient by adjusting the positive temperature coefficient current and the negative temperature coefficient current respectively and superimposing them to flow through the third resistor R3. The calculation formula of the reference voltage before the temperature coefficient compensation circuit performs temperature coefficient compensation (i.e., correction) is:

[0031]

[0032] In formula (1), R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, R3 is the resistance of the third resistor R3, VBE2 is the voltage difference between the base and the emitter of the second transistor, and VBE1 is the voltage difference between the base and the emitter of the first transistor.

[0033] In the temperature coefficient compensation circuit of the present embodiment, the tenth MOS tube M10, the eleventh MOS tube M11, the twelfth MOS tube M12, the thirteenth MOS tube M13, the fourteenth MOS tube M14 and the fifteenth MOS tube M15 constitute a positive temperature coefficient compensation circuit, and the sixteenth MOS tube M16, the seventeenth MOS tube M17, the eighteenth MOS tube M18, the nineteenth MOS tube M19, the twentieth MOS tube M20 and the twenty-first MOS tube M21 constitute a negative temperature coefficient compensation circuit. Two compensation currents (positive temperature coefficient compensation current and negative temperature coefficient compensation current) are injected into the reference voltage output terminal of the bandgap reference circuit, and each compensation current is triggered by a different temperature threshold. The working principle of the positive temperature coefficient compensation circuit is as follows: the fifteenth MOS tube M15 is used as a positive temperature coefficient current source, which is copied by the thirteenth MOS tube M13 and the fourteenth MOS tube M14 as current mirrors and compared with the twelfth MOS tube M12 as a negative temperature coefficient current source. At low temperatures, the current of the thirteenth MOS tube M13 is smaller than the current of the twelfth MOS tube M12, the gates of the tenth MOS tube M10 and the eleventh MOS tube M11 are pulled high, and there is no temperature compensation effect. As the temperature rises, the current of the thirteenth MOS tube M13 is larger than the current of the twelfth MOS tube M12, the gates of the tenth MOS tube M10 and the eleventh MOS tube M11 are pulled low, and a compensation current is generated. The temperature threshold for triggering compensation can be determined by adjusting the width-to-length ratio of the twelfth MOS tube M12, the thirteenth MOS tube M13, the fourteenth MOS tube M14 and the fifteenth MOS tube M15. Adjusting the width-to-length ratio of the tenth MOS tube M10 and the eleventh MOS tube M11 can change the size of the injected compensation current and the slope that changes with temperature. The working principle of the negative temperature coefficient compensation circuit is as follows: the twenty-first MOS tube M21 as a negative temperature coefficient current source is copied through the nineteenth MOS tube M19 and the twentieth MOS tube M20 as current mirrors and compared with the eighteenth MOS tube M18 as a positive temperature coefficient current source. At high temperature, the current of the nineteenth MOS tube M19 is smaller than the current of the eighteenth MOS tube M18, the gates of the sixteenth MOS tube M16 and the seventeenth MOS tube M17 are pulled high, and there is no temperature compensation effect; as the temperature decreases, the current of the nineteenth MOS tube M19 is larger than the current of the eighteenth MOS tube M18, the gates of the sixteenth MOS tube M16 and the seventeenth MOS tube M17 are pulled low, and a compensation current is generated. The temperature threshold for triggering compensation can be determined by adjusting the width-to-length ratio of the eighteenth MOS tube M18, the nineteenth MOS tube M19, the twentieth MOS tube M20 and the twenty-first MOS tube M21. The width-to-length ratio of the sixteenth MOS tube M16 and the seventeenth MOS tube M17 can be adjusted to change the size of the injected compensation current and the slope changing with temperature.

[0034] The curve comparison of the high performance bandgap reference circuit applied to CMOS image sensor of the present invention before and after the introduction of temperature coefficient compensation circuit with temperature change is shown in the figure below: Figure 3 As shown, analysis Figure 3 It can be seen that: after the temperature coefficient compensation circuit is introduced, the temperature coefficient compensation circuit injects two compensation currents triggered by different temperature thresholds into the reference voltage output end of the reference voltage generating circuit, and divides the reference voltage output from the reference voltage output end into three convex curves instead of the original single-segment convex curve, thereby reducing the variation of the reference voltage in a wide temperature range and improving its accuracy and robustness.

[0035] Embodiment 4: This embodiment is basically the same as Embodiment 3, except that: in this embodiment, Figure 2As shown, the first operational amplifier AMP1 includes a twenty-second MOS tube M22, a twenty-third MOS tube M23, a twenty-fourth MOS tube M24, a twenty-fifth MOS tube M25, a twenty-sixth MOS tube M26, a twenty-seventh MOS tube M27, a twenty-eighth MOS tube M28, a twenty-ninth MOS tube M29, a thirtieth MOS tube M30, a thirty-first MOS tube M31 and a thirty-second MOS tube M32. The twenty-second MOS tube M22, the twenty-third MOS tube M23, the twenty-fourth MOS tube M24, the twenty-fifth MOS tube M25, the twenty-sixth MOS tube M26, the twenty-seventh MOS tube M27 and the twenty-eighth MOS tube M28 are all PMOS tubes, and the twenty-ninth MOS tube M29 29. The 30th MOS tube M30, the 31st MOS tube M31 and the 32nd MOS tube M32 are all NMOS tubes. The source of the 22nd MOS tube M22, the source of the 25th MOS tube M25 and the source of the 26th MOS tube M26 are connected, and the connection end thereof is the power supply end of the first operational amplifier AMP1. The gate of the 22nd MOS tube M22 is the input current bias end of the first operational amplifier AMP1. The drain of the 22nd MOS tube M22, the source of the 23rd MOS tube M23 and the source of the 24th MOS tube M24 are connected. The gate of the 23rd MOS tube M23 is the positive input end of the first operational amplifier AMP1. The gate of the 24th MOS tube M24 is connected to the negative input end of the first operational amplifier AMP1. To the input end, the drain of the twenty-third MOS tube M23, the source of the twenty-ninth MOS tube M29 and the drain of the thirty-first MOS tube M31 are connected, the drain of the twenty-fourth MOS tube M24, the source of the thirtieth MOS tube M30 and the drain of the thirty-second MOS tube M32 are connected, the gate of the twenty-fifth MOS tube M25, the gate of the twenty-sixth MOS tube M26, the drain of the twenty-seventh MOS tube M27 and the drain of the twenty-ninth MOS tube M29 are connected, the drain of the twenty-fifth MOS tube M25 and the source of the twenty-seventh MOS tube M27 are connected, the drain of the twenty-sixth MOS tube M26 and the source of the twenty-eighth MOS tube M28 are connected, the gate of the twenty-seventh MOS tube M27 and the gate of the twenty-eighth MOS tube M28 are connected The gate of the MOS tube M28 is connected, and its connection end is the first bias voltage terminal of the first operational amplifier AMP1, the drain of the twenty-eighth MOS tube M28 is connected to the drain of the thirtieth MOS tube M30, and its connection end is the output end of the first operational amplifier AMP1, the gate of the twenty-ninth MOS tube M29 is connected to the gate of the thirtieth MOS tube M30, and its connection end is the second bias voltage terminal of the first operational amplifier AMP1, the gate of the thirty-first MOS tube M31 is connected to the gate of the thirty-second MOS tube M32, and its connection end is the third bias voltage terminal of the first operational amplifier AMP1, and the source of the thirty-first MOS tube M31 is connected to the source of the thirty-second MOS tube M32, and its connection end is the ground terminal of the first operational amplifier AMP1.

[0036] The first operational amplifier AMP1 of this embodiment is a folded common-source and common-gate operational amplifier, which uses a common-source amplifier circuit with differential input to realize voltage-to-current conversion. The current signal is then input to the source end of the common-gate amplifier circuit, and a current mirror image is used to complete the conversion of the output end from double-ended to single-ended, thereby realizing accurate signal amplification.

[0037] In summary, the high-performance bandgap reference circuit applied to the CMOS image sensor of the present invention has the function of adjustable reference voltage, simple structure, small layout area, high precision and strong robustness.

Claims

1. A high performance bandgap reference circuit for CMOS image sensor, characterized in that The invention comprises a starting circuit, a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a reference voltage generating circuit and a temperature coefficient compensation circuit; the starting circuit is used to provide a starting current for the positive temperature coefficient current generating circuit, so that the positive temperature coefficient current generating circuit starts normally; the positive temperature coefficient current generating circuit utilizes the voltage difference ΔV between two transistors with different current densities therein BE Generates a positive temperature coefficient current and outputs it to the reference voltage generating circuit, where ΔV BE is the difference between the voltage difference between the base and the emitter of one transistor and the voltage difference between the base and the emitter of the other transistor in the two transistors; the negative temperature coefficient current generating circuit utilizes the voltage difference between the base and the emitter of a single transistor in the positive temperature coefficient current generating circuit to generate a negative temperature coefficient current, and outputs it to the reference voltage generating circuit; The first-order terms of the coefficients of the negative temperature coefficient current and the positive temperature coefficient current are equal in magnitude, but opposite in sign; the reference voltage generating circuit generates a reference voltage output that is independent of the first-order temperature coefficient by superimposing the positive temperature coefficient current and the negative temperature coefficient current and passing them through its internal resistance; the temperature coefficient compensation circuit is used to provide high-order temperature compensation for the positive temperature coefficient current or the negative temperature coefficient current within a preset operating temperature range through a multi-stage curvature compensation method, and correct the temperature coefficient of the reference voltage output by the reference voltage generating circuit.

2. The high performance bandgap reference circuit for CMOS image sensor according to claim 1, characterized in that The startup circuit has a power supply terminal, a ground terminal, a startup voltage input terminal and a startup current output terminal. The negative temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a negative temperature coefficient current output terminal and a negative temperature coefficient voltage input terminal. The positive temperature coefficient current generating circuit has a power supply terminal, a ground terminal, a startup current input terminal, a feedback voltage output terminal, a positive temperature coefficient current output terminal and a negative temperature coefficient voltage output terminal. The reference voltage generating circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a reference voltage output terminal. The temperature coefficient compensation circuit has a power supply terminal, a ground terminal, a positive temperature coefficient current input terminal, a negative temperature coefficient current input terminal and a compensation current output terminal. The power supply terminal of the startup circuit, the power supply terminal of the negative temperature coefficient current generating circuit, the power supply terminal of the positive temperature coefficient current generating circuit, the power supply terminal of the reference voltage generating circuit and the power supply terminal of the temperature coefficient compensation circuit are connected, and the connection end is the high performance bandgap base The power supply end of the quasi-circuit is used to access the power supply voltage VDD; the ground end of the startup circuit, the ground end of the negative temperature coefficient current generating circuit, the ground end of the positive temperature coefficient current generating circuit, the ground end of the reference voltage generating circuit and the ground end of the temperature coefficient compensation circuit are connected, and its connection end is the ground end of the high-performance bandgap reference circuit, which is used for grounding; the startup voltage input end of the startup circuit is connected to the feedback voltage output end of the positive temperature coefficient current generating circuit; the startup current output end of the startup circuit is connected to the startup current input end of the positive temperature coefficient current generating circuit; the negative temperature coefficient voltage input end of the negative temperature coefficient current generating circuit is connected to the negative temperature coefficient voltage output end of the positive temperature coefficient current generating circuit; the negative temperature coefficient current output end of the negative temperature coefficient current generating circuit, the negative temperature coefficient current input end of the reference voltage generating circuit and the negative temperature coefficient current input end of the temperature coefficient compensation circuit are connected; The positive temperature coefficient current output terminal of the positive temperature coefficient current generating circuit, the positive temperature coefficient current input terminal of the reference voltage generating circuit and the positive temperature coefficient current input terminal of the temperature coefficient compensation circuit are connected; the reference voltage output terminal of the reference voltage generating circuit and the compensation current output terminal of the temperature coefficient compensation circuit are connected.

3. The high performance bandgap reference circuit for CMOS image sensor according to claim 2, characterized in that The startup circuit comprises a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube, wherein the first MOS tube and the second MOS tube are both PMOS tubes, the third MOS tube and the fourth MOS tube are both NMOS tubes, the source of the first MOS tube is the power supply end of the startup circuit, the gate and the drain of the first MOS tube are connected to the source of the second MOS tube, the gate of the second MOS tube is connected to the gate of the third MOS tube, and the connection end thereof is the startup voltage input end of the startup circuit; the drain of the second MOS tube and the drain of the third MOS tube are connected to the gate of the fourth MOS tube, the source of the third MOS tube is connected to the source of the fourth MOS tube, and the connection end thereof is the ground end of the startup circuit; the drain of the fourth MOS tube is the startup current output end of the startup circuit.

4. A highly integrated high-performance bandgap reference circuit according to claim 2, characterized in that The two transistors with different current densities in the positive temperature coefficient current generating circuit are respectively called the first transistor and the second transistor. The positive temperature coefficient current generating circuit also includes a fifth MOS tube, a sixth MOS tube, a first resistor, a first capacitor and a first operational amplifier. The first operational amplifier has an input current bias terminal, a first bias voltage terminal, a second bias voltage terminal, a third bias voltage terminal, a positive input terminal, a reverse input terminal and an output terminal. The input current bias terminal of the first operational amplifier is used to connect the bias current to make it work normally. The first bias voltage terminal of the first operational amplifier is used to connect the first bias voltage. The second bias voltage terminal of the first operational amplifier is used to connect the second bias voltage. The third bias voltage terminal of the first operational amplifier is used to connect the third bias voltage. The first bias voltage is used to make the first bias voltage terminal of the first operational amplifier work normally. The second bias voltage is used to make the second bias voltage terminal of the first operational amplifier work normally. The third bias voltage is used to make the third bias voltage terminal of the first operational amplifier work normally. The fifth MOS tube and the sixth MOS tube are both PMOS tubes. The source of the fifth MOS tube is The gate of the fifth MOS tube, the source of the sixth MOS tube and one end of the first capacitor are connected, and the connection end thereof is the power supply end of the positive temperature coefficient current generating circuit; the drain of the fifth MOS tube and one end of the first resistor are connected to the positive input end of the first operational amplifier, and the connection end thereof is the feedback voltage output end of the positive temperature coefficient current generating circuit; the drain of the sixth MOS tube and the collector of the second transistor are connected to the reverse input end of the first operational amplifier, and the connection end thereof is the negative temperature coefficient voltage output end of the positive temperature coefficient current generating circuit; the gate of the fifth MOS tube, the gate of the sixth MOS tube and the other end of the first capacitor are connected to the output end of the first operational amplifier, and the connection end thereof is both the start-up current input end of the positive temperature coefficient current generating circuit and the positive temperature coefficient current output end of the positive temperature coefficient current generating circuit; the collector of the first transistor is connected to the other end of the first resistor, the base of the first transistor is connected to the emitter and the base of the second transistor is connected to the emitter, and the connection end thereof is the ground end of the positive temperature coefficient current generating circuit.

5. A highly integrated high-performance bandgap reference circuit according to claim 4, characterized in that The negative temperature coefficient current generating circuit comprises a seventh MOS tube, a second capacitor, a second operational amplifier and a second resistor. The second operational amplifier has the same structure as the first operational amplifier. The seventh MOS tube is a PMOS tube. The source of the seventh MOS tube is connected to one end of the second capacitor, and its connection end is the power supply end of the negative temperature coefficient current generating circuit. The gate of the seventh MOS tube and the output end of the second operational amplifier are connected to the other end of the second capacitor, and their connection end is the negative temperature coefficient current output end of the negative temperature coefficient current generating circuit. The drain of the seventh MOS tube, the positive input end of the second operational amplifier and one end of the second resistor are connected. The reverse input end of the second operational amplifier is the negative temperature coefficient voltage input end of the negative temperature coefficient current generating circuit. The other end of the second resistor is the ground end of the negative temperature coefficient current generating circuit.

6. A highly integrated high-performance bandgap reference circuit according to claim 2, characterized in that The resistor in the reference voltage generating circuit is called a third resistor. The reference voltage generating circuit further includes an eighth MOS tube and a ninth MOS tube. Both the eighth MOS tube and the ninth MOS tube are PMOS tubes. The source of the eighth MOS tube is connected to the source of the ninth MOS tube, and the connection end thereof is the power supply end of the reference voltage generating circuit. The gate of the eighth MOS tube is the negative temperature coefficient current input end of the reference voltage generating circuit. The drain of the eighth MOS tube and the drain of the ninth MOS tube are connected to one end of the third resistor, and the connection end thereof is the reference voltage output end of the reference voltage generating circuit, which is used to output the reference voltage. The gate of the ninth MOS tube is the positive temperature coefficient current input end of the reference voltage generating circuit. The other end of the third resistor is the grounding end of the reference voltage generating circuit.

7. A highly integrated high-performance bandgap reference circuit according to claim 2, characterized in that The temperature coefficient compensation circuit comprises a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube, a fifteenth MOS tube, a sixteenth MOS tube, a seventeenth MOS tube, an eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a twenty-first MOS tube, wherein the tenth MOS tube, the eleventh MOS tube, the twelfth MOS tube, the fifteenth MOS tube, the sixteenth MOS tube, the seventeenth MOS tube, the eighteenth MOS tube and the twenty-first MOS tube are all PMOS tubes, and the thirteenth MOS tube , the fourteenth MOS tube, the nineteenth MOS tube and the twentieth MOS tube are all NMOS tubes; the source of the tenth MOS tube, the source of the eleventh MOS tube, the source of the twelfth MOS tube, the source of the fifteenth MOS tube, the source of the sixteenth MOS tube, the source of the seventeenth MOS tube, the source of the eighteenth MOS tube and the source of the twenty-first MOS tube are connected, and the connection end thereof is the power supply end of the temperature coefficient compensation circuit, the gate of the tenth MOS tube, the gate and drain of the eleventh MOS tube, the drain of the twelfth MOS tube The drain of the thirteenth MOS tube is connected to the drain of the thirteenth MOS tube, the drain of the tenth MOS tube is connected to the drain of the sixteenth MOS tube, and the connection end thereof is the compensation current output end of the temperature coefficient compensation circuit; the gate of the twelfth MOS tube is connected to the gate of the twenty-first MOS tube, and the connection end thereof is the negative temperature coefficient current input end of the temperature coefficient compensation circuit; the source of the thirteenth MOS tube, the source of the fourteenth MOS tube, the source of the nineteenth MOS tube and the source of the twentieth MOS tube are connected, and the connection end thereof is the ground end of the temperature coefficient compensation circuit; The gate of the thirteenth MOS tube, the gate and drain of the fourteenth MOS tube, and the drain of the fifteenth MOS tube are connected, the gate of the fifteenth MOS tube is connected to the gate of the eighteenth MOS tube, and the connection end thereof is the positive temperature coefficient current input end of the temperature coefficient compensation circuit; the gate of the sixteenth MOS tube, the gate and drain of the seventeenth MOS tube, the drain of the eighteenth MOS tube, and the drain of the nineteenth MOS tube are connected, the gate of the nineteenth MOS tube, the gate and drain of the twentieth MOS tube, and the drain of the twenty-first MOS tube are connected.

8. A highly integrated high-performance bandgap reference circuit according to claim 4, characterized in that The first operational amplifier includes a twenty-second MOS tube, a twenty-third MOS tube, a twenty-fourth MOS tube, a twenty-fifth MOS tube, a twenty-sixth MOS tube, a twenty-seventh MOS tube, a twenty-eighth MOS tube, a twenty-ninth MOS tube, a thirtieth MOS tube, a thirty-first MOS tube and a thirty-second MOS tube. The twenty-second MOS tube, the twenty-third MOS tube, the twenty-fourth MOS tube, the twenty-fifth MOS tube, the twenty-sixth MOS tube, the twenty-seventh MOS tube and the twenty-eighth MOS tube are all PMOS tubes. The twenty-ninth MOS tube, the thirtieth MOS tube, the thirty-first MOS tube and the twenty-third MOS tube are all PMOS tubes. The thirty-second MOS tubes are all NMOS tubes, the source of the twenty-second MOS tube, the source of the twenty-fifth MOS tube and the source of the twenty-sixth MOS tube are connected, and the connection end is the power supply end of the first operational amplifier, the gate of the twenty-second MOS tube is the input current bias end of the first operational amplifier, the drain of the twenty-second MOS tube, the source of the twenty-third MOS tube and the source of the twenty-fourth MOS tube are connected, the gate of the twenty-third MOS tube is the positive input end of the first operational amplifier, the gate of the twenty-fourth MOS tube is connected to the reverse input end of the first operational amplifier, and the drain of the twenty-third MOS tube is connected to the reverse input end of the first operational amplifier. The gate of the twenty-fifth MOS tube, the gate of the twenty-sixth MOS tube, the drain of the twenty-seventh MOS tube and the drain of the twenty-ninth MOS tube are connected, the drain of the twenty-fifth MOS tube is connected to the source of the twenty-seventh MOS tube, the drain of the twenty-sixth MOS tube is connected to the source of the twenty-eighth MOS tube, the gate of the twenty-seventh MOS tube and the drain of the twenty-eighth MOS tube are connected, and the gate of the twenty-seventh MOS tube and the drain of the twenty-eighth MOS tube are connected. The gate of the twenty-eighth MOS tube is connected to the drain of the thirtieth MOS tube, and the connection end thereof is the first bias voltage end of the first operational amplifier; the drain of the twenty-eighth MOS tube is connected to the drain of the thirtieth MOS tube, and the connection end thereof is the output end of the first operational amplifier; the gate of the twenty-ninth MOS tube is connected to the gate of the thirtieth MOS tube, and the connection end thereof is the second bias voltage end of the first operational amplifier; the gate of the thirty-first MOS tube is connected to the gate of the thirty-second MOS tube, and the connection end thereof is the third bias voltage end of the first operational amplifier; the source of the thirty-first MOS tube is connected to the source of the thirty-second MOS tube, and the connection end thereof is the ground end of the first operational amplifier.

Images