Wafer preparation method and wafer

Abstract

The invention provides a wafer preparation method and a wafer, and the wafer preparation method comprises the following steps: the back surface of a to-be-processed wafer is subjected to multiple times of grinding and thinning step by step, only the middle part of the wafer is ground in each grinding step, and the edge part of the wafer is not ground; wherein the radial size of the grinding removal part in the next step is smaller than that of the grinding removal part in the previous step, and the edge size in the next step is larger than that in the previous step, so that multiple steps are formed on the edge part of the wafer.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor processing technology, and in particular relates to a wafer preparation method and a wafer. Background Art

[0002] Integrated circuit chips are constantly developing towards high density, high performance, lightness, thinness and compactness. To meet the high requirements of integrated circuit packaging (IC packaging), wafer backside thinning has become an important process in the second half of semiconductor manufacturing. With the application of large-diameter silicon wafers, the thickness of silicon wafers has also increased accordingly, and advanced packaging technology requires thinner silicon wafers. Ultra-precision grinding has been widely used as an important way to thin the back of silicon wafers.

[0003] The Taiko thinning process is a currently commonly used ultra-thin wafer thinning process. It only grinds the center of the wafer and retains the edge of the wafer to form a ring. The ring can support the thinned part of the wafer in the middle, thereby improving the overall stiffness of the wafer, reducing warping deformation, and reducing the risk of wafer fragmentation.

[0004] However, the Taiko thinning process requires multiple thinning steps. Figure 1 The lower end face of the grinding wheel starts to feed the processed wafer from the first step starting point 11 to the first step end point 12. In the second step, the lower end face of the grinding wheel starts to feed the processed wafer from the first step end point (i.e., the second step starting point) 12 to the second step end point 13. Figure 1 The dotted line in the figure indicates a grinding wheel with insufficient centering accuracy. When the centering accuracy of the grinding wheel is insufficient, the margin left in the previous thinning process will interfere with the next thinning process. A indicates the interference position, which leads to processing failure. In addition, the step position of the margin left between different processes is prone to cause stress concentration, making the wafer easy to break after thinning. Summary of the invention

[0005] The present application aims to provide a wafer preparation method to solve the interference problem between multiple processes of preparing wafers.

[0006] The present application proposes a wafer preparation method, comprising the following steps:

[0007] The back side of the wafer to be processed is ground and thinned multiple times in steps. Each grinding step only grinds the middle part of the wafer, without grinding the edge of the wafer.

[0008] The radial dimension of the portion removed by grinding in the latter step is smaller than that of the portion removed by grinding in the former step, and the margin dimension of the latter step is larger than that of the former step, thereby forming multiple steps at the edge of the wafer.

[0009] In at least one possible embodiment, in the multi-step grinding process, the thinning thickness y of the last step is n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤1.

[0010] In at least one possible embodiment, in the multi-step grinding process, the thinning thickness y of the last step is n Less than or equal to 0.2 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤0.2.

[0011] In at least one possible embodiment, in the multi-step grinding process, the thinning thickness y of the last step is n Equal to 0.05 times the final thickness h of the wafer.

[0012] In at least one possible embodiment, in the multi-step grinding process, the thinning thickness y of the last step is n Greater than or equal to 1 micron.

[0013] In at least one possible embodiment, in the multi-step grinding process, the thinning thickness y of each step is 1 To n Same or different.

[0014] In at least one possible implementation, in each step of the grinding process, the margin size is greater than the centering accuracy of the equipment.

[0015] In at least one possible embodiment, in the multi-step grinding process, the processing parameters are adjusted before each grinding.

[0016] The processing parameters include grinding wheel mesh size, grinding wheel rotation speed, wafer rotation speed, grinding wheel feed speed, and margin size.

[0017] In at least one possible implementation manner, after each grinding process, the step and the transition portion of the wafer are chamfered, and then the next grinding process is performed.

[0018] The present application also proposes a wafer, which includes a first surface and a second surface, the first surface is used to form a chip pattern, the second surface is opposite to the first surface, the second surface is thinned to form a recessed portion in the central area, and a margin protruding relative to the recessed portion is formed at the edge of the wafer, the margin surrounds the recessed portion, and the margin is formed into a step shape that gradually thickens from the central area to the outside, and the margin has at least two steps.

[0019] In at least one possible embodiment, the wafer has a final wafer thickness h in the central region, and a thickness y of the step of the margin adjacent to the central region n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤1, preferably 0.02≤y n / h≤0.2, more preferably y n / h=0.05.

[0020] By adopting the above technical solution, the radial dimension of the part removed by the latter grinding process is smaller than the radial dimension of the part removed by the former grinding process, thereby forming multiple steps at the edge of the wafer to avoid interference problems that may occur during grinding and thinning. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram showing a possible wafer thinning process.

[0022] Figure 2 A schematic structural diagram of an intermediate product of a wafer manufactured by a wafer preparation method according to an embodiment of the present application is shown.

[0023] Figure 3 A schematic diagram showing the relationship between the step thickness and maximum stress of an intermediate product of a wafer manufactured by a wafer preparation method according to an embodiment of the present application is shown.

[0024] Figure 4 A schematic diagram showing the step thickness and stress concentration position of an intermediate product of a wafer manufactured by a wafer preparation method according to an embodiment of the present application is shown.

[0025] Figure 5 A flow chart of a wafer preparation method according to an embodiment of the present application is shown.

[0026] Description of Reference Numerals

[0027] 1 Wafer to be processed

[0028] 11 The first step starting point 12 The first step end point 13 The second step end point DETAILED DESCRIPTION

[0029] In order to more clearly explain the above-mentioned purposes, features and advantages of the present application, the specific implementation methods of the present application are described in detail in this section in conjunction with the accompanying drawings. In addition to the various implementation methods described in this section, the present application can also be implemented in other different ways. Without violating the spirit of the present application, those skilled in the art can make corresponding improvements, deformations and substitutions, so the present application is not limited by the specific embodiments disclosed in this section. The scope of protection of the present application shall be subject to the claims.

[0030] like Figures 2 to 5 As shown, an embodiment of the present application proposes a wafer preparation method, which includes the following steps.

[0031] S1, affixing a film on the front side (first surface) of the wafer 1 to be processed and loading and fixing it to the processing position of the thinning equipment, preparing to thin the back side of the wafer to be processed. The front side (first surface) of the wafer 1 is used to form a chip pattern.

[0032] S2, performing a thinning operation on the entire area of ​​the back side (second surface) of the wafer 1 to be processed, so that the thickness of the wafer to be processed is thinned to a predetermined initial thickness H, where the value of H can be 500 to 750 microns, and the wafer to be processed is formed into a sheet with a thickness of H. The wafer to be processed can be thinned using an existing conventional thinning method.

[0033] S3. According to the actual processing conditions such as the material of the grinding wheel and the thinning equipment, select appropriate processing parameters. The processing parameters include grinding wheel mesh, grinding wheel speed, wafer speed, feed speed, margin size, etc.

[0034] S4. The thinning device moves the grinding wheel downward at a predetermined feed speed to contact the central area of ​​the back side of the wafer to be processed, so that the grinding wheel grinds the central area of ​​the back side of the wafer, and the grinding wheel does not grind the edge of the wafer, thereby forming a raised step (margin) at the edge of the wafer. The middle part of the back side of the wafer removed by grinding can be circular. Of course, the present application does not limit the shape of the part removed by grinding, and the part removed by grinding can also be other shapes. The material of the edge part of the back side of the wafer is retained according to the predetermined margin size. The margin size x can be controlled by controlling the axis position of the grinding wheel. 1 , the margin size refers to the size of the margin in the radial direction of the wafer, and the feed rate of the grinding wheel is y 1 The feed rate indicates the thickness of the margin (i.e. the depth of the depression formed by the grinding wheel on the wafer).

[0035] S5. Change the processing parameters according to the actual processing conditions such as the material of the grinding wheel and the thinning equipment. The processing parameters include the grinding wheel mesh, grinding wheel speed, wafer speed, grinding wheel feed speed, margin size, etc.

[0036] The thinning equipment moves the grinding wheel downward at a predetermined feed speed to contact the center area of ​​the back side of the wafer to be processed, so that the grinding wheel grinds the center area of ​​the back side of the wafer, and does not grind the edge of the wafer. The feed amount of the grinding wheel is y 2 , that is, the height (thickness) of the second step is y 2 . Control the edge size x by controlling the axis position of the grinding wheel 2 , the margin size of the next step is larger than the margin size of the previous step, that is, the margin size x 2 Larger than margin size x 1 The size difference between the two adjacent margins is greater than the centering accuracy of the thinning equipment, that is, x 2 -x 1 Greater than the centering accuracy of the thinning equipment. The margin size of each step is greater than the centering accuracy of the thinning equipment. Here, the centering accuracy refers to the deviation between the axis of the grinding wheel and the axis of the wafer, which is the error within the allowable range of the equipment.

[0037] S6, repeat S5. A total of n thinning steps are required, and n can be 2 to 6 times. Figure 2 In the structural diagram shown, n is 5. S5 is executed n-1 times. In S5 and S6, the feed amount each time is y 2 ...y n-1 , the margin dimensions are x 2 ....x n-1 It can be understood that the subscripts of the feed rate x and the margin size y represent the number of thinning processes.

[0038] S7. Change the processing parameters according to the actual processing conditions such as the material of the grinding wheel and the thinning equipment. The processing parameters include the grinding wheel mesh, grinding wheel speed, wafer speed, grinding wheel feed speed, margin size, etc.

[0039] Control the edge size x by controlling the axis position of the grinding wheel n , the margin size of the last thinning is larger than the margin size of the previous thinning, that is, the margin size x n Larger than margin size x n-1 .

[0040] from Figure 3 It can be seen that in the last thinning process, the step height of the edge can be as small as possible. For example, the thinning thickness in the last step can be less than or equal to 1 times the final center thickness h of the wafer, and greater than or equal to 0.02 times the final center thickness h of the wafer, that is, 0.02≤y n / h≤1.

[0041] Furthermore, the thinning thickness in the last step can be less than or equal to 0.2 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤0.2.

[0042] Optionally, the thinning thickness in the last step may be equal to 0.05 times the final thickness h of the wafer.

[0043] Figure 3 The figure shows the comparison of the maximum stress of the wafer and the stress at the last step under the same external load conditions. Figure 3 The horizontal axis represents the ratio of the thickness of the last step to the final center thickness h of the wafer, and the vertical axis represents the value of the maximum stress in megapascals (MPa). Figure 3 In the figure, the solid line L1 represents the maximum stress of the entire wafer, which may appear on the last step (nth step) or the second to last step (n-1th step). The dotted line L2 represents the maximum stress of the last step (nth step) of the wafer, which only reflects the stress of the thinnest area of ​​the wafer, and does not consider the stress at other steps. Figure 3 It can be seen that this application makes 0.02≤y n / h≤1, the maximum stress position of the wafer can be avoided from the last step, so that the influence of stress on the last step of the wafer is relatively small.

[0044] Figure 4 Figure 2 shows the location distribution of the maximum stress on the wafer under the same external load conditions. Figure 4 In the coordinate system, when the ordinate is positive, it means that the maximum stress of the entire wafer occurs at the last step ( Figure 2 When the ordinate is negative, it means that the maximum stress of the entire wafer occurs at the last step ( Figure 2 The line L3 formed by connecting multiple rectangular points represents a wafer with a radial width of 0.06 microns at the last step, and the line L4 formed by connecting multiple circular points represents a wafer with a radial width of 0.02 microns at the last step.

[0045] from Figure 4 It can be seen that by controlling the ratio of the thinning thickness in the last step and the final thickness of the wafer within a certain range, the position of the maximum stress of the entire wafer can be avoided as much as possible from the last step, and the maximum stress of the entire wafer can appear on the radial outside of the last step, so that the stress has less impact on the central area of ​​the wafer and the thinned wafer is not easy to break.

[0046] The thinning process will cause damage to the wafer. The thickness of the damaged layer is determined by process parameters such as the grinding wheel mesh, grinding wheel speed, and feed speed. The maximum thickness of the damaged layer is usually less than 1 micron.

[0047] Furthermore, in the final thinning step, the feed amount y of the grinding wheel in the thickness direction of the wafer is n Greater than the spindle feed accuracy, for example, the grinding wheel feed amount y in the thickness direction of the wafer n Greater than or equal to 1 micron to remove the damaged layer.

[0048] In each grinding step, the thickness y is reduced 1 To n Can be the same or different.

[0049] Furthermore, after each thinning step, the transition portion of the wafer between the step and the bottom of the step (e.g. Figure 2 The part indicated by B in the figure is chamfered (including rounded corners) and then the next thinning process is carried out. In this way, chamfering the transition part of each step can reduce stress concentration.

[0050] The present application also proposes a wafer, which includes a first surface and a second surface, wherein the first surface is used to form a chip pattern, and the second surface is opposite to the first surface. The second surface is thinned to form a concave portion in the central area, and a margin protruding relative to the concave portion is formed at the edge of the circle, and the margin surrounds the concave portion. The margin is formed in a step-like shape that gradually thickens from the central area to the outside, and the margin has at least two steps.

[0051] The wafer has a final wafer thickness h in the center region and a thickness y of the step adjacent to the center region in the margin. n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤1, preferably 0.02≤y n / h≤0.2, more preferably y n / h=0.05.

[0052] It should be understood that at least some aspects or features of the above-mentioned implementation modes, embodiments or examples may be appropriately combined.

[0053] It is understood that in the present application, when the number of parts or components is not particularly limited, the number may be one or more, and the multiple here means two or more. For the case where the number of parts or components shown in the drawings and / or described in the specification is a specific number such as two, three, four, etc., the specific number is usually exemplary and not restrictive, and it can be understood as multiple, that is, two or more, but this does not mean that the present application excludes the case of one.

[0054] In the present application, unless otherwise clearly stated or limited, the terms such as "install", "assemble", "assemble", "connect", "connect", "couple", "link", "abut", "connect", "interconnect", "intercommunication", "conduction", "fixation", "fastening" and the like should be understood in a broad sense, for example, they can be direct or indirect. For example, regarding connection, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly stated or limited. For example, regarding connectivity / conduction, it can be direct connectivity / conduction, or it can be indirect connectivity / conduction via an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0055] In the present application, unless otherwise clearly stated or limited, a component disposed on / installed on / located on / accommodated on / placed in, within, inside, etc. another component may be any of the following two situations: a part or most of the one component is located in the other component; and the one component is completely accommodated in the other component.

[0056] Although the present application is described in detail using the above-mentioned embodiments, it is obvious to those skilled in the art that the present application is not limited to the embodiments described in this specification. The present application can be modified and implemented as a modified embodiment without departing from the subject matter and scope of the present application as determined by the claims. Therefore, the description in this specification is for the purpose of illustration and does not have any restrictive meaning for the present application.

Claims

1. A wafer preparation method, characterized in that: The following steps are involved: The back side of the wafer to be processed is ground and thinned multiple times in steps. Each grinding step only grinds the middle part of the wafer, without grinding the edge of the wafer. The radial dimension of the portion removed by grinding in the latter step is smaller than that of the portion removed by grinding in the former step, and the margin dimension of the latter step is larger than that of the former step, thereby forming multiple steps at the edge of the wafer.

2. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the thinning thickness y in the last step is n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤1.

3. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the thinning thickness y in the last step is n Less than or equal to 0.2 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤0.

2.

4. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the thinning thickness y in the last step is n Equal to 0.5 times the final thickness h of the wafer.

5. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the thinning thickness y in the last step is n Greater than or equal to 1 micron.

6. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the thinning thickness of each step is y1 to y n Same or different.

7. The wafer preparation method according to claim 1, characterized in that: In each step of the grinding process, the margin size is greater than the centering accuracy of the equipment.

8. The wafer preparation method according to claim 1, characterized in that: In the multi-step grinding process, the processing parameters are adjusted before each grinding. The processing parameters include grinding wheel mesh size, grinding wheel rotation speed, wafer rotation speed, grinding wheel feed speed, and margin size.

9. The wafer preparation method according to claim 1, characterized in that: After each grinding process, the step and the transition portion of the wafer are chamfered, and then the next grinding process is performed.

10. A wafer, characterized in that: The wafer includes a first surface and a second surface, the first surface is used to form a chip pattern, the second surface is opposite to the first surface, the second surface is thinned to form a recessed portion in the central area, and a margin protruding relative to the recessed portion is formed at the edge of the wafer, the margin surrounds the recessed portion, and the margin is formed in a step shape that gradually thickens from the central area to the outside, and the margin has at least two steps.

11. The wafer according to claim 10, wherein: The wafer has a final wafer thickness h in the central region, and a thickness y of the step of the margin adjacent to the central region. n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, that is, 0.02≤y n / h≤1, preferably 0.02≤y n / h≤0.2, more preferably y n / h=0.05.

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