Peak current sampling circuit suitable for DC / DC converter with wide load range

Abstract

The invention discloses a peak current sampling circuit suitable for a DC / DC converter with a wide load range, and belongs to the field of switching power supply DC / DC converter control. The circuit comprises a power PMOS switch tube P1, a power NMOS tube N1, an inductor L1, a sensing resistor RS, a sensing capacitor CS, an output capacitor COUT, divider resistors RFB1 and RFB2, a sampling circuit, a low-pass filter, a differential amplifier, an adder / subtractor, a transconductance amplifier, a compensation resistor RC, a compensation capacitor CC, a PWM comparator, a slope compensation circuit, an oscillator, an RS trigger and a logic and driving circuit. An equivalent series resistor DCR of an inductor is utilized, and a low-pass RC sensing network is connected to two ends of the inductor in parallel to sense an inductive current, so that power consumption caused by a traditional sampling resistor RSENSE is eliminated, and the efficiency of the DC / DC converter is improved; through reasonable arrangement of the values of the sensing resistor RS and the sensing capacitor CS and an internal signal processing circuit, an inductance ripple current signal is amplified on the basis of retaining the inductance average current, the sampling signal-to-noise ratio is improved, and noise interference is reduced.

Description

Technical Field

[0001] The invention relates to the technical field of switching power supply DC / DC converter control, and in particular to a peak current sampling circuit suitable for a DC / DC converter with a wide load range. Background Art

[0002] In a switching power converter, especially a synchronous step-down DC / DC converter, the conventional technology is to use a peak current mode and a voltage mode to perform a dual loop control of the DC / DC converter switch. Figure 1 The figure shows the schematic diagram of the DC / DC converter of the traditional peak current sampling method. The peak current sampling is implemented by connecting a small sampling resistor R in series on the path of the inductor L1. SENSE The current flowing through the sampling resistor represents the inductor current in real time. The sampling circuit receives the sampling resistor R SENSE The differential signal at both ends can be sampled and amplified to obtain the peak current signal. However, as the demand for load current increases, the sampling resistor R SENSE The power consumption will affect the efficiency of the DC / DC converter. Therefore, it is hoped that a very small sampling resistor (for example, less than 1mΩ) can be used to reduce the power consumption of the resistor. However, in engineering applications, the R SENSE It is difficult to implement, and the differential signal sampled across a very small resistor is easily affected by noise. A low signal-to-noise ratio will cause errors in the sampling signal, thereby causing false triggering of the PWM comparator, resulting in increased jitter and ripple in the output voltage VOUT. Summary of the invention

[0003] The object of the present invention is to provide a peak current sampling circuit suitable for a DC / DC converter with a wide load range, so as to solve the problem that the converter of the traditional technology has low efficiency and is susceptible to interference by noise signals.

[0004] In order to solve the above technical problems, the present invention provides a peak current sampling circuit suitable for a DC / DC converter with a wide load range, comprising: a power PMOS switch tube P1, a power NMOS tube N1, an inductor L1, a sensing resistor R S , sensing capacitor C S , output capacitor C OUT , voltage divider resistor R FB1 , R FB2 , sampling circuit, low-pass filter, differential amplifier, adder / subtractor, transconductance amplifier, compensation resistor R C , compensation capacitor C C , PWM comparator, slope compensation circuit, oscillator, RS trigger, logic and drive circuit;

[0005] The source of the power PMOS switch tube P1 is connected to the power source VIN, the drain is interconnected with the drain of the power NMOS switch tube N1, and is connected to the first input end of the inductor L1, the source of the power NMOS switch tube N1 is grounded, and the gate of the power PMOS switch tube P1 and the gate of the power NMOS switch tube N1 receive signals from the logic and drive circuit respectively;

[0006] The second input terminal of the inductor L1 and the output capacitor C OUT The first input terminal is connected to the output VOUT of the DC / DC converter, and the output capacitor C OUT The second input terminal of the sensing resistor R S and the sensing capacitor C S Connected in series across the two ends of the inductor L1; the voltage divider resistor R FB1 and R FB2 Connect in series between VOUT and ground;

[0007] Voltage divider resistor R FB1 and R FB2 Series connection nodes V FB The signal is connected to the negative input of the transconductance amplifier, and the positive input of the transconductance amplifier is the reference voltage V REF , the output of the transconductance amplifier is connected to the compensation resistor R C The first input terminal, compensation resistor R C The second input terminal is connected to the compensation capacitor C C The first input terminal, compensation capacitor C C The second input terminal is grounded;

[0008] The input of the sampling circuit receives the sensing capacitor C S The first input terminal V SP signal and the second input V SN signal, while V SP and V SN The signal is used as the input of the low-pass filter, the output of the low-pass filter is connected to the differential amplifier, the output of the differential amplifier and the output of the sampling circuit are connected to the first input end of the PWM comparator after being superimposed by the adder / subtractor signal, the second input end of the PWM comparator is the superposition of the transconductance amplifier output and the slope compensation output through another adder / subtractor signal, the output of the PWM comparator is connected to the R end of the RS trigger, the S end of the RS trigger receives the output signal of the oscillator, and the Q end of the RS trigger is connected to the logic and drive circuit.

[0009] The present invention provides a peak current sampling circuit suitable for a DC / DC converter with a wide load range. The circuit uses the equivalent series resistance DCR of the inductor itself and adopts a low-pass RC sensing network connected in parallel at both ends of the inductor to sense the inductor current, thereby eliminating the traditional sampling resistor R SENSEThe power consumption caused by this can improve the efficiency of the DC / DC converter; by properly setting the sensing resistor R S and the sensing capacitor C S The value and internal signal processing circuit amplify the inductor ripple current signal while retaining the average current of the inductor, thereby improving the sampling signal-to-noise ratio and reducing noise interference. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a schematic diagram of the DC / DC converter structure of a traditional peak current sampling method;

[0011] Figure 2 The present invention provides a DC / DC converter structure diagram suitable for a peak current sampling method with a wide load range. DETAILED DESCRIPTION

[0012] The following is a further detailed description of a peak current sampling circuit for a DC / DC converter with a wide load range proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0013] The present invention proposes a peak current sampling circuit suitable for a DC / DC converter with a wide load range, and its structure is as follows: Figure 2 As shown, it includes a power PMOS switch tube P1, a power NMOS tube N1, an inductor L1, a sensing resistor R S , sensing capacitor C S , output capacitor C OUT , voltage divider resistor R FB1 , R FB2 , sampling circuit, low-pass filter, differential amplifier, adder / subtractor, transconductance amplifier, compensation resistor R C , compensation capacitor C C , PWM comparator, slope compensation circuit, oscillator, RS trigger, logic and drive circuit.

[0014] The source of the power PMOS switch tube P1 is connected to the power supply VIN, the drain is interconnected with the drain of the power NMOS switch tube N1, and is connected to the first input end of the inductor L1. The source of the power NMOS switch tube N1 is grounded, and the gate of the power PMOS switch tube P1 and the gate of the power NMOS switch tube N1 receive signals from the logic and drive circuit respectively. The second input end of the inductor L1 is connected to the output capacitor C OUT The first input terminal is connected to the output VOUT of the DC / DC converter, and the output capacitor C OUT The second input terminal of is grounded. The sensing resistor R Sand the sensing capacitor C S Connected in series across the two ends of the inductor L1. FB1 and R FB2 Connected in series between VOUT and ground, the voltage divider resistor R FB1 and R FB2 Series connection nodes V FB The signal is connected to the negative input of the transconductance amplifier, and the positive input of the transconductance amplifier is the reference voltage V REF , the output of the transconductance amplifier is connected to the compensation resistor R C The first input terminal, compensation resistor R C The second input terminal is connected to the compensation capacitor C C The first input terminal, compensation capacitor C C The second input terminal of is grounded.

[0015] The input of the sampling circuit receives the sensing capacitor C S The first input terminal V SP signal and the second input V SN signal, while V SP and V SN The signal is used as the input of the low-pass filter, the output of the low-pass filter is connected to the differential amplifier, the output of the differential amplifier and the output of the sampling circuit are connected to the first input end of the PWM comparator after being superimposed by the adder / subtractor signal, the second input end of the PWM comparator is the superposition of the transconductance amplifier output and the slope compensation output through the adder / subtractor signal, the output of the PWM comparator is connected to the R end of the RS trigger, the S end of the RS trigger receives the output signal of the oscillator, and the Q end of the RS trigger is connected to the logic and drive circuit.

[0016] In this embodiment, the DCR sampling technology is used to sense the current flowing through the inductor in real time. For a wide load range DC / DC converter, the inductor equivalent series resistance DCR can generally be less than 0.5mΩ. S and the sensing capacitor C S The value of the sensing capacitor C S The voltage across the two ends can represent the DCR voltage drop of the inductor, which plays the role of peak current detection and eliminates the power consumption of the sampling resistor. The general method is to configure the sensing resistor R S and the sensing capacitor C S The time constant of the inductor L is equal to the time constant of the DCR, that is, R S ×C S =L / DCR, V CS =V DCR =I L ×DCR;V CS is the sensing capacitor C S The voltage drop across the terminals, V DCRis the voltage drop across the inductor equivalent series resistance DCR, I L is the current flowing through the inductor. However, although this general configuration method can solve the power consumption problem, it still has the problem of noise interference, because V DCR In this embodiment, R S ×C S =N×L / DCR (for example, N=5), so that V CS =N×V DCR =N×I L ×DCR, amplifying the inductor current signal so that the sampled peak current signal will not be interfered by noise, and the signal-to-noise ratio will be improved by (20logN)dB (if N=5, it will be improved by 14dB). Due to the amplification of the inductor current signal, the current loop gain of the DC / DC converter will be larger, resulting in the transconductance amplifier output V COMP To avoid the risk of clamping, a low-pass filter and a K-fold differential amplifier are added.

[0017] In this embodiment, the sensing capacitor C S After the voltage at both ends passes through the low-pass filter, only the average current of the inductor, that is, the load current, is retained. After K times differential amplification, the output is K×I O ×DCR, where I O is the load current. By properly designing the K value (for example, when N is 5, K can be 4), the output of the sampling circuit is subtracted from the output of the differential amplifier to achieve (N×I L -K×I O )×DCR. It can be seen that after subtraction, the actual sampling value retains the average current of the inductor while amplifying the inductor ripple signal, achieving the effect of peak current sampling, while not making the sampling signal too large to cause the transconductance amplifier output V COMP On the other hand, the switching noise of DC / DC will also be filtered out by the low-pass filter, making the sampling signal more accurate.

[0018] It can be seen that the traditional sampling resistor R is eliminated by DCR sampling technology. SENSE The power consumption caused by this can improve the efficiency of the DC / DC converter; by properly setting the sensing resistor R S and the sensing capacitor C S The time constant of the inductor is matched with the low-pass filter and the differential amplifier to amplify the inductor ripple current signal while retaining the average current of the inductor, thereby improving the sampling signal-to-noise ratio and reducing noise interference.

[0019] In the present invention, words such as “connect”, “connected”, “connected”, “connected”, etc. indicate electrical connection, and unless otherwise specified, indicate direct or indirect electrical connection.

[0020] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A peak current sampling circuit suitable for a DC / DC converter with a wide load range, characterized in that: include: Power PMOS switch tube P1, power NMOS tube N1, inductor L1, sensing resistor R S , sensing capacitor C S , output capacitor C OUT , voltage divider resistor R FB1 , R FB2 , sampling circuit, low-pass filter, differential amplifier, adder / subtractor, transconductance amplifier, compensation resistor R C , compensation capacitor C C , PWM comparator, slope compensation circuit, oscillator, RS trigger, logic and drive circuit; The source of the power PMOS switch tube P1 is connected to the power source VIN, the drain is interconnected with the drain of the power NMOS switch tube N1, and is connected to the first input end of the inductor L1, the source of the power NMOS switch tube N1 is grounded, and the gate of the power PMOS switch tube P1 and the gate of the power NMOS switch tube N1 receive signals from the logic and drive circuit respectively; The second input terminal of the inductor L1 and the output capacitor C OUT The first input terminal is connected to the output VOUT of the DC / DC converter, and the output capacitor C OUT The second input terminal of the sensing resistor R S and the sensing capacitor C S Connected in series across the two ends of the inductor L1; the voltage divider resistor R FB1 and R FB2 Connect in series between VOUT and ground; Voltage divider resistor R FB1 and R FB2 Series connected nodes V FB The signal is connected to the negative input of the transconductance amplifier, and the positive input of the transconductance amplifier is the reference voltage V REF , the output of the transconductance amplifier is connected to the compensation resistor R C The first input terminal, compensation resistor R C The second input terminal is connected to the compensation capacitor C C The first input terminal, compensation capacitor C C The second input terminal is grounded; The input of the sampling circuit receives the sensing capacitor C S The first input terminal V SP signal and the second input V SN signal, while V SP and V SN The signal is used as the input of the low-pass filter, the output of the low-pass filter is connected to the differential amplifier, the output of the differential amplifier and the output of the sampling circuit are connected to the first input end of the PWM comparator after being superimposed by the adder / subtractor signal, the second input end of the PWM comparator is the superposition of the transconductance amplifier output and the slope compensation output through another adder / subtractor signal, the output of the PWM comparator is connected to the R end of the RS trigger, the S end of the RS trigger receives the output signal of the oscillator, and the Q end of the RS trigger is connected to the logic and drive circuit.

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