High-precision navigation clock frequency module

Abstract

The invention discloses a high-precision navigation clock frequency module, which relates to the technical field of time service positioning and comprises a receiver module, a multi-source time difference measurement unit, an operation processing unit, a frequency scale signal generation unit and a time code generation unit. Through the highly integrated modular design, the area and the cost of the frequency module are reduced; considering that a synchronization error between a second signal output by a timing system device and an external synchronization second is an important index of the timing system device, the time interval automatic measurement function can continuously measure and monitor the synchronization error between the external synchronization second and the second signal output by the timing system device. And high-precision synchronization among the devices in the system can be better realized. According to the invention, the clock precision in the system can be improved by effectively switching the reference source mode.

Description

Technical Field

[0001] The invention relates to the technical field of timing and positioning, and in particular to a high-precision navigation clock frequency module. Background Art

[0002] At present, the timekeeping equipment in the industry mainly relies on the crystal oscillator or rubidium clock's own ability to keep time without compensation; uses temperature compensated crystal oscillators to improve the temperature characteristics of the crystal oscillator; simple aging learning is used for aging compensation; the temperature characteristics of the crystal oscillator are tested through high and low temperature tests and stored inside the crystal oscillator for users to compensate during the timekeeping stage; and precise compensation is performed by temperature and aging learning of the crystal oscillator or rubidium clock in a tamed state. The above four methods are basically at the primary stage of understanding, and the root of the problem has not been found. The compensation effect is extremely limited, and the improvement effect is not obvious.

[0003] Traditional multi-reference switching generally uses a timeout detection method, where the main reference is invalid > the backup reference is effective > switching, and the switching time is long. At the same time, there will be a certain frequency difference and phase difference between the main reference and the backup reference. During the reference switching process, the system frequency and phase will have a certain range of jitter. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a high-precision navigation clock frequency module to achieve high-precision synchronization between devices in a system in a long-distance non-communication mode.

[0005] The objective of the present invention is achieved through the following technical solutions: A high-precision navigation clock frequency module, comprising: a receiver module, a multi-source time difference measurement unit, an operation processing unit, a frequency standard signal generation unit, and a time code generation unit; The receiver module is connected to the multi-source time difference measurement unit and the operation processing unit, and is used to receive Beidou or GPS satellite signals, restore stable 1PPS second pulse signals, TOD timing signals and positioning information according to the satellite signals, and output them to the multi-source time difference measurement unit and the operation processing unit; The multi-source time difference measurement unit is connected to the operation processing unit and the frequency standard signal generation unit, and is used to select the reference source mode according to the configuration, measure the time difference between multiple reference source signals and the local clock in real time, generate a crystal oscillator voltage control output to the frequency standard signal generation unit according to the time difference measurement result, and calibrate the local OCXO to adjust the local time; the reference source signal includes Beidou satellite signal and 1pps+TOD signal; The operation processing unit is also connected to the time code generation unit, and is used to perform digital signal encoding and decoding processing on the time signal provided by the multi-source time difference measurement unit according to the 1PPS second pulse signal provided by the receiver module, and transmit the decoded time signal to the time code generation unit; The frequency standard signal generating unit is used to generate multiple 100MHz high-stability and low-noise frequency standard signals, and select one of the frequency standard signals as a reference source signal of the operation processing unit; The time code generating unit is used to generate multiple 1pps signals and serial time codes according to the decoded time signal.

[0006] Furthermore, it also includes a timekeeping unit, which includes a real-time clock RTC and a battery. When the external reference is valid and the local rubidium clock RB is calibrated, the real-time clock RTC is calibrated to achieve timekeeping; when the reference is invalid, the rubidium clock RB is used for high-precision timekeeping; Among them, the battery is used for backup after the system is powered off to ensure that the real-time clock RTC continues to maintain the local time, and when the power is on again, it quickly provides a time source for the system.

[0007] Furthermore, the frequency standard signal generating unit includes a crystal oscillator module, a zone amplifier circuit and a power division circuit. The crystal oscillator module is a 100M constant temperature crystal oscillator, which is used to generate a 100MHz signal. The zone amplifier circuit is used to power amplify the output of the crystal oscillator module. The power division circuit is used to power divide the amplified signal to generate three 100MHz low-noise frequency standard signals.

[0008] Further, the multi-source time difference measurement unit includes a phase-locked loop circuit, a TDC circuit, and a CPU control circuit connected in sequence; The phase-locked loop circuit uses the LMK04832 phase-locked loop chip to output three reference clocks, which can provide three reference sources to the external interface; The TDC circuit is used to measure the time difference between each external reference and the local clock in real time; The CPU control circuit uses a single chip microcomputer for reference source mode switching control, and is also used to generate crystal oscillator voltage control according to the time difference measurement result of the TDC circuit, calibrate the local OCXO, and adjust the local time; it is also used for 1pps+TOD time code generation.

[0009] Furthermore, it also includes a power conversion circuit, which uses a 12V power supply as an input voltage, outputs 1.8V, 2.5V, 3.3V, and 4V voltages through a LOD power conversion chip, and outputs 3.3V and 5V voltages to provide to the phase-locked loop circuit.

[0010] Further, the CPU control circuit includes a coding control circuit, a timing signal generating circuit, a B (AC) code generating circuit, a programmable phase shift circuit, an external second signal and a switching module; The encoding control circuit realizes the mode configuration of the operation processing unit, LMK04832 phase-locked loop chip, and TDC circuit through SPI communication; the timing signal generation circuit realizes precise control of time through counting and interruption, receives the clock signal of the system clock for counting, and when the count reaches a certain threshold, the timer generates an interrupt request to the CPU for processing; the B (AC) code generation circuit receives the serial port information of the receiver to generate a time code signal and transmits it to the TDC to realize the time difference measurement between the internal time and the external reference source; the external second signal switching module receives the 1PPS second pulse of the operation processing unit and the 1PPS second pulse signal output by the receiver, and can realize the selection of different second pulses under different reference sources.

[0011] Furthermore, the reference source mode includes an external reference mode, an internal reference mode, and a navigation timing mode; When there is an external reference input, it enters the external reference mode, and the CPU control circuit automatically detects the presence and frequency of the external reference input signal, and uses the external reference input signal with a frequency of 10MHz or 100MHz as the reference source; When the external reference is not connected and the navigation lock or timekeeping mode is not entered, the internal reference mode is entered, and the CPU control circuit automatically loads the DAC setting data stored when the crystal oscillator module was calibrated last time, and uses the clock signal output by the internal crystal oscillator module as the reference source; When the external reference is not connected and the navigation is locked, the navigation timing mode is entered and the 1PPS pulse-per-second signal received by the receiver module is used as the reference source.

[0012] Furthermore, after entering the navigation timing mode, the CPU control circuit automatically records the DAC control number and UTC time every 20 minutes of continuous operation; the DAC control number and UTC time are used to set the VC control voltage of the reference clock OCXO when the power is turned on again, and in the internal reference source mode, the control voltage is used to calibrate the OCXO frequency accuracy in a short time, and the date and time of the latest OCXO calibration are read out.

[0013] Furthermore, it also includes a QSTACK connector, which is used to input an external signal through the GPIO port. When the external signal is a switch signal, it is used to force the reference source mode to switch; when the external signal is a PPS second signal, it is used to tame the crystal oscillator module and enter the external PPS tame mode.

[0014] Furthermore, the arithmetic processing unit specifically adopts an FPGA integrated circuit.

[0015] The beneficial effects of the present invention are: The present invention reduces the area and cost of the frequency module through a highly integrated modular design; considering that the synchronization error between the second signal output by the time system device and the external synchronization second is an important indicator of the time system device, the automatic time interval measurement function can continuously measure and monitor the synchronization error between the external synchronization second and the second signal output by the time system device, which can better achieve high-precision synchronization between various devices in the system. The present invention can also ensure that the accuracy of the clock inside the system is improved by effectively switching the reference source mode. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is the hardware schematic diagram of the high-precision navigation clock frequency module; Figure 2 This is the hardware solution block diagram of the high-precision navigation clock frequency module; Figure 3 This is the test result of long-distance relative synchronization accuracy of high-precision navigation clock frequency module. DETAILED DESCRIPTION

[0017] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0018] See also Figure 1-Figure 3 , the present invention provides a technical solution: like Figure 1 , a high-precision navigation clock frequency module, comprising: a receiver module, a multi-source time difference measurement unit, an operation processing unit, a frequency standard signal generation unit, and a time code generation unit; The receiver module is connected to the multi-source time difference measurement unit and the operation processing unit, and is used to receive Beidou or GPS satellite signals, restore stable 1PPS second pulse signals, TOD timing signals and positioning information according to the satellite signals, and output them to the multi-source time difference measurement unit and the operation processing unit; the receiver module can support a positioning accuracy better than 10m, and also supports high-precision RTK differential data output and calibration.

[0019] The multi-source time difference measurement unit is connected to the operation processing unit and the frequency standard signal generation unit, and is used to select the reference source mode according to the configuration, measure the time difference between multiple reference source signals and the local clock in real time, generate a crystal oscillator voltage control output to the frequency standard signal generation unit according to the time difference measurement result, and calibrate the local OCXO to adjust the local time; the reference source signal includes Beidou satellite signal and 1pps+TOD signal; The operation processing unit is also connected to the time code generation unit, and is used to perform digital signal encoding and decoding processing on the time signal provided by the multi-source time difference measurement unit according to the 1PPS second pulse signal provided by the receiver module, and transmit the decoded time signal to the time code generation unit; In some embodiments, Figure 2 The operation processing unit specifically adopts an FPGA integrated circuit. When the operation processing unit receives a 1PPS second signal, the operation processing unit encodes the output serial time code and temporarily stores it in the memory of the operation processing unit. When it is necessary to provide an accurate time synchronization clock for an external device, the operation processing unit performs a decoding operation to output the serial time code.

[0020] The frequency standard signal generating unit is used to generate multiple 100MHz high-stability and low-noise frequency standard signals, and select one of the frequency standard signals as the reference source signal of the operation processing unit, and the remaining frequency standard signals as output signals; The time code generating unit is used to generate multiple 1pps signals and serial time codes according to the decoded time signal.

[0021] In this embodiment, a timekeeping unit is also included, and the timekeeping unit includes a real-time clock RTC and a battery. When the external reference is valid and the local rubidium clock RB is calibrated, the real-time clock RTC is calibrated to achieve timekeeping; when the reference is invalid, high-precision timekeeping is performed through the rubidium clock RB; Among them, the battery is used for backup after the system is powered off to ensure that the real-time clock RTC continues to maintain the local time, and when the power is on again, it quickly provides a time source for the system.

[0022] The frequency standard signal generating unit includes a crystal oscillator module, a zone amplifier circuit and a power division circuit. The crystal oscillator module is a 100M constant temperature crystal oscillator for generating a 100MHz signal. The zone amplifier circuit is used to power amplify the output of the crystal oscillator module. The power division circuit is used to power divide the amplified signal to generate three 100MHz low-noise frequency standard signals.

[0023] In some specific embodiments, Figure 2 As shown, the multi-source time difference measurement unit includes a phase-locked loop circuit, a TDC circuit, and a CPU control circuit connected in sequence; The phase-locked loop circuit uses the LMK04832 phase-locked loop chip to output three reference clocks, which can provide three reference sources to the external interface; at the same time, the FPGA outputs a l pps signal to the LMK04832 chip as a second pulse signal for beating.

[0024] The TDC circuit is used to measure the time difference between each external reference and the local clock in real time; measure the first phase difference between the reference frequency signal output by the crystal oscillator and the reference frequency signal, and measure the second phase difference between each delayed frequency signal itself and the reference frequency signal, and send the first phase difference and each second phase difference to the CPU control circuit; The CPU control circuit uses a single chip microcomputer for reference source mode switching control, and is also used to generate crystal oscillator voltage control according to the time difference measurement result of the TDC circuit, calibrate the local OCXO, and adjust the local time; it is also used for 1pps+TOD time code generation.

[0025] Furthermore, the CPU control circuit includes a coding control circuit, a timing signal generating circuit, a B (AC) code generating circuit, and an external second signal switching module; The encoding control circuit realizes the mode configuration of the operation processing unit, LMK04832 phase-locked loop chip, and TDC circuit through SPI communication; the timing signal generation circuit realizes precise control of time through counting and interruption, receives the clock signal of the system clock for counting, and when the count reaches a certain threshold, the timer generates an interrupt request to the CPU for processing; the B (AC) code generation circuit receives the serial port information of the receiver to generate a time code signal and transmits it to the TDC to realize the time difference measurement between the internal time and the external reference source; the external second signal switching module receives the 1PPS second pulse of the operation processing unit and the 1PPS second pulse signal output by the receiver, and can realize the selection of different second pulses under different reference sources.

[0026] The receiver generates 1PPS second pulse to the microcontroller by receiving Beidou or GPS signals, and 1 pps is also used as the interrupt signal of the microcontroller. After the microcontroller interrupts, it outputs the B code signal to the timing signal generation circuit through the encoding control circuit to form the B (DC) code. At the same time, the shaped encoding signal is sent to the FPGA processing chip. The encoding signal and the output signal on the frequency division chain are sent to the B (AC) code generation circuit to generate the B code. The time difference measurement circuit measures the time difference between the external second signal and the second signal of the frequency divider, and sends the measurement result to the controller through the serial port.

[0027] The single-chip microcomputer provides the lead / lag parameters to the programmable phase shift circuit through the measured time difference, completes the synchronization with the external second signal, and realizes the information transmission between the time code generation module and the control module through the serial port. The internal reference signal output by the external second signal switching module passes through the interrupt processing circuit and is sent to the time difference measurement circuit for time difference measurement.

[0028] The process of digital signal encoding and decoding of the time signal by the operation processing unit is as follows: the CPU control circuit in the multi-source time difference measurement unit provides the operation processing unit with time signals, namely, the second signal sec_bcd[7..0], the minute signal min_bcd[7..0], the hour signal hour_bcd[6..0], and the day signal day_bcd[10..0], which are the input signals of the operation processing unit. These input signals are all BCD code parallel signals. The receiver module provides the operation processing unit with the rising edge of the 1PPS signal, namely, the second synchronization signal. When the operation processing unit recognizes the rising edge of the 1PPS second pulse, the operation processing unit starts the counter to complete the counting and setting of the high and low levels.

[0029] After the operation processing unit completes the B code encoding at the current moment, it will continuously search for the next rising edge of 1PPS_in. Once the rising edge of 1PPS_in is found, it will immediately enter the encoding of the next second. The decoding part uses two clock crystal clocks of 100MHz. Through frequency division, a 10KHz clock and a 10MHz clock can be obtained. First, a 10KHz clock is used. When two identification signals with a pulse width of 10ms are continuously monitored, a timer is started. When the timer counts to 990ms, an enable signal EN is generated. Then the counter is cleared and waits for the next time when two consecutive signals with a pulse width of 10ms are detected, the counter starts timing again.

[0030] The decoded time signals are stored in the registers of the operation processing unit. When 1PPS is output, they will be output to the external bus synchronously with the clock frequency of 10MHz. The external bus receives the time signal to achieve time synchronization, calibrate the real-time time, and realize the time decoding of the operation processing unit to output the serial time signal.

[0031] In some specific embodiments, simplified RS-232 serial port communication is adopted between modules inside the single-chip microcomputer, and only two signal lines (RXD, TXD) are required to realize internal automatic control and information exchange.

[0032] Furthermore, the reference source mode includes an external reference mode, an internal reference mode, and a navigation timing mode; When there is an external reference input, it enters the external reference mode, and the CPU control circuit automatically detects the presence and frequency of the external reference input signal, and uses the external reference input signal with a frequency of 10MHz or 100MHz as the reference source; When the external reference is not connected and the navigation lock or timekeeping mode is not entered, the internal reference mode is entered, and the CPU control circuit automatically loads the DAC setting data stored when the crystal oscillator module was calibrated last time, and uses the clock signal output by the internal crystal oscillator module as the reference source; When the external reference is not connected and the navigation is locked, the navigation timing mode is entered and the 1PPS pulse-per-second signal received by the receiver module is used as the reference source.

[0033] Furthermore, after entering the navigation timing mode, the CPU control circuit automatically records the DAC control number and UTC time every 20 minutes of continuous operation; the DAC control number and UTC time are used to set the VC control voltage of the reference clock OCXO when the power is turned on again, and in the internal reference source mode, the control voltage is used to calibrate the OCXO frequency accuracy in a short time, and the date and time of the latest OCXO calibration are read out.

[0034] In some specific embodiments, the navigation clock frequency module also includes a power conversion circuit, which uses a 12V power supply as an input voltage, outputs 1.8V, 2.5V, 3.3V, and 4V voltages through a LOD power conversion chip, and outputs 3.3V and 5V voltages to provide to the phase-locked loop circuit.

[0035] Furthermore, it also includes a QSTACK connector, which is used to input an external signal through the GPIO port. When the external signal is a switch signal, it is used to force the reference source mode to switch; when the external signal is a PPS second signal, it is used to tame the crystal oscillator module and enter the external PPS tame mode.

[0036] The high-precision navigation clock frequency module has a 24-hour relative synchronization accuracy at a distance of 33 kilometers and in non-communication mode. Figure 3 The statistical results of the relative synchronization accuracy test (continuous test for 24 hours) are shown in the table below.

[0037] The present invention reduces the area and cost of the frequency module through a highly integrated modular design; considering that the synchronization error between the second signal output by the time system device and the external synchronization second is an important indicator of the time system device, the automatic time interval measurement function can continuously measure and monitor the synchronization error between the external synchronization second and the second signal output by the time system device, which can better achieve high-precision synchronization between various devices in the system. The present invention can also ensure that the accuracy of the clock inside the system is improved by effectively switching the reference source mode.

[0038] The above is only a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the concept described herein through the above teachings or the technology or knowledge of the relevant field. The changes and modifications made by those skilled in the art shall not deviate from the spirit and scope of the present invention, and shall be within the scope of protection of the claims attached to the present invention.

Claims

1. A high-precision navigation clock frequency module, characterized in that: include: Receiver module, multi-source time difference measurement unit, operation processing unit, frequency standard signal generation unit, time code generation unit; The receiver module is connected to the multi-source time difference measurement unit and the operation processing unit, and is used to receive Beidou or GPS satellite signals, restore stable 1PPS second pulse signals, TOD timing signals and positioning information according to the satellite signals, and output them to the multi-source time difference measurement unit and the operation processing unit; The multi-source time difference measurement unit is connected to the operation processing unit and the frequency standard signal generation unit, and is used to select the reference source mode according to the configuration, measure the time difference between multiple reference source signals and the local clock in real time, generate a crystal oscillator voltage control output to the frequency standard signal generation unit according to the time difference measurement result, and calibrate the local OCXO to adjust the local time; the reference source signal includes Beidou satellite signal and 1pps+TOD signal; The operation processing unit is also connected to the time code generation unit, and is used to perform digital signal encoding and decoding processing on the time signal provided by the multi-source time difference measurement unit according to the 1PPS second pulse signal provided by the receiver module, and transmit the decoded time signal to the time code generation unit; The frequency standard signal generating unit is used to generate multiple 100MHz high-stability and low-noise frequency standard signals, and select one of the frequency standard signals as a reference source signal of the operation processing unit; The time code generating unit is used to generate multiple 1pps signals and serial time codes according to the decoded time signal.

2. The high-precision navigation clock frequency module according to claim 1, characterized in that: It also includes a timekeeping unit, which includes a real-time clock RTC and a battery. When the external reference is valid and the local rubidium clock RB is calibrated, the real-time clock RTC is calibrated to achieve timekeeping; when the reference is invalid, the rubidium clock RB is used for high-precision timekeeping; Among them, the battery is used for backup after the system is powered off to ensure that the real-time clock RTC continues to maintain the local time, and when the power is on again, it quickly provides a time source for the system.

3. The high-precision navigation clock frequency module according to claim 1, characterized in that: The frequency standard signal generating unit includes a crystal oscillator module, a zone amplifier circuit and a power division circuit. The crystal oscillator module is a 100M constant temperature crystal oscillator for generating a 100MHz signal. The zone amplifier circuit is used to power amplify the output of the crystal oscillator module. The power division circuit is used to power divide the amplified signal to generate three 100MHz low-noise frequency standard signals.

4. The high-precision navigation clock frequency module according to claim 1, characterized in that: The multi-source time difference measurement unit comprises a phase-locked loop circuit, a TDC circuit, and a CPU control circuit connected in sequence; The phase-locked loop circuit uses the LMK04832 phase-locked loop chip, which can receive the 100MHz clock of the external crystal oscillator and realize 3 different clock outputs through internal frequency division, which is used to output 3 reference clocks. The 3 reference clocks can provide three reference sources to the external interface; The TDC circuit is used to measure the time difference between each external reference and the local clock in real time; The CPU control circuit uses a single chip microcomputer for reference source mode switching control, and is also used to generate crystal oscillator voltage control according to the time difference measurement result of the TDC circuit, calibrate the local OCXO, and adjust the local time; it is also used for 1pps+TOD time code generation.

5. A high-precision navigation clock frequency module according to claim 4, characterized in that: It also includes a power conversion circuit, which uses a 12V power supply as an input voltage, outputs 1.8V, 2.5V, 3.3V, and 4V voltages through a LOD power conversion chip, and outputs 3.3V and 5V voltages to provide to the phase-locked loop circuit.

6. The high-precision navigation clock frequency module according to claim 4, characterized in that: The CPU control circuit includes a coding control circuit, a timing signal generating circuit, a B (AC) code generating circuit, and an external second signal switching module; The encoding control circuit realizes the mode configuration of the operation processing unit, LMK04832 phase-locked loop chip, and TDC circuit through SPI communication; the timing signal generation circuit realizes precise control of time through counting and interruption, receives the clock signal of the system clock for counting, and when the count reaches a certain threshold, the timer generates an interrupt request to the CPU for processing; the B (AC) code generation circuit receives the serial port information of the receiver to generate a time code signal and transmits it to the TDC to realize the time difference measurement between the internal time and the external reference source; the external second signal switching module receives the 1PPS second pulse of the operation processing unit and the 1PPS second pulse signal output by the receiver, and can realize the selection of different second pulses under different reference sources.

7. The high-precision navigation clock frequency module according to claim 1, characterized in that: The reference source modes include external reference mode, internal reference mode and navigation timing mode; When there is an external reference input, it enters the external reference mode, and the CPU control circuit automatically detects the presence and frequency of the external reference input signal, and uses the external reference input signal with a frequency of 10MHz or 100MHz as the reference source; When the external reference is not connected and the navigation lock or timekeeping mode is not entered, the internal reference mode is entered, and the CPU control circuit automatically loads the DAC setting data stored when the crystal oscillator module was calibrated last time, and uses the clock signal output by the internal crystal oscillator module as the reference source; When the external reference is not connected and the navigation is locked, the navigation timing mode is entered and the 1PPS pulse-per-second signal received by the receiver module is used as the reference source.

8. The high-precision navigation clock frequency module according to claim 7, characterized in that: After entering the navigation timing mode, the CPU control circuit automatically records the DAC control number and UTC time every 20 minutes of continuous operation; the DAC control number and UTC time are used to set the VC control voltage of the reference clock OCXO when the power is turned on again, and in the internal reference source mode, the control voltage is used to calibrate the OCXO frequency accuracy in a short time, and the date and time of the most recent OCXO calibration are read out.

9. The high-precision navigation clock frequency module according to claim 1, characterized in that: It also includes a QSTACK connector, which is used to input an external signal through the GPIO port. When the external signal is a switch signal, it is used to force the reference source mode to switch; when the external signal is a PPS second signal, it is used to tame the crystal oscillator module and enter the external PPS taming mode.

10. The high-precision navigation clock frequency module according to claim 1, characterized in that: The arithmetic processing unit specifically adopts FPGA integrated circuit.

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