Efficient power supply circuit

Abstract

The invention relates to a high-efficiency power supply circuit which is characterized by comprising an input rectification module which is arranged by adopting a bridge type rectification circuit structure and is used for converting input alternating current into direct current, the output end of the input rectification module is connected with an APFC booster circuit, the output end of the APFC booster circuit is connected with a resonance circuit, and the resonance circuit is connected with an output end of the input rectification module. The LLC resonant circuit is used for improving voltage conversion efficiency and reducing switching loss through a soft switching function, an output end of the LLC resonant circuit is connected with a synchronous rectification circuit, and the synchronous rectification circuit is used for rectifying output of the LLC resonant circuit and providing rectified direct current for a subsequent load or a battery for charging.

Description

Technical Field

[0001] The present invention relates to the technical field of power adapters, and in particular to a high-efficiency power supply circuit. Background Art

[0002] In the prior art, power modules used in higher power (not below 200 watts) or high-power scenarios generally include two-stage circuits, the front-end and the back-end. The front-end generally uses various topology circuits based on Boost rectifiers or equivalent to Boost circuits to achieve power factor tracking (also known as APFC). The mainstream APFC topology solution is three-phase three-wire three-level VIENNA (for example, it also includes: two-way staggered parallel three-phase three-wire three-level VIENNA, single-phase staggered three-phase three-wire three-level VIENNA, totem pole topology circuit, Boost circuit); the rear-stage DC-DC solution generally achieves voltage reduction / voltage regulation through a circuit topology based on a full-bridge or half-bridge.

[0003] Chinese patent CN117477900A discloses a power supply circuit and its first, second, and third extended power supply circuits and a method for realizing APFC and voltage boost / voltage reduction based on the power supply circuit. The power supply circuit includes an information acquisition module, an inductor, a switch, and a controller for controlling the working state of the switch, a capacitor, a transformer, and an output half-wave rectifier module. The power supply circuit of the present application controls the charge and discharge time of the inductor by controlling the duty cycle and frequency of the switch, and can realize power factor tracking while also realizing dynamic adjustment of voltage boost and voltage reduction according to the input voltage and the required output voltage of the power supply circuit to meet the load requirements. However, there are still problems such as the narrow input voltage range of the LLC resonant circuit, and the voltage is easily uncontrolled or the power consumption is increased when light load and no load occur.

[0004] The above contents are only used to assist in understanding the technical solution of the present invention and do not constitute an admission that the above contents are prior art. Summary of the invention

[0005] The present invention provides a high-efficiency power supply circuit and aims to solve the problem that the LLC resonant circuit has a narrow input voltage range and is prone to uncontrolled voltage or increased power consumption when lightly loaded or unloaded.

[0006] To achieve the above-mentioned object, the present invention proposes a high-efficiency power supply circuit, comprising: an input rectifier module, which is arranged in a bridge rectifier circuit structure and is used to convert input alternating current into direct current, the output end of the input rectifier module is connected to an APFC boost circuit, the output end of the APFC boost circuit is connected to an LLC resonant circuit, the LLC resonant circuit is used to improve voltage conversion efficiency and reduce switching losses through a soft switching function, the output end of the LLC resonant circuit is connected to a synchronous rectifier circuit, the synchronous rectifier circuit is used to rectify the output of the LLC resonant circuit, and provide the rectified direct current to subsequent loads or battery charging; The LLC resonant circuit includes a half-bridge circuit composed of a MOS tube Q3 and a MOS tube Q4, a resonant capacitor C28, an LLC resonant chip U6 and a transformer T1. The source of the MOS tube Q3 is connected to the drain of the MOS tube Q4. The source of the MOS tube Q3 is also connected to the OUT pin of the LLC resonant chip U6 and the primary same-name end of the transformer T1. The drain of the MOS tube Q3 is connected to the capacitor in the APFC boost circuit. The gate of the MOS tube Q3 is connected to the HVG pin of the LLC resonant chip U6. The source of the MOS tube Q4 is grounded. The gate of the MOS tube Q4 is connected to the LVG pin of the LLC resonant chip U6. A resonant inductor is integrated in the transformer T1. The non-same-name end of the transformer T1 is connected in series with the resonant capacitor C28 to the ground to form an LLC current network. A filter circuit is also provided on the non-same-name end of the transformer T1 and is connected to the ISEN pin of the LLC resonant chip U6 for detecting the current in the LLC loop.

[0007] In one embodiment, the APFC boost circuit includes a boost inductor L2, a freewheeling diode D4, a MOS tube Q1 and an APFC chip U1. The primary coil of the boost inductor L2 is connected between the input rectifier module and the diode D4, the secondary coil of the boost inductor L2 is connected to the ZCD pin of the APFC chip U1 to detect the demagnetization effect, the drain of the MOS tube Q1 is connected between the L2 inductor and the diode D4, the gate of the MOS tube Q1 is connected to the drive pin GD of the APFC chip U1, the source of the MOS tube Q1 is connected in series with the sampling resistor R23 to be grounded, and the CS pin of the APFC chip U1 is connected between the sampling resistor R23 and the MOS tube Q1.

[0008] In one embodiment, the input rectifier module includes: a connector J1, the input end of the connector J1 is connected to a surge protection circuit, the surge protection circuit is connected to an EMI filter circuit, the EMI filter circuit is connected to a rectifier circuit, and the rectifier circuit is connected to an APFC boost circuit.

[0009] In one embodiment, the surge protection circuit includes: a power fuse F1 , wherein the power fuse F1 is connected to a metal oxide varistor MOV1 and a gas discharge tube GDT1 .

[0010] In one embodiment, an overvoltage protection circuit is connected in parallel to the gate of the MOS transistor Q4 and the gate of the MOS transistor Q3.

[0011] In one embodiment, the LLC resonant circuit also includes an optocoupler U3, the emitter of which is grounded, the collector of which is connected to the RFMIN pin of the LLC resonant chip U6 for controlling the output power of the secondary voltage signal, and the positive and negative electrodes of the optocoupler U3 are connected to a synchronous rectification circuit.

[0012] In one embodiment, a jumper JP2 is connected between the collector of the optical coupler U3 and the RFMIN pin of the LLC resonant chip U6.

[0013] In one embodiment, the synchronous rectification circuit includes a MOS transistor Q11, a MOS transistor Q12 and a synchronous rectification chip U5. The secondary winding of the transformer T1 is set in a center tap style. The center tap end of the secondary winding is connected to the power supply output end. The two output ends of the secondary winding are respectively connected to the drains of the MOS transistor Q11 and the MOS transistor Q12, and are respectively connected to the DVS1 and DVS2 pins of the synchronous rectification chip U5. The sources of the MOS transistor Q11 and the MOS transistor Q12 are both grounded to form a complete current loop. The gate of the MOS transistor Q11 is connected to the GD2 pin of the synchronous rectification chip U5, and the gate of the MOS transistor Q12 is connected to the GD1 pin of the synchronous rectification chip U5.

[0014] The beneficial effects of the technical solution of the present invention are: By using LLC resonant circuit, the power supply can maintain high conversion efficiency in a wide input voltage range, reduce electromagnetic radiation, and reduce interference to the surrounding environment. At the same time, the surge protection circuit and EMI filter circuit at the input effectively suppress external interference, ensure the stability and reliability of the power supply, and together form a complete overload and short-circuit protection mechanism, ensuring that the power supply can quickly cut off the circuit under abnormal conditions to prevent equipment damage and safety hazards.

[0015] The EMI filter circuit can be used to smooth out the noise in the mains and prevent it from entering the system and causing unnecessary problems, suppress ripples to reduce voltage and current jitter, and prevent the noise generated by the switching power supply from returning to the mains. At the same time, the power fuse F1 connected to the input end of the power supply absorbs or suppresses energy such as lightning surges to protect subsequent circuits and prevent sudden energy from damaging the power supply or load equipment. The rectifier circuit connected after the EMI filter circuit can convert AC power into DC output.

[0016] The optocoupler U3 can adjust the working state of the LLC resonant chip U6 according to the feedback signal, thereby achieving precise control of the output power of the secondary voltage signal and improving the conversion efficiency of the entire power module. At the same time, under different load conditions, the optocoupler can adjust the output power in real time to ensure that the system always operates at the optimal efficiency point. It also provides electrical isolation, effectively reducing electromagnetic interference (EMI), making the feedback between the primary and secondary sides of the transformer T1 safer and more reliable, and avoiding interference and damage that may be caused by direct connection.

[0017] Jumper JP2 allows users or technicians to easily disconnect or connect the connection between the optocoupler U3 and the LLC resonant chip U6 when needed, thereby adjusting the system's operating mode according to different application scenarios and quickly switching different configurations through the jumper, making it easier for engineers to troubleshoot and optimize performance.

[0018] The synchronous rectification technology uses MOS tubes to replace traditional Schottky diodes, which significantly reduces the voltage drop (V_drop) during conduction, thereby reducing power consumption and heat generation. According to the voltage changes of the two MOS tube drain pins detected, the conduction and shutdown of the MOS tubes are accurately controlled to ensure that the two MOS tubes are alternately turned on to avoid the risk of short circuit caused by simultaneous conduction. At the same time, through the setting of the center tap, the current flows alternately between the two MOS tubes, optimizing the current path and further improving the conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A system block diagram of an embodiment of the subject matter of the present invention; Figure 2 This is a connection structure diagram of the LLC resonance chip U6 of the embodiment of the present invention; Figure 3 A connection structure diagram of an LLC resonance chip U6 according to another embodiment of the present invention; Figure 4 This is a structural diagram of the connection between the LLC resonant chip U6 and the optical coupler of the embodiment of the subject matter of the present invention; Figure 5 This is a structural diagram of the connection between the LLC resonant chip U6 and the MOS tube according to the embodiment of the present invention; Figure 6 A circuit connection diagram of a synchronous rectifier chip U5 in an embodiment of the present invention; Figure 7 A circuit connection diagram of a synchronous rectifier chip U5 in another embodiment of the present invention; Figure 8 A circuit connection diagram of a synchronous rectification chip U5 in another embodiment of the subject of the present invention; Fig. 9 A circuit structure diagram of an APFC boost circuit according to an embodiment of the present invention; Fig.10 The circuit structure diagram of the input rectifier module of the embodiment of the present invention is shown in FIG. Fig.11 This is a circuit structure diagram of an input rectifier module according to another embodiment of the present invention.

[0020] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0021] The scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0023] It should also be noted that when an element is referred to as being "fixed on" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element at the same time. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0024] In addition, if the description of "first", "second", etc. is involved in the present invention, it is only used for descriptive purposes (such as for distinguishing the same or similar elements), and cannot be understood as indicating or implying its relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0025] See also Figure 1-Figure 3 , a high-efficiency power supply circuit, comprising: an input rectifier module, which is arranged in a bridge rectifier circuit structure and is used to convert input alternating current into direct current, an output end of the input rectifier module is connected to an APFC boost circuit, an output end of the APFC boost circuit is connected to an LLC resonant circuit, the LLC resonant circuit is used to improve voltage conversion efficiency and reduce switching losses through a soft switching function, an output end of the LLC resonant circuit is connected to a synchronous rectifier circuit SR, the synchronous rectifier circuit SR is used to rectify the output of the LLC resonant circuit, and provide the rectified direct current to a subsequent load or battery charging; See also Figure 5 , wherein the LLC resonant circuit includes a half-bridge circuit composed of a MOS tube Q3 and a MOS tube Q4, a resonant capacitor C28, an LLC resonant chip U6 and a transformer T1, the source of the MOS tube Q3 is connected to the drain of the MOS tube Q4, the source of the MOS tube Q3 is also connected to the OUT pin of the LLC resonant chip U6 and the primary same-name end of the transformer T1, the drain of the MOS tube Q3 is connected to the capacitor in the APFC boost circuit, the gate of the MOS tube Q3 is connected to the HVG pin of the LLC resonant chip U6, the source of the MOS tube Q4 is grounded, the gate of the MOS tube Q4 is connected to the LVG pin of the LLC resonant chip U6, a resonant inductor is integrated in the transformer T1, the non-same-name end of the transformer T1 is connected in series with the resonant capacitor C28 to the ground to form an LLC current network, and a filter circuit is also provided on the non-same-name end of the transformer T1, and is connected to the ISEN pin of the LLC resonant chip U6 for detecting the current in the LLC loop.

[0026] Specifically, the LLC resonant chip U6 is of the EG6599S model. The EG6599S chip controls the MOS tubes Q3 and Q4 in the half-bridge circuit to switch alternately by outputting 180° out-of-phase signals.

[0027] Furthermore, in order to ensure the safety and stable operation of the circuit, the switching duty cycle of the EG6599S chip is configured to be slightly less than 50%, so as to introduce a short dead time (TD) between the time when one MOS tube is completely turned off and the time when the other is about to be turned on, and both the upper and lower MOS tubes are turned off during the dead time, thereby avoiding the occurrence of transient short circuits caused by excessively fast switching speeds, ensuring that the converter maintains stable operation throughout the entire continuous working cycle, effectively realizing the application of soft switching technology, and achieving an ideal working state of high frequency, high efficiency and low electromagnetic interference (EMI).

[0028] In addition, by precisely controlling the length of the dead time TD, the power conversion efficiency and reliability can be further optimized.

[0029] In this solution, by using LLC resonant circuit, the power supply can maintain high conversion efficiency in a wide input voltage range, reduce electromagnetic radiation, and reduce interference to the surrounding environment. At the same time, the surge protection circuit and EMI filter circuit at the input end effectively suppress external interference, ensure the stability and reliability of the power supply, and together form a complete overload and short-circuit protection mechanism to ensure that the power supply can quickly cut off the circuit under abnormal conditions to prevent equipment damage and safety hazards.

[0030] Furthermore, the APFC boost circuit not only increases the input voltage, but also improves the current waveform on the grid side through power factor correction (APFC) technology, making the entire power system more stable and reliable. The use of the synchronous rectification circuit (SR) improves the overall efficiency and stability of the power supply.

[0031] In one embodiment, an overvoltage protection circuit is connected in parallel to the gate of the MOS transistor Q4 and the gate of the MOS transistor Q3.

[0032] In this solution, by connecting an overvoltage protection circuit in parallel to the gates of the MOS tube Q4 and the MOS tube Q3, voltage fluctuations are effectively controlled and circuit failures caused by voltage abnormalities are reduced, thereby improving the reliability of the entire system. That is, when the input voltage exceeds the preset threshold, the overvoltage protection circuit will automatically start to prevent excessive voltage from damaging the MOS tube or other sensitive components.

[0033] See also Figure 4 In one embodiment, the LLC resonant circuit further includes an optocoupler U3, the emitter of which is grounded, the collector of which is connected to the RFMIN pin of the LLC resonant chip U6 for controlling the output power of the secondary voltage signal, and the positive and negative electrodes of the optocoupler U3 are connected to the synchronous rectification circuit SR.

[0034] In this solution, the optocoupler U3 can adjust the working state of the LLC resonant chip U6 according to the feedback signal, thereby achieving precise control of the output power of the secondary voltage signal and improving the conversion efficiency of the entire power module. At the same time, under different load conditions, the optocoupler can adjust the output power in real time to ensure that the system always operates at the optimal efficiency point. It also provides electrical isolation, effectively reducing electromagnetic interference (EMI), making the feedback between the primary and secondary sides of the transformer T1 safer and more reliable, and avoiding interference and damage that may be caused by direct connection.

[0035] Furthermore, a jumper JP2 is connected between the collector of the optical coupler U3 and the RFMIN pin of the LLC resonant chip U6.

[0036] In this solution, jumper JP2 allows users or technicians to easily disconnect or connect the connection between the optocoupler U3 and the LLC resonant chip U6 when needed, thereby adjusting the system's operating mode according to different application scenarios and quickly switching different configurations through the jumper, making it easier for engineers to troubleshoot and optimize performance.

[0037] See also Figure 6-Figure 8 In one embodiment, the APFC boost circuit includes a boost inductor L2, a freewheeling diode D4, a MOS tube Q1 and an APFC chip U1, the primary coil of the boost inductor L2 is connected between the input rectifier module and the diode D4, the secondary coil of the boost inductor L2 is connected to the ZCD pin of the APFC chip U1 to detect the demagnetization effect, the drain of the MOS tube Q1 is connected between the L2 inductor and the diode D4, the gate of the MOS tube Q1 is connected to the drive pin GD of the APFC chip U1, the source of the MOS tube Q1 is connected in series with the sampling resistor R23 to be grounded, and the CS pin of the APFC chip U1 is connected between the sampling resistor R23 and the MOS tube Q1.

[0038] The APFC boost circuit can convert low-voltage AC power into a higher and more stable DC voltage, and at the same time improve the power efficiency of the grid through power factor correction technology, thereby reducing energy waste. The diode D4 is a freewheeling diode.

[0039] In this solution, boost is achieved through boost inductor L2. When MOS tube Q1 is turned on, it is equivalent to the inductor being connected to the ground. At this time, energy is stored in the inductor. When MOS tube Q1 is turned off, the inductor energy and power flow out through diode D4 at the same time to achieve boost. APFC chip U1 controls the gate voltage of MOS tube Q1 through GD pin to change the MOS tube switch, thereby further achieving power factor correction and voltage regulation.

[0040] Furthermore, the connection between the sampling resistor R23 and the MOS tube Q1 also plays the role of current detection. When an abnormal current is detected, the APFC chip U1 can respond quickly and cut off the drive signal of the MOS tube Q1, thereby protecting the circuit from damage. At the same time, the APFC boost circuit is not only suitable for traditional fields such as universal power adapters and open power supplies, but can also be applied to emerging fields such as new energy vehicle charging piles and industrial automation equipment, with high versatility and flexibility.

[0041] See also Fig. 9 In one embodiment, the synchronous rectification circuit SR includes a MOS tube Q11, a MOS tube Q12 and a synchronous rectification chip U5. The secondary winding of the transformer T1 is set in a center tap style. The center tap end of the secondary winding is connected to the power supply output end. The two output ends of the secondary winding are respectively connected to the drains of the MOS tube Q11 and the MOS tube Q12, and are respectively connected to the DVS1 and DVS2 pins of the synchronous rectification chip U5. The sources of the MOS tube Q11 and the MOS tube Q12 are both grounded to form a complete current loop. The gate of the MOS tube Q11 is connected to the GD2 pin of the synchronous rectification chip U5, and the gate of the MOS tube Q12 is connected to the GD1 pin of the synchronous rectification chip U5.

[0042] Furthermore, the secondary synchronous rectification mainly follows the conduction of the secondary winding of the transformer. When the body diode of the MOS tube begins to conduct, the corresponding synchronous rectification MOS tube is turned on, and then it is turned off when the current flowing through it is close to zero, and the corresponding MOS of the other winding is turned on again to maintain the output, so it is necessary to detect the voltage of the drain pins of the two MOS tubes to realize the alternating conduction of the two MOS.

[0043] In this solution, synchronous rectification technology is used to replace the traditional Schottky diode with MOS tube, which significantly reduces the voltage drop (V_drop) during conduction, thereby reducing power consumption and heat generation. According to the voltage changes of the two MOS tube drain pins detected, the conduction and shutdown of the MOS tube are accurately controlled to ensure that the two MOS tubes are alternately turned on to avoid the risk of short circuit caused by simultaneous conduction. At the same time, through the setting of the center tap, the current flows alternately between the two MOS tubes, optimizing the current path and further improving the conversion efficiency.

[0044] See also Figure 10-11 In one embodiment, the input rectifier module includes: a connector J1, an input end of the connector J1 is connected to a surge protection circuit, the surge protection circuit is connected to an EMI filter circuit, the EMI filter circuit is connected to a rectifier circuit, and the rectifier circuit is connected to an APFC boost circuit.

[0045] The surge protection circuit includes: a power fuse F1, and the power fuse F1 is connected to a metal oxide varistor MOV1 and a gas discharge tube GDT1.

[0046] In this solution, the EMI filter circuit is used to smooth out the noise in the mains power supply from entering the system and causing unnecessary problems, suppress ripples to reduce voltage and current jitter, and prevent the noise generated by the switching power supply from returning to the mains power supply. At the same time, the power fuse F1 connected to the input end of the power supply absorbs or suppresses energy such as lightning surges to protect subsequent circuits and prevent sudden energy from damaging the power supply or load equipment. The rectifier circuit connected after the EMI filter circuit converts AC power into DC output.

[0047] Furthermore, by using the LLC resonant circuit, the power supply can maintain high conversion efficiency over a wide input voltage range. The soft switching function of the LLC resonant circuit reduces switching losses and further improves overall efficiency. The surge protection circuit and EMI filter circuit at the power input effectively suppress external interference and ensure the stability and reliability of the power supply. At the same time, the design of the LLC resonant circuit also helps to reduce electromagnetic radiation and reduce interference to the surrounding environment.

[0048] In addition, the input voltage is increased by adding the APFC boost circuit, and the current waveform on the grid side is improved by applying the power factor correction (APFC) technology, making the entire power supply system more stable and reliable.

[0049] The above description is only a partial or preferred embodiment of the present invention. Neither the text nor the drawings can limit the scope of protection of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the overall concept of the present invention, or direct / indirect application in other related technical fields are included in the scope of protection of the present invention.

Claims

1. A high-efficiency power supply circuit, characterized in that: include: An input rectifier module is provided with a bridge rectifier circuit structure, and is used to convert input alternating current into direct current. An APFC boost circuit is connected to an output end of the input rectifier module, and an LLC resonant circuit is connected to an output end of the APFC boost circuit. The LLC resonant circuit is used to improve voltage conversion efficiency and reduce switching losses through a soft switching function. An output end of the LLC resonant circuit is connected to a synchronous rectifier circuit, and the synchronous rectifier circuit is used to rectify the output of the LLC resonant circuit and provide the rectified direct current to subsequent loads or battery charging. The LLC resonant circuit includes a half-bridge circuit composed of a MOS tube Q3 and a MOS tube Q4, a resonant capacitor C28, an LLC resonant chip U6 and a transformer T1. The source of the MOS tube Q3 is connected to the drain of the MOS tube Q4. The source of the MOS tube Q3 is also connected to the OUT pin of the LLC resonant chip U6 and the primary same-name end of the transformer T1. The drain of the MOS tube Q3 is connected to the capacitor in the APFC boost circuit. The gate of the MOS tube Q3 is connected to the HVG pin of the LLC resonant chip U6. The source of the MOS tube Q4 is grounded. The gate of the MOS tube Q4 is connected to the LVG pin of the LLC resonant chip U6. A resonant inductor is integrated in the transformer T1. The non-same-name end of the transformer T1 is connected in series with the resonant capacitor C28 to the ground to form an LLC current network. A filter circuit is also provided on the non-same-name end of the transformer T1 and is connected to the ISEN pin of the LLC resonant chip U6 for detecting the current in the LLC loop.

2. A high-efficiency power supply circuit according to claim 1, characterized in that: The APFC boost circuit includes a boost inductor L2, a freewheeling diode D4, a MOS tube Q1 and an APFC chip U1. The primary coil of the boost inductor L2 is connected between the input rectifier module and the diode D4, the secondary coil of the boost inductor L2 is connected to the ZCD pin of the APFC chip U1 to detect the demagnetization effect, the drain of the MOS tube Q1 is connected between the L2 inductor and the diode D4, the gate of the MOS tube Q1 is connected to the GD drive pin of the APFC chip U1, the source of the MOS tube Q1 is connected in series with the sampling resistor R23 to be grounded, and the CS pin of the APFC chip U1 is connected between the sampling resistor R23 and the MOS tube Q1.

3. The high-efficiency power supply circuit according to claim 1, characterized in that: The input rectifier module includes: a connector J1, an input end of the connector J1 is connected to a surge protection circuit, the surge protection circuit is connected to an EMI filter circuit, the EMI filter circuit is connected to a rectifier circuit, and the rectifier circuit is connected to an APFC boost circuit.

4. A high-efficiency power supply circuit according to claim 3, characterized in that: The surge protection circuit comprises: a power fuse F1 , and the power fuse F1 is connected to a metal oxide varistor MOV1 and a gas discharge tube GDT1 .

5. The high-efficiency power supply circuit according to claim 1, characterized in that: An overvoltage protection circuit is connected in parallel to the gate of the MOS transistor Q4 and the gate of the MOS transistor Q3.

6. A high-efficiency power supply circuit according to claim 5, characterized in that: The LLC resonant circuit also includes an optocoupler U3, the emitter of which is grounded, the collector of which is connected to the RFMIN pin of the LLC resonant chip U6 for controlling the output power of the secondary voltage signal, and the positive and negative electrodes of the optocoupler U3 are connected to the synchronous rectification circuit.

7. A high-efficiency power supply circuit according to claim 6, characterized in that: A jumper JP2 is connected between the collector of the optical coupler U3 and the RFMIN pin of the LLC resonance chip U6.

8. The high-efficiency power supply circuit according to claim 1, characterized in that: The synchronous rectification circuit includes a MOS transistor Q11, a MOS transistor Q12 and a synchronous rectification chip U5. The secondary winding of the transformer T1 is set in a center tap style. The center tap end of the secondary winding is connected to the power output end. The two output ends of the secondary winding are respectively connected to the drains of the MOS transistors Q11 and Q12, and are respectively connected to the DVS1 and DVS2 pins of the synchronous rectification chip U5. The sources of the MOS transistors Q11 and Q12 are both grounded to form a complete current loop. The gate of the MOS transistor Q11 is connected to the GD2 pin of the synchronous rectification chip U5, and the gate of the MOS transistor Q12 is connected to the GD1 pin of the synchronous rectification chip U5.

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