Trench capacitor and manufacturing method thereof

Abstract

The invention provides a trench capacitor and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a substrate; forming a plurality of first grooves to expose the first metal wires and a plurality of second grooves to expose the second metal wires; a single-layer capacitor is formed on the first groove and the insulating layer around the first groove, a double-layer capacitor is formed on the second groove and the insulating layer around the second groove, the second electrode is connected with the first metal wire through the first groove, and the first electrode is connected with the second metal wire through the second groove; forming a through hole in the insulating layer on the third metal wire to expose the third metal wire; and forming a fourth metal wire which is electrically connected with the third electrode and the third metal wire. According to the invention, the three electrodes of the double-layer capacitor and the single-layer capacitor are led out downwards by using the first metal wire, the second metal wire and the third metal wire in the substrate, so that the capacitance density of the trench capacitor is increased, the process integration difficulty is reduced, and the freedom degree of the design of the trench capacitor is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular to a trench capacitor and a manufacturing method thereof. Background Art

[0002] Capacitors are a conventional passive component widely used in the field of integrated circuits. In some special applications, capacitors with large unit capacitance are needed to improve product performance, such as storing signals, reducing noise, and reducing coupling. Planar capacitors need to occupy a large area to obtain large capacitance, which will sacrifice design area. For this reason, trench capacitors become the best choice for large capacitance.

[0003] The existing trench capacitors can not only have their capacitance density further improved, but also their manufacturing process can be further optimized. Summary of the invention

[0004] The object of the present invention is to provide a trench capacitor and a manufacturing method thereof, so as to improve the capacitance density thereof and optimize the manufacturing process thereof.

[0005] In order to solve the above technical problems, the present invention provides a method for manufacturing a trench capacitor, comprising:

[0006] Providing a substrate, wherein first to third metal wires arranged in the same layer and an insulating layer covering the first to third metal wires are formed in the substrate;

[0007] forming a first trench in the insulating layer on the first metal line to expose the first metal line, and forming a second trench in the insulating layer on the second metal line to expose the second metal line;

[0008] A single-layer capacitor is formed on the first trench and the insulating layer around it, and a double-layer capacitor is formed on the second trench and the insulating layer around it, wherein the double-layer capacitor comprises a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode which are formed conformally in sequence, and the single-layer capacitor comprises the second electrode, the second dielectric layer, and the third electrode which are formed conformally in sequence, the first electrode is electrically connected to the second metal wire via the second trench, and the second electrode is electrically connected to the first metal wire via the first trench;

[0009] forming a through hole in the insulating layer on the third metal line to expose the third metal line;

[0010] A fourth metal line is formed to cover the through hole and the third electrode to electrically connect the third electrode and the third metal line.

[0011] Optionally, a dielectric barrier layer is further provided between the first to third metal wires and the insulating layer.

[0012] Optionally, the insulating layer includes a first region located above the first metal line and a second region located above the second metal line, the first region is provided with the first groove, and the second region is provided with the second groove, and the steps of forming the single-layer capacitor and the double-layer capacitor include:

[0013] Forming a first electrode material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench;

[0014] Performing a patterning process on the first electrode material layer, retaining the first electrode material layer in the first region and the second region, and using the first electrode material layer in the second region as the first electrode, and the first electrode material layer in the first groove is electrically connected to the first metal wire, and the first electrode is electrically connected to the second metal wire;

[0015] Forming a first dielectric material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench;

[0016] forming a first mask to cover the first dielectric material layer in the second region, and performing an etching process to remove the first dielectric material layer on the surface of the insulating layer and the bottom wall of the first trench to expose the first electrode material layer in the first trench, and using the first dielectric material layer in the second region as the first dielectric layer;

[0017] removing the first mask to form a second electrode material layer covering the surface of the insulating layer, the first trench and the inner wall of the second trench;

[0018] forming a second mask to cover the first region, the second region and the second electrode material layer therebetween, removing the exposed second electrode material layer, and using the first region, the second region and the second electrode material layer therebetween as the second electrode, the second electrode being electrically connected to the first electrode material layer and the first metal line in the first trench;

[0019] Removing the second mask, and conformally forming a second dielectric material layer and a third electrode material layer in sequence to cover the surface of the insulating layer, the inner wall of the first trench and the second trench;

[0020] forming a third mask to cover the first region, the second region and the third electrode material layer therebetween, removing the exposed third electrode material layer and the second dielectric material layer thereunder, and using the first region, the second region and the third electrode material layer therebetween as the third electrode, and using the first region, the second region and the second dielectric material layer therebetween as the second dielectric layer, wherein the third mask completely covers the second electrode;

[0021] The third mask is removed.

[0022] Optionally, the insulating layer includes a first region located above the first metal line and a second region located above the second metal line, the first region is provided with the first groove, and the second region is provided with the second groove, and the steps of forming the single-layer capacitor and the double-layer capacitor include:

[0023] Forming a first electrode material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench;

[0024] Performing a patterning process on the first electrode material layer, retaining the first electrode material layer in the first region and the second region, and using the first electrode material layer in the second region as the first electrode, and the first electrode material layer in the first groove is electrically connected to the first metal wire, and the first electrode is electrically connected to the second metal wire;

[0025] Forming a first dielectric material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench;

[0026] forming a first mask to cover the first dielectric material layer in the second region, and performing an etching process to remove the first dielectric material layer on the surface of the insulating layer and the bottom wall of the first trench to expose the first electrode material layer, and using the first dielectric material layer in the second region as the first dielectric layer;

[0027] Removing the first mask, and conformally forming a second electrode material layer, a second dielectric material layer, and a third electrode material layer in sequence to cover the surface of the insulating layer, the first trench, and the inner wall of the second trench;

[0028] forming a second mask to cover the first region, the second region and the third electrode material layer therebetween, removing the exposed third electrode material layer and the second electrode material layer and the second dielectric material layer thereunder, and retaining the first region, the second region and the second electrode material layer, the second dielectric material layer and the third electrode material layer therebetween to form the second electrode, the second dielectric layer and the third electrode, wherein the second electrode is electrically connected to the first electrode material layer and the first metal line in the first trench;

[0029] removing the second mask to form a third dielectric material layer to conformally cover the surface of the insulating layer, the surface of the third electrode and the sidewall of the second electrode;

[0030] A dry etching process is performed to remove the third dielectric material layer on the surface of the insulating layer and the third electrode, and the third dielectric material layer retained on the side wall of the second electrode is used as a side wall.

[0031] Optionally, a single-layer planar capacitor composed of the second electrode, the second dielectric layer and the third electrode is formed between the first region and the second region.

[0032] Optionally, the material of the first electrode, the second electrode and the third electrode includes one or any combination of titanium, titanium nitride, tantalum and tantalum nitride.

[0033] Optionally, the dielectric constants of the first dielectric layer and the second dielectric layer are greater than or equal to 3.9.

[0034] Optionally, the step of forming the fourth metal line includes:

[0035] forming a metal material layer to cover the surface of the insulating layer, the surface of the third electrode and the inner wall of the through hole;

[0036] The metal material layer is patterned to retain the metal material layer above the first metal line, the second metal line and the third metal line as the fourth metal line to electrically connect the third electrode of the single-layer capacitor and the double-layer capacitor with the third metal line.

[0037] Optionally, when the patterning process is performed on the metal material layer, a metal pad is also simultaneously formed on the surface of the insulating layer for connection with an external circuit.

[0038] According to another aspect of the present invention, a trench capacitor is provided, comprising:

[0039] substrate;

[0040] First to third metal wires are arranged in the same layer in the substrate;

[0041] an insulating layer, covering the first to third metal wires and having a first groove exposing the first metal wire, a second groove exposing the second metal wire, and a through hole exposing the third metal wire;

[0042] A double-layer capacitor is formed in the second trench and on the insulating layer around it, comprising a first electrode, a first dielectric layer, a second electrode, a second dielectric layer and a third electrode which are sequentially formed conformally, wherein the first electrode is electrically connected to the second metal line by using the second trench;

[0043] A single-layer capacitor is formed in the first trench and on the insulating layer around it, comprising the second electrode, the second dielectric layer and the third electrode which are formed conformally in sequence, and the second electrode is electrically connected to the first metal line by using the first trench;

[0044] The fourth metal wire covers the through hole and the third electrode to electrically connect the third metal wire and the third electrode.

[0045] In summary, the present invention forms a first groove in the insulating layer on the first metal wire to expose the first metal wire and forms a second groove in the insulating layer on the second metal wire to expose the second metal wire, and forms a single-layer trench capacitor in the first groove and on the insulating layer around the first groove, and forms a double-layer trench capacitor in the second groove and the insulating layer around the second groove. The single-layer trench capacitor is connected in parallel with the double-layer trench capacitor, and the single-layer trench capacitor is directly formed by using the second electrode, the second dielectric layer and the third electrode of the double-layer trench capacitor. In addition, in the two capacitors, the first electrode is connected to the second metal wire at the bottom of the second groove, the second electrode is connected to the first metal wire at the bottom of the first groove, and the third electrode is connected to the third metal wire through the fourth metal wire using the through hole in the insulating layer. Thus, the three electrodes of the double-layer capacitor and the single-layer capacitor are led downward using the first to third metal wires in the substrate, and the lead-out of the double-layer trench capacitor and the wiring of the metal wires on the insulating layer are completed without adding additional process steps, thereby increasing the capacitance density of the trench capacitor, reducing the difficulty of process integration, and being conducive to improving the degree of freedom of trench capacitor design. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Those skilled in the art should understand that the drawings are provided for a better understanding of the present invention, but do not constitute any limitation on the scope of the present invention.

[0047] Figure 1 is a flow chart of a method for manufacturing a trench capacitor provided in Embodiment 1;

[0048] Figure 2a to Figure 3c A schematic structural diagram corresponding to corresponding steps of the method for manufacturing a trench capacitor provided in Embodiment 1;

[0049] Figure 4a to Figure 4h This is a schematic structural diagram corresponding to the corresponding steps of the method for manufacturing a trench capacitor provided in the second embodiment.

[0050] In the attached figure:

[0051] 10-substrate; 11-first metal wire; 12-second metal wire; 13-third metal wire; 21-dielectric barrier layer; 22-insulating layer; 23-first trench; 24-second trench; AA-first region; BB-second region; 25-first electrode material layer; 25a-first electrode; 26-first dielectric material layer; 26a-first dielectric layer; 27-first mask; 31-second electrode material layer; 31a-second electrode; 32-second mask; 33-second dielectric material layer; 33a-second dielectric layer; 34-third electrode material layer; 34a-third electrode; 35-third mask; 36-through hole; 38-third dielectric material layer; 38a-side wall; 37-metal material layer; 37a-fourth metal wire. DETAILED DESCRIPTION

[0052] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0053] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.

[0054] Embodiment 1

[0055] Figure 1 4 is a flow chart of a method for manufacturing a trench capacitor provided in the first embodiment.

[0056] like Figure 1 As shown, the manufacturing method of the trench capacitor provided in this embodiment includes:

[0057] S01: providing a substrate, wherein first to third metal wires arranged in the same layer and an insulating layer covering the first to third metal wires are formed in the substrate;

[0058] S02: forming a first trench in the insulating layer on the first metal line to expose the first metal line, and forming a second trench in the insulating layer on the second metal line to expose the second metal line;

[0059] S03: forming a single-layer capacitor on the first trench and the insulating layer around it and forming a double-layer capacitor on the second trench and the insulating layer around it, the double-layer capacitor comprising a first electrode, a first dielectric layer, a second electrode, a second dielectric layer and a third electrode formed in sequence conformally, the single-layer capacitor comprising the second electrode, the second dielectric layer and the third electrode formed in sequence conformally, the first electrode being electrically connected to the second metal wire via the second trench, and the second electrode being electrically connected to the first metal wire via the first trench;

[0060] S04: forming a through hole in the insulating layer on the third metal line to expose the third metal line;

[0061] S05: forming a fourth metal wire to cover the through hole and the third electrode to electrically connect the third electrode and the third metal wire.

[0062] Figure 2a to Figure 3c The structural schematic diagram corresponding to the corresponding steps of the manufacturing method of the trench capacitor provided in this embodiment, next, Figure 2a to Figure 3c A method for manufacturing the trench capacitor will be described in detail.

[0063] First, please refer to Figure 2a , performing step S01, providing a substrate 10, in which first to third metal wires 11-13 arranged in the same layer and an insulating layer 22 covering the first to third metal wires 11-13 are formed.

[0064] The substrate 10 may be any suitable base material known to those skilled in the art, for example, at least one of the following materials: silicon, silicon on insulator, stacked silicon on insulator, stacked silicon germanium on insulator, silicon germanium on insulator, and germanium on insulator, etc. In this embodiment, the material of the substrate 10 is described by taking silicon (silicon substrate) as an example.

[0065] A device layer and an interconnection layer electrically connected to the device layer are formed in the substrate 10. The interconnection layer is located above the device layer and can be formed by a Damascus process. Among them, the first to third metal wires 11 to 13 can be three metal wirings arranged at intervals in the Nth layer (N is greater than or equal to 1) in the interconnection layer, and the second metal wire 12 is located between the first metal wire 11 and the third metal wire 13. The materials of the three can include, for example, copper. In this embodiment, the first to third metal wires 11 to 13 can be top-layer metal wirings arranged at intervals. A dielectric barrier layer 21 and an insulating layer 22 are sequentially formed on the first to third metal wires 11 to 13. The material of the dielectric barrier layer 21 is used to block the escape of metal ions and serve as an etching stop layer during etching. Its material can include, for example, silicon nitride or silicon carbonitride, etc. The material of the insulating layer 22 is different from that of the dielectric barrier layer 21, and it can include, for example, silicon oxide or silicon oxynitride, etc.

[0066] In addition, in other examples of this embodiment, as needed, multiple (at least two) first metal wires 11, multiple second metal wires 12 and multiple third metal wires 13 may be provided, and multiple identical metal wires are connected in parallel.

[0067] Next, please refer to Figure 2b , executing step S02 , forming a plurality of first trenches 23 in the insulating layer 22 on the first metal line 11 to expose the first metal line 11 , and forming a plurality of second trenches 24 in the insulating layer 22 on the second metal line 12 to expose the second metal line 12 .

[0068] Specifically, a photolithography process may be used to define two etching regions (not shown) on the insulating layer 22 on the first metal line 11 and the second metal line 12, respectively, and then a dry etching process may be used to sequentially etch the insulating layer 22 and the dielectric barrier layer 21 to form a plurality of first grooves 23 disposed at intervals to expose the first metal line 11 and a plurality of second grooves 24 disposed at intervals to expose the second metal line 12. The first groove 23 and the second groove 24 may have the same opening size. The first groove 23 and the region where the insulating layer 22 is located around it may be a first region AA, which is used to subsequently form a single-layer capacitor thereon, and the second groove 24 and the region where the insulating layer 22 is located around it may be a second region BB, which is used to subsequently form a double-layer capacitor thereon, wherein the first region AA and the second region BB may be disposed at intervals or in contact with each other.

[0069] In addition, as required, in practice, the first area AA may correspond to a plurality of first metal lines 11, and the coverage area of ​​the first area AA may be larger than the area covered by the first metal line, that is, only a portion of the first grooves 23 located directly above the first metal line 11 exposes the first metal line 11, and other first grooves 23 staggered from the first metal line 11 do not expose the first metal line 11. The second area BB and the second grooves 24 are the same as above.

[0070] Next, step S03 is performed to form a single-layer capacitor on the first trench 23 and the insulating layer 22 around it, and a double-layer capacitor on the second trench 24 and the insulating layer 22 around it. The double-layer capacitor includes a first electrode 25a, a first dielectric layer 26a, a second electrode 31a, a second dielectric layer 33a and a third electrode 34a that are conformally formed in sequence. The single-layer capacitor includes a second electrode 31a, a second dielectric layer 33a and a third electrode 34a that are conformally formed in sequence. The first electrode 25a is electrically connected to the second metal wire 12, and the second electrode 31a is electrically connected to the first metal wire 11.

[0071] For details, please refer to Figure 2c , forming a first electrode material layer 25 to conformally cover the surface of the insulating layer 22, the first trench 23 and the inner wall of the second trench 24. Any suitable process can be used to form a thin film conductive layer as the first electrode material layer 25, which may include one or more thin film conductive layers, and its material may include, for example, one or more of titanium, titanium nitride, tantalum or tantalum nitride. Its formation process may include physical vapor deposition, chemical vapor deposition or atomic layer deposition, and the first electrode material layer 25 may have a relatively thin thickness to form a double-layer trench capacitor, and its thickness may be, for example, 100 angstroms to 400 angstroms.

[0072] Please refer to Figure 2d , a patterning process is performed on the first electrode material layer 25, the first electrode material layer 25 in the first area AA and the second area BB is retained, and the first electrode material layer 25 on the inner wall of the second groove 24 and the insulating layer 22 between the second grooves 24 is used as the first electrode 25a, and the first electrode material layer 25 in the first groove 23 is electrically connected to the first metal line 11, and the first electrode 25a is electrically connected to the second metal line 12. In addition, the first electrode 25a can also extend to cover the insulating layer 22 located around the outermost second groove 24, so as to facilitate the patterning process. In some examples, it is also feasible not to retain the first electrode material layer 25 in the first area AA, but retaining the first electrode material layer 25 in the first area AA can make the first area AA and the second area BB have a close structure, which is conducive to the synchronous formation of capacitance in the first area AA and the second area BB, and the first electrode material layer 25 located on the bottom of the first groove 23 can also serve as a protective layer for the first metal line 11.

[0073] Please refer to Figure 2e , forming a first dielectric material layer 26 covering the surface of the insulating layer 22, the inner wall of the first trench 23 and the second trench 24, that is, covering the surface of the insulating layer 22, the first area AA and the second area BB. The material of the first dielectric material layer 26 can be a dielectric material with a relatively high dielectric constant, and its dielectric constant can be, for example, greater than or equal to 3.9, and its material can be, for example, silicon nitride, hafnium oxide, zirconium oxide, aluminum oxide or rhodium oxide.

[0074] Please refer to Figure 2f , a first mask 27 is formed to cover the first dielectric material layer 26 of the second area BB, and an etching process is performed to remove the first dielectric material layer 26 on the surface of the insulating layer 22 and the bottom wall of the first trench 23 to expose the first electrode material layer 25, and the first dielectric material layer 26 of the second area BB is used as the first dielectric layer 26a. Among them, the area covered by the first mask 27 is larger than the area covered by the first electrode 25a, so that the first dielectric layer 26a completely covers the first electrode 25a. In addition, when the first dielectric material layer 26 of the first area AA is dry-etched, the first dielectric material layer 26 located at the bottom of the first trench 23 and the surface of the first electrode material layer 25 is removed, and the first electrode material layer 25 at the bottom of the first trench 23 is exposed, while the first dielectric material layer 26 may be retained, partially retained, or not retained on the sidewall of the first trench 23. In practice, taking the use of a dry etching process to remove the first dielectric material layer 26 as an example, the first dielectric material layer 26 may be retained or partially retained on the sidewall of the first trench 23.

[0075] Please refer to Figure 2g , remove the first mask 27, and conformally form the second electrode material layer 31 to cover the surface of the insulating layer 22, the inner wall of the first trench 23 and the second trench 24, that is, to cover the surface of the insulating layer 22, the first area AA and the second area BB. The material of the second electrode material layer 31 can refer to the material of the first electrode material layer 25.

[0076] Please refer to Figure 2h , a second mask 32 is formed to cover the first area AA, the second area BB and the second electrode material layer 31 therebetween, and an etching process is performed to remove the exposed second electrode material layer 31, and the first area AA, the second area BB and the second electrode material layer 31 therebetween are used as the second electrode 31a, and the second electrode 31a is electrically connected to the first metal line 11 using the first electrode material layer 25 at the bottom of the first trench 23, so that the second electrodes 31a of the capacitors subsequently formed on the second metal line 12 and the capacitors formed on the first metal line 11 are both electrically led to the first metal line 11.

[0077] Please refer to Figure 2i , remove the second mask 32, and conformally form a second dielectric material layer 33 and a third electrode material layer 34 to cover the surface of the insulating layer 22, the inner wall of the first trench 23 and the second trench 24, that is, to cover the surface of the insulating layer 22, the first area AA, and the second area BB. The material of the second dielectric material layer 33 can refer to the material of the first dielectric material layer 26, and the material of the third electrode material layer 34 can refer to the material of the first electrode material layer 25.

[0078] Please refer to Figure 2j, a third mask 35 is formed to cover the first area AA, the second area BB and the third electrode material layer 34 therebetween, and an etching process is performed to remove the exposed third electrode material layer 34 and the second dielectric material layer 33 thereunder, and the first area AA, the second area BB and the third electrode material layer 34 therebetween are used as the third electrode 34a, and the first area AA, the second area BB and the second dielectric material layer 33 therebetween are used as the second dielectric layer 33a. It should be noted that the area covered by the third mask 35 is slightly larger than the area covered by the second mask 32, so that the formed second dielectric layer 33a can completely cover the second electrode 31a, thereby preventing the second electrode 31a from being exposed.

[0079] Thus, a single-layer trench capacitor consisting of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is formed in the first region AA on the first metal line 11, and a double-layer trench capacitor consisting of the first electrode 25a, the first dielectric layer 26a, the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is formed in the second region BB on the second metal line 12, and the second electrode 31a of the single-layer trench capacitor and the double-layer trench capacitor is electrically led downward through the first metal line 11, and the first electrode 25a of the double-layer capacitor is electrically led downward through the second metal line 12. Moreover, a single-layer planar capacitor consisting of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is also formed in the region between the first region AA and the second region BB. The single-layer trench capacitor, the single-layer planar capacitor and the double-layer trench capacitor are connected in parallel, which can significantly increase the capacitance value (capacitance density) on the same substrate 10 area.

[0080] Next, step S04 is performed to form a through hole 36 in the insulating layer 22 on the third metal line 13 to expose the third metal line 13 .

[0081] For details, please refer to Figure 3a , remove the third mask 35 , and perform a patterning process to form at least one through hole 36 in the dielectric barrier layer 21 and the insulating layer 22 on the third metal line 13 to expose the third metal line 13 .

[0082] Next, step S05 is performed to utilize the through hole 36 to form a fourth metal wire 38 a to cover the through hole 36 and the third electrode 34 a so as to electrically connect the third electrode 34 a and the third metal wire 13 .

[0083] For details, please refer to Figure 3b, forming a metal material layer 37 to cover the surface of the insulating layer 22, the surface of the third electrode 34a and the inner wall of the through hole 36. The metal material layer 37 can be a metal material suitable for connecting to an external circuit, such as aluminum. In this embodiment, the material of the first to third metal wires 11 to 13 includes copper, and the metal material layer 37 includes a tantalum nitride layer, a tantalum layer, an aluminum layer, a titanium layer and a titanium nitride layer formed in sequence conformally.

[0084] Please refer to Figure 3c , a patterning process is performed on the metal material layer 37 to retain the metal material layer 37 in the first area AA, the second area BB and therebetween as the fourth metal wire 37a to electrically connect the third electrode 34a and the third metal wire 13, thereby electrically leading the third electrode of the single-layer trench capacitor, the single-layer planar capacitor and the double-layer trench capacitor downward.

[0085] In addition, during the patterning process of the metal material layer 37, the metal material layer 37 can also be used to simultaneously form a metal pad on the insulating layer 22 (or the third dielectric layer), and other top-layer metal lines can be electrically led out to the metal pad for connection with an external circuit.

[0086] Embodiment 2

[0087] Embodiment 2 provides a method for manufacturing a trench capacitor.

[0088] like Figure 1 As shown, the manufacturing method of the trench capacitor provided in the second embodiment includes:

[0089] S01: providing a substrate, wherein first to third metal wires arranged in the same layer and an insulating layer covering the first to third metal wires are formed in the substrate;

[0090] S02: forming a first trench in the insulating layer on the first metal line to expose the first metal line, and forming a second trench in the insulating layer on the second metal line to expose the second metal line;

[0091] S03: forming a single-layer capacitor on the first trench and the insulating layer around it and forming a double-layer capacitor on the second trench and the insulating layer around it, the double-layer capacitor comprising a first electrode, a first dielectric layer, a second electrode, a second dielectric layer and a third electrode formed in sequence conformally, the single-layer capacitor comprising the second electrode, the second dielectric layer and the third electrode formed in sequence conformally, the first electrode being electrically connected to the second metal wire via the second trench, and the second electrode being electrically connected to the first metal wire via the first trench;

[0092] S04: forming a through hole in the insulating layer on the third metal line to expose the third metal line;

[0093] S05: forming a fourth metal wire to cover the through hole and the third electrode to electrically connect the third electrode and the third metal wire.

[0094] The method for manufacturing the trench capacitor provided in the second embodiment is similar to the method provided in the first embodiment, and the difference lies mainly in the difference in the steps of forming the single-layer capacitor and the double-layer capacitor in step S03 of the second embodiment. Figure 4a to Figure 4h The schematic diagram of the structure corresponding to the corresponding steps of forming a single-layer capacitor and a double-layer capacitor provided in the second embodiment. Next, Figure 4a to Figure 4h A method for manufacturing the trench capacitor will be described in detail.

[0095] For details, please refer to Figure 4a , forming a first electrode material layer 25 to conformally cover the surface of the insulating layer 22, the first trench 23 and the inner wall of the second trench 24. Any suitable process can be used to form a thin film conductive layer as the first electrode material layer 25, which may include one or more thin film conductive layers, and its material may include, for example, one or more of titanium, titanium nitride, tantalum or tantalum nitride. Its formation process may include physical vapor deposition, chemical vapor deposition or atomic layer deposition, and the first electrode material layer 25 may have a relatively thin thickness to form a double-layer trench capacitor, and its thickness may be, for example, 100 angstroms to 400 angstroms.

[0096] Please refer to Figure 4b , a patterning process is performed on the first electrode material layer 25, the first electrode material layer 25 in the first area AA and the second area BB is retained, and the first electrode material layer 25 on the inner wall of the second groove 24 and the insulating layer 22 between the second grooves 24 is used as the first electrode 25a, and the first electrode material layer 25 in the first groove 23 is electrically connected to the first metal line 11, and the first electrode 25a is electrically connected to the second metal line 12. In addition, the first electrode 25a can also extend to cover the insulating layer 22 located around the outermost second groove 24, so as to facilitate the patterning process. In some examples, it is also feasible not to retain the first electrode material layer 25 in the first area AA, but retaining the first electrode material layer 25 in the first area AA can make the first area AA and the second area BB have a close structure, which is conducive to the synchronous formation of capacitance in the first area AA and the second area BB, and the first electrode material layer 25 located on the bottom of the first groove 23 can also serve as a protective layer for the first metal line 11.

[0097] Please refer to Figure 4c, forming a first dielectric material layer 26 covering the surface of the insulating layer 22, the inner wall of the first trench 23 and the second trench 24, that is, covering the surface of the insulating layer 22, the first area AA and the second area BB. The material of the first dielectric material layer 26 can be a dielectric material with a relatively high dielectric constant, and its dielectric constant can be, for example, greater than or equal to 3.9, and its material can be, for example, silicon nitride, hafnium oxide, zirconium oxide, aluminum oxide or rhodium oxide.

[0098] Please refer to Figure 4d , a first mask 27 is formed to cover the first dielectric material layer 26 of the second area BB, and an etching process is performed to remove the first dielectric material layer 26 on the surface of the insulating layer 22 and the bottom wall of the first trench 23 to expose the first electrode material layer 25, and the first dielectric material layer 26 of the second area BB is used as the first dielectric layer 26a. Among them, the area covered by the first mask 27 is larger than the area covered by the first electrode 25a, so that the first dielectric layer 26a completely covers the first electrode 25a. In addition, when the first dielectric material layer 26 of the first area AA is dry-etched, the first dielectric material layer 26 located at the bottom of the first trench 23 and the surface of the first electrode material layer 25 is removed, and the first electrode material layer 25 at the bottom of the first trench 23 is exposed, while the first dielectric material layer 26 may be retained, partially retained, or not retained on the sidewall of the first trench 23. In practice, taking the use of a dry etching process to remove the first dielectric material layer 26 as an example, the first dielectric material layer 26 may be retained or partially retained on the sidewall of the first trench 23.

[0099] Please refer to Figure 4e , remove the first mask 27, and sequentially conformally form the second electrode material layer 31, the second dielectric material layer 33, and the third electrode material layer 34 to cover the surface of the insulating layer 22, the inner wall of the first trench 23 and the second trench 24, that is, to cover the surface of the insulating layer 22, the first area AA, and the second area BB. The materials of the second electrode material layer 31 and the third electrode material layer 34 can refer to the first electrode material layer 25, and the materials of the second dielectric material layer 33 can refer to the first dielectric material layer 26, which will not be described in detail here.

[0100] Please refer to Figure 4f, forming a second mask 32 to cover the first area AA, the second area BB and the third electrode material layer 34 therebetween, and performing an etching process to sequentially remove the exposed third electrode material layer 34 and the second electrode material layer 31 and the second dielectric material layer 33 thereunder, and retaining the first area AA, the second area BB and the second electrode material layer 31, the second dielectric material layer 33 and the third electrode material layer 34 therebetween, so as to form the second electrode 31a, the second dielectric layer 33a and the third electrode 34a, and the second electrode 31a is electrically connected to the first metal line 11. The coverage area of ​​the second mask 32 is larger than the coverage area of ​​the first dielectric layer 26a (the first mask 27), so that the second electrode 31a completely covers the first dielectric layer 26a, and after etching to form the second electrode 31a, the second dielectric layer 33a and the third electrode 34a, the surface of the outer wall of the third electrode 34a, the third electrode 34a, the second dielectric layer 33a and the sidewall of the second electrode 31a are exposed.

[0101] Please refer to Figure 4g , remove the second mask 32, and form a third dielectric material layer 38 to conformally cover the surface of the insulating layer 22, the surface of the third electrode 34a, and the sidewall of the second electrode 31a. Of course, the third dielectric material layer 38 also covers the sidewalls of the third electrode 34a and the second dielectric layer 33a. The material of the third dielectric material layer 38 can be any suitable single layer or multilayer material suitable for forming a sidewall, such as silicon nitride, silicon oxide, etc.

[0102] Please refer to Figure 4h , a dry etching process is performed to remove the insulating layer 22 and the third dielectric material layer 38 on the surface of the third electrode 34a, exposing the surface of the third electrode 34a, and using the third dielectric material layer 38 retained on the sidewalls of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a as a sidewall 38a for isolating the second electrode 31a and the third electrode 34a, and making the second electrode 31a completely covered by the dielectric material (sidewall 38a and the second dielectric layer 33a).

[0103] Thus, a single-layer trench capacitor consisting of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is formed in the first region AA on the first metal line 11, and a double-layer trench capacitor consisting of the first electrode 25a, the first dielectric layer 26a, the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is formed in the second region BB on the second metal line 12, and the second electrode 31a of the single-layer trench capacitor and the double-layer trench capacitor is electrically led downward through the first metal line 11, and the first electrode 25a of the double-layer capacitor is electrically led downward through the second metal line 12. Moreover, a single-layer planar capacitor consisting of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is also formed in the region between the first region AA and the second region BB. The single-layer trench capacitor, the single-layer planar capacitor and the double-layer trench capacitor are connected in parallel, which can significantly increase the capacitance value (capacitance density) on the same substrate 10 area.

[0104] The other manufacturing processes of this embodiment are similar to those of the first embodiment, and the details can be referred to the first embodiment, which will not be described in detail here.

[0105] Embodiment 3

[0106] Embodiment 3 provides a trench capacitor.

[0107] Figure 3c This is a schematic structural diagram of a trench capacitor provided in Example 3.

[0108] The trench capacitor provided in the third embodiment can be formed by using the manufacturing method provided in the first embodiment. Figure 3cAs shown, the trench capacitor may include a substrate 10, first to third metal wires 11-13, an insulating layer 22, a double-layer capacitor, a single-layer capacitor, a third dielectric layer and a fourth metal wire 38a. The first to third metal wires 11-13 are arranged in the same layer in the substrate 10; the insulating layer 22 covers the first to third metal wires 11-13 and has a first trench 23 formed in the insulating layer 22 to expose the first metal wire 11, a second trench 24 to expose the second metal wire 12 and a plurality of through holes 36 to expose the third metal wire 13; a double-layer capacitor (double-layer trench capacitor) is formed on the insulating layer 22 in and around the second trench 24, including a first electrode 25a, a first dielectric layer 26a, a second electrode 31a, a second dielectric layer 33a and a third electrode 38a formed in sequence conformally. 34a, the first electrode 25a is electrically connected to the second metal line 12 by using the second groove 24; a single-layer capacitor (single-layer trench capacitor) is formed on the insulating layer 22 in and around the first groove 23, including the second electrode 31a, the second dielectric layer 33a and the third electrode 34a formed in sequence conformally, the second electrode 31a is electrically connected to the first metal line 11 by using the first groove 23; a fourth metal line 38a, the fourth metal line 38a covers the inner wall of the through hole 36 and the surface of the third electrode 34a to electrically connect the third metal line 13 and the third electrode 34a. In addition, a single-layer planar capacitor composed of the second electrode 31a, the second dielectric layer 33a and the third electrode 34a is also formed in the area between the first groove 23 and the second groove 24. The first dielectric layer 26a completely covers the first electrode 25a (including its sidewalls) and the second dielectric layer 33a completely covers the second electrode 31a (including its sidewalls), thereby achieving better electrical isolation among the first electrode 25a, the second electrode 31a and the third electrode 34a.

[0109] In addition, in other examples provided in this embodiment, the trench capacitor can also be formed by the manufacturing method provided in the second embodiment. The difference between the trench capacitor and the aforementioned trench capacitor is that the second dielectric layer only covers the surface of the second electrode but does not cover the side wall of the second electrode, that is, the edges of the second electrode, the second dielectric layer and the third electrode form a vertical or nearly vertical step, thereby forming a side wall covering the side wall (step) of the second electrode, the second dielectric layer and the third electrode, and the side wall and the second dielectric layer are used to electrically isolate the second electrode and the third electrode.

[0110] In summary, the present invention forms a first groove in the insulating layer on the first metal wire to expose the first metal wire and forms a second groove in the insulating layer on the second metal wire to expose the second metal wire, and forms a single-layer trench capacitor in the first groove and on the insulating layer around the first groove, and forms a double-layer trench capacitor in the second groove and the insulating layer around the second groove. The single-layer trench capacitor is connected in parallel with the double-layer trench capacitor, and the single-layer trench capacitor is directly formed by using the second electrode, the second dielectric layer and the third electrode of the double-layer trench capacitor. In addition, in the two capacitors, the first electrode is connected to the second metal wire at the bottom of the second groove, the second electrode is connected to the first metal wire at the bottom of the first groove, and the third electrode is connected to the third metal wire through the fourth metal wire using the through hole in the insulating layer. Thus, the three electrodes of the double-layer capacitor and the single-layer capacitor are led downward using the first to third metal wires in the substrate, and the lead-out of the double-layer trench capacitor and the wiring of the metal wires on the insulating layer are completed without adding additional process steps, thereby increasing the capacitance density of the trench capacitor, reducing the difficulty of process integration, and being conducive to improving the degree of freedom of trench capacitor design.

[0111] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for manufacturing a trench capacitor, characterized in that: include: Providing a substrate, wherein first to third metal wires arranged in the same layer and an insulating layer covering the first to third metal wires are formed in the substrate; forming a first trench in the insulating layer on the first metal line to expose the first metal line, and forming a second trench in the insulating layer on the second metal line to expose the second metal line; A single-layer capacitor is formed on the first trench and the insulating layer around it, and a double-layer capacitor is formed on the second trench and the insulating layer around it, wherein the double-layer capacitor comprises a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode which are formed conformally in sequence, and the single-layer capacitor comprises the second electrode, the second dielectric layer, and the third electrode which are formed conformally in sequence, the first electrode is electrically connected to the second metal wire via the second trench, and the second electrode is electrically connected to the first metal wire via the first trench; forming a through hole in the insulating layer on the third metal line to expose the third metal line; A fourth metal line is formed to cover the through hole and the third electrode to electrically connect the third electrode and the third metal line.

2. The method for manufacturing a trench capacitor according to claim 1, wherein: A dielectric barrier layer is also provided between the first to third metal wires and the insulating layer.

3. The method for manufacturing a trench capacitor according to claim 1, wherein: The insulating layer includes a first region located above the first metal line and a second region located above the second metal line, the first region is provided with the first groove, and the second region is provided with the second groove. The steps of forming the single-layer capacitor and the double-layer capacitor include: Forming a first electrode material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench; Performing a patterning process on the first electrode material layer, retaining the first electrode material layer in the first region and the second region, and using the first electrode material layer in the second region as the first electrode, and the first electrode material layer in the first groove is electrically connected to the first metal wire, and the first electrode is electrically connected to the second metal wire; Forming a first dielectric material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench; forming a first mask to cover the first dielectric material layer in the second region, and performing an etching process to remove the first dielectric material layer on the surface of the insulating layer and the bottom wall of the first trench to expose the first electrode material layer in the first trench, and using the first dielectric material layer in the second region as the first dielectric layer; removing the first mask to form a second electrode material layer covering the surface of the insulating layer, the first trench and the inner wall of the second trench; forming a second mask to cover the first region, the second region and the second electrode material layer therebetween, removing the exposed second electrode material layer, and using the first region, the second region and the second electrode material layer therebetween as the second electrode, the second electrode being electrically connected to the first electrode material layer and the first metal line in the first trench; Removing the second mask, and conformally forming a second dielectric material layer and a third electrode material layer in sequence to cover the surface of the insulating layer, the inner wall of the first trench and the second trench; forming a third mask to cover the first region, the second region and the third electrode material layer therebetween, removing the exposed third electrode material layer and the second dielectric material layer thereunder, and using the first region, the second region and the third electrode material layer therebetween as the third electrode, and using the first region, the second region and the second dielectric material layer therebetween as the second dielectric layer, wherein the third mask completely covers the second electrode; The third mask is removed.

4. The method for manufacturing a trench capacitor according to claim 1, wherein: The insulating layer includes a first region located above the first metal line and a second region located above the second metal line, the first region is provided with the first groove, and the second region is provided with the second groove. The steps of forming the single-layer capacitor and the double-layer capacitor include: Forming a first electrode material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench; Performing a patterning process on the first electrode material layer, retaining the first electrode material layer in the first region and the second region, and using the first electrode material layer in the second region as the first electrode, and the first electrode material layer in the first groove is electrically connected to the first metal wire, and the first electrode is electrically connected to the second metal wire; Forming a first dielectric material layer to cover the surface of the insulating layer, the first trench and the inner wall of the second trench; forming a first mask to cover the first dielectric material layer in the second region, and performing an etching process to remove the first dielectric material layer on the surface of the insulating layer and the bottom wall of the first trench to expose the first electrode material layer, and using the first dielectric material layer in the second region as the first dielectric layer; Removing the first mask, and conformally forming a second electrode material layer, a second dielectric material layer, and a third electrode material layer in sequence to cover the surface of the insulating layer, the first trench, and the inner wall of the second trench; forming a second mask to cover the first region, the second region and the third electrode material layer therebetween, removing the exposed third electrode material layer and the second electrode material layer and the second dielectric material layer thereunder, and retaining the first region, the second region and the second electrode material layer, the second dielectric material layer and the third electrode material layer therebetween to form the second electrode, the second dielectric layer and the third electrode, wherein the second electrode is electrically connected to the first electrode material layer and the first metal line in the first trench; removing the second mask to form a third dielectric material layer to conformally cover the surface of the insulating layer, the surface of the third electrode and the sidewall of the second electrode; A dry etching process is performed to remove the third dielectric material layer on the surface of the insulating layer and the third electrode, and the third dielectric material layer retained on the side wall of the second electrode is used as a side wall.

5. The method for manufacturing a trench capacitor according to claim 3 or 4, characterized in that: A single-layer planar capacitor composed of the second electrode, the second dielectric layer and the third electrode is also formed between the first region and the second region.

6. The method for manufacturing a trench capacitor according to claim 3 or 4, characterized in that: The materials of the first electrode, the second electrode and the third electrode include one or any combination of titanium, titanium nitride, tantalum and tantalum nitride.

7. The method for manufacturing a trench capacitor according to claim 3 or 4, characterized in that: The dielectric constants of the first dielectric layer and the second dielectric layer are greater than or equal to 3.

9.

8. The method for manufacturing a trench capacitor according to claim 1, wherein: The step of forming the fourth metal line includes: forming a metal material layer to cover the surface of the insulating layer, the surface of the third electrode and the inner wall of the through hole; The metal material layer is patterned to retain the metal material layer above the first metal line, the second metal line and the third metal line as the fourth metal line to electrically connect the third electrode of the single-layer capacitor and the double-layer capacitor with the third metal line.

9. The method for manufacturing a trench capacitor according to claim 8, wherein: When the metal material layer is patterned, a metal pad is also formed on the surface of the insulating layer simultaneously for connection with an external circuit.

10. A trench capacitor, characterized in that: include: substrate; First to third metal wires are arranged in the same layer in the substrate; an insulating layer, covering the first to third metal wires and having a first groove exposing the first metal wire, a second groove exposing the second metal wire, and a through hole exposing the third metal wire; A double-layer capacitor is formed in the second trench and on the insulating layer around it, comprising a first electrode, a first dielectric layer, a second electrode, a second dielectric layer and a third electrode which are sequentially formed conformally, wherein the first electrode is electrically connected to the second metal line by using the second trench; A single-layer capacitor is formed in the first trench and on the insulating layer around it, comprising the second electrode, the second dielectric layer and the third electrode which are formed conformally in sequence, and the second electrode is electrically connected to the first metal line by using the first trench; The fourth metal wire covers the through hole and the third electrode to electrically connect the third metal wire and the third electrode.

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