Simple power module life-prolonging packaging structure and packaging method

By using nano-silver solder paste low-temperature sintering process above the chip of the power module, the second sintered silver solder layer is formed as a stress buffer layer, and the thermal stress problem caused by the thermal expansion coefficient mismatch of the power module is solved, and the reliability and use of the module are improved. Lifespan effect while simplifying the packaging process.

CN119480846APending Publication Date: 2025-02-18ZHEJIANG XINGKE OPTOELECTRONICS TECHNOLOGY CO LTD +1
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Patent Information

Application Number
CN202411524110.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-30
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

The power module is subject to thermal stress due to mismatch of the thermal expansion coefficient, which causes the bonding wire to fall off, which in turn causes the module to fail. The existing buffer layer introduces a complex packaging process.

Method used

The second sintered silver solder layer is formed on the chip as a stress buffer layer by using the low-temperature sintering process of nano-silver solder paste, and the connection between the bonding wire and the chip is converted into a connection between the bonding wire and the second sintered silver solder layer, and the connection between the sintered silver is used. The thermal expansion coefficient reduces thermal mechanical stress.

Benefits of technology

It significantly reduces the thermal mechanical stress at the bonding point, improves the reliability and service life of the power module, while simplifying the packaging process and reducing production costs.

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Abstract

The invention provides a simple power module life-prolonging packaging structure and a packaging method, and belongs to the technical field of power module packaging, the power module life-prolonging packaging structure comprises a DBC substrate, the DBC substrate comprises a first copper layer, a second copper layer and a ceramic layer, the first copper layer and the second copper layer are arranged on the ceramic layer, the bottom of a chip and the first copper layer are connected through low-temperature sintering of nano-silver soldering paste, and the bottom of the chip is connected with the second copper layer through low-temperature sintering of nano-silver soldering paste. Forming a first sintered silver welding layer; performing low-temperature sintering on the upper part of the chip through nano-silver soldering paste to form a second sintered silver soldering layer; and bonding the two ends of the bonding wire on the second sintered silver welding layer and the second copper layer through ultrasonic pressure. According to the invention, the second sintered silver welding layer formed by low-temperature sintering of the nano-silver soldering paste above the chip is used as the stress buffer layer, so that the thermal mechanical stress at a bonding point can be remarkably reduced, the service life of the power module is prolonged, and meanwhile, additional steps and consideration factors caused by introduction of the stress buffer layer in the past are greatly simplified; production efficiency can be improved, cost is reduced, performance is improved, and reliability is enhanced.
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Description

Technical Field

[0001] The present invention belongs to the technical field of power module packaging, and in particular relates to a simple power module life extension packaging structure and a packaging method. Background Art

[0002] A power module is a component that integrates power electronic devices and control circuits, and is mainly used for power conversion, power amplification, power supply control and protection, etc.

[0003] In the prior art, the power module is mainly composed of the following parts: Chip: The core of the entire power module, which plays the role of frequency conversion, inversion, voltage conversion, power amplification, power control, etc.

[0004] Bonding wire: realize internal electrical interconnection, including connection between chips and between chips and solder joints.

[0005] Solder layer: connects various components to ensure the transmission of electrical signals.

[0006] Copper-clad ceramic substrate (DBC substrate): mainly composed of materials such as aluminum oxide, aluminum nitride or silicon nitride, which plays the role of insulation, thermal conductivity and mechanical support.

[0007] Heat sink: responsible for heat conduction while providing mechanical support and structural protection.

[0008] Thermal expansion coefficient mismatch in power modules is one of the main reasons for their failure. Because power modules are composed of multi-layer packaging structures, the thermal expansion coefficients of each layer of packaging materials are different. Temperature fluctuations can cause thermal mismatch, generate thermal stress, cause bonding wires to fall off, and ultimately cause module failure.

[0009] In order to solve the problem of thermal expansion coefficient mismatch, a buffer layer can be used. Adding a buffer layer to the bonding wire package can significantly reduce the equivalent stress of the bonding point and improve fatigue life. However, the introduction of the existing buffer layer will make the packaging process very complicated. Because the buffer layer is an intermediate layer, its introduction requires additional steps and considerations in the packaging process, thereby increasing the complexity of the process. Therefore, it is urgent to develop a simple power module life extension packaging structure and packaging method that can not only solve the problem of thermal expansion coefficient mismatch, but also simplify the existing packaging process. Summary of the invention

[0010] The problem to be solved by the present invention is to provide a simple power module life extension packaging structure and packaging method.

[0011] In order to solve the above technical problems, the technical solution adopted by the present invention is: a simple power module life extension packaging structure, including a DBC substrate, a first sintered silver solder layer, a chip, a bonding wire and a second sintered silver solder layer, the DBC substrate includes a first copper layer, a second copper layer and a ceramic layer, the first copper layer and the second copper layer are arranged on the ceramic layer, the bottom of the chip is connected to the first copper layer through the first sintered silver solder layer, the second sintered silver solder layer is arranged above the chip, one end of the bonding wire is connected to the second sintered silver solder layer, and the other end is connected to the second copper layer.

[0012] The present invention also provides a simple packaging method for a power module life extension packaging structure, comprising the following steps: S1, connecting the bottom of the chip to the first copper layer by low-temperature sintering of nano silver solder paste to form a first sintered silver solder layer connecting the chip and the first copper layer; S2, sintering the chip at a low temperature through a nano silver solder paste to form a second sintered silver solder layer; S3, bonding the two ends of the bonding wire to the second sintered silver solder layer and the second copper layer by ultrasonic pressure.

[0013] Furthermore, in step S1 and step S2, during sintering, the sintering temperature is 180° C., the sintering time is 60 min, and the furnace is cooled to room temperature.

[0014] Due to the adoption of the above technical solution, the present invention has the following beneficial effects: The present invention uses a second sintered silver solder layer formed by low-temperature sintering of a nano silver solder paste above the chip as a stress buffer layer, converts the connection between the bonding wire and the chip into a connection between the bonding wire and the second sintered silver solder layer, that is, converts the thermal expansion coefficient mismatch between the bonding wire and the chip at the bonding point into a thermal expansion coefficient mismatch between the bonding wire and the sintered silver in the second sintered silver solder layer, which can significantly reduce the thermomechanical stress at the bonding point, improve the reliability of the power module, and extend the service life of the power module.

[0015] The present invention utilizes the nano silver solder paste sintering process to directly prepare the second sintered silver solder layer as a stress buffer layer, which greatly simplifies the extra steps and considerations caused by the introduction of the stress buffer layer in the past. In addition, the nano silver solder paste sintering process and the bonding wire ultrasonic pressure bonding technology involved in the present invention are easy to operate, and there is no need to expand new power module packaging equipment, which is conducive to the further development and commercial application of power modules.

[0016] It can be seen that the present invention simplifies the packaging method, reduces the production steps and time, and improves the throughput of the production line, thereby accelerating the time to market and improving production efficiency; at the same time, by optimizing the process flow and reducing material usage, the simplified packaging method can significantly reduce production costs, making the product more competitive; in addition, the simplified packaging method can improve the chip integration and interconnection speed, reduce latency, improve the heat dissipation and mechanical strength of the product, enhance its long-term stability and service life, thereby improving the overall performance of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below with reference to the accompanying drawings and in combination with examples, and the advantages and implementation methods of the present invention will become more obvious. The contents shown in the accompanying drawings are only used to explain the present invention and do not constitute any limitation to the present invention in any sense. In the accompanying drawings: Figure 1 It is a structural schematic diagram of the packaging structure of the present invention.

[0018] Figure 2 It is a schematic diagram of finite element simulation of shear stress at the bonding point on the second sintered silver solder layer of the packaging structure of the present invention.

[0019] Figure 3 It is a schematic diagram of finite element simulation of shear strain at the bonding point on the second sintered silver solder layer of the packaging structure of the present invention.

[0020] Figure 4 It is a schematic diagram of finite element simulation of shear stress at bonding points on a chip in the prior art.

[0021] Figure 5 It is a schematic diagram of finite element simulation of shear strain at bonding points on a chip in the prior art.

[0022] In the figure: 101, first copper layer; 102, first sintered silver solder layer; 103, chip; 104, bonding wire; 105, second sintered silver solder layer; 106, second copper layer; 107, ceramic layer. DETAILED DESCRIPTION

[0023] like Figure 1 As shown, a simple power module life extension packaging structure of the present invention includes a DBC substrate, a first sintered silver solder layer 102, a chip 103, a bonding wire 104 and a second sintered silver solder layer 105. The DBC substrate includes a first copper layer 101, a second copper layer 106 and a ceramic layer 107. The first copper layer 101 and the second copper layer 106 are arranged on the ceramic layer 107. The bottom of the chip 103 is connected to the first copper layer 101 through the first sintered silver solder layer 102. The second sintered silver solder layer 105 is arranged above the chip 103. One end of the bonding wire 104 is connected to the second sintered silver solder layer 105, and the other end is connected to the second copper layer 106.

[0024] The second sintered silver solder layer 105 disposed above the chip 103 serves as a stress buffer layer, converting the connection between the bonding wire 104 and the chip 103 into a connection between the bonding wire 104 and the second sintered silver solder layer 105, that is, the thermal expansion coefficients of the bonding wire 104 and the chip 103 at the bonding point are mismatched (the thermal expansion coefficient of the aluminum bonding wire is 23.5×10 -6 / ℃, thermal expansion coefficient of SiC chip: 4.3×10 -6 / °C) is converted into a mismatch in thermal expansion coefficient between the bonding wire 104 and the sintered silver of the second sintered silver solder layer 105 (thermal expansion coefficient of aluminum bonding wire: 23.5×10 -6 / ℃, thermal expansion coefficient of sintered silver: 19.6×10 -6 / ℃), reducing the thermomechanical stress at the bonding point, which can improve the reliability of the power module and extend the service life of the power module.

[0025] The present invention also provides a packaging method for a simple power module life extension packaging structure, comprising the following steps: S1, connecting the bottom of the chip 103 to the first copper layer 101 by low-temperature sintering of nano silver solder paste to form a first sintered silver solder layer 102 connecting the chip 103 and the first copper layer 101; S2, sintering the chip 103 at low temperature through nano silver solder paste to form a second sintered silver solder layer 105; S3, bonding the two ends of the bonding wire 104 to the second sintered silver solder layer 105 and the second copper layer 106 by ultrasonic pressure.

[0026] In step S1 and step S2, the sintering temperature is 180° C., the sintering time is 60 min, and the furnace is cooled to room temperature.

[0027] like Figure 2 and Figure 3 As shown, the packaging structure of the present invention is subjected to thermosetting coupled finite element simulation. At 175° C., the maximum shear stress at the bonding point between the second sintered silver solder layer 105 and the bonding wire 104 is 43.035 MPa, and the maximum shear strain is 0.0016722.

[0028] like Figure 4 and Figure 5 As shown, at 175° C., the maximum shear stress at the bonding point where the bonding wire 104 is directly bonded to the chip 103 in the prior art is 232.14 MPa, and the maximum shear strain is 0.0090203.

[0029] It can be seen that compared with the packaging structure of the prior art, the maximum shear stress at the bonding point of the packaging structure of the present invention is reduced by 189.105 MPa and the maximum shear strain is reduced by 0.0073481. While the packaging method and packaging structure are simpler, the purpose of greatly reducing the thermal mechanical stress at the bonding point can be achieved, thereby extending the service life of the power module.

[0030] The embodiments of the present invention are described in detail above, but the contents are only preferred embodiments of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of the present invention.

Claims

1. A simple power module life extension packaging structure, characterized in that: It includes a DBC substrate, a first sintered silver solder layer, a chip, a bonding wire and a second sintered silver solder layer. The DBC substrate includes a first copper layer, a second copper layer and a ceramic layer. The first copper layer and the second copper layer are arranged on the ceramic layer. The bottom of the chip is connected to the first copper layer through the first sintered silver solder layer. The second sintered silver solder layer is arranged above the chip. One end of the bonding wire is connected to the second sintered silver solder layer, and the other end is connected to the second copper layer.

2. A packaging method for a simple power module life extension packaging structure, used to prepare the simple power module life extension packaging structure according to claim 1, characterized in that: The following steps are involved: S1, connecting the bottom of the chip to the first copper layer by low-temperature sintering of nano silver solder paste to form a first sintered silver solder layer connecting the chip and the first copper layer; S2, sintering the chip at a low temperature through a nano silver solder paste to form a second sintered silver solder layer; S3, bonding the two ends of the bonding wire to the second sintered silver solder layer and the second copper layer by ultrasonic pressure.

3. The packaging method of the simplified power module life extension packaging structure according to claim 2, characterized in that: In step S1 and step S2, during sintering, the sintering temperature is 180° C., the sintering time is 60 min, and the furnace is cooled to room temperature.