Current sharing control method, system and equipment of interleaved parallel LLC resonant converter and medium

Abstract

The invention discloses a current sharing control method, system and device of an interleaving LLC resonant converter and a medium. The method comprises the steps that four diodes in the secondary side of the interleaving LLC resonant converter are replaced with synchronous rectifier tubes; determining the average output current of each phase in the interleaved parallel LLC resonant converter; according to the average output current of each phase in the interleaving LLC resonant converter, the switching-on and switching-off moments of a synchronous rectifier tube in each phase are adjusted, so that the transmission power of each phase in the interleaving LLC resonant converter is equal, and the method, the system, the equipment and the medium can improve the current sharing speed of the interleaving LLC resonant converter.

Description

Technical Field

[0001] The present invention belongs to the field of power electronic technology DC / DC converters, and relates to a current sharing control method, system, equipment and medium for staggered parallel LLC resonant converters. Background Art

[0002] With the increasing demand for electric energy in modern society, LLC resonant converters have been widely used in the fields of light-emitting diode driving and electric vehicle charging due to their high power density and excellent soft switching characteristics. In low-voltage and high-current application scenarios, interleaved parallel technology can overcome the disadvantage of large current stress of single-phase LLC. However, the difference in resonance parameters of each phase will bring serious uneven current problems, which greatly shortens the service life of the equipment.

[0003] Synchronous rectification technology uses controllable devices (such as MOSFET) to control the current flow and voltage waveform, which can improve power factor, reduce heat loss and conduction loss. It is one of the important technologies of modern power conversion systems. For the staggered parallel LLC resonant converter with full-bridge on both the original and secondary sides, in order to solve the problem of uneven current, domestic and foreign scholars have proposed a current equalization control strategy that replaces some diodes (1 or 2) on the secondary side with synchronous rectification MOS tubes and adjusts their turn-on or turn-off time. However, this strategy lacks the support of theoretical calculation results; all four diodes are not replaced with synchronous rectifier tubes, so there is still room for reducing the conduction loss of the switch tube; the turn-on and turn-off times of the synchronous rectifier tubes are not adjusted at the same time, so when the resonant parameters change, there is still room for improvement in the speed at which the two phases reach equal current again. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a current sharing control method, system, device and medium for an interleaved parallel LLC resonant converter. The method, system, device and medium can increase the speed of current sharing of the interleaved parallel LLC resonant converter and have low conduction loss.

[0005] In order to achieve the above object, the present invention adopts the following technical scheme:

[0006] In one aspect, the present invention provides a current sharing control method for an interleaved parallel LLC resonant converter, comprising:

[0007] Replace the four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers;

[0008] Determine the average output current of each phase in the interleaved parallel LLC resonant converter;

[0009] The on and off moments of the synchronous rectifiers in each phase are adjusted according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal.

[0010] The current sharing control method of the interleaved parallel LLC resonant converter of the present invention is further improved in that:

[0011] Furthermore, assuming that the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-on time of the synchronous rectifier tube in the first phase is advanced.

[0012] Furthermore, assuming that the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-off time of the synchronous rectifier tube in the second phase is delayed.

[0013] Furthermore, assuming that the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-on time of the synchronous rectifier tube in the first phase is advanced, and the turn-off time of the synchronous rectifier tube in the second phase is delayed.

[0014] Furthermore, the synchronous rectifier is a MOSFET.

[0015] In a second aspect of the present invention, the present invention provides a current sharing control system of an interleaved parallel LLC resonant converter, comprising:

[0016] A replacement module is used to replace four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers;

[0017] A determination module, used to determine the average output current of each phase in the staggered parallel LLC resonant converter;

[0018] The control module is used to adjust the on and off moments of the synchronous rectifier tubes in each phase according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal.

[0019] ​​​Furthermore, assuming that the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When the synchronous rectifier tube in the first phase is turned on, the turn-on time of the synchronous rectifier tube in the first phase is advanced, or the turn-off time of the synchronous rectifier tube in the second phase is delayed, or the turn-on time of the synchronous rectifier tube in the first phase is advanced and the turn-off time of the synchronous rectifier tube in the second phase is delayed.

[0020] Furthermore, the synchronous rectifier is a MOSFET.

[0021] In a third aspect of the present invention, the present invention provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the current sharing control method of the staggered parallel LLC resonant converter when executing the computer program.

[0022] In a fourth aspect of the present invention, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the current sharing control method of the staggered parallel LLC resonant converter are implemented.

[0023] The present invention has the following beneficial effects:

[0024] When the current sharing control method, system, device and medium of the interleaved parallel LLC resonant converter described in the present invention are operated, the four diodes in the secondary side of the interleaved parallel LLC resonant converter are replaced with synchronous rectifier tubes, and then the turn-on and turn-off moments of the synchronous rectifier tubes in each phase are adjusted according to the average output current of each phase in the interleaved parallel LLC resonant converter. Therefore, the conduction loss of the switch tube is small and the current sharing speed of the interleaved parallel LLC resonant converter is fast.

[0025] Furthermore, when I o1 o2 When the synchronous rectifier tube in the first phase is turned on, the turn-on time of the synchronous rectifier tube in the second phase is delayed. By adjusting the turn-on and turn-off time of the synchronous rectifier tubes in the two phases at the same time, the current balancing speed of the staggered parallel LLC resonant converter is further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0027] Figure 1 ​​It is the topology diagram of the synchronous rectification LLC resonant converter;

[0028] Figure 2 This is the waveform diagram of precise synchronous rectification when the LLC resonant converter works in PO mode;

[0029] Figure 3 The waveform diagram of the LLC secondary synchronous rectifier when it is turned on in advance and turned off in delay;

[0030] Figure 4 is a curve diagram of the converter gain changing with the early turn-on and delayed turn-off angles;

[0031] Figure 5 It is the topology diagram of the interleaved parallel LLC resonant converter;

[0032] Figure 6 Flow chart of current sharing strategy 3) for staggered parallel LLC resonant converter;

[0033] Figure 7 The control circuit diagram of the staggered parallel LLC resonant converter current sharing strategy 3);

[0034] Figure 8 The waveform of the average output current of two phases of interleaved parallel LLC when the resonance parameters change;

[0035] Fig. 9 The current waveform of the LLC two-phase resonant cavity in staggered parallel connection when the resonant parameters change;

[0036] Fig.10 The waveform diagram of the output current of the two-phase secondary side of the interleaved parallel LLC when the resonance parameters change; DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0039] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0040] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0041] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0042] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0043] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0044] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0045] Embodiment 1

[0046] refer to Figure 1 , all four diodes in the secondary side rectification circuit of the LLC resonant converter are replaced with MOSFETs to obtain a synchronous rectification LLC resonant converter.

[0047] refer to Figure 2 , a pulse signal is applied to the synchronous rectifier tube so that its opening and closing moments are completely consistent with those during passive commutation, thus achieving ideal synchronous rectification, and its steady-state voltage and current waveforms are exactly the same as those of passive commutation.

[0048] refer to Figure 3 and Figure 4 Taking the PO mode as an example, the synchronous rectifier tube is turned on or off in advance on the basis of precise synchronous rectification to obtain more working stages and more complex waveforms. Using the time domain model, a curve of the circuit gain with the angle of early turn-on or delayed turn-off can be drawn.

[0049] refer to Figure 5 , interleaved parallel technology, by setting the phase difference of the two-phase switch drive signal in the LLC resonant converter to 90°, so that the two-phase output current i o1 ,i o2 The currents are 180° apart, thus reducing the output current ripple. However, due to temperature changes, device aging, etc., there will be slight differences in the capacitance and inductance values ​​of the two resonant cavities, which will cause the problem of uneven current between the two phases, that is, I o1 ≠I o2 I o1 , I o2 They are the average output currents of phases 1 and 2 in one cycle, and their square sum is proportional to the transmission power of each phase.

[0050] refer to Figure 6 and Figure 7 , assuming I o1 o2 ​, at this time, it is necessary to increase the transmission power of phase 1 and reduce the transmission power of phase 2. To this end, based on the calculation results of the time domain model, the following three current sharing control strategies based on the adjustment of the opening and closing time of the synchronous rectifier are adopted: 1) Delay the closing time of the 2-phase synchronous rectifier; 2) Advance the opening time of the 1-phase synchronous rectifier; 3) Adopt the above two strategies at the same time. In specific applications, it is necessary to collect and compare the average output current of the two phases in real time, and adjust the opening and closing time of the synchronous rectifier through closed-loop feedback, so as to finally make the two phases equalize the current. In addition, the output voltage is controlled to be constant by fine-tuning the switching frequency, thereby ensuring that the total transmission power remains unchanged. Reference Figure 8-Figure 10 , running simulation in PLECS, we can get the waveforms without taking current balancing measures and taking three current balancing strategies. Figure 8 In the 0-0.2s circuit, the parameters of the two-phase resonant cavity are exactly the same. When t=0.2s, the L of the two phases r and C r It becomes 0.9 times of the original value to simulate the maximum deviation of 10% when the actual circuit parameters change. When no current balancing measures are taken, the 10% parameter deviation will cause serious current unequalization problems. When any current balancing strategy is adopted, the circuit will reach the current balancing state again at time t2, and the output current after t2 is the same as that of 0~0.2s.

[0051] Referring to Table 1, it can be found that the time Δt=t2-0.2 required for the three control strategies to re-achieve current sharing. Strategy 3 takes the shortest time for the circuit to reach steady state, so the strategy proposed by the present invention is to simultaneously adjust the opening and closing time of the two-phase synchronous rectifier tubes.

[0052] Table 1

[0053]

[0054] Embodiment 2

[0055] The current sharing control system of the staggered parallel LLC resonant converter of the present invention comprises:

[0056] A replacement module is used to replace four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers;

[0057] A determination module, used to determine the average output current of each phase in the staggered parallel LLC resonant converter;

[0058] The control module is used to adjust the on and off moments of the synchronous rectifier tubes in each phase according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal.

[0059] As an implementation mode of the present invention, assume that the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When the synchronous rectifier tube in the first phase is turned on, the turn-on time of the synchronous rectifier tube in the first phase is advanced, or the turn-off time of the synchronous rectifier tube in the second phase is delayed, or the turn-on time of the synchronous rectifier tube in the first phase is advanced and the turn-off time of the synchronous rectifier tube in the second phase is delayed.

[0060] As an implementation manner of the present invention, the synchronous rectifier is a MOSFET.

[0061] The division of modules in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each embodiment of the present application may be integrated into a processor, or may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0062] Embodiment 3

[0063] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of implementing the current sharing control method of the staggered parallel LLC resonant converter are implemented, for example, including: replacing four diodes in the secondary side of the staggered parallel LLC resonant converter with synchronous rectifiers; determining the average output current of each phase in the staggered parallel LLC resonant converter; adjusting the on and off time of the synchronous rectifier in each phase according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal. Wherein, the memory may include a memory, such as a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk memory, etc.; the processor, the network interface, and the memory are interconnected through an internal bus, and the internal bus may be an industrial standard architecture bus, a peripheral component interconnection standard bus, an extended industrial standard architecture bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The memory is used to store programs. Specifically, the program may include a program code, and the program code includes a computer operation instruction. The memory may include memory and nonvolatile memory and provides instructions and data to the processor.

[0064] Embodiment 4

[0065] ​A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of implementing the current sharing control method of the staggered parallel LLC resonant converter are implemented, for example, including: replacing the four diodes in the secondary side of the staggered parallel LLC resonant converter with synchronous rectifiers; determining the average output current of each phase in the staggered parallel LLC resonant converter; adjusting the opening and closing time of the synchronous rectifier in each phase according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal. Specifically, the computer-readable storage medium includes, but is not limited to, for example, volatile memory and / or non-volatile memory. The volatile memory may include random access memory (RAM) and / or cache memory (cache), etc. The non-volatile memory may include read-only memory (ROM), hard disk, flash memory, optical disk, magnetic disk, etc.

[0066] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0067] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0068] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0069] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0070] Those skilled in the art will readily appreciate other embodiments of the present invention after considering the specification and disclosure of the invention. This application is intended to cover any variations, uses or adaptations of the present invention that follow the general principles of the present invention and include common knowledge or customary techniques in the art that are not disclosed by the present invention. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present invention are indicated by the following claims.

[0071] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

[0072] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent structural change made to the above embodiment based on the technical essence of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A current sharing control method for interleaved parallel LLC resonant converters, characterized in that: include: Replace the four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers; Determine the average output current of each phase in the interleaved parallel LLC resonant converter; The on and off moments of the synchronous rectifiers in each phase are adjusted according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal.

2. The current sharing control method of the interleaved parallel LLC resonant converter according to claim 1 is characterized in that: The average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-on time of the synchronous rectifier tube in the first phase is advanced.​ 3. The current sharing control method of the interleaved parallel LLC resonant converter according to claim 1 is characterized in that: The average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-off time of the synchronous rectifier tube in the second phase is delayed.​ 4. The current sharing control method of the interleaved parallel LLC resonant converter according to claim 1 is characterized in that: The average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When , the turn-on time of the synchronous rectifier tube in the first phase is advanced, and the turn-off time of the synchronous rectifier tube in the second phase is delayed.​ 5. The current sharing control method of the interleaved parallel LLC resonant converter according to claim 1, characterized in that: The synchronous rectifier is a MOSFET.

6. A current sharing control system for interleaved parallel LLC resonant converters, characterized in that: include: A replacement module is used to replace four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers; A determination module, used to determine the average output current of each phase in the staggered parallel LLC resonant converter; The control module is used to adjust the on and off moments of the synchronous rectifier tubes in each phase according to the average output current of each phase in the staggered parallel LLC resonant converter, so that the transmission power of each phase in the staggered parallel LLC resonant converter is equal.

7. The current sharing control system of the interleaved parallel LLC resonant converter according to claim 5 is characterized in that: The average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 o2 When the synchronous rectifier tube in the first phase is turned on, the turn-on time of the synchronous rectifier tube in the first phase is advanced, or the turn-off time of the synchronous rectifier tube in the second phase is delayed, or the turn-on time of the synchronous rectifier tube in the first phase is advanced and the turn-off time of the synchronous rectifier tube in the second phase is delayed.​ 8. The current sharing control system of the interleaved parallel LLC resonant converter according to claim 6, characterized in that: The synchronous rectifier is a MOSFET.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the current sharing control method of the staggered parallel LLC resonant converter as described in any one of claims 1 to 5 are implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the current sharing control method of the staggered parallel LLC resonant converter as described in any one of claims 1 to 5 are implemented.

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