GPP chip manufacturing process
By forming a double channel pattern in the GPP chip production process to protect the grains, the problem of glass damage during lobes in traditional processes is solved, and the stability of the chip and product yield are improved.
Patent Information
- Application Number
- CN202411618317.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-13
- Publication Date
- 2025-02-18
AI Technical Summary
In traditional GPP chip production process, glass is easily damaged during lobes, resulting in the impact of grain stability.
A process that includes phosphorus attached, phosphorus diffusion, phosphorus fragmentation, phosphorus post-sand blasting, boron coating, boron diffusion, boron diffusion, boron fragmentation, oxidation, photolithography, corrosion, electrophoresis, glass sintering, nickel plating and water cutting of the fragments is adopted. Process, by forming a double channel pattern on the silicon wafer to protect the grains and avoid damage to the glass during cutting and lobes.
It improves the stability of the chip and product yield, ensures the integrity of the grain trench glass, and thus improves the quality and trust of the product.
Smart Images
Figure CN119486155A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a GPP chip manufacturing process. Background Art
[0002] As the semiconductor market grows rapidly, customers’ demands for semiconductor chips are becoming more diversified and require higher reliability. The stability of the chip determines the quality assurance of the product in the market.
[0003] The traditional GPP electrophoresis method has glass in the grooves of the crystal grains. The glass protects the PN junction. Laser cutting is used to cut the N side of the silicon wafer, and then the GPP crystal grains are separated by splitting. Since the cutting does not cut through, the glass in the grooves may be damaged when the cutting is done, resulting in slight cracks in the glass, which ultimately affects the stability of the crystal grains. Because the glass in the GPP crystal grain electrophoresis method is electrophoresed into the grooves, the glass in the grooves is continuous. If the laser cutting cuts through, it will cause the glass to melt, and it can only be cracked by splitting, and the cracks may eventually extend to the glass. Summary of the invention
[0004] The purpose of the present invention is to provide a GPP chip manufacturing process, which solves the technical problem that the glass of the semiconductor chip will be damaged when it is cracked.
[0005] The present application embodiment discloses a GPP chip manufacturing process, including the following steps: S1: Silicon wafers are subjected to phosphorus attachment, phosphorus diffusion, phosphorus slicing, and post-phosphorus diffusion sandblasting treatment; S2: Boron coating, boron diffusion, and boron slicing are performed on the non-phosphorus-attached surface of the silicon wafer; S3: cleaning the processed silicon wafer and then sending it into a diffusion furnace for oxidation; S4: evenly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a double channel pattern on the surface; S5: The silicon wafer is subjected to etching, electrophoresis, glass sintering, nickel plating and water cutting to finally obtain the finished product.
[0006] Based on the above technical solution, the embodiment of the present application can also be improved as follows: Furthermore, the specific content of step S1 is as follows: S101: Phosphorus attachment: Clean the silicon wafer, and after cleaning, attach one side of the silicon wafer to phosphorus paper, place it in a quartz boat, and then send it into a phosphorus diffusion furnace; S102: Phosphorus diffusion: introducing phosphorus diffusion mixed gas to diffuse phosphorus element to form N-type semiconductor. The phosphorus diffusion time is 1 to 8 hours. S103: Phosphorus separation: The silicon wafer is immersed in an acid solution, and after the silicon wafer is naturally separated, it is cleaned and dried to ensure that there is no residual acid on the surface of the silicon wafer; S104: Sandblasting after phosphorus diffusion: Sandblast the side of the silicon wafer that has not been phosphorus-attached to remove the inversion layer.
[0007] Furthermore, the mass concentration of the phosphorus paper in step S101 is 40% to 70%; The phosphorus diffusion mixed gas in step S102 is a mixed gas of nitrogen and oxygen, and the ratio of nitrogen to oxygen is (4-6): (1-3); the phosphorus diffusion time is 1-8 hours; The soaking time in step S103 is 10 to 24 hours. The beneficial effect of adopting this step is that the mixed gas of appropriate proportion can improve the quality of the diffused product, and at the same time control the mass concentration of the phosphorus paper. If it is greater than 70%, corrosion pits are likely to occur. If it is less than a certain concentration, it may affect the quality of the final product.
[0008] Furthermore, the specific content of step S2 is as follows: S201: Boron coating: first clean the silicon wafer, then place the silicon wafer without phosphorus on the surface facing upward, and perform boron coating, and finally place it on filter paper on a heating plate to heat and dry; S202: Boron diffusion: Place the dried silicon wafer on a quartz boat and then send it into a boron diffusion furnace for diffusion; S203: Boron separation: The silicon wafer is immersed in an acid solution, and after the silicon wafer is naturally separated, it is cleaned and dried to ensure that there is no residual acid on the surface of the silicon wafer.
[0009] Furthermore, the temperature of heating and drying in step S201 is 180-200° C., and the time is 1-5 min; The diffusion time in step S202 is 20 to 30 hours; The soaking time in step S203 is 10 to 24 hours. The beneficial effect of this step is that by baking, the abnormal appearance of the product can be avoided, thereby affecting the junction depth and concentration, and ultimately affecting the electrical parameters.
[0010] Furthermore, the oxidation in step S3 is wet oxygen oxidation. The beneficial effect of adopting this step is that the oxide layer expands faster by wet oxygen oxidation, and the thickness of the oxide layer can be deepened in a short time, thereby paving the way for subsequent electrophoresis.
[0011] Furthermore, the line width of the dual channels in step S4 is 100-200 μm, and the spacing between the two channels is 100-300 μm. The beneficial effect of adopting this step is to ensure the production quality and efficiency of the chip through appropriate size; if the size is too small, it will affect the protection effect of the passivation layer on the chip and easily cause breakdown, discharge, etc.; if the size is too large, it will affect the number of chips produced and increase the manufacturing cost.
[0012] Furthermore, the etching temperature in step S5 is -5 to 3°C, and the etching time is not less than 700 seconds; the mixed acid used for etching is composed of the following raw materials in the following volume ratio: Hydrofluoric acid: 9-10; Nitric acid: 9~10; Glacial acetic acid: 12-18; Sulfuric acid: 4~5.
[0013] Furthermore, the specific contents of the glass sintering in step S5 are as follows: the silicon wafer after electrophoresis is mounted on a quartz boat, and then the quartz boat is placed in a diffusion furnace for diffusion for 25 minutes, and a second mixed gas is introduced during sintering, wherein the second mixed gas is nitrogen: oxygen = 6-10:5-10.
[0014] Furthermore, the electrophoresis solution used in step S5 is a mixture of glass powder, acetone and nitric acid; The working voltage of the electrophoresis is 200-260V, the ultrasonic oscillation amplitude is 10-30mV, and the working voltage of the halogen lamp used is 150-200V.
[0015] Furthermore, the specific contents of the glass sintering in step S5 are as follows: the silicon wafer after electrophoresis is mounted on a quartz boat, and then the quartz boat is placed in a diffusion furnace for diffusion for 25 minutes, and a second mixed gas is introduced during sintering, wherein the second mixed gas is nitrogen: oxygen = 6-10:5-10. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0017] Figure 1 A process flow chart of a GPP chip manufacturing process according to a specific embodiment of the present invention; Figure 2 A schematic diagram of a double channel in a GPP chip manufacturing process according to a specific embodiment of the present invention; DETAILED DESCRIPTION The following embodiments of the technical solution of the present invention are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and are therefore only used as examples, and cannot be used to limit the protection scope of the present invention.
[0018] It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application should have the common meanings understood by those skilled in the art to which the present invention belongs.
[0019] In this application, unless otherwise clearly specified and limited, the terms "installation", "connection", "fixation" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0020] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0021] The present application discloses a GPP chip manufacturing process, which specifically includes the following steps: phosphorus attachment, phosphorus diffusion, phosphorus slicing, sandblasting after phosphorus diffusion, boron coating, boron diffusion, boron slicing, oxidation, photolithography, corrosion, electrophoresis, glass sintering, nickel plating, testing and water cutting slicing, wherein during photolithography, a double channel is designed to avoid the cutting unit contacting the glass and damaging the glass protective layer during chip cutting, thereby greatly improving the product yield.
[0022] Embodiment 1: This application discloses Figure 1 A GPP chip manufacturing process shown includes the following steps: S1: The silicon wafer is subjected to phosphorus attachment, phosphorus diffusion, phosphorus slicing, and post-phosphorus diffusion sandblasting. The specific contents of this step are as follows: S101: Phosphorus attachment: Clean the silicon wafer, and after cleaning, place one side of the silicon wafer in a quartz boat with phosphorus paper, and then send it into a phosphorus diffusion furnace; wherein the concentration of the phosphorus paper is 40% to 70%; S102: Phosphorus diffusion: introduce phosphorus diffusion mixed gas to diffuse phosphorus into the silicon wafer to form an N-type semiconductor. The phosphorus diffusion time is 1 hour. The phosphorus diffusion mixed gas is a mixture of nitrogen and oxygen. The volume ratio of the two is nitrogen: oxygen = 4:1. The temperature of the phosphorus diffusion furnace is 1250℃. S103: Phosphorus separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method for 10 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean and dry the mixed solution in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S104: sandblasting after phosphorus diffusion: sandblasting the side of the silicon wafer that has not been phosphorus-attached to remove the inversion layer; S2: Boron coating, boron diffusion, and boron slicing are performed on the non-phosphorus-attached surface of the silicon wafer; the specific contents of this step are as follows: S201: Boron coating: first clean the silicon wafer after phosphorus diffusion, then evenly coat the silicon wafer with boron coating liquid with the non-phosphorus side facing upward, and place it on the filter paper of the heating plate to dry after coating with boron coating liquid; wherein the drying time is 1 min, and the baking temperature is 200°C; at the same time, the boron liquid in this step can be an existing boron liquid, or it can be configured through the following steps: a. Preparation of boron water: boron oxide: ethylene glycol methyl ether = 1:3, b. Preparation of boron coating liquid: boron water, aluminum nitrate solution and aluminum oxide powder are mixed according to the ratio of boron water: aluminum nitrate solution: aluminum oxide powder = 50ml: 6ml: 0.32g, stirred for more than 30min, and finally the boron coating liquid is obtained; S202: Boron diffusion: Place the silicon wafer on a quartz boat and then put it into a 5-stage heated boron diffusion furnace for diffusion for 20 hours. During the diffusion process, different gases are introduced into different areas to ensure uniformity of junction depth. Specifically, the temperature of the boron diffusion furnace is 1250°C. S203: Boron separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method, for 10 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean the mixed solution, and spin dry in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S3: Clean the treated silicon wafer and then send it to an oxidation diffusion furnace for oxidation; the specific contents of this step are as follows: first clean the silicon wafer, then place it in a quartz boat and push it into a 3-stage heated oxidation diffusion furnace for wet oxygen oxidation, the high temperature time is 1 hour, during the oxidation process, introduce an oxidizing gas mixed with oxygen and water vapor for oxidation; the temperature of the oxidation diffusion furnace is 1200°C, and the flow rate of the oxidizing gas is 4-6L / min; S4: evenly coating one side of the oxidized silicon wafer with photoresist and exposing it to form a double-channel pattern on its surface; the specific contents of this step are as follows: evenly coating one side of the oxidized silicon wafer with photoresist and exposing it to form a desired double-channel pattern on its surface, such as Figure 2 As shown, the crystal grains are fully protected. To avoid hidden cracks caused by post-cutting and splinters, precautions are taken in advance. The line width is 100μm, and the distance between the two channels is 300μm. The use of double channels can ensure that the glass is not cut or splinters do not break the glass. S5: etching, electrophoresis, glass sintering, nickel plating and water cutting the silicon wafer to obtain the finished product; the specific contents of this step are as follows: S501: Corrosion: using mixed acid, temperature -5°C, corrosion time not less than 700S, the mixed acid volume ratio of hydrofluoric acid: nitric acid: glacial acetic acid: sulfuric acid = 9:9:12:4, the raw materials are all existing raw materials, no further description is given here; S502: Electrophoresis: After the etching silicon wafer is cleaned, it is placed in an electrophoresis solution for electrophoresis treatment. At this time, the working voltage is 200V, the ultrasonic oscillation amplitude is 10mV, the working voltage of the halogen lamp used is 150V, and the electrophoresis solution used is an existing electrophoresis solution, or a mixture of glass powder, acetone, nitric acid, etc. is used to prepare the electrophoresis solution. Specifically, acetone: glass powder: additive = 8000ml: 90g: 500ml; S503: Glass sintering: Place the silicon wafer after electrophoresis on a quartz boat, and then send it into a glass sintering furnace for sintering for 20 minutes. During the glass sintering process, a sintering mixed gas is introduced to melt the glass and adhere closely to the inside of the groove. The sintering mixed gas is nitrogen: oxygen with a volume ratio of 6:5; S504: Nickel plating: nickel is plated on both sides of the silicon wafer by chemical nickel plating; S505: Waterjet splitting: The marked silicon wafers are waterjet cut to complete the splitting. The cutting here uses a blade to split along the silicon between the two crystals, thereby separating the crystals and ensuring the integrity of the crystal groove glass, ultimately ensuring product quality and reliability; There is also a test step between the nickel plating of S504 and the water-cut splitting of S505 to distinguish good products from defective products.
[0023] Embodiment 2: This application discloses Figure 1 A GPP chip manufacturing process shown includes the following steps: S1: The silicon wafer is subjected to phosphorus attachment, phosphorus diffusion, phosphorus slicing, and post-phosphorus diffusion sandblasting. The specific contents of this step are as follows: S101: Phosphorus attachment: Clean the silicon wafer, and after cleaning, place one side of the silicon wafer in a quartz boat with phosphorus paper, and then send it into a phosphorus diffusion furnace; wherein the concentration of the phosphorus paper is 40% to 70%; S102: Phosphorus diffusion: introduce phosphorus diffusion mixed gas to diffuse phosphorus into the silicon wafer to form an N-type semiconductor. The phosphorus diffusion time is 8 hours. The phosphorus diffusion mixed gas is a mixture of nitrogen and oxygen. The volume ratio of the two is nitrogen: oxygen = 6:3. The temperature of the phosphorus diffusion furnace is 1150°C. S103: Phosphorus separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method for 24 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean the mixed solution, and dry in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S104: sandblasting after phosphorus diffusion: sandblasting the side of the silicon wafer that has not been phosphorus-attached to remove the inversion layer; S2: Boron coating, boron diffusion, and boron slicing are performed on the non-phosphorus-attached surface of the silicon wafer; the specific contents of this step are as follows: S201: Boron coating: first clean the silicon wafer after phosphorus diffusion, then evenly coat the silicon wafer with the non-phosphorus side facing up, and place it on the filter paper on the heating plate to dry; the drying time is 5 minutes, and the baking temperature is 180°C; at the same time, the boron liquid in this step can be an existing boron liquid, or it can be configured through the following steps: a. Preparation of boron water: boron oxide: ethylene glycol methyl ether = 1:3, b. Preparation of boron coating liquid: boron water, aluminum nitrate solution and aluminum oxide powder are mixed according to the ratio of boron water: aluminum nitrate solution: aluminum oxide powder = 50ml: 6ml: 0.32g, stirred for more than 30 minutes, and finally the boron coating liquid is obtained; S202: Boron diffusion: Place the silicon wafer on a quartz boat and then put it into a 5-stage heated boron diffusion furnace for diffusion for 30 hours. During the diffusion process, different gases are introduced into different areas to ensure uniformity of junction depth. Specifically, the temperature of the boron diffusion furnace is 1250°C. S203: Boron separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method for 24 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean the mixed solution, and dry in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S3: Clean the treated silicon wafer and then send it to an oxidation diffusion furnace for oxidation; the specific contents of this step are as follows: first clean the silicon wafer, then place it in a quartz boat and push it into a 3-stage heated oxidation diffusion furnace for wet oxygen oxidation, the high temperature time is 5 hours, during the oxidation process, introduce an oxidizing gas mixed with oxygen and water vapor for oxidation; the temperature of the oxidation diffusion furnace is 1100°C, and the flow rate of the oxidizing gas is 6L / min; S4: uniformly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a double-channel pattern on its surface; the specific contents of this step are as follows: uniformly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a required double-channel pattern on the surface, thereby comprehensively protecting the crystal grains, and taking precautions in advance to avoid hidden cracks caused by subsequent cutting and splitting. The line width is 200 μm, and the distance between the two channels is 300 μm. The use of double channels can ensure that the glass is not cut or the glass is not split; S5: etching, electrophoresis, glass sintering, nickel plating and water cutting the silicon wafer to obtain the finished product; the specific contents of this step are as follows: S501: Corrosion: Use mixed acid, temperature 3°C, corrosion time not less than 700S, the mixed acid volume ratio is hydrofluoric acid: nitric acid: glacial acetic acid: sulfuric acid = 9:9:12:4; S502: Electrophoresis: After the etching silicon wafer is cleaned, it is placed in an electrophoresis solution for electrophoresis treatment. At this time, the working voltage is 260V, the ultrasonic oscillation amplitude is 30mV, the working voltage of the halogen lamp is 200V, and the electrophoresis solution used is an existing electrophoresis solution, or a mixture of glass powder, acetone, nitric acid, etc. is used to prepare the electrophoresis solution. Specifically, acetone: glass powder: additive = 8000ml: 90g: 500ml; S503: Glass sintering: Place the silicon wafer after electrophoresis on a quartz boat, and then send it into a glass sintering furnace for sintering for 30 minutes. During the glass sintering process, a sintering mixed gas is introduced to melt the glass and adhere closely to the inside of the groove. The sintering mixed gas is nitrogen: oxygen with a volume ratio of 10:10; S504: Nickel plating: nickel is plated on both sides of the silicon wafer by chemical nickel plating; S505: Waterjet splitting: The marked silicon wafers are waterjet cut to complete the splitting. The cutting here uses a blade to split along the silicon between the two crystals, thereby separating the crystals and ensuring the integrity of the crystal groove glass, ultimately ensuring product quality and reliability; There is also a test step between the nickel plating of S504 and the water-cut splitting of S505 to distinguish good products from defective products.
[0024] Embodiment 3: This application discloses Figure 1 A GPP chip manufacturing process shown includes the following steps: S1: The silicon wafer is subjected to phosphorus attachment, phosphorus diffusion, phosphorus slicing, and post-phosphorus diffusion sandblasting. The specific contents of this step are as follows: S101: Phosphorus attachment: Clean the silicon wafer, and after cleaning, place one side of the silicon wafer in a quartz boat with phosphorus paper, and then send it into a phosphorus diffusion furnace; wherein the concentration of the phosphorus paper is 40% to 70%; S102: Phosphorus diffusion: introduce phosphorus diffusion mixed gas to diffuse phosphorus into the silicon wafer to form an N-type semiconductor. The phosphorus diffusion time is 4 hours. The phosphorus diffusion mixed gas is a mixture of nitrogen and oxygen. The volume ratio of the two is nitrogen: oxygen = 5:2. The temperature of the phosphorus diffusion furnace is 1200℃. S103: Phosphorus separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method for 17 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean the mixed solution, and dry in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S104: sandblasting after phosphorus diffusion: sandblasting the side of the silicon wafer that has not been phosphorus-attached to remove the inversion layer; S2: Boron coating, boron diffusion, and boron slicing are performed on the non-phosphorus-attached surface of the silicon wafer; the specific contents of this step are as follows: S201: Boron coating: first clean the silicon wafer after phosphorus diffusion, then evenly coat the silicon wafer with the non-phosphorus side facing up, and place it on the filter paper on the heating plate to dry; the drying time is 3 minutes, and the baking temperature is 190°C; at the same time, the boron liquid in this step can be an existing boron liquid, or it can be configured through the following steps: a. Preparation of boron water: boron oxide: ethylene glycol methyl ether = 1:3, b. Preparation of boron coating liquid: boron water, aluminum nitrate solution and aluminum oxide powder are mixed according to the ratio of boron water: aluminum nitrate solution: aluminum oxide powder = 50ml: 6ml: 0.32g, stirred for more than 30 minutes, and finally the boron coating liquid is obtained; S202: Boron diffusion: Place the silicon wafer on a quartz boat and then put it into a 5-stage heated boron diffusion furnace for diffusion for 25 hours. During the diffusion process, different gases are introduced into different areas to ensure uniformity of junction depth. Specifically, the temperature of the boron diffusion furnace is 1300°C. S203: Boron separation: Soak the silicon wafer in a HF mixed solution at room temperature, using a lifting and soaking method for 17 hours. After the silicon wafer is naturally separated, rinse, swing, ultrasonically clean the mixed solution, and dry in sequence to ensure that there is no residual acid or mark on the surface of the silicon wafer; S3: Clean the treated silicon wafer and then send it to an oxidation diffusion furnace for oxidation; the specific contents of this step are as follows: first clean the silicon wafer, then place it in a quartz boat and push it into a 3-stage heated oxidation diffusion furnace for wet oxygen oxidation, the high temperature time is 3 hours, during the oxidation process, introduce an oxidizing gas mixed with oxygen and water vapor for oxidation; the temperature of the oxidation diffusion furnace is 1150°C, and the flow rate of the oxidizing gas is 5L / min; S4: evenly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a double-channel pattern on its surface; the specific contents of this step are as follows: evenly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a required double-channel pattern on the surface, thereby comprehensively protecting the crystal grains, and taking precautions in advance to avoid hidden cracks caused by subsequent cutting and splitting. The line width is 150 μm, and the distance between the two channels is 250 μm. The use of double channels can ensure that the glass is not cut or the glass is not split; S5: etching, electrophoresis, glass sintering, nickel plating and water cutting the silicon wafer to obtain the finished product; the specific contents of this step are as follows: S501: Corrosion: Use mixed acid, temperature 1°C, corrosion time not less than 700S, the mixed acid volume ratio is hydrofluoric acid: nitric acid: glacial acetic acid: sulfuric acid = 9:9:12:4; S502: Electrophoresis: After the etching silicon wafer is cleaned, it is placed in an electrophoresis solution for electrophoresis treatment. At this time, the working voltage is 220V, the ultrasonic oscillation amplitude is 20mV, the working voltage of the halogen lamp used is 180V, and the electrophoresis solution used is an existing electrophoresis solution, or a mixture of glass powder, acetone, nitric acid, etc. is used to prepare the electrophoresis solution. Specifically, acetone: glass powder: additive = 8000ml: 90g: 500ml; S503: Glass sintering: Place the silicon wafer after electrophoresis on a quartz boat, and then send it into a glass sintering furnace for sintering for 25 minutes. During the glass sintering process, a sintering mixed gas is introduced to melt the glass and adhere closely to the inside of the groove. The sintering mixed gas is nitrogen: oxygen with a volume ratio of 8:7; S504: Nickel plating: nickel is plated on both sides of the silicon wafer by chemical nickel plating; S505: Waterjet splitting: The marked silicon wafers are waterjet cut to complete the splitting. The cutting here uses a blade to split along the silicon between the two crystals, thereby separating the crystals and ensuring the integrity of the crystal groove glass, ultimately ensuring product quality and reliability; There is also a test step between the nickel plating of S504 and the water-cut splitting of S505 to distinguish good products from defective products.
[0025] In the description of the present invention, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.
[0026] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0027] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and specification of the present invention.
Claims
1. A GPP chip manufacturing process, characterized in that: The following steps are involved: S1: Silicon wafers are subjected to phosphorus attachment, phosphorus diffusion, phosphorus slicing, and post-phosphorus diffusion sandblasting treatment; S2: Boron coating, boron diffusion, and boron slicing are performed on the non-phosphorus-attached surface of the silicon wafer; S3: cleaning the processed silicon wafer and then sending it into a diffusion furnace for oxidation; S4: evenly coating one side of the oxidized silicon wafer with photoresist and performing exposure to form a double channel pattern on the surface; S5: The silicon wafer is subjected to etching, electrophoresis, glass sintering, nickel plating and water cutting to finally obtain the finished product.
2. The GPP chip manufacturing process according to claim 1, characterized in that: The specific content of step S1 is as follows: S101: Phosphorus attachment: Clean the silicon wafer, and after cleaning, attach one side of the silicon wafer to phosphorus paper, place it in a quartz boat, and then send it into a phosphorus diffusion furnace; S102: Phosphorus diffusion: introducing phosphorus diffusion mixed gas to diffuse phosphorus element to form N-type semiconductor. The phosphorus diffusion time is 1 to 8 hours. S103: Phosphorus separation: The silicon wafer is immersed in an acid solution, and after the silicon wafer is naturally separated, it is cleaned and dried to ensure that there is no residual acid on the surface of the silicon wafer; S104: Sandblasting after phosphorus diffusion: Sandblast the side of the silicon wafer that has not been phosphorus-attached to remove the inversion layer.
3. The GPP chip manufacturing process according to claim 2, characterized in that: The mass concentration of the phosphorus paper in step S101 is 40% to 70%; The phosphorus diffusion mixed gas in step S102 is a mixed gas of nitrogen and oxygen, and the ratio of nitrogen to oxygen is (4-6): (1-3); the phosphorus diffusion time is 1-8 hours; The soaking time in step S103 is 10 to 24 hours.
4. The GPP chip manufacturing process according to claim 1, characterized in that: The specific content of step S2 is as follows: S201: Boron coating: first clean the silicon wafer, then place the silicon wafer without phosphorus on the surface facing upward, and perform boron coating, and finally place it on filter paper on a heating plate to heat and dry; S202: Boron diffusion: Place the dried silicon wafer on a quartz boat and then send it into a boron diffusion furnace for diffusion; S203: Boron separation: The silicon wafer is immersed in an acid solution, and after the silicon wafer is naturally separated, it is cleaned and dried to ensure that there is no residual acid on the surface of the silicon wafer.
5. The GPP chip manufacturing process according to claim 4, characterized in that: The temperature of heating and drying in step S201 is 180-200° C. and the time is 1-5 minutes; The diffusion time in step S202 is 20 to 30 hours; The soaking time in step S203 is 10 to 24 hours.
6. The GPP chip manufacturing process according to claim 1, characterized in that: The oxidation in step S3 is wet oxygen oxidation.
7. The GPP chip manufacturing process according to claim 1, characterized in that: The line width of the double channels in step S4 is 100-200 μm, and the distance between the two channels is 100-300 μm.
8. The GPP chip manufacturing process according to claim 1, characterized in that: The etching temperature in step S5 is -5 to 3°C, and the etching time is not less than 700S; the mixed acid used for etching is prepared according to the following volume ratio of raw materials: composition: Hydrofluoric acid: 9-10; Nitric acid: 9~10; Glacial acetic acid: 12-18; Sulfuric acid: 4~5.
9. The GPP chip manufacturing process according to claim 1, characterized in that: The electrophoresis solution used in step S5 is a mixture of glass powder, acetone and nitric acid; The working voltage of the electrophoresis is 200-260V, the ultrasonic oscillation amplitude is 10-30mV, and the working voltage of the halogen lamp used is 150-200V.
10. The GPP chip manufacturing process according to claim 1, characterized in that: The specific contents of the glass sintering in step S5 are as follows: the silicon wafer after electrophoresis is mounted on a quartz boat, and then the quartz boat is placed in a diffusion furnace for diffusion for 25 minutes, and a second mixed gas is introduced during sintering, wherein the second mixed gas is nitrogen: oxygen = 6-10:5-10.