Display device

Abstract

A display device is provided. The display device includes a first substrate including a display area and a non-display area surrounding the display area, a second substrate disposed on the first substrate, a display element layer disposed on the second substrate and overlapping the display area, a first encapsulation layer disposed on the display element layer, and a second encapsulation layer disposed on the second substrate and overlapping the non-display area. And a first encapsulation layer disposed on the display element layer, the first encapsulation layer overlapping the non-display area and including an inorganic material, and a second encapsulation layer disposed on the first encapsulation layer, the second encapsulation layer including a concave-convex structure and including an inorganic material. The first substrate includes a first surface facing the second substrate and a first inclined surface overlapping an edge portion of the first substrate and extending to the first surface. An inclination angle formed by the first surface and the first inclined surface is an obtuse angle, and the first inclined surface overlaps the second encapsulation layer in a direction perpendicular to the first substrate.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0104526 filed in the Korean Intellectual Property Office on August 10, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] As the information society develops, the demand for display devices for displaying images in various forms increases. The display device may be a flat panel display such as a liquid crystal display, a field emission display, or a light-emitting display panel.

[0005] The display device includes a display area for displaying an image and a non-display area arranged around the display area (eg, arranged to surround the display area). Recently, the width of the non-display area has been gradually reduced to increase the immersion in the display area and enhance the aesthetics of the display device. Summary of the invention

[0006] Aspects of the present disclosure provide a display device for solving etching defects occurring during substrate etching.

[0007] However, aspects of the present disclosure are not limited to the aspects described herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs by referring to the detailed description of the present disclosure given below.

[0008] An embodiment of a display device may include a first substrate, a second substrate, a display element layer, a first encapsulation layer, and a second encapsulation layer, the first substrate including a display area and a non-display area surrounding the display area, the second substrate being arranged on the first substrate, the display element layer being arranged on the second substrate and overlapping with the display area, the first encapsulation layer being arranged on the display element layer, the first encapsulation layer overlapping with the non-display area and including an inorganic material, the second encapsulation layer being arranged on the first encapsulation layer, the second encapsulation layer including a concave-convex structure and including an inorganic material. The first substrate may include a first surface facing the second substrate and a first inclined surface overlapping with an edge portion of the first substrate and extending to the first surface. The inclination angle formed by the first surface and the first inclined surface may be an obtuse angle, and the first inclined surface may overlap with the second encapsulation layer in a direction perpendicular to the first substrate.

[0009] The first inclined surface and the second substrate may form an undercut.

[0010] The undercut may overlap the second encapsulation layer in a direction perpendicular to the first substrate.

[0011] The second encapsulation layer may completely cover the first encapsulation layer.

[0012] The second encapsulation layer may include an inorganic material having acid resistance to a fluorine-based etchant.

[0013] The second encapsulation layer may include amorphous silicon.

[0014] The second encapsulation layer may include a plurality of first layers including a concavo-convex structure and spaced apart from each other in a direction parallel to the first substrate, a second layer completely covering the plurality of first layers and including the concavo-convex structure, and a third layer disposed on the second layer and including the concavo-convex structure.

[0015] The third layer may have a higher hydrophobicity than the second layer.

[0016] The third layer may include carbon ions, fluorine ions, and hydrogen ions.

[0017] The second layer may be in physical contact with the first encapsulation layer.

[0018] The first substrate may include a second surface facing the first surface and a second inclined surface overlapping an edge portion of the first substrate and extending to the second surface, and an inclined angle formed by the second surface and the second inclined surface is an obtuse angle.

[0019] The second inclined surface may overlap the second encapsulation layer in a direction perpendicular to the first substrate.

[0020] The thickness of the second encapsulation layer in a direction perpendicular to the first substrate may be about 0.2 μm or less.

[0021] The second encapsulation layer may overlap the display area and the non-display area in a plan view, and the second encapsulation layer may completely cover the first encapsulation layer in a plan view.

[0022] The second encapsulation layer may overlap an edge portion of the first substrate and may cover a side surface of the second substrate.

[0023] The second encapsulation layer may be arranged in a mesh shape to overlap the non-display area while exposing the display area in a plan view.

[0024] The second encapsulation layer may overlap an edge portion of the first substrate and cover a side surface of the second substrate.

[0025] An embodiment of a display device may include a first substrate, a second substrate, a display element layer, a first encapsulation layer, and a second encapsulation layer, the first substrate including a main area and a pad area, the second substrate being arranged on the first substrate and including a curved area arranged between the main area and the pad area, the display element layer being arranged on the second substrate and overlapping with the main area, the first encapsulation layer being arranged on the display element layer and including an inorganic material, the second encapsulation layer being arranged on the first encapsulation layer, the second encapsulation layer including a concave-convex structure and including an inorganic material. The first substrate may include a first sub-substrate and a second sub-substrate spaced apart from each other via a curved area, the curved area being arranged between the first sub-substrate and the second sub-substrate. The first sub-substrate may include a first surface facing the second substrate and a first inclined surface facing the curved area and extending to the first surface. The first sub-substrate and the second encapsulation layer may overlap each other in a direction perpendicular to the first substrate.

[0026] An inclination angle formed by the first inclined surface and the first surface may be an obtuse angle, and the second substrate and the first inclined surface may form an undercut.

[0027] The first sub-substrate may include a second inclined surface opposite to the first inclined surface, the second inclined surface may extend to the first surface in a direction opposite to the direction in which the first inclined surface is arranged, the inclination angle formed by the first surface and the second inclined surface may be an obtuse angle, and the second inclined surface and the second encapsulation layer may overlap each other in a direction perpendicular to the first substrate.

[0028] Details of other embodiments are included in the detailed description and accompanying drawings.

[0029] According to the display device of the embodiment of the present disclosure, etching defects of the display device can be solved by applying a thin film encapsulation layer having acid resistance and hydrophobicity to prevent an etchant used during substrate etching from penetrating into a display panel.

[0030] However, the effects of the embodiments are not limited to the effects described herein. The above and other effects of the embodiments will become more apparent to those skilled in the art to which the embodiments pertain by referring to the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other aspects and features of the present disclosure will become more apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0032] Figure 1 is a schematic perspective view of a display device according to an embodiment;

[0033] Figure 2 yes Figure 1 A schematic cross-sectional view of a display device;

[0034] Figure 3 It is shown Figure 2 A schematic cross-sectional view of an example of a display device having a curved display panel;

[0035] Figure 4 yes Figure 2 A schematic plan view of a display panel;

[0036] Figure 5 yes Figure 4 an enlarged schematic plan view of area "A" of;

[0037] Figure 6 is along Figure 5 A schematic cross-sectional view of the display device taken along line X1-X1';

[0038] Figure 7 yes Figure 6 An enlarged schematic cross-sectional view of region "C" of FIG.

[0039] Figure 8 yes Figure 7 An enlarged schematic cross-sectional view of region "E" of FIG.

[0040] Fig. 9 yes Figure 8 An enlarged schematic cross-sectional view of region "G" of FIG.

[0041] Fig.10 Is Figure 4 A schematic plan view of an area covered by the fourth encapsulation layer;

[0042] Fig.11 According to another embodiment Figure 6 An enlarged schematic cross-sectional view of region "C" of FIG.

[0043] Fig.12 According to yet another embodiment Figure 6 An enlarged schematic cross-sectional view of region "C" of FIG.

[0044] Fig.13 Is Fig.12 A schematic plan view of an area covered by a fourth encapsulation layer; and

[0045] Fig.14 According to yet another embodiment Figure 6 An enlarged schematic cross-sectional view of area “C” in FIG. DETAILED DESCRIPTION

[0046] The present disclosure will now be described more fully below with reference to the accompanying drawings showing embodiments. However, the present disclosure may be implemented in different forms and should not be construed as being limited to the embodiments described herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0047] In the drawings, for convenience of description and for clarity, the size, thickness, ratio, and dimensions of elements may be exaggerated. Throughout the specification, like reference numerals refer to like elements.

[0048] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0049] For the purpose of its meaning and interpretation, in the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in conjunction or disjunction and may be understood to be equivalent to "and / or".

[0050] For purposes of its meaning and interpretation, in the specification and claims, the phrase "at least one of" is intended to include the meaning of "at least one selected from the group of..." For example, "at least one of A and B" may be understood to mean "A, B, or A and B".

[0051] It will also be understood that when an element (or region, layer, portion, or the like) is referred to as being "on," "connected to," or "coupled to" another element in the specification, it can be directly disposed on, connected to, or coupled to the above-mentioned other element, or there may be intervening elements disposed therebetween. Conversely, when an element is referred to as being "directly on" another element, there may be no intervening elements.

[0052] It will be understood that the terms "connected to" or "coupled to" may include physical and / or electrical connections or couplings.

[0053] It will be understood that although the terms "first", "second", "third" or similar words may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, a "first element" may be referred to as a "second element" or a "third element", and similarly, a "second element" or a "third element" may be referred to as a "first element".

[0054] For ease of description, the spatially relative terms "below", "beneath", "lower", "above", "upper" or the like may be used herein to describe the relationship between one element or component and another element or component as shown in the accompanying drawings. It will be understood that the spatially relative terms are intended to cover different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, where the device shown in the accompanying drawings is turned over, a device positioned "below" or "beneath" another device may be placed "above" the other device. Accordingly, the illustrative term "below" may include both a lower position and an upper position. The device may also be oriented in other directions, and therefore, the spatially relative terms may be interpreted differently depending on the orientation.

[0055] The term "overlap" or "overlapped" means that a first object may be above or below a second object or to the side of the second object, and vice versa. Additionally, the term "overlap" may include stacking, stacking, facing, extending over, covering or partially covering, or any other suitable term as will be appreciated and understood by those of ordinary skill in the art.

[0056] When an element is described as “non-overlapping” another element, this may include elements being spaced apart from each other, elements being offset from each other, or elements being separated from each other, or any other suitable terminology as would be appreciated and understood by one of ordinary skill in the art.

[0057] The term "facing" means that the first element can be directly or indirectly opposite to the second element. In the case where a third element is interposed between the first element and the second element, although still facing each other, the first element and the second element can be understood as indirectly opposite to each other.

[0058] When the terms “comprise,” “comprising,” “include,” and / or “including,” “has,” “have,” and / or “having,” and variations thereof, when used in the present specification, specify the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0059] The phrase "in a plan view" means observing an object from the top, and the phrase "in a schematic cross-sectional view" means observing a section cutting the object vertically from the side.

[0060] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense.

[0061] The embodiments may be described and illustrated in the drawings in terms of functional blocks, units and / or modules.

[0062] Those skilled in the art will appreciate that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, and the like, which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques).

[0063] In the case of blocks, units and / or modules implemented by a microprocessor or other similar hardware, they may be programmed and controlled using software (eg, microcode) to perform the various functions discussed herein, and may be selectively driven by firmware and / or software.

[0064] It is also contemplated that each block, unit and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware that performs some functions and a processor (eg, one or more programmed microprocessors and associated circuits) that performs other functions.

[0065] Each block, unit and / or module of the embodiments may be physically separated into two or more interacting and discrete blocks, units and / or modules without departing from the scope of the present disclosure.

[0066] Furthermore, the blocks, units and / or modules of the embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the present disclosure.

[0067] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the errors associated with the measurements and with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0068] Figure 1 is a schematic perspective view of a display device 10 according to the embodiment.

[0069] Reference Figure 1 The display device 10 according to the embodiment may be a device that displays moving images or still images, and may be used as a display screen of each of various products such as televisions, laptop computers, monitors, billboards, and Internet of Things (IOT) devices, and a display screen of a portable electronic device such as a mobile phone, a smart phone, a tablet personal computer (PC), a smart watch, a watch phone, a mobile communication terminal, an electronic notepad, an electronic book, a portable multimedia player (PMP), a navigation device, and an ultra mobile PC (UMPC).

[0070] The display device 10 according to the embodiment may be a light-emitting display device, such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro- or nano-light-emitting diode (LED). Hereinafter, it is mainly described that the display device 10 is an organic light-emitting display device, but the present disclosure is not limited thereto.

[0071] The display device 10 according to the embodiment may include a display panel 100 , a display driver 200 , and a circuit board 300 .

[0072] The display panel 100 may be formed as a rectangular plane having a short side in a first direction (X-axis direction) and a long side in a second direction (Y-axis direction) intersecting the first direction (X-axis direction). A corner where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) intersect may be formed as a right angle or may be rounded to have a predetermined or selected curvature. The plane shape of the display panel 100 is not limited to a quadrilateral shape, and may be other polygonal shapes, a circular shape, or an elliptical shape.

[0073] The display panel 100 may be formed to be flat, but is not limited thereto. For example, the display panel 100 may include curved surface portions formed at its left and right distal ends and having a constant curvature or a variable curvature. The display panel 100 may be flexibly formed to be bent, curved, folded, or rolled.

[0074] The display panel 100 may include a main area MA and a sub area SBA. The main area MA may include a display area DA including pixels displaying an image and a non-display area NDA disposed around the display area DA.

[0075] The display area DA may emit light from a light-emitting area or an opening area to be described later. For example, the display area DA may include a pixel circuit including a switching element, a pixel defining film (which may refer to the pixel defining layer mentioned below) defining the light-emitting area or the opening area, and a self-luminous element. For example, the self-luminous element may include at least one of an organic light-emitting diode (organic LED, OLED) including an organic light-emitting layer, a quantum dot LED including a quantum dot light-emitting layer, an inorganic LED including an inorganic semiconductor, and a micro-LED, but is not limited thereto. The self-luminous element is shown as an organic light-emitting diode in the following figures.

[0076] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100. A circuit connecting the display driver 200 and the pixels PX (for example, referring to FIG. 1 ) may be arranged in the non-display area NDA. Figure 4 ) wiring.

[0077] The sub-area SBA may be an area extending from one side of the main area MA. The sub-area SBA may include a bending area BA and a pad area PDA.

[0078] The bending area BA may include a flexible material that may be bent, folded, curled, etc. As an example, in the case where the display panel 100 overlapping the bending area BA is bent, the display driver 200 and the circuit board 300 positioned (arranged) in the pad area PDA may overlap the main area MA in the third direction (Z-axis direction).

[0079] The pad area PDA may be provided with the display driver 200 and the circuit board 300. Although not shown, the pad area PDA may be provided with display pads connected to the circuit board 300. In another embodiment, the sub-area SBA may be omitted, and the display driver 200 and the display pads may also be positioned in the non-display area NDA.

[0080] The display driver 200 may output a signal and a voltage for driving the display panel 100. The display driver 200 may supply a data voltage to a data line. The display driver 200 may supply a power voltage to a power line, and may supply a gate control signal to a gate driver. The display driver 200 may be formed as an integrated circuit (IC) and may be mounted on the display panel 100 by a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method. For example, the display driver 200 may be arranged in a sub-region SBA, and may overlap with the main region MA in a thickness direction by bending of the sub-region SBA. As another example, the display driver 200 may be mounted on a circuit board 300.

[0081] The circuit board 300 may be attached to the display pads of the display panel 100 using an anisotropic conductive film (ACF). Leads of the circuit board 300 may be electrically connected to the display pads of the display panel 100. The circuit board 300 may be a flexible film such as a flexible printed circuit board, a printed circuit board, or a chip on film.

[0082] Figure 2 yes Figure 1 Schematic cross-sectional view of a display device 10. Figure 3 It is shown Figure 2 Schematic cross-sectional view of an example of a display device 10 in which a display panel 100 is curved.

[0083] Reference Figure 2 The display device 10 according to the embodiment may include a display panel 100, a polarizing film 190 and a cover window 500. The display panel 100 may include a first substrate 110, a second substrate 112, a thin film transistor layer 130, a display element layer 150, a thin film encapsulation layer 170 and a touch sensor layer 180.

[0084] The first substrate 110 may have a hard material. For example, the first substrate 110 may be made of glass. The first substrate 110 may be made of ultra-thin glass (UTG) having a thickness of about 200 μm or less.

[0085] The portion of the first substrate 110 included in the specification that overlaps the bending area BA may be etched during the manufacturing process to ensure the bending area BA. Accordingly, the first substrate 110 may be divided into a first sub-substrate 110a and a second sub-substrate 110b. The first sub-substrate 110a and the second sub-substrate 110b may be spaced apart from each other while exposing the bending area BA. Specifically, the first sub-substrate 110a may overlap the display area DA and the non-display area NDA of the main area MA, and the second sub-substrate 110b may overlap the pad area PDA of the sub-area SBA. The first substrate 110 may not overlap the bending area BA, but is not limited thereto. Depending on the manufacturing process, a portion of the first substrate 110 may also overlap the bending area BA.

[0086] In some embodiments, the first sub-substrate 110a may include an upper surface a1, a lower surface a2, a first inclined surface s1, and a second inclined surface s2. The upper surface a1 of the first sub-substrate 110a may be a surface in physical contact with the second substrate 112, and the lower surface a2 of the first sub-substrate 110a may be a surface facing the upper surface a1. The first inclined surface s1 and the second inclined surface s2 of the first sub-substrate 110a may be positioned toward the bending area BA, and the upper surface a1 and the lower surface a2 may extend (e.g., be connected) through the first inclined surface s1 and the second inclined surface s2.

[0087] In some embodiments, the inclination angle θa1 formed by the first inclined surface s1 of the first sub-substrate 110a and the upper surface a1 and the inclination angle θa2 formed by the second inclined surface s2 of the first sub-substrate 110a and the lower surface a2 may be an obtuse angle. The inclination angle θs1 formed by the first inclined surface s1 and the second inclined surface s2 may be an acute angle, an obtuse angle, or a right angle. The size of the inclination angle θs1 formed by the first inclined surface s1 and the second inclined surface s2 may be adjusted by an etching process of the curved area BA included in the manufacturing process of the display device 10.

[0088] In some embodiments, the undercut UC1 may be formed between the first inclined surface s1 included in the first sub-substrate 110a and the second substrate 112. The undercut UC1 formed between the first sub-substrate 110a and the second substrate 112 may overlap the thin film transistor layer 130, the thin film encapsulation layer 170, the touch sensor layer 180, the polarizing film 190, and the cover window 500 positioned on the undercut UC1 in the third direction (Z-axis direction).

[0089] The first inclined surface s1 and the second inclined surface s2 included in the first sub-substrate 110a of the embodiment may overlap with the second substrate 112, the thin film transistor layer 130, the thin film encapsulation layer 170, the touch sensor layer 180, the polarizing film 190 and the cover window 500 positioned on the first substrate 110 in a third direction (Z-axis direction).

[0090] In some embodiments, the second sub-substrate 110b may include an upper surface b1, a lower surface b2, a first inclined surface s3, and a second inclined surface s4. The upper surface b1 of the second sub-substrate 110b may be a surface in physical contact with the second substrate 112, and the lower surface b2 of the second sub-substrate 110b may be a surface facing the upper surface b1. The first inclined surface s3 and the second inclined surface s4 of the second sub-substrate 110b may be positioned toward the bending area BA, and the upper surface b1 and the lower surface b2 may be extended (e.g., connected) by the first inclined surface s3 and the second inclined surface s4.

[0091] In some embodiments, the inclination angle θb1 formed by the first inclined surface s3 of the second sub-substrate 110b and the upper surface b1 and the inclination angle θb2 formed by the second inclined surface s4 of the second sub-substrate 110b and the lower surface b2 may be obtuse angles. The inclination angle θs3 formed by the first inclined surface s3 and the second inclined surface s4 may be an acute angle, an obtuse angle, or a right angle. The inclination angle θs3 formed by the first inclined surface s3 and the second inclined surface s4 may be adjusted by an etching process of the curved area BA included in the manufacturing process of the display device 10.

[0092] In some embodiments, an undercut UC2 may be formed between the first inclined surface s3 included in the second sub-substrate 110b and the second substrate 112. The undercut UC2 formed between the second sub-substrate 110b and the second substrate 112 may overlap the curved protection layer 450 positioned on the undercut UC2 in the third direction (Z-axis direction).

[0093] The first inclined surface s3 and the second inclined surface s4 of the second sub-substrate 110 b of the embodiment may overlap the second substrate 112 and the curved protection layer 450 disposed on the first substrate 110 in the third direction (Z-axis direction).

[0094] In some embodiments, the display panel 100 may include an edge portion EG. The edge portion EG may refer to an end portion of the display panel 100. In other words, the edge portion EG of the display panel 100 may refer to a portion overlapping an outer portion of the display device 10. Specifically, the edge portion EG of the display panel 100 may be an outer portion surrounding the display device 10 by overlapping the non-display area NDA, the bending area BA, and the pad area PDA in a plan view.

[0095] In some embodiments, the first substrate 110 may include a first edge surface e1, a second edge surface e2, and a third edge surface e3 overlapping the edge portion EG of the display panel 100. As an example, the first sub-substrate 110a of the display device 10 may include a first edge surface e1, a second edge surface e2, and a third edge surface e3 overlapping the non-display area NDA, and the second sub-substrate 110b may include a first edge surface e1, a second edge surface e2, and a third edge surface e3 overlapping the pad area PDA. According to an embodiment, the first edge surface e1 and the third edge surface e3 may be connected through the second edge surface e2, and according to another embodiment, the first edge surface e1 and the third edge surface e3 may also be directly connected.

[0096] The first edge surface e1, the second edge surface e2, and the third edge surface e3 overlapping the edge portion EG of the display panel 100 may be formed by an etching process included in the manufacturing process of the display device 10. As described above, in the manufacturing process of the display device 10, the portion of the first substrate 110 overlapping the bending area BA may be removed by the etching process, and at the same time, the portion overlapping the edge portion EG of the display panel 100 may also be etched.

[0097] In some embodiments, the first edge surface e1 and the third edge surface e3 may be inclined surfaces. As an example, the inclined angle θe1 ​​formed by the upper surface a1 of the first sub-substrate 110a and the first edge surface e1 and the inclined angle θe3 formed by the lower surface a2 of the first sub-substrate 110a and the third edge surface e3 may be obtuse angles. The inclined angle θe1 ​​formed by the upper surface b1 of the second sub-substrate 110b and the first edge surface e1 and the inclined angle θe3 formed by the lower surface b2 of the second sub-substrate 110b and the third edge surface e3 may be obtuse angles.

[0098] In some embodiments, the undercut UC3 may be formed between the second substrate 112 and the first edge surface e1 of the first sub-substrate 110a. The undercut UC3 formed between the second substrate 112 and the first sub-substrate 110a may overlap with the second substrate 112, the thin film transistor layer 130, the thin film encapsulation layer 170, the touch sensor layer 180, the polarizing film 190, and the cover window 500 positioned on the undercut UC3 in the third direction (Z-axis direction). The undercut UC4 may be formed between the second substrate 112 and the first edge surface e1 of the second sub-substrate 110b. The undercut UC4 formed between the second substrate 112 and the second sub-substrate 110b may overlap with the second substrate 112 and the circuit board 300 positioned on the undercut UC4 in the third direction (Z-axis direction).

[0099] The second substrate 112 may be positioned on the first substrate 110. The second substrate 112 may be positioned to overlap the main area MA and the sub-area SBA. The second substrate 112 may have a soft material. The second substrate 112 may be made of a polymer resin having a thickness smaller than that of the first substrate 110. For example, the second substrate 112 may have a thickness of about 20 μm. The second substrate 112 may be formed of an organic material such as an acryl resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, or the like. Since the second substrate 112 is made of a polymer resin, it may be referred to as a plastic substrate.

[0100] The thin film transistor layer 130 may be positioned on the second substrate 112. The thin film transistor layer 130 may include a thin film transistor (TFT) and wirings. The thin film transistor layer 130 may be positioned to overlap the display area DA and the non-display area NDA of the main area MA.

[0101] The display element layer 150 may be disposed on the thin film transistor layer 130. The display element layer 150 may be a layer that displays an image. The display element layer 150 may include a light emitting element that emits light through a pixel electrode, a light emitting layer, and a common electrode overlapping the display area DA of the main area MA, and wiring that drives the light emitting element.

[0102] The thin film encapsulation layer 170 may be arranged on the display element layer 150. The thin film encapsulation layer 170 may be positioned to overlap the display area DA and the non-display area NDA of the main area MA. The thin film encapsulation layer 170 may prevent oxygen or moisture from penetrating into the display element layer 150. The thin film encapsulation layer 170 may prevent the etchant from physically contacting the display panel 100 during the etching process of the first substrate 110 described above. The thin film encapsulation layer 170 may include at least one inorganic film and at least one organic film. The organic film of the thin film encapsulation layer 170 may protect the display element layer 150 from foreign substances such as dust.

[0103] The touch sensor layer 180 may be arranged on the thin film encapsulation layer 170. The touch sensor layer 180 may be positioned to overlap the display area DA and the non-display area NDA of the main area MA. The touch sensor layer 180 may include a touch wiring, a touch buffer layer, a touch insulating layer, and a touch protection layer. The touch sensor layer 180 may sense a user's touch using the touch wiring.

[0104] The polarizing film 190 may be arranged on the display panel 100 to reduce the reflection of external light. The polarizing film 190 may be positioned to overlap the display area DA and the non-display area NDA of the main area MA. The polarizing film 190 may include a first base member, a linear polarizing plate, a phase retardation film such as a quarter wavelength (λ / 4) plate, and a second base member. The first base member, the phase retardation film, the linear polarizing plate, and the second base member of the polarizing film 190 may be stacked on each other on the display panel 100.

[0105] The cover window 500 may be disposed on the polarizing film 190. The cover window 500 may be positioned to overlap the display area DA and the non-display area NDA of the main area MA. The cover window 500 may be attached to the polarizing film 190 by a transparent adhesive member such as an optically clear adhesive (OCA) film.

[0106] The bending protection layer 450 may be positioned on the second substrate 112 to overlap the bending area BA. When the display panel 100 is bent, the bending protection layer 450 may protect the lower structure overlapping the bending area BA. According to an embodiment, the bending protection layer 450 may also overlap the pad area PDA.

[0107] The bending protection layer 450 may include a synthetic resin. As an example, the bending protection layer 450 may include at least one of acrylonitrile butadiene styrene (ABS) copolymer, urethane acrylate (UA), polyurethane (PU), polyethylene (PE), ethylene vinyl acetate (EVA), and polyvinyl chloride (PVC).

[0108] The display driver 200 and the circuit board 300 may be positioned to overlap the pad area PDA on the second substrate 112. The display driver 200 may be positioned between the curved protection layer 450 and the circuit board 300 in the second direction (Y-axis direction), and may be positioned to be spaced apart from the curved protection layer 450 and the circuit board 300 in the second direction (Y-axis direction).

[0109] Reference Figure 3 In the display device 10, a portion of the display panel 100 overlapping the bending area BA may be bent. In the case where the display panel 100 overlapping the bending area BA is bent, the pad area PDA of the display device 10 may overlap the display area DA and the non-display area NDA in the third direction (Z-axis direction). In the case where the display device 10 is bent, the first sub-substrate 110a and the second sub-substrate 110b may overlap each other in the third direction (Z-axis direction).

[0110] Figure 4 yes Figure 2 Schematic plan view of a display panel 100.

[0111] Reference Figure 4 , the display panel 100 may include pixels PX, gate lines GL, data lines DL, and second power lines VL2 that overlap with the display area DA of the main area MA.

[0112] Each of the pixels PX may be defined as a minimum unit for emitting light. Each of the pixels PX may constitute light emitting areas EA1, EA2, EA3, and EA4 (eg, referring to FIG. 1 ) which will be described later. Figure 5 )one of the.

[0113] The gate lines GL may supply gate signals received from the gate driver 210 to the pixels PX. The gate lines GL may extend in a first direction (X-axis direction) and may be spaced apart from each other in a second direction (Y-axis direction) crossing the first direction (X-axis direction).

[0114] The data lines DL may supply the pixels PX with data voltages received from the display driver 200. The data lines DL may extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction).

[0115] The second power line VL2 may supply a power voltage received from the display driver 200 to the pixel PX. Here, the power voltage may be at least one of a driving voltage, an initialization voltage, and a reference voltage. The second power lines VL2 may extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction).

[0116] The display panel 100 may include a first power line VL1 overlapping the non-display area NDA of the main area MA, a gate driver 210 , a fan-out line FOL, and a gate control line GCL.

[0117] The gate driver 210 may generate a gate signal based on the gate control signal, and may sequentially supply the gate signal to the gate lines GL according to a set order.

[0118] The first power line VL1 may surround the display area DA and may be disposed in the non-display area NDA. The first power line VL1 may supply a power voltage received from the display driver 200 to the pixel PX. Here, the power voltage may be a low potential power voltage.

[0119] The fan-out line FOL may extend from the display driver 200 to the display area DA. The fan-out line FOL may supply a data voltage received from the display driver 200 to the data line DL.

[0120] The gate control line GCL may extend from the display driver 200 to the gate driver 210. The gate control line GCL may supply a gate control signal received from the display driver 200 to the gate driver 210. In the drawings, it is shown that the gate driver 210 is arranged only in the non-display area NDA arranged on the left side of the display area DA, but the present disclosure is not limited thereto. In another embodiment, the display device 10 may also include gate drivers 210 arranged on the left and right sides of the display area DA, respectively.

[0121] The display panel 100 may include a display driver 200 and display pads PD overlapping the pad area PDA of the sub-area SBA.

[0122] The display driver 200 may output signals and voltages for driving the display panel 100 to the fan-out lines FOL. The display driver 200 may supply data voltages to the data lines DL through the fan-out lines FOL. The data voltages may be supplied to the pixels PX and may control the brightness of the pixels PX. The display driver 200 may supply gate control signals to the gate driver 210 through the gate control lines GCL.

[0123] The display pad PD may be connected to a graphic system through the circuit board 300. The display pad PD may be connected to the circuit board 300 to receive digital video data and supply the digital video data to the display driver 200.

[0124] Figure 5 yes Figure 4 An enlarged schematic plan view of area "A" of FIG.

[0125] Reference Figure 5, the light emitting areas EA1, EA2, EA3, and EA4 may be positioned in the display area DA. The light emitting areas EA1, EA2, EA3, and EA4 may include a first light emitting area EA1 that emits light of a first color, a second light emitting area EA2 that emits light of a second color, and a third light emitting area EA3 that emits light of a third color. For example, the light of the first color may be light in a red wavelength band of about 600nm to about 750nm, the light of the second color may be light in a green wavelength band of about 480nm to about 560nm, and the light of the third color may be light in a blue wavelength band of about 370nm to about 460nm, but are not limited thereto.

[0126] The pixels PX including at least one first light emitting area EA1, at least one second light emitting area EA2, at least one third light emitting area EA3, and at least one fourth light emitting area EA4 adjacent to each other may constitute a pixel group PXG. The pixel group PXG may be a minimum unit for emitting white light. However, the types and / or numbers of the light emitting areas EA1, EA2, EA3, and EA4 constituting each pixel group PXG may be variously changed according to the embodiment.

[0127] The light emitting areas EA1, EA2, EA3 and EA4 may be formed by a pixel defining layer ( Figure 7 "151" in the specification.

[0128] exist Figure 5 , it is shown that the second light-emitting area EA2 and the fourth light-emitting area EA4 emit light of the same color (e.g., light of the second color), but the present disclosure is not limited thereto. The second light-emitting area EA2 and the fourth light-emitting area EA4 may emit light of different colors. For example, the second light-emitting area EA2 may emit light of the second color, and the fourth light-emitting area EA4 may emit light of the fourth color. It is shown that each of the first light-emitting area EA1, the second light-emitting area EA2, the third light-emitting area EA3, and the fourth light-emitting area EA4 has a rectangular planar shape, but the present disclosure is not limited thereto. For example, each of the first light-emitting area EA1, the second light-emitting area EA2, the third light-emitting area EA3, and the fourth light-emitting area EA4 may have a polygonal, circular, or elliptical planar shape other than a quadrilateral shape.

[0129] In some embodiments, the second light emitting area EA2 and the fourth light emitting area EA4 may be arranged alternately in the first direction (X-axis direction). The second light emitting area EA2 may be arranged in the second direction (Y-axis direction), and the fourth light emitting area EA4 may be arranged in the second direction (Y-axis direction). The first light emitting area EA1 and the third light emitting area EA3 may be arranged alternately in the first direction (X-axis direction). The first light emitting area EA1 may be arranged in the second direction (Y-axis direction). The third light emitting area EA3 may be arranged in the second direction (Y-axis direction). Each of the first light emitting area EA1 and the third light emitting area EA3 may have a square planar shape, but is not limited thereto.

[0130] The scan driver SDC, the first power line VL1 , the first dam DAM1 , and the second dam DAM2 may be disposed in the non-display area NDA.

[0131] The scan driver SDC may include a stage STA. The stage STA may extend in a first direction (X-axis direction) and be connected to corresponding scan lines positioned in the display area DA. For example, the stage STA may be connected to the scan lines of the display area DA in a one-to-one manner. The stage STA may sequentially apply scan signals to the scan lines.

[0132] The first power line VL1 may be arranged outside the scan driver SDC. For example, the first power line VL1 may be arranged closer to the edge portion EG of the display panel 100 than the scan driver SDC. The first power line VL1 may extend in the second direction (Y-axis direction) in the non-display area NDA on the left side of the display panel 100.

[0133] The first power line VL1 may be electrically connected to the pixels PX positioned in the display area DA, and thus, may supply a power voltage to the pixels PX.

[0134] The first dam DAM1 and the second dam DAM2 may be used to prevent the second encapsulation layer 173 (eg, referring to Figure 7 ) overflows into the edge portion EG of the display panel 100. The first dam DAM1 and the second dam DAM2 may be positioned in the non-display area NDA and may surround the display area DA. The second dam DAM2 may be arranged outside the first dam DAM1. In other words, the second dam DAM2 may surround the first dam DAM1. The first dam DAM1 may be arranged closer to the scan driver SDC than the second dam DAM2, and the second dam DAM2 may be arranged closer to the edge portion EG of the display panel 100 than the first dam DAM1.

[0135] exist Figure 52 shows that the first dam DAM1 and the second dam DAM2 are arranged on the first power line VL1, but the present disclosure is not limited thereto. For example, any one of the first dam DAM1 and the second dam DAM2 may not be arranged on the first power line VL1. In another embodiment, the first dam DAM1 and the second dam DAM2 may not be arranged on the first power line VL1. In this case, the first dam DAM1 and the second dam DAM2 may be arranged outside the first power line VL1.

[0136] exist Figure 5 1 and 2 show that the display panel 100 includes two dams (eg, a first dam DAM1 and a second dam DAM2), but the present disclosure is not limited thereto. In some embodiments, the display panel 100 may also include three or more dams.

[0137] As described above, the edge portion EG of the display panel 100 may be a portion overlapping the non-display area NDA and surrounding an outer portion of the display device 10 .

[0138] Figure 6 is along Figure 5 Schematic cross-sectional view of the display device 10 taken along line X1 - X1 ′. Figure 7 yes Figure 6 An enlarged schematic cross-sectional view of area "C" of FIG.

[0139] Will refer to Figure 6 and Figure 7 A schematic cross-sectional structure of the display device 10 overlapping the display area DA and the non-display area NDA is described.

[0140] As described above, a portion of the first substrate 110 included in the display device 10 that overlaps the bending area BA and the edge portion EG may be etched by an etching process during a manufacturing process. Figure 6 and Figure 7 The first substrate 110 shown in the figure may be a first sub-substrate 110a, and the first sub-substrate 110a may include a first edge surface e1 overlapping the edge portion EG, a second edge surface e2, and a third edge surface e3. An undercut UC3 may be formed between the first edge surface e1 overlapping the edge portion EG and the second substrate 112. An inclination angle θe1 ​​formed by an upper surface a1 of the first sub-substrate 110a and the first edge surface e1 and an inclination angle θe3 formed by a lower surface a2 of the first sub-substrate 110a and the third edge surface e3 may be an obtuse angle. Other repeated descriptions will be omitted.

[0141] The second substrate 112 may be positioned on the first substrate 110. Since the second substrate 112 has been mentioned, a repeated description thereof will be omitted.

[0142] The thin film transistor layer 130 may be positioned on the second substrate 112. The thin film transistor layer 130 may include a buffer layer 115, a gate insulating layer 119, a thin film transistor TFT, a first insulating layer 121, a second insulating layer 123, a first connection electrode CNE1, a second connection electrode CNE2, a first through hole layer 125, and a second through hole layer 127.

[0143] The buffer layer 115 may be disposed on the second substrate 112. The buffer layer 115 may be formed of an inorganic material, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer. In another embodiment, the buffer layer 115 may be formed as a multilayer film in which multiple layers of the silicon nitride layer, the silicon oxynitride layer, the silicon oxide layer, the titanium oxide layer, and the aluminum oxide layer are stacked on each other. For example, the buffer layer 115 may be formed as a multilayer film in which at least some of the silicon nitride film, the silicon oxynitride film, the silicon oxide film, the titanium oxide film, and the aluminum oxide film are stacked on each other.

[0144] The thin film transistor TFT may be arranged on the buffer layer 115. The thin film transistor TFT may include a gate electrode GE, an active layer ACT, a source region SE, and a drain region DE. The active layer ACT may be formed of polycrystalline silicon (e.g., low temperature polycrystalline silicon), single crystal silicon, amorphous silicon, or an oxide semiconductor material. The source region SE and the drain region DE may be conductive regions doped with ions or impurities to have conductivity.

[0145] exist Figure 7 2 shows a scanning thin film transistor STFT of a scanning driver SDC. The scanning thin film transistor STFT may be substantially the same as the thin film transistor TFT. Specifically, the scanning thin film transistor STFT may include a scanning gate electrode STCH, a scanning active layer STG, a scanning source region STS, and a scanning drain region STD. The scanning active layer STG may be formed of polycrystalline silicon (e.g., low temperature polycrystalline silicon), single crystal silicon, amorphous silicon, or an oxide semiconductor material. The scanning source region STS and the scanning drain region STD may be conductive regions doped with ions or impurities to have conductivity. Other descriptions of the scanning thin film transistor STFT will be omitted.

[0146] The gate insulating layer 119 may be disposed on the active layer ACT of the thin film transistor TFT. The gate insulating layer 119 may separate the gate electrode GE from the active layer ACT. The gate insulating layer 119 may be formed as an inorganic film (or inorganic layer), for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0147] The gate electrode GE of the thin film transistor TFT may be disposed on the gate insulating layer 119. The gate electrode GE of the thin film transistor TFT may overlap the active layer ACT in the third direction (Z-axis direction). The gate electrode GE may be formed as a single layer or a multilayer made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0148] The first insulating layer 121 may be disposed on the gate electrode GE. The first insulating layer 121 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer (for example, a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a titanium oxide film, or an aluminum oxide film). The first insulating layer 121 may include a plurality of inorganic films. The first insulating layer 121 may include a first contact hole CT1 (for example, a portion of the first contact hole CT1).

[0149] The second insulating layer 123 may be disposed on the first insulating layer 121. The second insulating layer 123 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer (for example, a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a titanium oxide film, or an aluminum oxide film). The second insulating layer 123 may include the first contact hole CT1 (for example, another portion of the first contact hole CT1).

[0150] The first connection electrode CNE1 may be disposed on the second insulating layer 123. The first connection electrode CNE1 may be connected to the drain region DE through a first contact hole CT1 penetrating the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123. The first connection electrode CNE1 may be formed as a single layer or a multilayer made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0151] The first via layer 125 may be positioned on the first connection electrode CNE1. The first via layer 125 may planarize the profile of the lower structure. The first via layer 125 may be formed as an organic film made of acryl resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0152] The second connection electrode CNE2 may be disposed on the first via layer 125. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a second contact hole CT2 penetrating the first via layer 125. The second connection electrode CNE2 may be formed as a single layer or a multilayer made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0153] The second via layer 127 may be disposed on the second connection electrode CNE2. The second via layer 127 may be formed as an organic film made of acryl resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0154] The display element layer 150 may be disposed on the thin film transistor layer 130. The display element layer 150 may include a light emitting element ED and a pixel defining layer 151.

[0155] The light emitting element ED may include a pixel electrode AE, a light emitting layer EL, and a common electrode CE. The light emitting element ED refers to a region where the pixel electrode AE, the light emitting layer EL, and the common electrode CE are stacked on each other and holes from the pixel electrode AE ​​and electrons from the common electrode CE are combined with each other in the light emitting layer EL to emit light. In this case, the pixel electrode AE ​​may be an anode electrode, and the common electrode CE may be a cathode electrode.

[0156] The pixel electrode AE ​​may be formed on the second through hole layer 127. The pixel electrode AE ​​may be connected to the second connection electrode CNE2 through a third contact hole CT3 penetrating the second through hole layer 127. The pixel electrode AE ​​may be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0157] The pixel defining layer 151 can be used to define Figure 5 . The pixel defining layer 151 may be formed to expose a partial area of ​​the pixel electrode AE ​​on the second through hole layer 127. The pixel defining layer 151 may be arranged in the third contact hole CT3. In other words, the third contact hole CT3 may be filled with the pixel defining layer 151. The pixel defining layer 151 may be formed as an organic film made of acryl resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0158] The light emitting layer EL may be formed on the pixel electrode AE. The light emitting layer EL may include an organic material to emit light of a predetermined or selected color. For example, the light emitting layer EL may include a hole transport layer, an organic material layer, and an electron transport layer. The organic material layer may include a host and a dopant. The organic material layer may include a material that emits a predetermined or selected light and may be formed of a phosphorescent material or a fluorescent material. The light emitting layer EL may be formed with Figure 5 Each of the light emitting areas EA1, EA2, EA3, and EA4 shown in FIG. 1 overlaps and may be spaced apart from each other.

[0159] The common electrode CE may be formed on the light emitting layer EL. The common electrode CE may be formed to cover the light emitting layer EL. The common electrode CE may be a common layer commonly formed in each of the light emitting areas EA1, EA2, EA3, and EA4. Although not shown in the drawings, a cover layer may also be formed on the common electrode CE.

[0160] The common electrode CE may be formed of a transparent conductive material (TCO) capable of transmitting light, such as ITO or IZO, or a semi-transmissive conductive material, such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). In the case where the common electrode CE is formed of a semi-transmissive conductive material, light emitting efficiency may be increased by a microcavity.

[0161] Reference Figure 7 , the first power line VL1 may include the same material as the first connection electrode CNE1 and the wiring, and may be disposed on the second insulating layer 123. The first power line VL1 may be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0162] The first dam DAM1 and the second dam DAM2 may be arranged on the first power line VL1. The first dam DAM1 may include a first sub-dam SDAM1 and a second sub-dam SDAM2, and the second dam DAM2 may include a first sub-dam SDAM1, a second sub-dam SDAM2, and a third sub-dam SDAM3. The first sub-dam SDAM1 may include the same material as the first through-hole layer 125, and may be arranged on (or in) the same layer as the first through-hole layer 125. The second sub-dam SDAM2 may include the same material as the second through-hole layer 127, and may be arranged on (or in) the same layer as the second through-hole layer 127. The third sub-dam SDAM3 may include the same material as the pixel defining layer 151, and may be arranged on (or in) the same layer as the pixel defining layer 151.

[0163] The height of the first dam DAM1 may be lower than that of the second dam DAM2 , but the embodiment of the specification is not limited thereto. The height of the first dam DAM1 may be substantially the same as or higher than that of the second dam DAM2 .

[0164] The thin film encapsulation layer 170 may be formed on the display element layer 150. The thin film encapsulation layer 170 may be positioned to overlap the display area DA and the non-display area NDA. In order to prevent oxygen or moisture from penetrating into the display element layer 150, the thin film encapsulation layer 170 may include a first encapsulation layer 171 and a third encapsulation layer 175 formed of an inorganic film and a second encapsulation layer 173 formed of an organic film.

[0165] The first encapsulation layer 171 may be disposed on the common electrode CE, the second encapsulation layer 173 may be disposed on the first encapsulation layer 171, and the third encapsulation layer 175 may be disposed on the second encapsulation layer 173. As described above, the second encapsulation layer 173 may not flow to the edge portion EG of the display panel 100 due to the second dam DAM2.

[0166] The first encapsulation layer 171 and the third encapsulation layer 175 may be formed as a multilayer film in which one or more inorganic films of a silicon nitride layer (e.g., a silicon nitride film), a silicon oxynitride layer (e.g., a silicon oxynitride film), a silicon oxide layer (e.g., a silicon oxide film), a titanium oxide layer (e.g., a titanium oxide film), and an aluminum oxide layer (e.g., an aluminum oxide film) are stacked on each other. The second encapsulation layer 173 may be an organic film made of acryl resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0167] The thin film encapsulation layer 170 included in the embodiment may include a fourth encapsulation layer 177 to protect the display panel 100 from being damaged by the etchant. The fourth encapsulation layer 177 may be positioned to overlap the display area DA and the non-display area NDA and may be positioned on the third encapsulation layer 175.

[0168] The fourth encapsulation layer 177 of the display device 10 may be positioned on the third encapsulation layer 175 and the second insulating layer 123 .

[0169] In some embodiments, the fourth encapsulation layer 177 of the display device 10 may completely cover the display area DA and the non-display area NDA of the display panel 100. Therefore, the fourth encapsulation layer 177 of the display device 10 may overlap the edge portion EG of the display panel 100. This may mean that the fourth encapsulation layer 177 overlaps the first edge surface e1, the second edge surface e2, and the third edge surface e3 included in the first substrate 110, and overlaps the undercut UC3 formed by the first edge surface e1 of the first substrate 110 and the second substrate 112.

[0170] The fourth encapsulation layer 177 included in the specification may include an inorganic film having hydrophobicity and acid resistance. Therefore, the fourth encapsulation layer 177 may protect a portion of the display panel 100 from being damaged by an etchant during an etching process included in a manufacturing process of the display device 10. As an example, the fourth encapsulation layer 177 may include amorphous silicon nanocrystals and hydrogenated amorphous silicon nanocrystals. This will be described in detail later.

[0171] Figure 8 yes Figure 7 An enlarged schematic cross-sectional view of area "E" of FIG. Fig. 9 yes Figure 8 An enlarged schematic cross-sectional view of area "G" of FIG.

[0172] Reference Figure 8, the fourth encapsulation layer 177 may include a first portion 177A and a second portion 177B.

[0173] The first portion 177A of the fourth encapsulation layer 177 included in the specification may be formed on the third encapsulation layer 175. Although not shown in the drawings, the first portion 177A of the fourth encapsulation layer 177 may be formed on the second insulating layer 123 to overlap the edge portion EG of the display panel 100. The first portions 177A of the fourth encapsulation layer 177 may be positioned to be spaced apart from each other. The first portions 177A of the fourth encapsulation layer 177 may be randomly dispersed rather than regularly arranged.

[0174] For example, first portion 177A of fourth encapsulation layer 177 may be formed by partially changing the manufacturing process conditions after forming third encapsulation layer 175. For example, first portion 177A of fourth encapsulation layer 177 may be formed by the same process as third encapsulation layer 175. Specifically, first portion 177A of fourth encapsulation layer 177 may be formed by adjusting the silane gas (SiH 4 ) and the on / off time of the power which is one of the manufacturing process conditions. For example, the first portion 177A of the fourth encapsulation layer 177 may be formed continuously after the third encapsulation layer 175 is formed.

[0175] The first portion 177A of the fourth encapsulation layer 177 may be a nanocrystal having a nanometer size. As an example, the first portion 177A of the fourth encapsulation layer 177 may be a hydrogenated amorphous silicon (a-Si:H) nanocrystal or an amorphous silicon (a-Si) nanocrystal.

[0176] Reference Fig. 9 , the first portion 177A of the fourth encapsulation layer 177 may include a concavo-convex structure UE1. The concavo-convex structure UE1 may have a randomly arranged concavo-convex shape rather than a regularly arranged protrusion and depression repeated shape. The height of the protrusion forming the concavo-convex structure UE1 may be formed to be about 40nm or less, but is not limited thereto.

[0177] The first portion 177A of the fourth encapsulation layer 177 may include a concavo-convex structure UE1 that may help maximize acid resistance of a second portion 177B of the fourth encapsulation layer 177 formed in a subsequent process.

[0178] The second portion 177B of the fourth encapsulation layer 177 included in the specification may completely cover the third encapsulation layer 175 and the first portion 177A of the fourth encapsulation layer 177. Although not shown in the drawings, the second portion 177B of the fourth encapsulation layer 177 may also completely cover the second insulating layer 123 and the first portion 177A of the fourth encapsulation layer 177 positioned on the second insulating layer 123.

[0179] The second portion 177B of the fourth encapsulation layer 177 may include an inorganic film having acid resistance. As an example, the second portion 177B of the fourth encapsulation layer 177 may include amorphous silicon. The display device 10 included in the embodiment may use a hydrofluoric acid-based etchant in an etching process during a manufacturing process. The second portion 177B of the fourth encapsulation layer 177 includes acid resistance to the hydrofluoric acid-based etchant, which can solve the occurrence of etching defects caused by the penetration of the etchant into the display panel 100 during the etching process.

[0180] The second portion 177B of the fourth encapsulation layer 177 may cover the first portion 177A with the same thickness along the contour of the first portion 177A. Therefore, the second portion 177B of the fourth encapsulation layer 177 may include a concave-convex structure UE2. The concave-convex structure UE2 included in the second portion 177B of the fourth encapsulation layer 177 may have the same structure and characteristics as the concave-convex structure UE1 included in the first portion 177A. Therefore, the concave-convex structure UE2 included in the second portion 177B may have a randomly arranged concave-convex shape, rather than a shape in which protrusions and recesses are regularly arranged and repeated. The height of the protruding portion forming the concave-convex structure UE2 may be formed to be about 40nm or less, but is not limited thereto.

[0181] The second portion 177B of the fourth encapsulation layer 177 may include a concavo-convex structure UE2 that may allow the second portion 177B of the fourth encapsulation layer 177 to have more maximized acid resistance to the etchant.

[0182] like Fig. 9 As shown in FIG. 1 , the second portion 177B of the fourth encapsulation layer 177 may include a first layer 177B1 and a second layer 177B2. As described above, the second portion 177B of the fourth encapsulation layer 177 may be an inorganic film having acid resistance. Therefore, the first layer 177B1 and the second layer 177B2 of the second portion 177B may have acid resistance.

[0183] However, the second layer 177B2 of the second portion 177B may have acid resistance and hydrophobic properties. This may be formed by treating the second portion 177B of the fourth encapsulation layer 177 with plasma during the manufacturing process of the display device 10. As a result, the second layer 177B2 of the second portion 177B may have acid resistance and hydrophobic properties. Therefore, the second layer 177B2 of the second portion 177B may have higher hydrophobicity than the first layer 177B1 of the second portion 177B.

[0184] In some embodiments, the second layer 177B2 of the second portion 177B may be treated with fluorocarbon (CF) and hydrocarbon (CH) plasma gases, but is not limited thereto. As a result, the second layer 177B2 of the second portion 177B may include carbon, fluorine or hydrogen functional groups, but is not limited thereto.

[0185] In some embodiments, the thickness H177 of the fourth encapsulation layer 177 included in the display device 10 may be about 0.2 μm or less. As an example, when the thickness H177 of the fourth encapsulation layer 177 is about 0.2 μm or less, the fourth encapsulation layer 177 may be transparent. Therefore, even if the fourth encapsulation layer 177 of the display device 10 completely covers the display area DA and the non-display area NDA, this may not affect the efficiency characteristics of light emitted from the light emitting areas EA1, EA2, EA3, and EA4 of the display device 10.

[0186] Fig.10 Is Figure 4 Schematic plan view of the area covered by the fourth encapsulation layer 177 in FIG.

[0187] Reference Fig.10 , the fourth encapsulation layer 177 of the display device 10 may completely cover the lower structure overlapping the display area DA and the non-display area NDA in a plan view. In other words, the first portion 177A and the second portion 177B included in the fourth encapsulation layer 177 of the display device 10 may completely cover the lower structure overlapping the display area DA and the non-display area NDA in a plan view. Although not shown in the drawings, the fourth encapsulation layer 177 of the display device 10 may overlap the edge portion EG of the display panel 100 in a plan view.

[0188] Fig.11 According to another embodiment Figure 6 An enlarged schematic cross-sectional view of area "C" of FIG.

[0189] Reference Fig.11 , the fourth encapsulation layer 177 of the display device 30 included in the embodiment may be positioned on the third encapsulation layer 175 and the second insulating layer 123, and may completely cover the display area DA and the non-display area NDA of the display panel 100. Therefore, the fourth encapsulation layer 177 of the display device 30 may overlap with the edge portion EG of the display panel 100. This may mean that the fourth encapsulation layer 177 of the display device 30 overlaps with the first edge surface e1, the second edge surface e2, and the third edge surface e3 included in the first substrate 110, and overlaps with the undercut UC3 formed by the first edge surface e1 of the first substrate 110 and the second substrate 112. The lower structure of the display device 30 overlapping with the fourth encapsulation layer 177 may include the same structure and characteristics as those of the display device 10 described above.

[0190] However, the embodiment may differ from another embodiment (display device 10) at least in that the fourth encapsulation layer 177 of the display device 30 included in the embodiment may overlap with the edge portion EG of the display panel 100 to cover the end of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121 and the second insulating layer 123.

[0191] In the display device 30 included in the embodiment, the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 may overlap with the edge portion EG of the display panel 100, including the ends of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123. The ends of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 may be surfaces facing the outer portion of the display device 30.

[0192] The fourth encapsulation layer 177 included in the display device 30 may cover the ends of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121 and the second insulating layer 123, thereby preventing the etchant from penetrating into the ends of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121 and the second insulating layer 123 during an etching process included in the manufacturing process of the display device 30 and causing defects.

[0193] The fourth encapsulation layer 177 of the display device 30 may have Figure 8 and Fig. 9 Specifically, the fourth encapsulation layer 177 of the display device 30 may include a first portion 177A including the concavo-convex structure UE1 and a second portion 177B including the concavo-convex structure UE2 and having acid resistance by covering along the first portion 177A.

[0194] The second portion 177B of the fourth encapsulation layer 177 may include a first layer 177B1 having acid resistance and a second layer 177B2 including acid resistance and treated with plasma. The second layer 177B2 treated with plasma may include hydrophobicity. Therefore, the fourth encapsulation layer 177 of the display device 30 may have hydrophobicity in addition to acid resistance. As a result, the fourth encapsulation layer 177 included in the display device 30 may solve etching defects caused by the penetration of an etchant in the manufacturing process of the display device 30. As an example, the first portion 177A of the fourth encapsulation layer 177 may include hydrogenated amorphous silicon (a-Si:H) nanocrystals or amorphous silicon (a-Si) nanocrystals. The second portion 177B of the fourth encapsulation layer 177 may include amorphous silicon. The second layer 177B2 of the second portion 177B including hydrophobicity by plasma treatment may include hydrogen ions, fluorine ions, and carbon ions, but is not limited thereto.

[0195] In some embodiments, a thickness H177 of the fourth encapsulation layer 177 included in the display device 30 may be about 0.2 μm or less. The fourth encapsulation layer 177 having a thickness H177 of about 0.2 μm or less may be transparent. Therefore, the fourth encapsulation layer 177 having a thickness H177 of about 0.2 μm or less may overlap the display area DA and may not affect the efficiency of light emitted from the light emitting areas EA1, EA2, EA3, and EA4 of the display device 30. Other repeated descriptions will be omitted.

[0196] Fig.12 According to yet another embodiment Figure 6 An enlarged schematic cross-sectional view of area "C" of FIG.

[0197] Reference Fig.12 , the fourth encapsulation layer 177 of the display device 50 included in the embodiment may be positioned on the third encapsulation layer 175 and the second insulating layer 123, and may overlap the edge portion EG of the display panel 100. This may mean that the fourth encapsulation layer 177 of the display device 50 overlaps the first edge surface e1, the second edge surface e2, and the third edge surface e3 included in the first substrate 110, and overlaps the undercut UC3 formed by the first edge surface e1 of the first substrate 110 and the second substrate 112. The lower structure of the display device 50 overlapping the fourth encapsulation layer 177 may include the same structure and characteristics as those of the display device 10 described above.

[0198] However, the display device 50 included in the embodiment may be different from the display device 10 at least in that the fourth encapsulation layer 177 of the display device 50 does not overlap the display area DA and overlaps only the non-display area NDA.

[0199] In some embodiments, in the manufacturing process of the display device 50, after the fourth encapsulation layer 177 is completely formed to overlap the display area DA and the non-display area NDA, the portion of the fourth encapsulation layer 177 overlapping the display area DA may be etched through a subsequent dry etching process. Therefore, the fourth encapsulation layer 177 of the display device 50 may not overlap the display area DA, may overlap the non-display area NDA, and may cover the lower structure overlapping the non-display area NDA.

[0200] The fourth encapsulation layer 177 of the display device 50 may have Figure 8 and Fig. 9 Specifically, the fourth encapsulation layer 177 of the display device 50 may include a first portion 177A including the concavo-convex structure UE1 and a second portion 177B including the concavo-convex structure UE2 and having acid resistance by covering along the first portion 177A.

[0201] The second portion 177B of the fourth encapsulation layer 177 may include a first layer 177B1 having acid resistance and a second layer 177B2 including acid resistance and treated with plasma. The second layer 177B2 treated with plasma may include hydrophobicity. Therefore, the fourth encapsulation layer 177 of the display device 50 may have hydrophobicity in addition to acid resistance. As a result, the fourth encapsulation layer 177 included in the display device 50 may solve etching defects caused by the penetration of an etchant in the manufacturing process of the display device 50. As an example, the first portion 177A of the fourth encapsulation layer 177 may include hydrogenated amorphous silicon (a-Si:H) nanocrystals or amorphous silicon (a-Si) nanocrystals. The second portion 177B of the fourth encapsulation layer 177 may include amorphous silicon. The second layer 177B2 of the second portion 177B including hydrophobicity by plasma treatment may include hydrogen ions, fluorine ions, and carbon ions, but is not limited thereto.

[0202] In the display device 50 included in the embodiment, since the fourth encapsulation layer 177 is positioned not to overlap with the display area DA and to overlap with the non-display area NDA, the thickness H177 of the fourth encapsulation layer 177 of the display device 50 can be formed without restriction. Therefore, the acid resistance and hydrophobicity of the fourth encapsulation layer 177 of the display device 50 can be further enhanced.

[0203] Fig.13 Is Fig.12 Schematic plan view of the area covered by the fourth encapsulation layer 177.

[0204] Reference Fig.13, in a plan view, the fourth encapsulation layer 177 included in the display device 50 may overlap the non-display area NDA and be positioned in a mesh shape. In other words, in a plan view, the fourth encapsulation layer 177 included in the display device 50 may be positioned in a mesh shape while exposing the display area DA. As described above, after the fourth encapsulation layer 177 included in the display device 50 is completely formed to overlap the display area DA and the non-display area NDA in a plan view, a portion of the fourth encapsulation layer 177 overlapping the display area DA may be removed by a subsequent dry etching process.

[0205] Fig.14 According to yet another embodiment Figure 6 An enlarged schematic cross-sectional view of area “C” in FIG.

[0206] Reference Fig.14 , the fourth encapsulation layer 177 of the display device 70 included in the embodiment may be positioned on the third encapsulation layer 175 and the second insulating layer 123, and may overlap the edge portion EG of the display panel 100. This may mean that the fourth encapsulation layer 177 of the display device 70 overlaps the first edge surface e1, the second edge surface e2, and the third edge surface e3 included in the first substrate 110, and overlaps the undercut UC3 formed by the first edge surface e1 of the first substrate 110 and the second substrate 112.

[0207] The fourth encapsulation layer 177 of the display device 70 may have Figure 8 and Fig. 9 Specifically, the fourth encapsulation layer 177 of the display device 70 may include a first portion 177A including the concavo-convex structure UE1 and a second portion 177B including the concavo-convex structure UE2 and having acid resistance by covering along the first portion 177A.

[0208] The second portion 177B of the fourth encapsulation layer 177 may include a first layer 177B1 having acid resistance and a second layer 177B2 including acid resistance and treated with plasma. The second layer 177B2 treated with plasma may include hydrophobicity. Therefore, the fourth encapsulation layer 177 of the display device 70 may have hydrophobicity in addition to acid resistance. As a result, the fourth encapsulation layer 177 included in the display device 70 may solve etching defects caused by the penetration of an etchant in the manufacturing process of the display device 70. As an example, the first portion 177A of the fourth encapsulation layer 177 may include hydrogenated amorphous silicon (a-Si:H) nanocrystals or amorphous silicon (a-Si) nanocrystals. The second portion 177B of the fourth encapsulation layer 177 may include amorphous silicon. The second layer 177B2 of the second portion 177B including hydrophobicity by plasma treatment may include hydrogen ions, fluorine ions, and carbon ions, but is not limited thereto.

[0209] In the display device 70 included in the embodiment, the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 may overlap with the edge portion EG of the display panel 100, including the end portions of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123. The end portions of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 included in the display device 70 may be surfaces facing the outer portion of the display device 70.

[0210] The fourth encapsulation layer 177 included in the display device 70 may cover the end portions of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123, and the end portions of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 may have the same structure and characteristics as the above-mentioned display device 30. Therefore, the fourth encapsulation layer 177 of the display device 70 may prevent an etchant from penetrating into the end portions of the second substrate 112, the buffer layer 115, the gate insulating layer 119, the first insulating layer 121, and the second insulating layer 123 during an etching process included in a manufacturing process to cause defects.

[0211] However, the display device 70 included in the embodiment may be different from the display device 30 at least in that the fourth encapsulation layer 177 of the display device 70 does not overlap the display area DA and overlaps only the non-display area NDA.

[0212] In some embodiments, in the manufacturing process of the display device 70, after the fourth encapsulation layer 177 is completely formed to overlap the display area DA and the non-display area NDA, the portion of the fourth encapsulation layer 177 overlapping the display area DA may be etched through a subsequent dry etching process. Therefore, the fourth encapsulation layer 177 of the display device 70 may not overlap the display area DA, and may cover the lower structure overlapping the non-display area NDA.

[0213] In the display device 70 included in the embodiment, since the fourth encapsulation layer 177 is positioned not to overlap with the display area DA and to overlap with the non-display area NDA, the thickness H177 of the fourth encapsulation layer 177 of the display device 70 can be formed without restriction. Therefore, the acid resistance and hydrophobicity of the fourth encapsulation layer 177 of the display device 70 can be further enhanced.

[0214] Embodiments have been disclosed herein, and although terms are employed, they are used and interpreted in a general and descriptive sense only and not for purposes of limitation. In some cases, as will be apparent to one of ordinary skill in the art, unless otherwise specifically indicated, features, characteristics, and / or elements described in conjunction with an embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Accordingly, one of ordinary skill in the art will appreciate that various changes in form and detail may be made without departing from the spirit and scope of the present disclosure.

Claims

1. A display device, comprising: a first substrate, the first substrate comprising a display area and a non-display area surrounding the display area; a second substrate disposed on the first substrate; a display element layer, the display element layer being arranged on the second substrate and overlapping the display area; a first encapsulation layer, which is arranged on the display element layer, overlaps the non-display area, and includes an inorganic material; as well as a second encapsulation layer, which is arranged on the first encapsulation layer, comprises a concave-convex structure and comprises an inorganic material, Wherein, the first substrate comprises: a first surface facing the second substrate; and a first inclined surface overlapping an edge portion of the first substrate and extending to the first surface, The inclination angle formed by the first surface and the first inclined surface is an obtuse angle, and The first inclined surface overlaps the second encapsulation layer in a direction perpendicular to the first substrate.

2. The display device according to claim 1, wherein: The first inclined surface and the second substrate form an undercut.

3. The display device according to claim 2, wherein: The undercut overlaps the second encapsulation layer in the direction perpendicular to the first substrate.

4. The display device according to claim 3, wherein: The second encapsulation layer completely covers the first encapsulation layer.

5. The display device according to claim 3, wherein: The second encapsulation layer includes an inorganic material having acid resistance to a fluorine-based etchant.

6. The display device according to claim 5, wherein: The second encapsulation layer includes amorphous silicon.

7. The display device according to claim 1, wherein: The second encapsulation layer comprises: a plurality of first layers, the plurality of first layers including the concavo-convex structure and spaced apart from each other in a direction parallel to the first substrate; a second layer, the second layer completely covering the plurality of first layers and including the concavo-convex structure; and A third layer is disposed on the second layer and includes the concavo-convex structure.

8. The display device according to claim 7, wherein: The third layer has higher hydrophobicity than the second layer.

9. The display device according to claim 8, wherein: The third layer includes carbon ions, fluorine ions, and hydrogen ions.

10. The display device according to claim 7, wherein: The second layer is in physical contact with the first encapsulation layer.

11. The display device according to claim 1, wherein: The first substrate includes a second surface facing the first surface and a second inclined surface overlapping the edge portion of the first substrate and extending to the second surface, and An inclination angle formed by the second surface and the second inclined surface is an obtuse angle.

12. The display device according to claim 11, wherein: The second inclined surface overlaps the second encapsulation layer in the direction perpendicular to the first substrate.

13. The display device according to claim 1, wherein: The thickness of the second encapsulation layer in the direction perpendicular to the first substrate is 0.2 μm or less.

14. The display device according to claim 13, wherein: The second encapsulation layer overlaps the display area and the non-display area in a plan view, and The second encapsulation layer completely covers the first encapsulation layer in a plan view.

15. The display device according to claim 14, wherein: The second encapsulation layer overlaps the edge portion of the first substrate and covers a side surface of the second substrate.

16. The display device according to claim 1, wherein: The second encapsulation layer is arranged in a mesh shape to overlap the non-display area while exposing the display area in a plan view.

17. The display device according to claim 16, wherein: The second encapsulation layer overlaps the edge portion of the first substrate and covers a side surface of the second substrate.

18. A display device comprising: A first substrate, the first substrate comprising a main area and a pad area; a second substrate disposed on the first substrate and comprising a bending region disposed between the main region and the pad region; a display element layer, the display element layer being arranged on the second substrate and overlapping the main area; a first encapsulation layer, the first encapsulation layer being arranged on the display element layer and comprising an inorganic material; as well as a second encapsulation layer, which is arranged on the first encapsulation layer, comprises a concave-convex structure and comprises an inorganic material, The first substrate includes a first sub-substrate and a second sub-substrate spaced apart from each other via the bending region, and the bending region is arranged between the first sub-substrate and the second sub-substrate. The first sub-substrate comprises: a first surface facing the second substrate; and a first inclined surface facing the curved region and extending to the first surface, and The first sub-substrate and the second encapsulation layer overlap each other in a direction perpendicular to the first substrate.

19. The display device according to claim 18, wherein: The inclination angle formed by the first inclined surface and the first surface is an obtuse angle, and The second substrate and the first inclined surface form an undercut.

20. The display device according to claim 19, wherein: The first sub-substrate includes a second inclined surface opposite to the first inclined surface, the second inclined surface extends to the first surface in a direction opposite to the direction in which the first inclined surface is arranged, The inclination angle formed by the first surface and the second inclined surface is an obtuse angle, and The second inclined surface and the second encapsulation layer overlap each other in the direction perpendicular to the first substrate.

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