Method for detecting foreign matters in circuit connection layer of packaging substrate
Through three-dimensional perspective imaging and focused ion beam cutting technology combined with infrared spectroscopy component analysis, the problem of foreign matter detection in the line connection layer of the package substrate is solved, and fast and accurate defect identification and analysis is achieved, the production process of the package substrate is optimized, and the reduction of the reduction of The bad rate.
Patent Information
- Application Number
- CN202311053373.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-21
- Publication Date
- 2025-02-21
AI Technical Summary
The prior art is difficult to effectively detect foreign matter in the line connection layer of the package substrate, resulting in line short circuits and rising resistance, affecting the yield and electrical connection performance of the package substrate.
Three-dimensional fluoroscopy was used to detect and locate and mark defect locations, and foreign matter was exposed through focused ion beam cutting, and component analysis was performed using infrared spectroscopy to determine the source of foreign matter.
It realizes rapid and non-destructive identification of defect locations, accurately locate and analyze foreign objects, timely detects production processes and environmental pollution that may affect the yield of packaging substrates, optimizes production processes, and reduces production defect rates.
Smart Images
Figure CN119492703A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductor integrated circuits and relates to a defect detection method for a packaging substrate. Background Art
[0002] With the rapid development of semiconductor industry technology, the number of I / O (contact pads) of chips has increased, which has put forward higher requirements for packaging substrates - higher integration, finer circuits, and smaller spacing. Defects that are prone to occur during the production process of packaging substrates include: circuit short circuits, circuit open circuits caused by gaps in the copper-clad surface, and copper surface scratches. Conventionally, the above defects can be distinguished by manual visual inspection such as AOI technology. In actual processes, the entry of foreign matter on some incoming board surfaces and during the formation of the circuit connection layer will cause an increase in the internal resistance of the circuit or cause a short circuit in the circuit. In addition, the entry of foreign matter during the production process of the packaging substrate containing a silicon-based intermediate layer will also cause a short circuit or an increase in internal resistance. Limited by the depth and accuracy of the apparent detection, conventional defect analysis methods such as apparent analysis cannot directly detect foreign matter or directly perform component analysis because the surface of the foreign matter is covered by electroplated copper. In addition, sample pretreatment methods including the production of slices are used to implement such foreign matter detection methods, which will cause debris to fall off during the production process of the slices, and it is also impossible to accurately analyze and determine the foreign matter components that cause defects.
[0003] Therefore, it is necessary to provide a method for detecting foreign matter in the circuit connection layer of a packaging substrate to optimize the production process and yield of the packaging substrate. Summary of the invention
[0004] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a method for detecting foreign matter in the circuit connection layer of a packaging substrate, which is used to solve the circuit short circuit and / or circuit resistance increase caused by foreign matter in the circuit connection layer of the packaging substrate in the prior art, thereby affecting the yield of the packaging substrate and its electrical connection performance.
[0005] To achieve the above-mentioned object and other related objects, the present invention provides a method for detecting foreign matter in a circuit connection layer of a packaging substrate, comprising the following steps:
[0006] S1: obtaining a packaging substrate coated with a patterned metal connection layer, wherein the packaging substrate comprises a silicon-based intermediate layer for electrically connecting the packaging substrate to a chip;
[0007] S2: Identify whether the packaging substrate has defects;
[0008] S3: performing three-dimensional perspective imaging detection on the defective packaging substrate, and locating and marking the defect position of the packaging substrate based on the three-dimensional perspective image of the packaging substrate;
[0009] S4: sampling the defective packaging substrate according to the marked defect position to obtain a defective sample;
[0010] S5: placing the defective sample on a sample table and placing it at an inclined angle to the table of a focused ion beam machine, and using a focused ion beam to cut the marked defective positions one by one to expose foreign matter under the defective positions;
[0011] S6: Performing component analysis on the foreign matter exposed on the cutting surface formed by the focused ion beam to determine the source of the foreign matter.
[0012] Optionally, step S2 includes: using automated optical inspection to perform appearance defect inspection on the obtained packaging substrate, wherein the packaging substrate includes a core board structure, a build-up layer and a circuit connection layer; identifying the defect position in the circuit connection layer, and preliminarily determining the defect position of the defective packaging substrate as a circuit short circuit caused by foreign matter.
[0013] Optionally, the circuit connection layer includes a seed layer and a metal connection layer, the metal connection layer is a copper-containing plating layer formed by an electroplating process, and the microscopic morphology of the defect position includes one or a combination of copper wires, copper particles and copper slag.
[0014] Optionally, step S3 includes: performing X-ray inspection on the defective packaging substrate; based on the X-ray three-dimensional perspective image of the packaging substrate, observing the distribution and geometric morphology of the impurities, locating and marking the foreign matter in the packaging substrate, thereby determining the spot positioning of the subsequent focused ion beam.
[0015] Optionally, S2: performing point-by-point electrical testing on the contact network of the packaging substrate to identify whether the packaging substrate has defects, which includes:
[0016] In response to an electrical anomaly being detected at a test point of the contact network, determining that a line short circuit exists on the contact network, and inferring a defect location caused by a foreign object;
[0017] S3: Based on the X-ray three-dimensional perspective image of the packaging substrate and the determination that the line short circuit exists in the contact network, the foreign matter in the interconnection surface between the silicon-based intermediate layer and the packaging substrate is located and marked.
[0018] Optionally, in step S4, the defective packaging substrate is sampled according to the marked defect position to obtain defective samples, and the shape of the defective samples includes a rectangle or a square; then, each defective sample is surface cleaned.
[0019] Optionally, step S5 includes: the defective sample is fixed on a sample stage and rotated with the sample stage at a predetermined angle so that the focused ion beam is injected into the defective position at an angle to the surface of the defective sample, and the defective position is cut along the edge of the defective position in an inclined direction toward the inside.
[0020] Optionally, in step S5, based on the cutting surface formed by the focused ion beam, an infrared spectroscopic microscope is used to perform component analysis on the exposed foreign matter, wherein the defective sample after cutting is placed so that the cutting surface where the foreign matter is exposed is parallel to the table top of the infrared spectroscopic microscope.
[0021] Optionally, the components of the foreign matter are determined to be components of a photosensitive dry film based on the peak position, peak shape and peak intensity of the infrared spectrum, and it is determined that the foreign matter originates from a production process of a patterned metal connection layer.
[0022] Optionally, the components of the foreign matter are determined to be components of the protective layer based on the peak position, peak shape and peak intensity of the infrared spectrum, and it is determined that the foreign matter originates from the film-tearing step of the protective layer.
[0023] As described above, the present invention provides a method for detecting foreign matter in the circuit connection layer of a packaging substrate, which first identifies a defective packaging substrate, and then uses three-dimensional perspective imaging to locate and mark the defect position, which can quickly and non-destructively identify the defect position, and determine the source of the foreign matter by performing component analysis on the foreign matter below the defect position, and timely detect the production process and / or environmental contamination that may affect the yield of the packaging substrate, optimize the production process of the packaging substrate, and can improve the production process of the packaging substrate in a targeted manner, thereby reducing the production defect rate of the packaging substrate. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1-2 Schematic diagram showing the location of defects on a package substrate.
[0025] Figure 3 Shown is a flow chart of a method for detecting foreign matter in a circuit connection layer of a packaging substrate of the present invention.
[0026] Figure 4A to Figure 4B It is a schematic diagram showing a defective sample obtained by sampling the defective packaging substrate in step S4 of the present invention.
[0027] Figure 5A to Figure 5B It is a schematic diagram showing the use of a focused ion beam (FIB) to align defect positions in step S5 of the present invention.
[0028] Figure 6A to Figure 6B It is a schematic diagram showing the formation of a cutting surface after the defect position is cut using a focused ion beam in step S5 of the present invention.
[0029] Figure 7A to Figure 7B It is a schematic diagram showing the use of an infrared spectroscopic microscope to perform component analysis on the cut surface of a defective sample in step S6 of the present invention.
[0030] Figure 8 The figure shows a comparison of the infrared light absorption spectra of the foreign matter in the circuit connection layer of the packaging substrate in the present invention and the standard substance.
[0031] Component number description
[0032] 100 core board structure
[0033] 201 Addition
[0034] 205 Seed Layer
[0035] 206 Metal connection layer
[0036] Lines 2061 and 2062
[0037] 30 Silicon-based intermediate layer
[0038] 301 Contact Pad
[0039] Line 3021, 3022
[0040] 3a, 3b Foreign matter
[0041] Steps S1 to S6
[0042] X Test for foreign matter
[0043] R Standard Material DETAILED DESCRIPTION
[0044] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0045] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.
[0046] For ease of description, spatial relational terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relational terms are intended to include other directions of the device in use or operation in addition to the directions depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers. As used herein, "between..." means including the end point values.
[0047] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0048] See also Figures 1 to 8 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0049] There are three main methods for making fine circuits in the packaging substrate field: subtractive method, improved semi-additive method and semi-additive method. Figure 1 and Figure 2 The schematic diagram of a package substrate including a silicon-based intermediate layer with defective locations is shown. The package substrate includes a silicon-based intermediate layer 30 buried therein, a build-up layer 201 and a circuit connection layer.
[0050] Among them, the step of electrically connecting the silicon-based intermediate layer 30 to the packaging substrate 10 can be performed after patterning the core board structure and before forming the build-up layer; specifically, after patterning the core board structure 100, a groove is formed in the packaging substrate 10 to expose its core board conductive layer, and the silicon-based intermediate layer 30 is electrically connected to the core board conductive layer by lamination.
[0051] The steps of forming the build-up layer 201 include: using a vacuum pressing method to form a build-up layer 201 and a protective layer stacked from the inside to the outside on two opposite sides of the core board structure 100; patterning the build-up layer 201 and the protective layer to form an etching window; based on the etching window, performing inductively coupled plasma etching to form a connecting hole penetrating the build-up layer; before performing the copper plating process, removing the protective layer.
[0052] After the step of forming the build-up layer 201, the process of making the circuit connection layer is performed, including: forming a seed layer 205 by chemical plating or sputtering; preparing a photosensitive layer on the seed layer 205, and exposing and developing the photosensitive layer; electroplating the metal connection layer 206 to form the required circuit; removing the photosensitive layer and the corresponding seed layer to obtain the final circuit connection layer.
[0053] Under ideal conditions, the core structure 100 of the package substrate has a build-up layer 201, a seed layer 205, and a metal connection layer 206 stacked on opposite surfaces in sequence, and no foreign matter will be formed. However, in the actual production process, foreign matter may be mixed into the package substrate 10, such as Figure 1 As shown in FIG. 1 , the mixing of foreign matter 3a may cause micro-short or short circuit of the circuit 2061 and the circuit 2062 in the circuit connection layer. Figure 2 As shown, the package substrate includes a silicon-based intermediate layer 30 buried in the groove thereof, and the mixing of foreign matter 3b may cause the circuit 3021 and the circuit 3022. In particular, the reduction of line spacing may make the process residue or contamination of the processing surface sensitive, and the mixing of foreign matter into the interconnection surface between the package substrate and the silicon-based intermediate layer may affect the electrical connection between the package substrate and the chip due to the small spacing between the contact pads 301, and even cause a short circuit or an increase in resistance.
[0054] The inventors have found that in the above process steps, incomplete stripping of the protective layer and the photosensitive layer, and / or contamination of the production environment before the electroplating step, and foreign matter introduced into the surface to be plated may cause greater surface roughness, resulting in micro-shorts or short circuits at the bottom of the fine lines.
[0055] In order to solve the problems of circuit short circuit and / or increased circuit resistance caused by foreign matter, and increased production defect rate of packaging substrate, the present invention provides a method for detecting foreign matter in the circuit connection layer of the packaging substrate, which first identifies the defective packaging substrate, and then locates and marks the defect position using three-dimensional perspective imaging, so that the defect position can be identified quickly and non-destructively, and the source of the foreign matter can be determined by analyzing the composition of the foreign matter below the defect position, so as to timely detect the production process and / or environmental contamination that may affect the yield of the packaging substrate, thereby improving the yield of the packaging substrate.
[0056] The following is combined with Figure 3 7 , a method for detecting foreign matter in the circuit connection layer of the package substrate is further introduced.
[0057] First, see Figure 3 , executing step S1, obtaining a packaging substrate 10 coated with a patterned metal connection layer, wherein the packaging substrate 10 includes a silicon-based intermediate layer 30 for electrically connecting the chip to the packaging substrate.
[0058] Specifically, the package substrate 10 includes a core board structure 100, a build-up layer 201 and a circuit connection layer, the core board structure 100 includes a dielectric layer and a core board conductive layer sandwiching the dielectric layer, the circuit connection layer includes a seed layer 205 and a metal connection layer 206, the silicon-based intermediate layer 30 is buried in the package substrate 10, and is electrically connected to the core board conductive layer through a contact pad 301. For example, the package substrate 10 includes an FCBGA package substrate, an FCCSP package substrate or a similar package substrate, and the metal connection layer 206 is a copper-containing plating layer formed by an electroplating process.
[0059] Next, see Figure 3 , execute step S2: identify whether the packaging substrate 10 has defects.
[0060] Specifically, the obtained packaging substrate 10 is subjected to appearance defect detection, the defect position of the packaging substrate 10 is identified, and the identified defect position is marked. Since the packaging substrate is first subjected to non-destructive testing by appearance defect detection, the defective packaging substrate and its defect position can be quickly identified.
[0061] For example, automated optical inspection (AOI) is used to perform appearance defect inspection on the obtained packaging substrate 10, wherein the packaging substrate 10 includes a core board structure 100, a build-up layer 201 and a circuit connection layer; the defect position in the circuit connection layer is identified, and the identified defect position in the circuit connection layer is marked, and the defect position in the circuit connection layer is preliminarily determined to be a circuit short circuit caused by foreign matter, wherein the defect position can be marked by methods such as laser marking or manual marking, and the microscopic morphology of the defect position includes one or a combination of copper wires, copper particles and copper slag.
[0062] In some embodiments, the mark of the defect location includes a dot mark, a cross mark, or the like.
[0063] In some embodiments, step S2 further includes: performing point-by-point electrical testing on the contact network of the packaging substrate 10 to identify whether the packaging substrate 10 has defects, wherein the electrical testing includes performing electrical performance, open-short circuit testing or similar tests on the test points on the contact network. Further, the step of identifying whether the packaging substrate 10 has defects includes, in response to detecting electrical anomalies at the test points of the contact network, determining that there is a line short circuit on the contact network, inferring the defect location caused by foreign matter, and performing electrical testing on the contact network of the entire packaging substrate to quickly and comprehensively identify packaging substrates with electrical anomalies, thereby reducing the missed detection rate that may be caused by appearance defect detection such as AOI.
[0064] For example, the contact network of the silicon-based intermediate layer 30 is electrically tested point by point on the exposed surface of the silicon-based intermediate layer to identify whether there is a defect in the interconnection surface between the silicon-based intermediate layer 30 and the packaging substrate 10, which includes one of the following items: S2-1, in response to the detection of electrical anomalies at the test points of the contact network, it is determined that there is a line short circuit on the contact network, and it is inferred that there is a defect location caused by foreign matter; or S2-2: it is determined that the electrical properties at the test points of the contact network meet the standards, and the above-mentioned electrical detection steps of other silicon-based intermediate layers of the packaging substrate are continuously repeated, thereby determining the interconnection status of all silicon-based intermediate layers in the packaging substrate, and timely detecting the electrical connection between the packaging substrate and the chip, which is conducive to improving the yield of the product. For example, a flying probe test device can be used to perform electrical testing on the contact network of the silicon-based intermediate layer.
[0065] Next, see Figure 4A to Figure 4B , execute step S3, perform three-dimensional perspective imaging detection on the defective packaging substrate 10, and identify the defect position of the packaging substrate based on the acquired three-dimensional perspective image, and locate and mark the defect position.
[0066] Specifically, X-ray inspection is performed on the defective packaging substrate 10, and based on the acquired X-ray three-dimensional perspective image, foreign matter in the circuit connection layer is located and marked, and the distribution and geometric morphology of the debris are observed to determine the spot positioning of the focused ion beam in the subsequent steps, thereby improving the inaccurate positioning caused by the resolution difference between the defect position marked by AOI imaging and the spot of the focused ion beam.
[0067] like Figure 4B As shown, step S3 also includes: based on the acquired X-ray three-dimensional perspective image, combined with the determination that the circuit short circuit exists in the contact network, the foreign matter 3b in the interconnection surface between the silicon-based intermediate layer 30 and the packaging substrate 10 is located and marked, thereby determining the target position of the subsequent focused ion beam injection. In some embodiments, the X-ray detection step can be performed using an automatic X-ray detection system, which may include one or more computers or controllers and instructions stored in one or more computer media. For example, due to the X-ray absorption effect, the automatic X-ray detection system can capture an X-ray image based on the defect position marked by the AOI detection on the orthogonal surface of the sample being inspected, and determine the depth and size of the part of interest. In this embodiment, the depth and size of the foreign matter in the circuit connection layer are determined by the automatic X-ray detection system.
[0068] Next, see Figure 4A to Figure 4B , execute step S4, sampling the defective packaging substrate 10 according to the marked defect position to obtain a defective sample.
[0069] Specifically, according to the marked defect position, a sampler is used to sample the package substrate to obtain a defect sample with a predetermined size. The predetermined size of the defect sample can be appropriately enlarged according to the coverage area of the defect position to protect the defect from being damaged during sampling; then, each defect sample is surface cleaned.
[0070] For example, see Figure 4B According to the positioning mark of the foreign matter 3b below the silicon-based intermediate layer, a sampler is used to sample the packaging substrate, and the sampling part at least covers the complete section of the silicon-based intermediate layer 30 to avoid the foreign matter from falling off during the slicing process.
[0071] In some embodiments, the shape of the defective sample includes a rectangle or a square. In this embodiment, the size of the defective sample is a square sample of 2 cm×2 cm.
[0072] Next, see Figure 5A to Figure 5B , execute step S5, place the defective sample on the sample table and place it at an inclined angle to the table of the focused ion beam machine, and use the focused ion beam to cut the marked defective positions one by one to expose the foreign matter under the defective position.
[0073] Specifically, the operation flow of step S5 is as follows: fix the defective sample to be cut on the sample stage, then put it into the sample chamber and evacuate it; when the vacuum degree is less than a certain value, turn on the electron beam, adjust the position of the sample stage, adjust the defective sample to be cut to just below the electron beam pole shoe, adjust the Z-axis working distance to the common focal point, and adjust the electron beam voltage, current, observation mode, probe, focal length, astigmatism, contrast, brightness and other parameters; rotate the sample stage to a certain angle so that the surface of the defective sample to be cut maintains an inclined angle θ with the ion beam, locate the defective position marked on the defective sample to be cut, turn on the ion beam, and adjust the ion beam voltage, current, observation mode, probe, focal length, astigmatism, contrast, brightness and other parameters; set the cutting parameters according to the marked defective position, first perform rough cutting on the defective sample, and then perform fine trimming to form a cutting surface at an angle to the surface of the defective sample, while exposing foreign matter. Since the positioning accuracy of the focused ion beam can reach 5nm, the focused ion beam can be used to accurately locate foreign matter below the circuit connection layer and form a cutting surface with clear edges. It can be understood that the cutting depth of the focused ion beam can be appropriately determined based on three-dimensional X-ray imaging, as long as the formed cutting surface can fully expose the foreign matter.
[0074] In some embodiments, such as Figure 5A to Figure 6AAs shown, the defective sample is fixed on the sample stage and rotated with the sample stage by a predetermined angle θ, so that the focused ion beam is aligned with the marked defective position, and the focused ion beam is injected into the defective position at an angle with the surface of the defective sample, and along the edge of the defective position toward the inside in an inclined direction, as shown in FIG. Figure 5A The defective position is cut in the direction of the dotted line indicated by the marking, so as to expose the foreign matter 3a on the formed cutting surface. Alternatively, the focused ion beam is injected into the defective position at an angle to the surface of the defective sample, and the focused plasma is made to bevel the foreign matter near the center of the defective position to form a cutting surface, and the foreign matter 3a is fully exposed on the formed cutting surface. Preferably, the defective sample rotates with the sample stage at a predetermined angle θ in the range of 0 to 60 degrees, preferably about 45 degrees, and the defective sample is injected into the defective position at an angle to the table of the focused ion beam machine.
[0075] In other embodiments, Figure 5B As shown, based on the positioning of the marked foreign matter below the silicon-based intermediate layer 30, the focused ion beam is positioned to cut the silicon-based intermediate layer 30 and the foreign matter 3b below it along the inclined direction of the edge of the foreign matter 3b toward the inside, as shown in FIG. Figure 5B The dotted line indicates the direction of the cut surface formed by FIB. Figure 6B .
[0076] Next, see Figure 7A to Figure 7B , execute step S6, perform component analysis on the exposed foreign matter based on the cutting surface formed by the focused ion beam to determine the source of the foreign matter.
[0077] Specifically, the defective sample is turned so that the cut surface exposing the foreign matter is parallel to the table of the infrared spectroscopic microscope, so that the cut surface exposing the foreign matter is exposed to the infrared light probe.
[0078] For example, when the focused ion beam is cut at an inclined angle of about 45 degrees to the surface of the defective sample, the defective sample is turned 90 degrees after cutting so that the cut surface where the foreign matter is exposed is parallel to the table of the infrared spectroscopic microscope. The cut surface where the foreign matter is exposed can be exposed to the infrared light probe, which is convenient for detecting the foreign matter and, if necessary, for realizing a rapid scan of the entire surface of the defective sample.
[0079] In some embodiments, the components of the foreign matter are determined to be components of the photosensitive layer based on the peak position, peak shape and peak intensity of the infrared spectrum, and it is determined that the foreign matter comes from the production process of the patterned metal connection layer.
[0080] In other embodiments, the components of the foreign matter are determined to be components of the protective layer according to the peak position, peak shape and peak intensity of the infrared absorption spectrum, and the foreign matter is determined to be derived from the film peeling step of the protective layer. The method of obtaining the infrared spectrum through the infrared spectroscopic microscope includes using at least one of the attenuated total reflectance (ATR), reflection (Ref) or transmission (TR).
[0081] like Figure 8 As shown, it shows that the infrared absorption spectrum of the foreign matter is obtained by the attenuated total reflection (ATR) method, and the component information of the foreign matter is determined based on the matching degree between the characteristic peak positions of the foreign matter and the standard substance by comparing the infrared absorption spectrum X of the tested foreign matter with the infrared absorption spectrum R of the standard substance.
[0082] For example, the standard substance is selected to be the same material as the protective layer coated on the outside of the added layer by the vacuum lamination method, and the matching degree between the characteristic peak position of the foreign matter and the standard substance is used to determine the composition information of the foreign matter, and it is determined that the foreign matter comes from the uneven pressure distribution of the vacuum lamination method, or the stripping step of the protective layer.
[0083] For example, the standard substance is selected as a monomer or composition that constitutes a photosensitive dry film in the patterning process, such as an alkali-soluble group or a photosensitive resin. Based on the matching degree between the characteristic peak position of the foreign matter and the standard substance, the composition information of the foreign matter is determined, and it is determined that the foreign matter comes from the film stripping step of the photosensitive layer; for example, due to uneven force application during the application of the photosensitive dry film, the photosensitive layer remains. Further, combined with the positioning of the foreign matter, it is determined that the foreign matter comes from the film stripping step after the patterning of the build-up layer or core board structure.
[0084] Preferably, infrared light detection equipment combining infrared microscopy and attenuated total reflection (ATR) is used to perform the composition analysis of the foreign matter, including: using infrared light to scan the defective sample showing the foreign matter, and obtaining the infrared light absorption image of the whole surface; then, locating the foreign matter by comparing the foreign matter with other parts of the defective sample, and using total reflection infrared spectroscopy to analyze chemical bonds or functional groups. The positioning accuracy of the defect mark is further improved by using X-ray detection or infrared microscopy with higher positioning accuracy, avoiding misjudgment of the composition of foreign matter mixed into the circuit connection layer.
[0085] In some embodiments, the method further includes: determining that the foreign matter is a metal based on the degree of match between the characteristic peak positions of the foreign matter and the standard substance, and performing component analysis using a scanning electron microscope-X-ray energy dispersive spectrometer (SEM-EDS) to determine that the foreign matter is a metal.
[0086] Furthermore, it also includes: collecting suspicious objects at the production site based on the geometric shape and size of the foreign objects detected by X-ray; performing component analysis on the suspicious objects at the production site through an infrared spectroscopic microscope, and comparing the infrared spectra of the foreign objects with those of the suspicious objects at the production site; determining components with a high degree of match between the foreign objects and the suspicious objects at the production site, for example, a degree of match ≥ 80%, based on the peak positions, peak shapes, and peak intensities of the infrared spectra of the foreign objects and the suspicious objects at the production site, and preliminarily determining that the foreign objects are derived from contamination at the production site.
[0087] In summary, the method for detecting foreign matter in the circuit connection layer of the packaging substrate of the present invention first identifies the defective packaging substrate, and then uses three-dimensional perspective imaging to locate and mark the defective position, which can quickly and non-destructively identify the defective position, and determine the source of the foreign matter by performing component analysis on the foreign matter below the defective position, and timely detect the production process and / or environmental contamination that may affect the yield of the packaging substrate, optimize the production process of the packaging substrate, and can improve the production process of the packaging substrate in a targeted manner, thereby reducing the production defect rate of the packaging substrate.
[0088] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for detecting foreign matter in a circuit connection layer of a packaging substrate, characterized in that: The following steps are involved: S1: obtaining a packaging substrate coated with a patterned metal connection layer, wherein the packaging substrate comprises a silicon-based intermediate layer for electrically connecting the packaging substrate to a chip; S2: Identify whether the packaging substrate has defects; S3: performing three-dimensional perspective imaging detection on the defective packaging substrate, and locating and marking the defect position of the packaging substrate based on the three-dimensional perspective image of the packaging substrate; S4: sampling the defective packaging substrate according to the marked defect position to obtain a defective sample; S5: placing the defective sample on a sample table and placing it at an inclined angle to the table of a focused ion beam machine, and using a focused ion beam to cut the marked defective positions one by one to expose foreign matter under the defective positions; S6: Performing component analysis on the foreign matter exposed on the cutting surface formed by the focused ion beam to determine the source of the foreign matter.
2. The detection method according to claim 1, characterized in that: Step S2 includes: using automated optical inspection to perform appearance defect inspection on the obtained packaging substrate, wherein the packaging substrate includes a core board structure, a build-up layer and a circuit connection layer; identifying the defect position in the circuit connection layer, and preliminarily determining the defect position of the defective packaging substrate as a circuit short circuit caused by foreign matter.
3. The detection method according to claim 2, characterized in that: The circuit connection layer includes a seed layer and a metal connection layer, the metal connection layer is a copper-containing plating layer formed by an electroplating process, and the microscopic morphology of the defect position includes one or a combination of copper wires, copper particles and copper slag.
4. The detection method according to claim 1, characterized in that: Step S3 includes: performing X-ray inspection on the defective packaging substrate; based on the X-ray three-dimensional perspective image of the packaging substrate, observing the distribution and geometric morphology of the impurities, locating and marking the foreign matter in the packaging substrate, thereby determining the spot positioning of the subsequent focused ion beam.
5. The detection method according to claim 4, characterized in that: Also includes: S2: Conducting point-by-point electrical testing on the contact network of the packaging substrate to identify whether the packaging substrate has defects, which includes: In response to an electrical anomaly being detected at a test point of the contact network, determining that a line short circuit exists on the contact network, and inferring a defect location caused by a foreign object; S3: Based on the X-ray three-dimensional perspective image of the packaging substrate and the determination that the line short circuit exists in the contact network, the foreign matter in the interconnection surface between the silicon-based intermediate layer and the packaging substrate is located and marked.
6. The detection method according to claim 1, characterized in that: In step S4, sampling the package substrate with defects according to the marked defect positions to obtain defective samples, wherein the shapes of the defective samples include rectangles or squares; Subsequently, each defective sample was surface cleaned.
7. The detection method according to claim 1 or 6, characterized in that: Step S5 includes: the defective sample is fixed on the sample stage and rotated with the sample stage at a predetermined angle so that the focused ion beam is injected into the defective position at an angle to the surface of the defective sample, and the defective position is cut along the edge of the defective position in an inclined direction toward the inside.
8. The detection method according to claim 1, characterized in that: In step S5, based on the cutting surface formed by the focused ion beam, an infrared spectroscopic microscope is used to perform component analysis on the exposed foreign matter, wherein the defective sample after cutting is placed so that the cutting surface where the foreign matter is exposed is parallel to the table of the infrared spectroscopic microscope.
9. The detection method according to claim 8, characterized in that: According to the peak position, peak shape and peak intensity of the infrared spectrum, it is determined that the components of the foreign matter are components of the photosensitive dry film, and it is determined that the foreign matter comes from the production process of the patterned metal connection layer.
10. The detection method according to claim 8, characterized in that: According to the peak position, peak shape and peak intensity of the infrared spectrum, it is determined that the components of the foreign matter are components of the protective layer, and it is determined that the foreign matter comes from the film tearing step of the protective layer.