Substation secondary equipment soft error fault simulation injection method and system

Abstract

The invention provides a transformer substation secondary equipment soft error fault simulation injection method and system, and belongs to the field of power system automation, and the method comprises the steps: carrying out chip particle effect modeling and simulation testing based on the Monte Carlo principle, carrying out the simulation analysis of the influence of particle radiation on a chip storage part, and obtaining a simulation result; soft error fault injection is carried out by changing data values of different memory units in combination with characteristics and rules of particle radiation effect analogue simulation, so that abnormal distribution, fault types and related statistical information of bottom-layer memory units are obtained, and behavior performance of secondary equipment during data displacement of different units of the memory is obtained; and carrying out influence analysis on failure waves and a fault range. The method can quickly, economically and effectively verify the function and performance of the secondary equipment under the condition of abnormal data displacement, scientifically assesses the actual harmfulness of the memory data fault of the secondary equipment of the transformer substation, and improves the safety and reliability of the secondary equipment of the transformer substation in actual application.

Description

Technical Field

[0001] The invention belongs to the field of power system automation, and in particular relates to a method and system for simulating soft error fault injection of secondary equipment in a transformer substation. Background Art

[0002] In the power system, the secondary equipment of the substation is responsible for relay protection, precise control and real-time monitoring of the primary equipment to ensure the stable operation of the power system, which is directly related to the safety and economic benefits of the entire power grid. With the continuous advancement of technology, the secondary equipment of substations is becoming increasingly integrated and intelligent, covering multiple key areas such as measuring instruments, relay protection devices, control equipment and automation systems. The high-reliability operation of these equipment is crucial to improving the reliability and stability of the power system.

[0003] With the development of semiconductor technology, the manufacturing process of integrated circuits has become more and more sophisticated and complex, and the integration of circuits has become higher and higher, which has increased the probability of soft errors caused by single-particle upsets in substation secondary equipment year by year. When high-energy particles (such as atmospheric neutrons) penetrate semiconductor devices, electron-hole pairs are generated on the path. These charges can be captured by sensitive circuit nodes, causing the logical state in storage units (such as DRAM, SRAM or registers) to flip, that is, 0 becomes 1 or 1 becomes 0; in addition, alpha particles in chip packaging materials can be directly ionized, deposit energy and generate electron-hole pairs, causing excess electron-hole pairs to gather, and then cause soft errors. Although chip soft errors do not directly cause physical damage to hardware, they can profoundly affect the normal function of the equipment, causing calculation errors, storage failures and even overall instability of the system. Especially in critical application scenarios of relay protection, the occurrence of soft errors causes hidden failures in the equipment, and in extreme cases can cause the device to refuse to operate or malfunction, seriously threatening the safety of the power system.

[0004] At present, the reproduction technology of chip soft errors mainly relies on accelerator irradiation testing, which has the problems of high R&D cost, long cycle, large uncertainties, and difficulty in fully covering the fault location and space. In addition, the result verification may be repeated due to changes in the irradiation test results. Therefore, there is an urgent need for a fast, convenient and economical software fault simulation and injection method to meet product development and engineering applications. The implementation of software fault injection needs to overcome the following difficulties: first, to understand the law of single particle upset effect caused by atmospheric neutrons and alpha particles in chip packaging, second, to conduct scientific and rigorous simulation based on the law information, third, to design a reasonable system architecture to realize the entire software fault injection system, and fourth, to support statistical analysis of fault types and accurately locate the fault location. Summary of the invention

[0005] In order to quickly simulate the impact of soft errors on chips and secondary equipment, the present invention provides a method and system for simulating soft error fault injection for substation secondary equipment, aiming to simulate the impact of single-particle upset effects on chips and realize fault injection by changing the data of different memory cells, deeply analyze its specific impact on the functions and performance of substation secondary equipment, and then provide verification means and tools for equipment design optimization, reliability improvement and formulation of fault prevention strategies.

[0006] To achieve the above object, the present invention adopts the following technical solution: In a first aspect, the present invention provides a method for simulating soft error fault injection of a secondary device in a substation, comprising: Modeling and simulation tests are carried out based on the Monte Carlo principle to simulate the impact of single-particle upset effects on substation secondary equipment; Based on the impact of single-particle upset effect on substation secondary equipment, combined with the characteristics and laws of particle radiation effect simulation, fault injection is performed on substation secondary equipment by changing the data of different memory cells; After fault injection, different types of fault information are obtained by combining the abnormal behavior of the secondary equipment; Combine different fault information types and perform statistical analysis on the fault injection results.

[0007] As a further improvement of the present invention, the modeling and simulation test based on the Monte Carlo principle to simulate the impact of the single-particle upset effect on the secondary equipment of the substation includes: A simulation model is built based on the detailed structure of the chip. By presetting the sensitive volume and critical charge, the single-particle effects induced by atmospheric neutrons and alpha particles in the chip package from different incident paths and directions are simulated. Simulations of different scales are carried out to provide single-particle effect memory distribution information for software fault injection of substation secondary equipment chips by counting the occurrence of single-bit flips, double-bit flips and multi-bit flips in different situations.

[0008] As a further improvement of the present invention, the characteristics and rules of the particle radiation effect simulation are combined to inject faults into the secondary equipment of the substation by changing the data of different memory units, including: Combining the characteristics and laws of particle radiation effect simulation, the simulation data is converted into fault injection data; The implementation mode of data in different memory units is changed to inject faults into the secondary equipment of the substation.

[0009] As a further improvement of the present invention, the method of combining the characteristics and rules of the particle radiation effect simulation to convert the simulation data into fault injection data includes: Count the running results of the Monte Carlo simulation model corresponding to the chip, count all the flip times N and all the flip types Sn, and obtain the occurrence frequency and proportion of different single-particle flip types; Before the fault injection begins, a targeted list of fault injection types is generated based on the total number of target faults FN and the proportion of various flip situations; For the target position with a length of L bytes, firstly, FN fault injection positions are randomly selected, and then, among the FN fault injection positions, the target injection positions corresponding to the number of times each single-event upset type fault is injected are further randomly selected; Generate fault injection parameters at the target location for fault injection.

[0010] As a further improvement of the present invention, the implementation method of changing the data of different memory units and injecting faults into the secondary equipment of the substation includes: ① For business programs supported by the operating system, fault injection is implemented through process calls. After receiving the fault injection command, the fork system call is first used to create a new process and obtain its process PID number. PTRACE will request to track the new process. In the new process, when it runs to the fault injection time point, the SIGSTOP signal is used in the parent process to suspend its operation, and the PTRACE related instructions are used to operate the child process related memory area, and then the child process continues to run to simulate the single particle flip; ② For real-time business programs running on a separate CPU core and without operating system support, start another task in the business program. In this new task, wait for external input and modify certain fixed address information of the program at any time; and use mutexes to allow the same address to be modified by only one task at the same time; For business programs supported by an operating system, the upper computer management and control module can obtain the address information to be injected through the map file of the business program; for business programs running on a separate CPU core and without operating system support, the lower computer fault injection module first collects the address to be injected of the business program, and passes the address to be injected in the form of variables to the lower computer data transmission module, which is then uploaded to the upper computer management and control module. The upper computer records all variables and injects faults into the addresses corresponding to the variables in turn.

[0011] As a further improvement of the present invention, the abnormal behavior of the secondary equipment is combined to obtain different types of fault information, including: For business programs running on a separate CPU core and without operating system support, the fault injection results are obtained in the following way: the business program periodically generates log output. If the fault injection module of the lower computer does not recognize the change of the log after the fault injection, the statistical result is an operation interruption. The fault injection module of the lower computer transmits the interruption information or log information to the data transmission module of the lower computer through the shared memory, and the latter transmits it to the management and control module of the upper computer for recording and analysis. For business programs supported by the operating system, their running status is monitored in real time by the fault injection module of the lower computer, and the log files of the business programs are obtained. The upper computer management and control module analyzes the logs to determine whether an abnormality occurs in the business program without exiting; The following five fault types are obtained: Run failed: The program exit status code is abnormal; Operation interruption: the program is exited due to the termination signal code; Running timeout: The program running is stopped due to the stop signal code and it is difficult to resume running; Result error: the program runs normally but the output result is wrong; No obvious anomalies: Runs normally and shows no errors.

[0012] As a further improvement of the present invention, the fault injection results have two sources: The first category is the abnormal results of business programs monitored by the fault injection module of the lower computer; The second type is obtained from the business program operation log.

[0013] As a further improvement of the present invention, the statistical analysis of the fault injection results in combination with different fault information types includes: The bit address of the target faulty unit is located through the memory physical address and offset, and single-bit, multi-bit and multi-block unit fault injection is applied for positioning to obtain the complete fault distribution and corresponding address information to complete statistical analysis.

[0014] Furthermore, after the upper computer management control module analyzes the business program running log, the distribution of different fault information types in the data storage and the error ratio are obtained, and the physical address and offset of the faulty memory chip are obtained; Finally, the complete fault distribution and corresponding address information are obtained, and the impact of simulated injection of soft error faults on the current device is evaluated.

[0015] As a further improvement of the present invention, a complete fault distribution and corresponding address information are finally obtained, including: First, collect the addresses to be injected of the business program, and perform fault injection on the addresses to be injected one by one; In a single injection process, the injection is performed based on the offset of the address to be injected; after the injection is completed, the running status of the business program is monitored; According to the real-time analysis results, the flip information of each injection, the fault type caused by the injection, and the storage unit address and offset corresponding to the fault are obtained, and finally the complete fault distribution and the corresponding address information are obtained.

[0016] As a further improvement of the present invention, when performing fault injection, it specifically includes: By disassembling the business program execution file, the storage space areas corresponding to the different functional function code segments in the business code are obtained. Then, for the area corresponding to each code segment, a binary-based fault injection is performed to determine the impact of the previous and next segments. For the segment with a more serious impact, the binary-based iterative fault injection is continued; and the fault injection of the storage space with no impact is discarded.

[0017] In a second aspect, the present invention provides a substation secondary equipment soft error fault simulation injection system, comprising: The host computer management and control module is responsible for system management, human-machine operation and display interface display of fault simulation injection; The lower computer data transmission module is responsible for the upper and lower interaction of communication data; The lower computer fault injection module is used to accurately locate and inject faults into the specific business procedures of the test object.

[0018] Compared with the prior art, the present invention has at least the following beneficial technical effects: The present invention can scientifically and effectively reflect the influence of space particles and chip package alpha particles on chip storage units through simulation; the secondary device soft error fault simulation injection method is compatible with secondary devices of different program architectures, and is suitable for both real-time business programs and programs supported by operating systems; the secondary device soft error fault analysis and fault implementation can accurately locate functions; the reinforcement and development verification of key programs of secondary devices provide guidance, which is conducive to optimizing system architecture design; the software reinforcement means obtained by this system can effectively reduce the influence of soft errors on secondary devices, and improve the reliability of equipment and the security of data. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a flow chart of the method for simulating soft error fault injection of secondary equipment in a substation of the present invention; Figure 2 It is a topology diagram of the soft error fault simulation injection system of the substation secondary equipment of the present invention; Figure 3 This is a flow chart of the substation secondary equipment soft error fault simulation injection system of the present invention; Figure 4 It is a specific working principle diagram of the present invention. DETAILED DESCRIPTION

[0020] The following takes a secondary device of a power substation as an example and further describes the specific implementation mode of the present invention in detail in combination with the accompanying drawings. However, this example is only used to illustrate the present invention in detail and does not limit the scope of application of the present invention.

[0021] The present invention proposes a method for simulating soft error fault injection of secondary equipment in a substation, comprising: S1, conduct modeling and simulation tests based on the Monte Carlo principle to simulate the impact of single-event upset effects on substation secondary equipment; S2, based on the impact of single-particle upset effect on substation secondary equipment, combined with the characteristics and laws of particle radiation effect simulation, fault injection is performed on substation secondary equipment by changing the data of different memory cells; S3, after fault injection, different fault information types are obtained in combination with the abnormal behavior of the secondary equipment; S4, combine different fault information types and perform statistical analysis on the fault injection results.

[0022] The present invention proposes a method for simulating and injecting soft error faults of secondary equipment in a substation. The method carries out chip particle effect modeling and simulation testing based on the Monte Carlo principle, simulates and analyzes the influence of particle radiation on chip storage components, and combines the characteristics and laws of particle radiation effect simulation to inject soft error faults by changing the data values ​​of different memory cells, obtain the abnormal distribution, fault type and related statistical information of the underlying storage cells, obtain the behavior of the secondary equipment when the data of different memory cells are changed, and analyze the influence of failure on the fault range.

[0023] The present invention can quickly, economically and effectively verify the function and performance of secondary equipment under abnormal data displacement conditions, scientifically evaluate the actual harmfulness of data failure in the memory of secondary equipment in substations, provide verification means and tools for equipment design optimization, reliability improvement and formulation of fault prevention strategies, and improve the safety and reliability of secondary equipment in substations in practical applications.

[0024] The soft error fault simulation injection method for substation secondary equipment proposed in the present invention aims to evaluate and analyze the impact of these faults on the operation of substation secondary equipment by simulating and injecting soft error faults. The principle is: The Monte Carlo principle is a simulation method based on probability statistics, which approximates the solution of complex problems by generating and calculating a large number of random samples. In the present invention, the Monte Carlo principle is used for modeling and simulation testing to simulate the impact of single event upset (SEU) on secondary equipment in substations. Single event upset refers to the possibility that when high-energy particles (such as protons or neutrons in cosmic rays) hit semiconductor devices, the data state in their storage cells may be changed.

[0025] Combining the characteristics and laws of particle radiation effects, the present invention injects faults into the secondary equipment of the substation by changing the data of different memory cells. This method can simulate soft error faults that may be encountered in actual operation, so as to evaluate the sensitivity and robustness of the equipment to these faults. After the fault injection, the present invention combines the abnormal behavior of the secondary equipment to obtain different types of fault information. These abnormal behaviors may include data errors, functional failures, system crashes, etc. By analyzing these behaviors, we can further understand the impact of the fault on the equipment.

[0026] Combined with different types of fault information, the fault injection results are statistically analyzed to quantitatively evaluate the equipment's tolerance to soft error faults. The statistical analysis results can provide important basis for equipment reliability design, fault prediction and maintenance strategy.

[0027] As an example, the present invention can quickly evaluate the response and tolerance of equipment to such faults in a laboratory environment by simulating and injecting soft error faults, without waiting for the fault to occur in the actual operating environment. Compared with fault testing in the actual operating environment, the simulation injection method can significantly reduce the test cost, while reducing equipment damage and downtime caused by faults. By simulating and injecting soft error faults, defects that may exist in the design and manufacturing process of the equipment can be discovered in a timely manner, so as to make improvements and optimizations and improve the reliability and stability of the equipment. The statistical analysis results can provide an important basis for equipment fault prediction and maintenance strategies, which helps to reduce equipment failure rates and maintenance costs.

[0028] The present invention provides a substation secondary equipment soft error fault simulation injection system, the whole system is divided into an upper computer management and control module, a lower computer data transmission module and a lower computer fault injection module, such as Figure 2 The upper computer management and control module is responsible for the system management, human-machine operation and display interface display of fault simulation injection, simulation and parameter configuration of single-particle upset and other soft errors, statistical analysis, etc. The lower computer data transmission module is responsible for the upper and lower interaction of system communication data, and the lower computer fault injection module accurately locates and injects faults into the specific business procedures of the test object.

[0029] The host computer management and control module can configure parameters related to particle radiation effect simulation through a visual operation interface, such as array type (i.e., sensitive volume of storage chip), number of single particle flip bits, etc.; it can also configure parameters related to software fault injection, such as total number of injections, maximum and minimum time of fault injection, injection waiting time, address type (continuous and discrete), etc.

[0030] The upper computer management and control module uses the statistical proportion method to convert the simulation data into fault injection data. Specifically, the substation secondary equipment soft error fault simulation injection method consists of the following four steps (such as Figure 1 shown): Step 1: Carry out modeling and simulation tests based on the Monte Carlo principle to simulate the impact of single-event upset effects on substation secondary equipment; Step 2: Combined with the characteristics and rules of the particle radiation effect simulation, fault injection is performed on the secondary equipment of the substation by changing the data of different memory cells; Step 3: Combine the abnormal behavior of the secondary equipment to obtain different fault types such as operation timeout and operation interruption; Step 4: Perform statistical analysis on the fault injection results based on different fault information types.

[0031] Furthermore, the above step 1 is specifically as follows: using Geat4 software, a simulation model is constructed based on the detailed structure of the chip, and by presetting the sensitive volume and critical charge, the single-particle effects induced by atmospheric neutrons and alpha particles in the chip package from different incident paths and directions are simulated respectively. The neutron energy spectrum consistent with the actual energy spectrum of CSNS (China Spallation Neutron Source) and the 4.01MeV energy alpha particles mainly simulated from the decay of 232Th are used to simulate the 1K and 1Mbit models. By counting the occurrence of single-bit flips, double-bit flips and multi-bit flips under different circumstances, key single-particle effect memory distribution information is provided for software fault injection of the chip of the secondary equipment of the substation.

[0032] Furthermore, the above step 2 specifically includes the following steps: 2.1 Conversion of simulation data into fault injection data Step 1: Count the running results of the Monte Carlo simulation model corresponding to the chip, count all the flip times N and all the flip types Sn, and obtain the occurrence frequency and proportion of different single-particle flip types. For example, the first single-particle flip (S1) occurs n1 times in the total number of N flips, accounting for n1 / N*100%, the second single-particle flip (S2) occurs n2 times in the total number of N flips, accounting for n2 / N*100%, and so on, until the nth single-particle flip (Sn) occurs nn times in the total number of N flips, accounting for nn / N*100%. Get the simulation result list shown in Table 1.

[0033] Table 1 Simulation results list

[0034] Step 2: Before the fault injection begins, a targeted list of fault injection types is generated based on the total number of target faults FN and the proportion of various flip situations shown in Table 1. As shown in Table 2.

[0035] Table 2 List of fault injection types

[0036] Step 3: For the target position with a length of L bytes, first randomly select FN fault injection positions. Then, among the FN fault injection positions, according to Table 2, further randomly select the target injection positions corresponding to the number of fault injections of each single particle upset type. For example, for the first single particle upset (S1), among the FN fault injection positions, randomly select FN*n1 / N*100% positions as the injection positions of the first fault type. For the second single particle upset (S1), among the FN fault injection positions, randomly select FN*n2 / N*100% positions as the injection positions of the first fault type. And so on, generate the fault injection positions corresponding to n types of single particle upsets.

[0037] Step 4: Through the above steps, generate the fault injection parameters of the target location for fault injection.

[0038] 2.2 How to change the data of different memory cells ① For business programs supported by an operating system, fault injection is mainly implemented through process calls. After receiving the fault injection command, the fork system call is first used to create a new process and obtain its process PID number. PTRACE will request to track the new process. In the new process, when it runs to the fault injection time point, the SIGSTOP signal is used in the parent process to suspend its operation, and the PTRACE related instructions are used to operate the child process related memory area (i.e., fault injection), and then the child process continues to run to realize the simulation of single particle flip.

[0039] ② For real-time business programs running on a separate CPU core and without operating system support, start another task (or thread) in the business program. In this new task, wait for external input and modify some fixed address information of the program at any time. The design idea of ​​mutex is adopted so that the same address can only be modified by one task at the same time.

[0040] The working principle of the system of the present invention is as follows: the system is applied to different program architectures where the secondary equipment business program and management program are integrated into the same kernel or multi-kernel deployment. For different program architectures, the upper computer management control module and the lower computer data transmission module can remain unchanged, and only the lower computer fault injection module needs to be modified to adapt to different business programs.

[0041] For business programs supported by the operating system, the upper computer management and control module can obtain the address information to be injected through the map file of the business program. For business programs running on a separate CPU core and without operating system support, the lower computer fault injection module first collects the addresses to be injected of the business program, and passes these addresses to the lower computer data transmission module in the form of variables, which are then uploaded to the upper computer management and control module. The upper computer records all variables and injects faults into the addresses corresponding to the variables in turn.

[0042] like Figure 4 As shown, during the entire software injection process, the lower computer data transmission module receives the instructions of the upper computer management and control module in a network communication mode, puts the injection parameters into the shared memory, and the lower computer fault injection module reads the shared memory and takes over the business code and injects the fault. The two modules notify each other of the status through semaphores. After the lower computer fault injection module obtains the running log of the business program, the lower computer performs a soft restart, and the upper computer waits for the next injection, and the cycle continues until all injections are completed. The entire process does not require human intervention, and the injection results can be seen in real time in the upper computer management and control module.

[0043] Furthermore, the above step 3 is specifically as follows: For business programs running on a separate CPU core and without operating system support, the main method for obtaining software fault injection results is: the business program periodically generates log output. If the fault injection module of the lower computer does not recognize the change in the log after fault injection (that is, the log length does not increase), the statistical result is an operation interruption. The fault injection module of the lower computer transmits the interruption information or log information to the lower computer data transmission module through shared memory, and the latter then transmits it to the upper computer management and control module for recording and analysis.

[0044] For business programs supported by an operating system, their running status can be monitored in real time by the fault injection module of the lower computer, and the log files of the business programs can be obtained. The upper computer management and control module analyzes the logs to determine whether an abnormality occurs in the business program without exiting.

[0045] There are two sources of fault injection results: the first is the abnormal results of business programs (such as program timeout or exit, etc.) monitored by the lower-computer fault injection module; the second is the business program operation log, which is also obtained and uploaded by the lower-computer fault injection module.

[0046] After analysis, the upper computer management control module can obtain the following five types of faults: 1) Operation failure (AE): The program exit status code is abnormal; 2) Run interrupt (SH): The program is exited due to the termination signal code; 3) Operation timeout (TO): The program operation is stopped due to the stop signal code and it is difficult to resume operation; 4) Result Error (ER): The program runs normally but the output result is wrong; 5) No obvious abnormalities: The system runs normally and shows no errors.

[0047] "Failed to run" means that the task (process or thread) cannot run normally. "Interrupted" and "Timeout" can be monitored by the fault injection module of the lower computer. "Error in result" and "No obvious abnormality" are obtained by parsing the business program running log by the upper computer management and control module. The upper computer management and control module analyzes the log file by parsing the XML file, which is used to match and proofread the fixed values ​​or value ranges of different parameters. If the log parsing result is different from the configuration file, the statistical result is considered to be "Error in result".

[0048] Furthermore, the above step 4 is specifically as follows: After the upper computer management control module analyzes the business program operation log, the distribution of the above five types of faults in the data storage and the error ratio can be obtained. In the statistical results, different colors represent different single-particle flip bit numbers, and the physical address and offset of the faulty memory chip can also be intuitively obtained. With this information, the impact of simulated injection of soft error faults on the current device can be evaluated, which helps to strengthen the software security vulnerabilities of the device and improve the software system architecture.

[0049] The system of the present invention has strong adaptability and can be applied to different program architectures in which secondary equipment business programs and management programs are integrated in the same kernel or multi-kernel deployment. For different program architectures, the upper computer management control module and the lower computer data transmission module of the system can remain unchanged, and only the lower computer fault injection module needs to be modified to adapt to different business programs. The system has the function of statistics and analysis of fault types. The bit address of the target fault unit is located by the physical address and offset of the memory, and the fault injection of single bit, multi-bit and multi-block units is applied to achieve precise positioning.

[0050] The system of the present invention analyzes the influence of different addresses and offsets of storage units on secondary devices, thereby improving the overall test efficiency. By disassembling the business program execution file, the storage space area corresponding to the different functional function code segments in the business code is obtained, and then the area corresponding to each code segment is subjected to binary fault injection to determine the influence of the previous and next segments. For the segment with more serious influence, binary fault injection is continued. Fault injection of storage space with no influence is abandoned, thereby reducing the total number of injections and shortening the overall test time.

[0051] The second purpose of the present invention is to provide a substation secondary equipment soft error fault simulation injection system, comprising: The host computer management and control module is responsible for system management, human-machine operation and display interface display of fault simulation injection; The lower computer data transmission module is responsible for the upper and lower interaction of communication data; The lower computer fault injection module is used to accurately locate and inject faults into the specific business procedures of the test object.

[0052] The present invention can adapt to processor chips of different types and process processes. According to parameters such as different processor chip processes, dielectric materials and thickness of each internal layer, sensitive volume, and energy deposition threshold, a Monte Carlo simulation model can be constructed to obtain the particle radiation effect law and parameters of the chip, and then a corresponding fault simulation library can be generated to perform software fault injection.

[0053] Figure 3 It is a system flow chart in which the fault injection module of the lower computer and the business program belong to different CPU cores. The specific implementation process of a method for simulating soft error fault injection of secondary equipment in a substation is as follows: S10, the whole system consists of an upper computer management and control module, a lower computer data transmission module and a lower computer fault injection module. The upper computer management and control module includes a secondary device storage chip simulation library and visualization software, which is responsible for the system management, human-machine operation and display interface display of fault simulation injection, simulation and parameter configuration of soft errors such as single particle flip, statistical analysis, etc. The lower computer data transmission module is responsible for the upper and lower interaction of system communication data, and the lower computer fault injection module performs precise fault injection on specific business programs. The data transmission module and the fault injection module transfer data through shared memory. The lower computer fault injection module first collects the addresses to be injected of the business program, and passes these addresses to the lower computer data transmission module in the form of variables, which are then uploaded to the upper computer management and control module. The upper computer records all variables and injects faults into the addresses corresponding to the variables in turn.

[0054] S20, the system operation process is as follows: (1) Set the IP address and port number for communication with the secondary device in the upper computer management control module, then start the secondary device and wait for the connection between the upper computer management control module and the secondary device; (2) After the connection is successful, input the parameters related to simulation and software injection in the upper computer management and control module. The simulation parameters include flip type, fault injection offset position, fault injection method, maximum and minimum time of fault injection, waiting time, test mode selection, flip bit number, flip ratio, etc.; the software injection parameters include the selection of log storage path, the selection of log analysis file, etc. The log analysis file is the parsing rule for the business program running log agreed upon by the upper computer management and control module and the lower computer business program. The upper computer can analyze the current status of the business program through this rule; (3) After completing the above input operations, the software fault injection will begin. During a single injection process, the upper computer management and control module obtains the address offset to be injected through network communication, and then sends down the specific parameters for this injection. The lower computer data transmission module passes the parameters to the lower computer fault injection module, which implements this injection. After the injection is completed, the lower computer fault injection module monitors the running status of the business program, and passes the running status and running log to the upper computer management and control module via the lower computer data transmission module. The upper computer has a visual interface that can display the injection results in real time; (4) After completing a single injection, the fault injection module of the lower computer performs a soft restart on the lower computer, and the upper computer management and control module waits for the next injection, and this cycle continues until all injections are completed.

[0055] S30, finally, according to the real-time analysis results of the upper computer management control module, the flip information of each injection, the fault type generated by the injection, and the storage unit address and offset corresponding to the fault are obtained, and finally the complete fault distribution and the corresponding address information are obtained.

[0056] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0057] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0058] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0059] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0060] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for simulating soft error fault injection of secondary equipment in a substation, characterized in that: include: Modeling and simulation tests are carried out based on the Monte Carlo principle to simulate the impact of single-particle upset effects on substation secondary equipment; Based on the impact of single-particle upset effect on substation secondary equipment, combined with the characteristics and laws of particle radiation effect simulation, fault injection is performed on substation secondary equipment by changing the data of different memory cells; After fault injection, different types of fault information are obtained by combining the abnormal behavior of the secondary equipment; Combine different fault information types and perform statistical analysis on the fault injection results.

2. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 1, characterized in that: The modeling and simulation test based on the Monte Carlo principle is carried out to simulate the impact of the single-event upset effect on the secondary equipment of the substation, including: A simulation model is built based on the detailed structure of the chip. By presetting the sensitive volume and critical charge, the single-particle effects induced by atmospheric neutrons and alpha particles in the chip package from different incident paths and directions are simulated. Simulations of different scales are carried out to provide single-particle effect memory distribution information for software fault injection of substation secondary equipment chips by counting the occurrence of single-bit flips, double-bit flips and multi-bit flips in different situations.

3. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 1, characterized in that: The method combines the characteristics and rules of the particle radiation effect simulation to inject faults into the secondary equipment of the substation by changing the data of different memory units; including: Combining the characteristics and laws of particle radiation effect simulation, the simulation data is converted into fault injection data; The implementation mode of data in different memory units is changed to inject faults into the secondary equipment of the substation.

4. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 3, characterized in that: The method combines the characteristics and rules of the particle radiation effect simulation to convert the simulation data into fault injection data; including: Count the running results of the Monte Carlo simulation model corresponding to the chip, count all the flip times N and all the flip types Sn, and obtain the occurrence frequency and proportion of different single-particle flip types; Before the fault injection begins, a targeted list of fault injection types is generated based on the total number of target faults FN and the proportion of various flip situations; For the target position with a length of L bytes, firstly, FN fault injection positions are randomly selected, and then, among the FN fault injection positions, the target injection positions corresponding to the number of times each single-event upset type fault is injected are further randomly selected; Generate fault injection parameters at the target location for fault injection.

5. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 3, characterized in that: The implementation method of changing the data of different memory units and injecting faults into the secondary equipment of the substation includes: For business programs supported by the operating system, fault injection is implemented in the form of process calls. After receiving the fault injection command, the fork system call is first used to create a new process and obtain its process PID number. PTRACE will request to track the new process. In the new process, when it runs to the fault injection time point, the SIGSTOP signal is used in the parent process to suspend its operation, and the PTRACE related instructions are used to operate the child process related memory area, and then the child process continues to run to simulate the single particle upset. For real-time business programs running on a separate CPU core and without operating system support, another task is started in the business program. In this new task, wait for external input and modify certain fixed address information of the program at any time; and use mutexes to ensure that the same address is only modified by one task at the same time; For business programs supported by an operating system, the upper computer management and control module can obtain the address information to be injected through the map file of the business program; for business programs running on a separate CPU core and without operating system support, the lower computer fault injection module first collects the address to be injected of the business program, and passes the address to be injected in the form of variables to the lower computer data transmission module, which is then uploaded to the upper computer management and control module. The upper computer records all variables and injects faults into the addresses corresponding to the variables in turn.

6. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 1, characterized in that: The abnormal behavior of the secondary equipment is combined to obtain different types of fault information, including: For business programs running on a separate CPU core and without operating system support, the fault injection results are obtained in the following way: the business program periodically generates log output. If the fault injection module of the lower computer does not recognize the change of the log after the fault injection, the statistical result is an operation interruption. The fault injection module of the lower computer transmits the interruption information or log information to the data transmission module of the lower computer through the shared memory, and the latter transmits it to the management and control module of the upper computer for recording and analysis. For business programs supported by the operating system, their running status is monitored in real time by the fault injection module of the lower computer, and the log files of the business programs are obtained. The upper computer management and control module analyzes the logs to determine whether an abnormality occurs in the business program without exiting; The following five fault types are obtained: Run failed: The program exit status code is abnormal; Operation interruption: the program is exited due to the termination signal code; Running timeout: The program running is stopped due to the stop signal code and it is difficult to resume running; Result error: the program runs normally but the output result is wrong; No obvious abnormalities: running normally, no errors are shown; The fault injection results come from two sources: The first category is the abnormal results of business programs monitored by the fault injection module of the lower computer; The second type is obtained from the business program operation log.

7. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 1, characterized in that: The statistical analysis of the fault injection results in combination with different fault information types includes: The bit address of the target faulty unit is located through the memory physical address and offset, and single-bit, multi-bit and multi-block unit fault injection is applied for positioning to obtain the complete fault distribution and corresponding address information to complete statistical analysis.

8. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 7, characterized in that: Get the complete fault distribution and corresponding address information, including: First, collect the addresses to be injected of the business program, and perform fault injection on the addresses to be injected one by one; In a single injection process, the injection is performed based on the offset of the address to be injected; after the injection is completed, the running status of the business program is monitored; According to the real-time analysis results, the flip information of each injection, the fault type caused by the injection, and the storage unit address and offset corresponding to the fault are obtained, and finally the complete fault distribution and the corresponding address information are obtained.

9. A method for simulating soft error fault injection of secondary equipment in a substation according to claim 1, characterized in that: When performing fault injection, it specifically includes: By disassembling the business program execution file, the storage space areas corresponding to the different functional function code segments in the business code are obtained. Then, for the area corresponding to each code segment, a binary-based fault injection is performed to determine the impact of the previous and next segments. For the segment with a more serious impact, the binary-based iterative fault injection is continued; and the fault injection of the storage space with no impact is discarded.

10. A substation secondary equipment soft error fault simulation injection system, characterized in that: include: The host computer management and control module is responsible for system management, human-machine operation and display interface display of fault simulation injection; The lower computer data transmission module is responsible for the upper and lower interaction of communication data; The lower computer fault injection module is used to accurately locate and inject faults into the specific business procedures of the test object.

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