Display panel based on micro LED

Abstract

Light emitting structures and methods of making the same are described. In one embodiment, an LED sample block is transferred to a carrier substrate and then the LED sample block is patterned into an LED mesa structure. Patterning may be performed on heterogeneous groups of LED sample blocks by a common mask group. The LED mesa structures are then transferred in batches to a display substrate. In one embodiment, the light emitting structure includes an arrangement of LEDs having different thicknesses and corresponding bottom contacts having different thicknesses bonded to the display substrate.

Description

[0001] Divisional Application Instructions

[0002] This application is a divisional application of the Chinese patent application with the application date of January 22, 2019, application number 201980008910.5, and name “Micro-LED-based display panel”. Technical Field

[0003] Embodiments described herein relate to light emitting structures. More specifically, embodiments relate to display panels based on micro light emitting diodes (LEDs). Background Art

[0004] Prior art displays for portable electronic devices, computers, and televisions typically utilize glass substrates with thin film transistors (TFTs) to control the transmission of backlight through pixels based on liquid crystals. More recently, emissive displays, such as those based on organic light emitting diodes (OLEDs), have been introduced. More recently, it has been proposed to integrate micro-LEDs based on emissive inorganic semiconductors into displays. More specifically, it has been proposed to transfer individual micro-LEDs from a carrier substrate to a display substrate using an array of electrostatic transfer heads. Summary of the invention

[0005] The embodiments describe light emitting structures and methods of forming light emitting structures. In one embodiment, the method of forming a light emitting structure includes: forming one or more multiple LED coupons on one or more corresponding temporary substrates, transferring one or more multiple LED coupons to a carrier substrate, patterning one or more multiple LED coupons into LED mesa structures, and transferring the LED mesa structures to a display substrate. In some embodiments, a well structure may also be formed around the LED mesa structure before transferring to the display substrate. In addition, hybrid bonding may be used for bonding to a display substrate. The processing sequence according to the embodiments may be used to form monochrome displays and full-color displays.

[0006] In one embodiment, the light emitting structure includes an LED bonded to an electrode pad of a substrate, such as a complementary metal oxide semiconductor (CMOS) substrate. The LED may include an inorganic semiconductor-based pn diode and a metal bottom contact bonded to the electrode pad. The insulating fill layer may additionally be positioned laterally around the LED and the metal bottom contact. In one embodiment, the planar bottom surface of the metal bottom contact is bonded to the planar top surface of the electrode pad by metal-metal bonding, and the planar bottom surface of the insulating fill layer is bonded to the planar top surface of the substrate by oxide-oxide bonding. In addition, the LED may be mounted in a well structure embedded in the insulating fill layer.

[0007] In one embodiment, the light emitting structure includes a first inorganic semiconductor-based pn diode designed to emit a first color emission, and a first metal bottom contact bonded to a first electrode pad. The light emitting structure may additionally include a second LED (and more LEDs), the second LED including a second inorganic semiconductor-based pn diode designed to emit a second color emission different from the first color emission, and a second metal bottom contact bonded to a second electrode pad. In some embodiments, the first metal bottom contact is thicker than the second metal bottom contact, and the second inorganic semiconductor-based pn diode is thicker than the first inorganic semiconductor-based pn diode. In some embodiments, the bottom surfaces of the first metal bottom contact and the second metal bottom contact are coplanar. In addition, the first metal bottom contact may be thicker than the second metal bottom contact by a first thickness, and the second inorganic semiconductor-based pn diode may be thicker than the first inorganic semiconductor-based pn diode by approximately the first thickness. In addition, the LED may be mounted in a corresponding well structure embedded in an insulating fill layer.

[0008] According to some embodiments, the processing sequence can facilitate scaling of LED integration to small micro-sizes, as well as integration of optical structures around and over LEDs with mitigated alignment challenges. Additionally, integration of reflective well structures and micro-optical elements can further enhance coaxial light extraction efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1A Included is a process flow and corresponding cross-sectional side view illustration of a method of forming a light emitting structure according to an embodiment.

[0010] Figure 1B A process flow is included for a method of forming a structure that emits monochromatic light according to an embodiment.

[0011] FIG. 2A to FIG. 2B A process flow of a method for forming a plurality of LED coupons emitting different colors on a carrier substrate according to an embodiment.

[0012] Figure 2C to Figure 2D A process flow of a method for forming a single-color emitting LED coupon on a carrier substrate according to an embodiment.

[0013] Figure 3A Included is a process flow and corresponding cross-sectional side view illustration of a method of patterning a pair of LED mesas from an LED coupon on a carrier substrate according to an embodiment.

[0014] Figure 3B Included is a process flow and corresponding cross-sectional side view illustration of a method of integrating a pair of LED mesa structures on a display substrate according to an embodiment.

[0015] Figure 4 is a schematic cross-sectional side view illustration of two pluralities of differently colored emitting LED coupons on a carrier substrate according to an embodiment.

[0016] Figure 5 is a schematic cross-sectional side view illustration of two multiple LED mesa structures emitting different colors with corresponding well structures and bottom contacts formed on a carrier substrate in accordance with an embodiment.

[0017] Figure 6 is a schematic cross-sectional side view illustration of a plurality of different color emitting LEDs bonded to a display substrate according to an embodiment.

[0018] Figure 7 is a schematic cross-sectional side view illustration of a pair of LEDs mounted within a reflective well structure on a display substrate according to an embodiment.

[0019] Figure 8 is a schematic cross-sectional side view illustration of a pair of micro-optical elements formed over a pair of LEDs on a display substrate according to an embodiment.

[0020] Fig.9A is a schematic cross-sectional side view illustration of a pair of micro-optical elements (including filters) formed over a pair of LEDs on a display substrate according to an embodiment.

[0021] Fig. 9B is a schematic cross-sectional side view illustration of a pair of micro-optical elements (encapsulated with optical filters) formed over a pair of LEDs on a display substrate in accordance with an embodiment.

[0022] Fig. 9C is a schematic cross-sectional side view illustration of an optical filter including a recycling portion and a collimating portion according to an embodiment.

[0023] Fig. 10A is a schematic cross-sectional side view illustration of a pixel structure according to an embodiment.

[0024] Fig. 10B According to the implementation plan Fig. 10A Schematic top view illustration of a pixel structure.

[0025] Fig.11A is a schematic cross-sectional side view illustration of a pixel structure including redundant LEDs according to an embodiment.

[0026] Fig. 11B According to the implementation plan Fig.11A Schematic top view illustration of a pixel structure including redundant LEDs.

[0027] Fig. 12Ais a schematic cross-sectional side view illustration of a transparent hemispherical high refractive index lens over an LED according to an embodiment.

[0028] Fig. 12B is a schematic cross-sectional side view illustration of a transparent tapered high refractive index lens over an LED according to an embodiment.

[0029] Fig. 12C is a graph of simulation data of brightness versus viewing angle according to an embodiment.

[0030] Fig.13 is a graph of simulation data of on-axis light intensity as a function of well angle, according to an embodiment.

[0031] Fig.14 is a graph of simulation data of light extraction efficiency as a function of emission angle of a structure according to an embodiment.

[0032] Fig.15 is a graph of on-axis brightness versus micro-optical element height with a bottom well structure according to an embodiment.

[0033] Fig.16 is a graph of on-axis brightness versus micro-optical element height without an underlying bottom well structure, according to an embodiment.

[0034] Fig.17A is a graph of simulated data of on-axis light intensity as a function of bottom well angle and top well angle of a color conversion micro-optical element, according to an embodiment.

[0035] Fig. 17B is a graph of simulated data of on-axis light intensity as a function of bottom well angle and top well angle for a color conversion micro-optical element having a long pass DBR, according to an embodiment.

[0036] Fig.18 is a schematic top view illustration of a micro-LED in a well structure according to an embodiment.

[0037] Figures 19 to 20 is a schematic cross-sectional side view illustration of a micro-LED in a well structure according to an embodiment. DETAILED DESCRIPTION

[0038] The embodiments describe light emitting structures and methods of forming light emitting structures. Specifically, the light emitting structure can be a micro-LED-based display panel formed using a processing sequence in which LED coupons (or microwatts) are manufactured individually and then bonded to a common carrier substrate. All LED coupons emitting different colors can then be processed on a carrier substrate using the same mask set to form a pixel array of LED tables on a carrier substrate. The processing sequence can also be used to form a monochrome display with LED coupons emitting the same color. Additional processing can also be performed, such as manufacturing optical elements (e.g., reflective trap structures) around the LED tables. The array of LED tables (emitting a single color or different colors) is then transferred to the display substrate together with optional optical elements.

[0039] In one aspect, the embodiments describe light emitting structures and manufacturing methods that can avoid micro tolerances (e.g., such as less than one micron) that may be necessary for transferring micro-LEDs directly from native epitaxial substrates to display substrates. For example, electrostatic transfer and bonding may be associated with elevated temperatures to reflow the bonding material used to bond the individually transferred micro-LEDs to the display substrate. The thermal expansion mismatch associated with these elevated temperatures may require precise alignment tolerances and compensation techniques. In addition, transferring the micro-LEDs directly from the native epitaxial substrate to the display substrate may include allocating additional surrounding areas for the manufacture of additional functional features and optical devices. According to the embodiments, a group of larger LED coupons is first arranged side by side on a carrier substrate, and then patterned into an array of micro-LED mesa structures, and then these arrays are transferred as a group to the display substrate using wafer bonding technology. In this way, the requirement for fine alignment tolerances can be avoided because it is larger LED coupons (e.g., about the size of an entire sub-pixel or multiple sub-pixels) that are first transferred and heterogeneously integrated, and then patterned to achieve small micro-LEDs, such as having a maximum lateral dimension of less than 10μm (such as 0.5μm, 5μm or less). In a specific embodiment, the maximum lateral dimension of the micro-LED is 1 μm.

[0040] In another aspect, the manufacturing sequence according to the embodiment allows heterogeneous integration from different substrates. For example, the LED coupons can be derived from different epitaxial films formed on different growth substrates. In addition, the growth substrate, the carrier substrate, and the display substrate can be different sizes. In some embodiments, the epitaxial film is derived from a 6-inch growth substrate, the LED coupons are reassembled on a 12-inch carrier substrate, and then wafer-to-wafer bonding is performed to a 12-inch display substrate, which can be a 12-inch silicon CMOS wafer including prefabricated circuits for display operations. In such a processing sequence, reassembling the LED coupons onto a 12-inch carrier helps to increase production volume, where a significant amount of processing operations are performed to create micro LED components. It should be understood that although exemplary embodiments are described with respect to 6-inch and 12-inch wafers, these are exemplary and the embodiments are also applicable to different sizes.

[0041] In another aspect, embodiments describe light emitting structures and methods of manufacture in which optics for light extraction are fabricated on a micro-LED mesa array prior to bonding to a display substrate. This allows the micro-LED pixels and optical elements to be fabricated using a common mask set for all colors. This can help maintain the spacing and tolerances of prior art photolithography across the carrier substrate for subsequent bonding to the display substrate. In addition, including optical elements at this stage helps with alignment, particularly for applications in which the optical elements direct (e.g., collimate) LED light to enhance on-axis intensity.

[0042] In various embodiments, description is made with reference to the accompanying drawings. However, certain embodiments may be implemented without one or more of these specific details or in combination with other known methods and configurations. In the following description, many specific details such as specific configurations, sizes and processes are shown to provide a thorough understanding of the embodiments. In other cases, well-known semiconductor processes and manufacturing techniques are not described in particular detail to avoid unnecessarily obscuring the embodiments. "One embodiment" mentioned throughout the specification refers to the specific features, structures, configurations or characteristics described in conjunction with the embodiments being included in at least one embodiment. Therefore, the phrase "in one embodiment" that appears in multiple places throughout the specification does not necessarily refer to the same embodiment. In addition, specific features, structures, configurations or characteristics can be combined in one or more embodiments in any appropriate manner.

[0043] As used herein, the terms "on," "over," "to," "between," "spanning," and "over" may refer to the relative position of one layer relative to other layers. A layer that is "on," "over," "spanning," or "on" relative to another layer, or bonded "to," or "in contact with," another layer may be directly in contact with the other layer or may have one or more intervening layers. A layer that is "between" multiple layers may be directly in contact with the multiple layers or may have one or more intervening layers.

[0044] Figure 1A A process flow and corresponding cross-sectional side view illustration of a method for forming a plurality of LED coupons emitting different colors on a carrier substrate according to an embodiment are included. At operation 1001, a first plurality of LED coupons 102 (e.g., A-coupons) are formed on a first temporary substrate 100 (e.g., temporary substrate-A). For example, the temporary substrate can be a 12-inch wafer. This can be achieved using various processing sequences. For example, this can be achieved by etching the first plurality of LED coupons into an epitaxial layer formed on a growth substrate (e.g., a 6-inch wafer). The first plurality of LED coupons can then be transferred to the first temporary substrate using wafer bonding, followed by peeling off the growth substrate. In one embodiment, wafer bonding can be achieved using an adhesive layer. Alternatively, the epitaxial layer can be transferred to the first temporary substrate and then patterned into the first plurality of LED coupons. At operation 1002, a second plurality of LED coupons 202 (e.g., B-coupons) are formed on a second temporary substrate 200 (e.g., temporary substrate-B), which can also be a 12-inch wafer. This can be achieved using a processing sequence similar to operation 1001.

[0045] At operation 1003, the first plurality of LED coupons 102 and the second plurality of LED coupons 202 are then transferred to a carrier substrate 300 (such as a 12-inch wafer), and at operation 1004, are then patterned to form a first plurality of LED mesas 150 and a second plurality of LED mesas 250, respectively. Then, at operation 1005, a first plurality of well structures 160 and a second plurality of well structures 260 may be optionally formed around the first plurality of mesas 150 and the second plurality of mesas 250, respectively. For example, the well structures may be reflective well structures. In one embodiment, the formation of the reflective well structures includes depositing a first insulating layer over the first plurality of LED mesas 150 and the second plurality of LED mesas 250, patterning the first insulating layer to form a first plurality of insulating wells around the first plurality of LED mesas 150 and a second plurality of insulating wells around the second plurality of LED mesas 250, and forming a first plurality of reflective layers around the first plurality of insulating wells and a second plurality of reflective layers around the second plurality of insulating wells.

[0046] According to an embodiment, bottom contacts may be formed on the first plurality of LED mesas 150 and the second plurality of LED mesas 250 while on the carrier substrate 300. At operation 1006, the first plurality of LED mesas 150 and the second plurality of mesas 250 are transferred to the display substrate 400. For example, transferring the first plurality of LED mesas 150 and the second plurality of mesas 250 to the display substrate 400 includes bonding the first plurality of bottom contacts and the second plurality of bottom contacts to the display substrate 400. In one embodiment, the display substrate 400 is a 12-inch silicon CMOS wafer.

[0047] It should be understood that although Figure 1A The processing sequence shown in relates to integrating a first plurality of LED mesas 150 and a second plurality of LED mesas 250 on a display substrate 400, but this is exemplary and the embodiments are not limited thereto. For example, the first plurality of LED mesas 150 and the LED coupon 102 may be formed of an inorganic semiconductor layer stack designed for a first color emission (e.g., an epitaxial pn diode layer), while the second plurality of LED mesas 250 and the LED coupon 202 may be formed of an inorganic semiconductor layer stack designed for a second color emission (e.g., an epitaxial pn diode layer). The embodiments are not limited to integrating two different pn diode layers designed for two different color emission, and may include integrating a single pn diode layer for a single color emission, or one or more pn diode layers designed for other color emission. Thus, the embodiments may be used to manufacture a full color display or a monochrome display.

[0048] Figure 1B A process flow is included for a method of forming a structure that emits monochromatic light according to an embodiment. Figure 1B The processing flow and Figure 1A The process flow of is similar, except that only the first plurality of LED coupons are formed and transferred, etc. Otherwise, operations 1001, 1003, 1004, 1005, 1006 are similar.

[0049] Reference now FIG. 2A to FIG. 2B , provides a process flow of an exemplary method for forming a plurality of LED sample blocks emitting different colors on a carrier substrate 300 according to an embodiment. In the following discussion, for the sake of brevity, Figure 1A The features described herein (such as the first plurality of LED coupons or the first temporary substrate, etc.) are referred to as "A-coupons" or "temporary substrate-A", etc. Similarly, for simplicity, reference to Figure 1ADescribed features such as a second plurality of LED coupons or a second temporary substrate, etc. are referred to as "B-coupons" or "temporary substrate-B", etc.

[0050] In aspects where the A-coupon and the B-coupon are formed prior to transfer to the temporary substrate, Figure 2A The specific processing sequence shown in Figure 1A The specific processing sequence provided in is similar. Figure 2B A process variation is shown in which a B-coupon is formed after transfer to a temporary substrate. Figure 2A , the processing sequence can begin at operation 1010, where an epitaxial pn diode layer is formed on a first growth substrate (e.g., a 6-inch wafer) with the p-side facing upward. Thus, epitaxial layers are formed on the growth substrate, including an n-doped layer, an active layer above the first n-doped layer, and a p-doped layer above the active layer. The epitaxial layer stack may include additional layers, but only the pn diode layer is referenced for simplicity. At operation 120, the epitaxial layers are etched into the A-specimen 102. At operation 1020, the A-specimen 102 is then bonded to a temporary substrate-A (e.g., a 12-inch wafer) 100 with the p-side facing downward and facing the temporary substrate-A 100, followed by removal of the growth substrate at operation 1040. For example, this may include etching, or laser lift-off, or a combination of both. In one embodiment, this may include laser lift-off of the growth substrate, followed by etching and polishing, thereby forming the A-specimen 102 on the temporary substrate-A 100. In one embodiment, an adhesive layer is used to secure the A-coupon 102 to the temporary substrate-A 100. A similar processing sequence (including operations 2010, 2020, 2030, 2040) may be performed to create a B-coupon 202 on a temporary substrate-B 200 (eg, a 12-inch wafer).

[0051] In no particular order, the A-coupon 102 and the B-coupon 202 may then be transferred to a carrier substrate 300 (e.g., a 12-inch wafer). For example, at operation 1050, the A-coupon 102 is bonded to the carrier substrate 300, followed by removal of the temporary substrate-A 100 at operation 1060. Bonding may be facilitated by the use of an adhesive layer. Similarly, at operations 1070, 1080, the B-coupon 202 may be bonded to the carrier substrate 300, followed by removal of the temporary substrate-B 200.

[0052] Reference now Figure 2B, showing a variation of the processing sequence where the B-specimen block 202 is not patterned until after transfer to the temporary substrate-B 200. As shown, the processing sequence for the B-specimen block 202 may similarly begin at operation 2011, where the epitaxial pn diode layer is located on the growth substrate with the p-side facing up. At operation 2013, the epitaxial layer is then bonded to the temporary substrate-B with the p-side facing down. In one embodiment, the temporary substrate-B is a 6 inch wafer. This is followed by removal of the growth substrate at operation 2015, and etching of the epitaxial layer to form the B-specimen block 202 at operation 2021. The remainder of the processing sequence may be similar to that of FIG. Figure 2A It will be appreciated that although a processing sequence variation is provided only for the formation of B-coupon 202, the processing sequence variation may be switched for A-coupon 102, or such a sequence may be used to process both.

[0053] In other embodiments, the A-coupons and / or B-coupons may be further patterned while on any of the temporary substrates to further divide the coupons into smaller coupons, which are then transferred to a carrier substrate.

[0054] According to an embodiment, after transferring the A-coupon 102 and B-coupon 202 on the carrier substrate 300, the coupons can be processed together to form an array of LED mesa structures, and various optical elements (such as reflective well structures) before transfer to the display substrate. Such a processing sequence can also be used to form a monochrome display.

[0055] Figure 2C to Figure 2D A process flow of a method for forming a single-color emitting LED coupon on a carrier substrate according to an embodiment. Figure 2C The processing flow and FIG. 2A to FIG. 2B The processing flow of LED A in FIG. 1 is the same. Likewise, the sample block can be patterned after transfer to the temporary substrate. Figure 2D is shown with Figure 2B The processing flow diagram of the processing of LED B is similar to that of the processing flow of FIG.

[0056] In another aspect, the LED sample blocks arranged on the carrier substrate 300 can be significantly larger than the resulting LED and LED mesa structures. According to the embodiment, the LED sample blocks can be sub-pixel sized, including multiple sub-pixels within a single pixel, or including multiple sub-pixels within adjacent pixels that will be defined later. In this way, the processing sequence according to the embodiment first provides an arrangement of the necessary sample blocks of epitaxial pn diode layers adjacent to each other on the carrier substrate, followed by fine patterning to create LED and pixel arrays. Such fine patterning can be performed using a common mask sequence, which can significantly alleviate alignment differences that may occur when different LEDs are transferred separately to the display substrate (such as by an array of electrostatic transfer heads). In addition, this can allow patterning and integration of smaller LEDs, such as with a maximum width of less than 5μm. The integration of smaller LEDs, in turn, frees up additional space and allows additional optical elements to be integrated within the pixel structure.

[0057] Reference now Figure 3A , provides a process flow and corresponding cross-sectional side view illustration of a method for patterning a pair of LED mesas from an LED coupon on a carrier substrate according to an embodiment. Figure 3A The processing sequence of a single LED coupon on a carrier substrate is shown, but it should be understood that the processing sequence can be performed on an array of different LED coupons on a carrier substrate using a common mask set. The illustrated embodiment can begin at operation 3010, where an A-coupon 102 is mounted on a carrier substrate 300 via an adhesive layer 112. The A-coupon can be formed of an epitaxial pn diode layer 110 including an n-doped layer 104, an active layer 106, and a p-doped layer 108. As a result of the transfer from the temporary substrate-A to the carrier substrate 300, an adhesive layer or residue 114 can optionally be over the p-doped layer 108.

[0058] At operation 3020, the A-coupon 102 is patterned into one or more LED mesas 150, and an optional (reflective) well structure 160 may be formed around the one or more LED mesas 150. In one embodiment, the A-coupon 102 is patterned to form one or more LED mesas 150 for a single sub-pixel (e.g., a blue, green, or red sub-pixel within a red-green-blue pixel). The A-coupon 102 may also be patterned to form one or more LED mesas within multiple sub-pixels (e.g., blue and red) of a single pixel or within multiple sub-pixels within multiple sub-pixels (various possibilities).

[0059] A suitable etching technique (e.g., dry process) and a hard mask (such as HfO x) to form the LED mesa structure 150. An optional sidewall passivation layer 130 may then be formed on the mesa sidewalls 122. For example, the sidewall passivation layer 130 may be formed by atomic layer deposition. Exemplary materials are Al2O3 or other suitable dielectric materials. The sidewall passivation layer 130 may then be patterned to form an opening 132 that will expose the bottom surface of the LED mesa structure 150.

[0060] In one embodiment, a well structure 160 is then formed around the LED mesa structure 150. In one embodiment, the well material 134 is formed of one or more insulating materials. In one embodiment, the well material 134 is a polymer or glass material. The well material 134 may additionally include scattering particles dispersed in a matrix (e.g., a polymer or glass) to act as a diffuser. In such a structure, the propagation length of light between scattering events may be very small, giving the light emitted from the LED a chance to be extracted. An exemplary diffuser may include a transparent well material 134 filled with scattering particles. The transparent well material 134 may also be a low refractive index material, a high refractive index material, or have the same refractive index as the overlying layer.

[0061] In one embodiment, well material 134 is deposited and patterned to form a well structure. Suitable techniques include, but are not limited to, spin coating, spray coating, ink jetting, slit coating, etc. In one embodiment, well material 134 is selected to have a lower refractive index than the refractive index of LED mesa structure 150 to facilitate light extraction. Figure 3A In the particular embodiment shown in , the well material 134 is completely removed between the LED mesas 150, thereby forming discrete separate well structures 160. In other embodiments, a single well structure 160 can surround multiple LED mesas 150. For example, a single well structure can be formed around a pair of redundant LED mesas 150. Additional configurations are possible. In some embodiments, the well material 134 is not completely removed between the LED mesas 150, and a layer of well material can connect adjacent well structures 160. Such an embodiment can form a structure in which the top surface of the LED to be manufactured will extend above the well structure (see, for example, FIG. Figure 7 ). The well material 134 is also patterned to form an opening 136 above the bottom surface of the LED mesa structure 150 to expose the surface for making electrical contacts. For example, the opening 136 can be within or overlap the opening 132 in the sidewall passivation layer 130.

[0062] After forming the well structure 160, a reflective layer may be optionally deposited and patterned to form a reflective layer 140 around the well structure. The reflective layer 140 may be a continuous layer that spans around and below the corresponding LED (to be completed) and within the opening in the well material 134 directly below the LED. As shown, the reflective layer 140 spans the long sidewalls of the well structure 160 and spans within the openings 136, 132 in the well structure 160 and the sidewall passivation layer 130. In some embodiments, the reflective layer 140 may be formed directly on the bottom surface of the LED mesa structure 150. In other embodiments, a contact layer (e.g., indium tin oxide) is preformed on the epitaxial pn diode layer before forming the LED mesa structure 150. In this manner, the reflective layer 140 may be formed directly on the contact layer on the bottom surface of the LED mesa structure 150. The reflective layer 140 may be formed of a variety of reflective materials and may be different depending on the composition of the LED mesa structure 150. Thus, different reflective layers 140 may be formed over different LED coupons. Exemplary materials include, but are not limited to, aluminum, silver, gold, and the like.

[0063] Still refer to Figure 3A , a bottom contact 180 (i.e., a bonding post) is fabricated at operation 3030. In one embodiment, the bottom contact 180 is formed using a suitable technique such as electroplating. The fill layer 170 (e.g., a planarization layer) may then be deposited in layers, such as by spin coating techniques, spray coating, etc. The fill layer 170 may then be planarized to create a planar surface 186, which includes a planar surface 172 of the fill layer 170 and a planar surface 182 of the bottom contact. The fill layer 170 may be formed of a suitable insulating material such as a polymer or glass. In embodiments where the reflective layer 140 is not formed, the well material 134 is selected to have a refractive index higher than that of the fill layer 170 to take advantage of reflection by total internal reflection.

[0064] The order of forming the bottom contact 180 and the fill layer 170 may also be reversed, wherein the fill layer 170 is formed, followed by patterning, formation of the bottom contact 180 (e.g., by electroplating), and planarization to create a planar surface 186. The fill layer 170 may also include multiple layers. For example, the fill layer 170 may include a bulk layer 174 (e.g., formed by spin coating techniques, spray coating, etc.), followed by growth of an oxide bonding layer 176, such as a high quality oxide (e.g., silicon oxide) to facilitate hybrid bonding.

[0065] Reference now Figure 3B, and then the LED mesa structure is integrated on the display substrate 400. At operation 3040, the LED mesa structure 150 is bonded to the display substrate 400. More specifically, the bottom contact 180 is bonded to the electrode pad 410 on the display substrate 400. Bonding can be achieved using various methods. In a specific embodiment, a hybrid bonding technique is utilized, wherein the bottom surface 182 of the bottom contact 180 is bonded to the top surface 412 of the electrode pad 410 by metal-metal bonding, and the bottom surface 172 of the filling layer 170 (e.g., the oxide bonding layer 176) is bonded to the top surface 422 of the display substrate 400 by oxide-oxide bonding. For example, the top surface 422 can also be the top surface of the oxide bonding layer 404 of the display substrate, such as a high-quality oxide (e.g., silicon oxide). According to an embodiment, hybrid bonding can be promoted by bonding the planarized surfaces 172, 422. The display substrate 400 can be a variety of substrates including polymers, glass, silicon, etc., and can be rigid or flexible. In one embodiment, the display substrate includes a silicon substrate 402. For example, the display substrate 400 can be a complementary metal oxide semiconductor (CMOS) wafer that includes circuitry for addressing LEDs bonded to electrode pads 410.

[0066] The carrier substrate 300 can then be removed at operation 3050. After this, the epitaxial pn diode layer can be thinned to form a discrete LED 175. For example, this can include thinning the n-doped layer 104 and / or the buffer layer. A separate n contact can optionally be formed on the LED mesa structure of the LED 175. At operation 3060, a top electrode layer 190 is then formed above the LED 175. The top electrode layer 190 can be a common layer shared by multiple LEDs 175, spanning multiple pixels in some embodiments. The top electrode layer 190 can be additionally formed on the contact terminal 420. For example, the contact terminal can be connected to a ground or low voltage (Vss) line. As shown, the contact terminal 420 can be in the form of a plug or through hole extending through the filling layer 170. In one embodiment, the contact terminal 420 is located on the corresponding contact pad 411 of the display substrate 400. The contact terminal 420 can be formed at various stages. For example, at operation 3030, the contact terminal 420 can be formed together with the bottom contact. In such an embodiment, during a hybrid bonding technique, the contact terminal 420 may be bonded to the contact pad 411 by metal-to-metal bonding. After the carrier substrate is removed at operation 3050, the contact terminal 420 may optionally be formed.

[0067] FIG. 3A to FIG. 3B The processing sequence of 104 shows the processing of a single LED coupon (A-coupon) 102, but the processing sequence may be a global processing sequence for a plurality of different LED coupons and use a common mask set. Figures 4 to 6 is a schematic cross-sectional side view illustration of such a global processing sequence for a plurality of different LED coupons, according to an embodiment. Figure 4 The process starting at can correspond to Figure 3A The process provided in operation 3010. As shown in the figure, Figure 4 3 is a schematic cross-sectional side view illustration of two multiple LED coupons 102, 202 emitting different colors on a carrier substrate 300 according to an embodiment. As shown, different LED coupons 102 (A-coupon), 202 (B-coupon). Figure 5 is a schematic cross-sectional side view illustration of different LED coupons 102, 202 after having been patterned into two pluralities of LED mesas 150, 250 emitting different colors, with corresponding well structures 160, 260 and bottom contacts 180, 280, according to an embodiment. Figure 5 Specific distinguishing features that may occur according to the embodiments are shown. Specifically, LED coupons 102, 202 designed for different color emissions can be formed of different materials, have different layer stack structures, and significantly have different thicknesses. This can result in LED mesa structures 150, 250 with different thicknesses, and well structures 160, 260 with different heights (or thicknesses). In order to facilitate bonding a heterogeneous collection of materials and structures to the display substrate 400, the bottom contacts 180, 280 can have different corresponding thicknesses t1, t2 to maintain the planarity of the bottom surface 172 of the fill layer 170 and the bottom surface 186 of the bottom contacts 180, 280, 182, 282. Figure 6 is a schematic cross-sectional side view illustration of a plurality of LEDs 175, 275 emitting different colors bonded to a display substrate 400 according to an embodiment. For example, Figure 6 Can correspond to Figure 3B The structure corresponding to operation 3060 is shown in FIG.

[0068] The light emitting structure according to the embodiment includes an LED 175 bonded to an electrode pad 410 of a substrate 400 (such as a CMOS substrate). The LED includes a pn diode based on an inorganic semiconductor and a metal bottom contact 180 bonded to the electrode pad 410. An insulating fill layer 170 laterally surrounds the LED 175 and the metal bottom contact 180. In some embodiments, a planar bottom surface 182 of the metal bottom contact 180 is bonded to a planar top surface 412 of the electrode pad 410 by metal-metal bonding, and a planar bottom surface 172 of the insulating fill layer 170 is bonded to a planar top surface 422 of the substrate 400 by oxide-oxide bonding.

[0069] The LED 175 can be mounted within a well structure 160 embedded within the insulating fill layer 170. The well structure 160 can be a reflective well structure including a reflective metal layer 140 laterally surrounding a well material 134, wherein the well material 134 laterally surrounds the LED 175 within the well structure 160. The reflective metal layer 140 can be a continuous layer that spans around and under the LED 175 and within an opening 136 in the well material 134 directly below the LED.

[0070] The light emitting structure according to the embodiment includes: a first LED 175 formed of a first inorganic semiconductor-based pn diode 151 designed to emit a first color emission, and a first metal bottom contact 180 bonded to a first electrode pad 410, and a second LED 275 formed of a second inorganic semiconductor-based pn diode 251 designed to emit a second color emission different from the first color emission, and a second metal bottom contact 280 bonded to a second electrode pad 410. Figure 6 As shown, the first metal bottom contact 180 is thicker than the second metal bottom contact 280, and the second inorganic semiconductor-based pn diode 251 is thicker than the first inorganic semiconductor-based pn diode 151. In addition, the bottom surfaces 182, 282 of the first metal bottom contact 180 and the second metal bottom contact 280 are coplanar. In one embodiment, the top surfaces of the first inorganic semiconductor-based pn diode 151 and the second inorganic semiconductor-based pn diode 251 are coplanar. In one embodiment, the first metal bottom contact 180 is thicker than the second metal bottom contact 280 by a first thickness, and the second inorganic semiconductor-based pn diode 251 is thicker than the first inorganic semiconductor-based pn diode 151 by approximately the first thickness.

[0071] In one embodiment, a first LED 175 is mounted within a first (reflective) well structure 160 and a second LED 275 is mounted within a second (reflective) well structure 260. As shown, the second well structure 260 can be taller than the first well structure 160. The first and second well structures 160, 260 and the first and second metal bottom contacts 180, 280 are embedded within an insulating layer (filling layer 170). The bottom surfaces 172, 182, 282 of the insulating layer and the contacts can be coplanar.

[0072] Although embodiments including LEDs for different color emission are described and illustrated as including different epitaxial thicknesses, and therefore different metal bottom contact thicknesses and well structure heights, this is not required. For example, an additional wafer transfer operation can be performed during the manufacture of the LED coupons so that different types of LED coupons are bonded to a temporary substrate (n-side up) and polished together to a common thickness. Alternative processing sequences are also contemplated. Thus, a light emitting structure processed in this manner can include LEDs having uniform thickness, as well as bottom metal bottom contacts and / or well structures of uniform thickness or height, depending on the manufacturing sequence and mask set.

[0073] According to embodiments, the LED coupon can be patterned to form a plurality of LEDs. For example, it can be patterned to form pairs of redundant LEDs within a sub-pixel. Figure 7 is a schematic cross-sectional side view illustration of a pair of LEDs 175 mounted within a reflective well structure on a display substrate 400 according to an embodiment. Figure 7 The particular embodiment shown includes a particular processing variation in which the well material 134 is not completely removed between adjacent LEDs 175. Thus, the LEDs 175 can extend over the well structure 160. It should be understood that this processing variation is optional, and in other embodiments, the well material 134 can be completely removed between adjacent LEDs 175. Additionally, in other embodiments, the well structures 160 can overlap and can have a shared reflective layer 140.

[0074] Additional optics 500 (eg, in addition to the reflective well structure) may be fabricated after the LEDs are transferred to the display substrate. For example, additional optics 500 may be designed for color conversion, spectral filtering, angular filtering, and / or light shaping to facilitate on-axis light transmission. Figure 8 is a schematic cross-sectional side view illustration of a pair of micro-optical elements 510 formed over a pair of LEDs 175 on a display substrate 400 according to an embodiment. Fig.9A is a schematic cross-sectional side view illustration of a pair of micro-optical elements 510 (including filters 520) formed over a pair of LEDs 175 on a display substrate 400 according to an embodiment. Fig. 9B is a schematic cross-sectional side view illustration of a pair of micro-optical elements (encapsulated with optical filters) formed over a pair of LEDs on a display substrate in accordance with an embodiment.

[0075] According to an embodiment, the (reflective) well structure 160 may have reflective sidewalls shaped for a coaxial emission direction (e.g., orthogonal to the display substrate 400). The micro-optical element 510 may optionally be formed by the LED 175 to additionally convert, filter and / or shape the emitted light. The exemplary micro-optical element 510 may include a dike 502 and an optional reflective layer 504 on the sidewalls of the dike 502. The reflective layer 504 may be formed of a material similar to the reflective layer 140, such as aluminum, silver, gold, etc. An optical material 506 is formed in the dike opening in the dike 502 directly above the LED 175. The optical material 506 may be formed of a material similar to the filling material 134, such as a polymer or glass. In addition, the optical material may be selected for transparency or refractive index. In some embodiments, the optical material 506 may be filled with a color conversion material (such as quantum dots). For example, the quantum dots may be designed to absorb mainly blue emission wavelengths from the LED 175 and emit mainly red emission wavelengths, but other configurations are also possible.

[0076] In one embodiment, micro-optical element 510 is designed for color conversion. For example, optical material 506 can be filled with a color conversion material (such as quantum dots), and the sidewalls of the openings in bank layer 502 are lined with reflective layer 504. Reflective layer 504 can additionally function to prevent light emitted from the optical material from bleeding between sub-pixels. In one embodiment, the openings (reflective layer 504) of bank layer 502 include a plurality of reflective layers 504 characterized by an angle (α) relative to the horizontal. c According to an embodiment, the angle (α) of the micro-optical element 510 relative to the horizontal c ) and the angle of the well structure relative to the horizontal (α w ) is application specific. In an exemplary embodiment where the micro-optical element 510 is designed for color conversion, the angle (α) of the micro-optical element 510 relative to the horizontal c ) is 45-60 degrees, and the angle (α w ) is 50-80 degrees, or more specifically 60-80 degrees. This configuration can also be used to increase on-axis light extraction efficiency, and more specifically within + / - 7 degrees of the horizontal angle (90 degrees).

[0077] In one embodiment, micro-optical element 510 is designed for light shaping, for example, to facilitate on-axis light transmission. Optical material 506 can be formed of a high refractive index material (e.g., a refractive index greater than the refractive index of bank layer 502). For example, optical material 506 can have a refractive index greater than 1.6, while bank layer 502 is formed of a material with a lower refractive index (e.g., less than 1.5), so that total internal reflection is used to collimate light. An optional reflective layer 504 can also be present. In one embodiment, the micro-optical element includes sidewalls that are characterized by their angle (α) relative to the horizontal. c ) is greater than the angle (α) of the reflective sidewall of the well structure 160 relative to the horizontal c In an exemplary embodiment, the angle (α c ) is about 70-85 degrees, and the angle of the well structure relative to the horizontal (α w ) is 50-80 degrees, or more specifically 55-65 degrees, such as about 60 degrees. This configuration can be used to increase the on-axis light extraction efficiency, and more specifically within + / - 7 degrees of the horizontal angle (90 degrees).

[0078] Reference now 9A to 9C , may optionally include a filter 520. The filter 520 may be particularly suitable for configurations in which the micro-optical element 510 is designed for color conversion. Fig. 9B and Fig.9AThe difference is that the optical material 206 is confined within the levee opening and is covered by the filter 520. This configuration can achieve improved packaging of the optical material 206 (e.g., to prevent moisture and oxidation), particularly for the optical material 206 containing quantum dots. The filter 520 can have specific functions, such as a spectral filter and / or an angle filter. Exemplary angle filters include a low refractive index volume characterized by a refractive index less than 1.4 (e.g., for an angle filter), a distributed Bragg reflector (DBR) structure, or other dedicated optical film. Exemplary low refractive index volumes can include voids, such as vacuum, air gaps or other inert gas filled areas, or low refractive index matrices. In this configuration, the angle filter counteracts the tendency of light otherwise to be captured by the outer coating interface by the total internal reflection (TIR) ​​effect. More specifically, according to an embodiment, the angle filter 520 only allows light to escape first outside the angle filter, which can then escape outside the entire outer coating film stack in the display. Thus, light that has no chance of escaping the display is reflected back into the structure below where it can be scattered again into a pattern that could then escape. Thus, the angular filter keeps the light confined until it is redirected to a sufficiently steep angle that allows such light to escape the display system to the surrounding environment. Various DBRs can also or instead be used as spectral filters, such as a band-stop DBR (e.g., reflecting only blue light from the LED below for QD absorption and conversion to red light, while allowing other wavelengths to pass) or a long-pass DBR (e.g., blocking all wavelengths below the red wavelength). In one embodiment, particles or dyes are included within the spectral filter to absorb specific wavelengths.

[0079] exist Fig. 9C In the particular embodiment shown, the filter 520 can be a multilayer stack of comparable high and low refractive index materials and includes a recycling (reflecting) portion 522 and a collimating portion 524 that can be located above the recycling portion 522. The recycling (reflecting) portion 522 can reflect light (e.g., blue) from the (pump) LED 175 below, while the collimating portion 524 can only pass light (e.g., red) emitted from the quantum dots within the optical material 206 at approximately normal incidence. Therefore, light that is not normally incident is reflected back by the collimating portion 524, where the light can be redirected and has another opportunity to pass through at normal incidence. This configuration can increase on-axis intensity. The material selection of the layers within the filter 520 can also serve to encapsulate the optical material 206 and provide a barrier to moisture and oxidation (e.g., particularly when quantum dots are present for color conversion). The filter 520 can include an encapsulating material (such as silicon nitride). In one embodiment, the planarity of the filter 520 layer is maintained such that the tilt relative to horizontal is kept less than 20 degrees to ensure continuity of the layer for adequate packaging integrity.

[0080] In certain embodiments, the recycling portion 522 includes pairs (e.g., 3-5 pairs) of high / low refractive index material layers, wherein the thickness of each layer is λ1 / 4 of the dominant emission wavelength (λ1) of the LED 175. For example, the dominant emission wavelength of the LED 175 can be blue (about 465nm). On the other hand, the collimating portion 524 can have a λ2 / 2 layer sandwiched between pairs (e.g., 2 pairs) on each side of the high / low refractive index material layer, wherein the thickness of each layer is λ2 / 4 of the QD dominant emission wavelength (λ2). For example, the QD dominant emission wavelength can be red (about 640nm).

[0081] The LEDs 175, 275 processed from the LED coupons 102, 202 according to the embodiments can be integrated in various pixel structures. Specifically, the LEDs 175, 275 can be transferred to a display substrate 400 including prefabricated optical elements (e.g., reflective well structures). The well structures can have individual dimensions while also using a common mask set on a carrier substrate to process the components. After transfer to the display substrate 400, additional optics 500 can be added.

[0082] Fig. 10A is a schematic cross-sectional side view illustration of a pixel structure according to an embodiment. Fig. 10B According to the implementation plan Fig. 10A Schematic top view illustration of the pixel structure of . The exemplary pixel structure shown is a red-green-blue (RGB) pixel structure, but this is understood to be exemplary, and the embodiment is not limited thereto. In the exemplary structure, the RGB pixel includes a sub-pixel (B) emitting blue, a sub-pixel (G) emitting green, and a sub-pixel (R) emitting red. The sub-pixels emitting blue and red each include an LED 175 emitting blue, and the sub-pixel emitting green includes an LED 275 emitting green. As shown in the figure, the optical device 500 can be formed by the LED 175 emitting blue in the sub-pixel emitting red to convert the emitted light from blue to red. In other embodiments, the LED in the sub-pixel emitting red is designed for different color emissions. Therefore, there is no need to emit blue LEDs. However, including LEDs emitting blue can provide design uniformity because they can be processed using the same LED sample block as the sub-pixel emitting blue.

[0083] Fig.11A is a schematic cross-sectional side view illustration of a pixel structure including redundant LEDs according to an embodiment. Fig. 11B According to the implementation plan Fig.11A Schematic top view illustration of a pixel structure including redundant LEDs. FIG. 11A to FIG. 11B The embodiment shown is similar to FIG. 10A to FIG. 10B, where LED redundancy is added. In the illustrated embodiment, redundant LED pairs can share the same well structure 160, 260. In addition, redundant LED pairs can share the same optical device 500. In other embodiments, each LED can have its own corresponding well structure and optional optical device.

[0084] Apart from FIG. 10A to FIG. 11B In addition to the embodiment shown, each LED or LED pair can have its own optics 500. The optics 500 is not limited to color conversion. For example, a separate micro-optic element 510 can be located above each LED or LED pair.

[0085] In one embodiment, the light emitting structure includes a first pair of LEDs 175 including corresponding pairs of first inorganic semiconductor-based pn diodes 151 designed to emit a first color emission, and corresponding pairs of first metal bottom contacts 180 bonded to corresponding pairs of individual first electrode pads 410. The light emitting structure additionally includes a second pair of LEDs 275 including corresponding pairs of second inorganic semiconductor-based pn diodes 251 designed to emit a second color emission different from the first color emission, and corresponding pairs of second metal bottom contacts 280 bonded to corresponding pairs of individual second electrode pads 410. In one embodiment, the pair of first metal bottom contacts 180 are thicker than the pair of second metal bottom contacts 280, and the pair of second inorganic semiconductor-based pn diodes 251 are thicker than the pair of first inorganic semiconductor-based pn diodes 151.

[0086] The bottom surfaces 182, 282 of the pair of first metal bottom contacts 180 and second metal bottom contacts 280 can be coplanar, wherein the pair of first metal bottom contacts 180 are thicker than the pair of second metal bottom contacts 280 by a first thickness, and the pair of second inorganic semiconductor-based pn diodes 251 are thicker than the pair of first inorganic semiconductor-based pn diodes 151 by approximately the same first thickness.

[0087] In one embodiment, a first pair of LEDs 175 are mounted within a first (reflective) well structure 160, and a second pair of LEDs 275 are mounted within a second (reflective) well structure 260. As shown, the second well structure 260 can be taller than the first well structure 160.

[0088] According to the embodiments, the structure and manufacturing sequence of a high-efficiency, high-brightness micro display panel are described based on a group array of inorganic semiconductor-based micro LEDs as emission components. According to the embodiments, high emission efficiency can be achieved for coaxial emission, and narrow angle band shaping can be achieved for low power consumption and wearable applications. Specifically, the processing sequence can include on-wafer manufacturing of optical components to simplify integration. Therefore, no separate micro LED transfer is required.

[0089] More specifically, a wide area of ​​the LED coupons for each primary color emission can be bonded to a temporary carrier substrate and then dry etched for all colors using a common mask set process to form a pixel arrangement of micro LED mesas. In addition, optics (such as reflective well structures) can be formed around the micro LED mesas, as well as bottom contacts for each micro LED mesas. The use of a common mask set enables the required spacing and prior art lithography tolerances to be maintained across the wafer before bonding to a display substrate (such as a CMOS wafer). For example, this can be a twelve inch CMOS wafer. Additional optics and optional color conversion structures can then be formed on top of some of the micro LEDs to achieve specific pixels (e.g., red). Likewise, the common mask set enables prior art lithography tolerances across the wafer to align the optics to the LED array.

[0090] The light emitting structure (e.g., display panel) according to the embodiment can be driven with a CMOS backplane, more specifically, using digital dimming by pulse width modulation. The panel can include pixels having (500×500 to 4,000×4,000) emitting micro-LEDs. The micro-LEDs can be designed to emit light in, for example, red, green, blue spectral ranges, but other colors are possible. The light emitting structure can be monochromatic, or have a combination of colors.

[0091] Because the embodiments facilitate the use of existing technology lithography tolerances, micro-LEDs can be smaller than using other integration techniques.

[0092] For example, an exemplary sub-pixel size may be 3-10 μm, with each micro-LED mesa width being 0.5-5 μm, or more specifically about 1-2 μm.The reduced size of the micro-LEDs further facilitates incorporation of optical elements surrounding the micro-LEDs and optional color conversion structures.

[0093] In some embodiments, the micro-LEDs (or pairs of micro-LEDs in the case of redundancy) may have optical features to shape the light in a coaxial direction (e.g., orthogonal to the display substrate). More specifically, the features may be configured to increase light extraction in a receiving cone (such as + / - 7 degrees). The optical features may be around and / or above the micro-LEDs. For example, the optical features may include a reflective well structure. Reflectivity may be achieved by coating a metal layer (e.g., aluminum, silver, gold) on the sidewalls and bottom of the well structure. The sidewalls of the reflective well structure may be tilted to redirect the light upward. The filling material surrounding the micro-LED within the well structure may include a diffuser, such as high refractive index particles dispersed in a matrix. The optical device may be additionally located above the micro-LED. For example, a color conversion structure may be included in the optical device. The sidewalls of the optical device may also be coated with a reflective material. A reflective surface may also be present on a portion of the top surface of the micro-LED in order to more effectively shape the emission.

[0094] Simulation Example 1

[0095] Since the shaping of micro-LEDs can be challenging, it may be more practical to place a high refractive index structure above the LED to increase light extraction. To demonstrate the light extraction and collimation optics of a micro-LED display, panel simulation data was performed for: an LED with an overlying conical micro-optical element 510 (top well), a similar structure with an additional hemispherical high refractive index lens 508 placed above the LED within the conical micro-optical element 510 (top well) Fig. 12A ), and a similar structure with a conical high-index lens 508 placed above the LED within a conical micro-optical element 510 (top well) ( Fig. 12B ). In these simulated samples, the LED has a maximum width of 2 μm, a thickness of 2 μm, and vertical LED sidewalls. The refractive index of the transparent high refractive index lens 508 (e.g., hemispherical, conical) is (n=1.8 to 2.4). The embankment layer 502 is formed of a low refractive index material (n=1.4 to 1.5), wherein the refractive index of the optical material 506 (n=1.6 to 1.8) is lower than the refractive index of the high refractive index lens 508. The opening in the embankment layer 502 of the optical material 506 (and the optional high refractive index lens 508) has a top width of 4-5 μm, and a height of 5-10 μm. Fig. 12B Compared to the tapered optical material 506 of the tapered micro-optical element 510 in the particular embodiment shown in FIG. Fig. 12C The simulation data of brightness with angle provided in indicates that the hemispherical high refractive index lens 508 is found to increase total light extraction and on-axis light, while the conical high refractive index lens 508 can increase total light extraction but reduce on-axis light.

[0096] Simulation Example 2

[0097] In order to show the angle of the well structure relative to the horizontal (α w ), a simulation study was performed to measure the on-axis light intensity as a function of the well structure angle. In this simulation example, the LEDs are blue emitting. Specifically, each LED is a hexagonal LED with a maximum width of 2 μm, a thickness of 2 μm, and vertical LED sidewalls. The LEDs are mounted in a well structure with a diameter of 4.5 μm. Fig.13 The results of Simulation Example 2 are provided in a graph of coaxial light intensity as a function of the trap angle. As shown in the figure, it is found that the angle (α) of the trap structure relative to the horizontal w ) increases significantly about angles of 50-70 degrees, and there is a greater than 5-fold increase at 60 degrees.

[0098] Simulation Example 3

[0099] Reference now Fig.14 , a graph of simulation data of light extraction efficiency (LEE) as a function of viewing angle is provided for various structures according to the embodiment. Specifically, simulation data is provided for a bare LED (bare die), an LED mounted in a reflective well structure 160 (side well), and an LED having a micro-optical element 510 (top well) above the reflective well structure 160. In this simulation example, the LED is blue emitting. Specifically, the bare LED (bare die) is configured as a hexagon with a height of 2 μm, a maximum width of 2 μm, and vertical side walls. The LED mounted in the reflective well structure (side well) has the same size as the bare LED, and is mounted at an angle (α) relative to the horizontal in the well structure. w ) is 60 degrees and the height is 2 μm. The LED with micro-optical element (top well) includes a hexagonal LED with a height of 1 μm, a maximum width of 1 μm and vertical sidewalls, which is mounted in the well structure at an angle (α w ) is 60 degrees, and the angle of the side wall relative to the horizontal (α c ) with a covered micro-optical element of 75 degrees. As shown, the on-axis LEE is significantly improved within + / - 7 degrees of the on-axis angle (0 degrees). Therefore, including the micro-optical element (top well) further improves the collimation and, in this simulation example, improves the on-axis LEE.

[0100] Simulation Example 4

[0101] The light extraction and collimation optics may also depend on the angle of the bottom well structure 160 and the height and angle of the micro-optics 510. Fig.15, for the angle of the well structure relative to the horizontal (α w ) of 55 degrees and 70 degrees, a graph of on-axis brightness versus height of micro-optical element 510 is provided. The simulation data is based on the structure of Simulation Example 3, where the height of micro-optical element 510 varies between 2 μm and 7 μm (the angle increases with height). As shown in the figure, choosing an appropriate bottom well structure relative to the horizontal angle (α w ) can have a significant impact on reducing the necessary height of the micro-optical element 510. Therefore, by means of the bottom well structure 160, the height of the micro-optical element 510 can be shorter.

[0102] Simulation Example 5

[0103] Reference now Fig.16 , provides simulation data of on-axis brightness relative to the height of micro-optical element 510. The simulation sample of Example 5 includes an LED mounted in a reflective bottom well structure and a micro-optical element formed above the LED, wherein the LED has a back reflector made of aluminum or nickel (e.g., the p-doped layer 108 of the LED is covered with the back reflector, an electrode on the bottom surface), and the LED is not mounted in the reflective bottom well structure. Although the simulation sample with only the micro-optical element with reflective sidewalls did not achieve the same high on-axis brightness as the reflective bottom well structure alone, the on-axis brightness did increase as the height of the micro-optical element 510 increased to about 10 μm.

[0104] Simulation Example 6

[0105] The remaining simulation examples involve configurations in which LED light is down-converted by optical material 506. Fig.17A , provides a graph of simulated data of on-axis light intensity as a function of the bottom well angle and the top well angle of a color conversion micro-optical element according to an embodiment. More specifically, Fig.17A The simulation data is based on Figure 8 A light emitting structure similar to that in the embodiment of the present invention is provided, including a blue emitting LED and a covering micro-optical element 510 (top well) having an optical material 506 filled with red emitting quantum dots (absorbing blue). In addition, the dimensions of the LED and the well are the same as those in Simulation Example 3. As shown in the figure, the coaxial light intensity is increased at an angle (α) of the side wall of the micro-optical element 510 relative to the horizontal line. c ) is highest when it is 45-60 degrees, but this changes with the well structure 160 (bottom well) angle. For example, when a higher bottom well angle is combined with a top well angle, a high coaxial light intensity is maintained. In addition, unlike Simulation Example 1, the coaxial light intensity is highest at a higher angle of 60-80 degrees relative to the horizontal for the bottom well, where the coaxial light intensity is highest at 80 degrees (α) relative to the horizontal. cThe expected result is that the bottom well does not have to direct (or collimate) the light upward, but instead distributes it among the micro-optical elements (top well).

[0106] Simulation Example 7

[0107] Fig. 17B is a graph of simulated data of on-axis light intensity as a function of bottom well angle and top well angle for a color conversion micro-optical element having a long pass DBR, according to an embodiment. Fig. 17B The simulation data of is based on a light emitting structure similar to that of Simulation Example 4, in which a filter 520 is added, and more specifically a long-pass DBR for blocking all wavelengths below the red emission wavelength of the quantum dots contained in the optical layer 506. Fig.17A In contrast, the inclusion of filter 520 demonstrates that for the micro-optical element (top well), at a lower angle (α c ), and more specifically at an angle of 45-60 degrees, or more specifically between 45-55 degrees, LEE increases.

[0108] In some aspects, the processing sequences described according to embodiments facilitate the formation of micro-LED display structures with integrated LEDs and associated optics because of the significant reduction in size and increase in density while also avoiding the fine alignment tolerances associated with transfer printing. Fig.18 is a schematic top view illustration of a micro-LED in a well structure according to an embodiment. Figures 19 to 20 is a schematic cross-sectional side view illustration of a micro-LED in a well structure according to an embodiment.

[0109] In one embodiment, the micro-LED 175 is designed to emit in the blue or green wavelength range. The micro-LED 175 may have a hexagonal shape with a maximum width W LED-MAX 1-5μm and installed at the maximum opening width W WELL-MAX The micro LED 175 may have vertical sidewalls, inwardly inclined sidewalls ( Fig.19 ) or outward-sloping sidewalls ( Fig. 20 In one embodiment, the angle (α) of the LED sidewall relative to the horizontal L ) is 60-90 degrees, and the angle (α W) is 60-80 degrees. In addition, the total height (h) of the micro-LED 175 can be 1-3 μm. Similarly, the height (h) of the well structure 160 can be the same (e.g., 1-3 μm) or less. Additional optical devices can be located above the micro-LED and the well structure. For example, when above the reflective well structure 160, the height of the micro-optical element 510 can be 2-5 μm, and in the absence of the reflective well structure 160, the height of the micro-optical element 510 can be 5-10 μm.

[0110] In one embodiment, the micro-LED 175 is designed for emission in the red wavelength range. The micro-LED 175 may have a hexagonal shape with a maximum width W LED-MAX 1.5-4μm, and installed at the maximum opening width W WELL-MAX The micro-LED 175 may have vertical sidewalls or outwardly sloping sidewalls from bottom to top. In one embodiment, the angle (α) of the LED sidewall relative to the horizontal L ) is 50-70 degrees, and the angle (α W ) is 50-80 degrees, such as about 60 degrees. In addition, the total height (h) of the micro-LED 175 can be 1-2 μm. Similarly, the height (h) of the well structure 160 can be the same (e.g., 1-2 μm) or less. Additional optical devices can be located above the micro-LED and the well structure. For example, when above the reflective well structure 160, the height of the micro-optical element 510 can be 2-5 μm, and in the absence of the reflective well structure 160, the height of the micro-optical element 510 can be 5-10 μm.

[0111] An exemplary LED according to the embodiment may have a pn diode with a maximum width less than 5 microns and a maximum height less than 3 microns. The reflective well structure 160 may include a reflective sidewall (of the reflective layer 140) characterized in that the sidewall has an angle (α) relative to the horizontal. W ) is 55-80 degrees. The light emitting structure may further include a micro-optical element 510 with reflective sidewalls located above the LED and the reflective well structure 160. In an exemplary embodiment in which the micro-optical element 510 is designed for color conversion, the angle (α) of the micro-optical element 510 relative to the horizontal is c ) is 45-60 degrees, and the angle (α w ) is 50-80 degrees, or more specifically 60-80 degrees. In an exemplary embodiment in which the micro-optical element 510 is designed for collimation, the angle (α) relative to the horizontal c ) is about 70-85 degrees, and the angle of the well structure relative to the horizontal (α w) is 50-80 degrees, or more specifically 55-65 degrees, such as about 60 degrees. In one embodiment, when above the reflection well structure 160, the height of the micro-optical element 510 is 2-5 μm, and in the absence of the reflection well structure 160, the height of the micro-optical element 510 can be 5-10 μm.

[0112] When utilizing various aspects of the embodiments, it will become apparent to those skilled in the art that combinations or variations of the above embodiments are possible for micro-LED-based display panels. Although the embodiments are described in language specific to structural features and / or methodological acts, it should be understood that the appended claims are not necessarily limited to the specific features or acts described. Instead, the specific features and acts disclosed should be understood as embodiments of the claims for exemplification.

Claims

1. A light-emitting structure, comprising: a substrate comprising a top bonding surface including a top surface dielectric bonding layer and an array of electrode pads; an emitter layer stack hybrid bonded to the top bonding surface of the substrate, the emitter layer stack comprising: An array of light emitting diodes LEDs; an array of reflective metal layers, wherein each reflective metal layer spans laterally around and below a corresponding LED, and each reflective metal layer is in electrical contact with a bottom surface of a corresponding LED; a dielectric bonding layer spanning laterally beneath the array of LEDs; and an array of bonding posts directly connected to the array of reflective metal layers and extending through the dielectric bonding layer; Each bonding pillar is metal-metal bonded to the electrode pad of the substrate, and the dielectric bonding layer is directly bonded to the top surface dielectric bonding layer of the substrate. The light emitting structure according to claim 1 , wherein the dielectric bonding layer is an oxide bonding layer. The light emitting structure of claim 2 , wherein the top surface dielectric bonding layer is a top surface oxide bonding layer. The light emitting structure of claim 1 , wherein each LED comprises a pn diode based on an inorganic semiconductor. 5 . The light emitting structure of claim 4 , wherein each reflective metal layer comprises a material selected from the group consisting of aluminum, gold, and silver. The light emitting structure according to claim 4 , wherein each reflective metal layer is a continuous layer. 7 . The light emitting structure according to claim 6 , further comprising a plurality of sidewall passivation layers, each sidewall passivation layer being located between a corresponding LED and a corresponding reflective metal layer. 8 . The light emitting structure according to claim 7 , further comprising an opening in each sidewall passivation layer, the opening exposing a bottom surface of the corresponding LED, and the corresponding reflective metal layer contacts the bottom surface of the corresponding LED in the opening.

9. The light emitting structure of claim 7, wherein each inorganic semiconductor-based pn diode has a maximum width of less than 5 microns and a maximum height of less than 3 microns.

10. The light emitting structure of claim 4, wherein each inorganic semiconductor-based pn diode has a maximum width of less than 5 microns and a maximum height of less than 3 microns.

11. The light emitting structure of claim 10, wherein the array of LEDs is disposed in a first group of LEDs and a second group of LEDs, wherein the array of bonding posts comprises a first group of bonding posts electrically connected to the first group of LEDs and a second group of bonding posts electrically connected to the second group of LEDs, wherein the first group of bonding posts is a second group of bonding posts. 12 . The light emitting structure of claim 11 , wherein the first group of LEDs is thinner than the second group of LEDs.

13. The light emitting structure of claim 10, further comprising an array of micro-optical elements above the array of LEDs. The light emitting structure of claim 13 , wherein the array of micro-optical elements comprises a hemispherical array.

15. The light emitting structure of claim 13, wherein the array of micro-optical elements comprises reflective sidewalls.

16. The light emitting structure of claim 1, wherein the substrate includes circuitry for addressing the array of LEDs.

17. The light emitting structure according to claim 1, wherein the substrate comprises a complementary metal oxide semiconductor (CMOS) circuit.

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