Microvolt-level signal processing device

Abstract

The invention relates to a microvolt-level signal processing device, belongs to the technical field of integrated circuits, and solves the problems that in the prior art, microvolt-level signals are difficult to read and low in precision, and a reading circuit is difficult to design. The microvolt-level signal processing device comprises a first chopper used for receiving a microvolt-level signal and modulating the microvolt-level signal to a preset chopping frequency; the signal amplification circuit is used for receiving the modulated microvolt-level signal and amplifying and demodulating the modulated microvolt-level signal; the switched capacitor filter circuit is used for receiving the amplified and demodulated microvolt-level signals and filtering noise signals from the amplified and demodulated microvolt-level signals to obtain processed microvolt-level signals; the first chopper, the signal amplification circuit and the switched capacitor filter circuit are integrated in the same chip. The area of the reading circuit is light, and signals are more accurate.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a microvolt-level signal processing device. Background Art

[0002] In recent years, with the continuous development of electronic information technology, the pace of replacement of new generation electronic information equipment and products has gradually accelerated. The performance of integrated circuits directly determines the core performance of these electronic products. Therefore, the electronic information industry has put forward higher requirements for the performance of integrated circuit chips, including but not limited to low noise, low offset, high PSRR (power supply reject ratio), high CMRR (Common-Mode Rejection Ratio, common mode rejection ratio), etc.

[0003] Existing low-noise technologies mainly include chopping technology, which uses the modulation and demodulation principle to move the useful signal back to low frequency through modulation and demodulation, and then separates the signal from the noise through a low-pass filter. However, this technology will introduce high-frequency chopping ripples, limit the bandwidth of the amplifier, and seriously affect the gain of the amplifier. At the same time, the low-pass filter uses a large resistor and a large capacitor structure, which causes the circuit to consume a large area.

[0004] Therefore, there is an urgent need for a technical solution for processing microvolt level signals. Summary of the invention

[0005] In view of the above analysis, an embodiment of the present invention aims to provide a microvolt level signal processing device to solve the problems of high power consumption, low precision and high design difficulty of the chopper amplifier system in the prior art.

[0006] An embodiment of the present invention provides a microvolt level signal processing device, the microvolt level signal processing device comprising:

[0007] A first chopper is used to receive a microvolt level signal and modulate the microvolt level signal to a preset chopping frequency;

[0008] A signal amplifying circuit, used for receiving a modulated microvolt signal, and amplifying and demodulating the modulated microvolt signal;

[0009] The switched capacitor filter circuit is used to receive the amplified and demodulated microvolt level signal and filter out the noise signal from the amplified and demodulated microvolt level signal to obtain a processed microvolt level signal;

[0010] The first chopper, the signal amplifying circuit and the switched capacitor filtering circuit are integrated into the same chip.

[0011] Based on the further improvement of the above-mentioned microvolt signal processing device, the signal amplification circuit includes a primary amplification circuit, a second chopper and a secondary amplification circuit;

[0012] A first-stage amplifier circuit is used to receive the modulated microvolt level signal and amplify the modulated microvolt level signal to obtain a first signal;

[0013] A second chopper is used to receive the first signal and modulate the first signal to a preset chopping frequency to obtain a second signal;

[0014] The secondary amplifier circuit is used to receive the second signal and amplify the second signal to obtain an amplified and demodulated microvolt signal.

[0015] Based on the further improvement of the above-mentioned microvolt signal processing device, the first-stage amplification circuit includes a first MOS tube and a second MOS tube, both of which are PMOS tubes;

[0016] The source electrodes of the first MOS tube and the second MOS tube are both connected to the power port;

[0017] The gate of the first MOS tube is connected to the OUTP port of the first chopper, and the gate of the second MOS tube is connected to the OUTN port of the first chopper;

[0018] The drain of the first MOS tube is connected to the INP port of the second chopper, and the drain of the second MOS tube is connected to the INN port of the second chopper.

[0019] Based on the further improvement of the above-mentioned microvolt signal processing device, the secondary amplification circuit includes a third MOS tube and a fourth MOS tube, both of which are NMOS tubes;

[0020] The gates of the third MOS tube and the fourth MOS tube are both connected to a bias voltage;

[0021] The source of the third MOS tube is connected to the OUTP port of the second chopper, and the source of the fourth MOS tube is connected to the OUTN port of the second chopper;

[0022] The drain of the third MOS tube is connected to the negative input terminal of the switch capacitor filter circuit, and the drain of the fourth MOS tube is connected to the positive input terminal of the switch capacitor filter circuit.

[0023] Based on the further improvement of the above-mentioned microvolt level signal processing device, the switch capacitor filter circuit includes a first resistance circuit, a second resistance circuit, a first capacitor and a second capacitor;

[0024] One end of the first resistor circuit serves as a negative input end of the switched capacitor filter circuit, and the other end is connected to one end of the first capacitor and serves as a negative output end of the switched capacitor filter circuit; the other end of the first capacitor is grounded;

[0025] One end of the second resistor circuit serves as the positive input end of the switched capacitor filter circuit, and the other end is connected to one end of the second capacitor and serves as the positive output end of the switched capacitor filter circuit; the other end of the second capacitor is grounded.

[0026] Based on the further improvement of the above-mentioned microvolt level signal processing device, the first resistance circuit includes a fifth MOS transistor, a sixth MOS transistor and a third capacitor;

[0027] The second resistance circuit includes a seventh MOS tube, an eighth MOS tube and a fourth capacitor: the fifth MOS tube, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube are all NMOS tubes;

[0028] The source of the fifth MOS tube serves as the negative input terminal of the switch capacitor filter circuit, and the drain of the seventh MOS tube serves as the positive input terminal of the switch capacitor filter circuit;

[0029] The fifth MOS tube and the seventh MOS tube are co-gated and used to receive a preset clock frequency; the drain of the fifth MOS tube is connected to one end of the third capacitor and the source of the sixth MOS tube; the other end of the third capacitor is grounded; the source of the seventh MOS tube is connected to one end of the fourth capacitor and the drain of the eighth MOS tube; the other end of the fourth capacitor is grounded;

[0030] The sixth MOS tube and the eighth MOS tube are co-gated and used to receive a preset clock frequency; the drain of the sixth MOS tube serves as the negative output terminal of the switch capacitor filter circuit, and the source of the eighth MOS tube serves as the positive output terminal of the switch capacitor filter circuit.

[0031] Based on the further improvement of the above-mentioned microvolt signal processing device, the microvolt signal processing device further includes a two-phase non-overlapping clock generator, and the two-phase non-overlapping clock generator includes a first clock generator, a second clock generator and a third clock generator;

[0032] The first clock generator is connected to the first chopper for providing a preset chopping frequency; the first clock generator is connected to the second chopper for providing a preset chopping frequency;

[0033] The CLK port of the third clock generator is connected to the gates of the fifth MOS tube and the seventh MOS tube, and the CLKb port of the third clock generator is connected to the gates of the sixth MOS tube and the eighth MOS tube, for providing a preset clock frequency.

[0034] Based on the further improvement of the above-mentioned microvolt level signal processing device, the CLK port of the first clock generator is connected to the CLK port of the first chopper, and the CLKb port of the first clock generator is connected to the CLKb port of the first chopper;

[0035] The VDD port of the first chopper is connected to the power supply port, and the GND port of the first chopper is grounded.

[0036] Based on the further improvement of the above-mentioned microvolt signal processing device, the first chopper modulates the microvolt signal according to the following formula:

[0037] V1(t)=V in (t)·m1(t);

[0038]

[0039] ω=2πf c ;

[0040] Where V1(t) represents the modulated microvolt signal, V in (t) represents the microvolt signal, m1(t) represents the Fourier series expansion of the control signal of the first chopper, n represents a positive integer, t represents time, ω represents the angular frequency of the first chopper, and f c represents the preset chopping frequency, and E represents the maximum amplitude of the control signal of the first chopper.

[0041] Based on the further improvement of the above-mentioned microvolt signal processing device, the signal amplification circuit amplifies and demodulates the modulated microvolt signal according to the following formula:

[0042] V out (t)=A1·[V1(t)+Vos]·m2(t)·A2;

[0043]

[0044] Among them, V out (t) represents the microvolt signal after amplification and demodulation, V os represents the noise signal, m2(t) represents the Fourier series expansion of the control signal of the second chopper, A1 represents the gain of the first-stage amplifier circuit, A2 represents the gain of the second-stage amplifier circuit, and k represents a positive integer.

[0045] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0046] 1. The present invention replaces the large resistor with a MOS tube, thereby reducing the occupied area of ​​the low-pass filter. The first chopper, the signal amplification circuit and the switch capacitor filter circuit are integrated into the same chip, so that the reading circuit area is lightweight and the integration is higher.

[0047] 2. The present invention avoids the problem of modulation and demodulation limiting the bandwidth and gain of the amplifier by embedding the second chopper between the primary amplification circuit and the secondary amplification circuit, thereby improving the accuracy and stability of signal acquisition.

[0048] In the present invention, the above-mentioned technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the subsequent description, and some advantages can become obvious from the description, or can be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained through the contents particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The drawings are only for the purpose of illustrating particular embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like components throughout the drawings.

[0050] Figure 1 A schematic diagram of the structure of a microvolt level signal processing device provided by an embodiment of the present invention;

[0051] Figure 2 A schematic diagram of control signals of a first chopper and a second chopper provided by an embodiment of the present invention;

[0052] Figure 3 A schematic diagram of the structure of a signal amplification circuit provided by an embodiment of the present invention;

[0053] Figure 4 A schematic diagram of the structure of a switched capacitor filter circuit provided by an embodiment of the present invention;

[0054] Figure 5 A schematic diagram of an interface between a first chopper and a second chopper provided in an embodiment of the present invention;

[0055] Figure 6 A simulation result diagram of time domain analysis provided by an embodiment of the present invention;

[0056] Figure 7 A simulation result diagram of frequency domain analysis provided by an embodiment of the present invention;

[0057] Figure 8 A simulation result diagram of input equivalent noise provided by an embodiment of the present invention;

[0058] Fig. 9 A diagram showing simulation results of a common mode rejection ratio provided by an embodiment of the present invention;

[0059] Fig.10 A diagram showing simulation results of the power supply rejection ratio provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0060] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.

[0061] A specific embodiment of the present invention discloses a microvolt level signal processing device, such as Figure 1 As shown, the microvolt level signal processing device comprises:

[0062] A first chopper is used to receive a microvolt level signal and modulate the microvolt level signal to a preset chopping frequency;

[0063] A signal amplifying circuit, used for receiving a modulated microvolt signal, and amplifying and demodulating the modulated microvolt signal;

[0064] The switched capacitor filter circuit is used to receive the amplified and demodulated microvolt level signal and filter out the noise signal from the amplified and demodulated microvolt level signal to obtain a processed microvolt level signal;

[0065] The first chopper, the signal amplifying circuit and the switched capacitor filtering circuit are integrated into the same chip.

[0066] Specifically, Chopper stabilization (CHS) technology was discovered by EA Goldberg in 1948. With the continuous development of integrated circuit technology, it was soon applied to chip integration technology. CHS is a modulation technology that improves the performance of operational amplifiers, mainly referring to reducing the impact of noise (mainly 1 / f noise and thermal noise) and input offset voltage on operational amplifiers. Chopper stabilization technology uses an AC modulation signal to modulate low-frequency noise and offset voltage to high frequency, and then eliminates their impact through filtering.

[0067] Specifically, Figure 1 As shown, the microvolt differential signal is input into the microvolt signal processing device, and the signal is modulated to a preset chopping frequency by the first chopper to obtain a modulated microvolt signal. The modulated microvolt signal is then input into the signal amplification circuit, amplified and demodulated in the signal amplification circuit to obtain an amplified and demodulated microvolt signal. It can be understood that the signal of the signal amplification circuit includes both a differential signal and a noise signal, and the noise signal includes the offset and noise of the signal amplification circuit, that is, the offset and noise generated by the signal amplification circuit as a whole.

[0068] Specifically, the amplified and demodulated microvolt signal includes both a noise signal and a differential signal. The amplified and demodulated microvolt signal is input into a switched capacitor filter circuit. In the switched capacitor filter circuit, the noise signal is filtered out from the amplified and demodulated microvolt signal to obtain a processed microvolt signal.

[0069] It is worth noting that the processed microvolt signal is a signal after the differential signal is amplified. The differential signal is a microvolt signal, and the microvolt signal comes from sensors such as microcantilever beams, MEMS (Micro-Electro-Mechanical System) micromirrors, hydrophones, thermocouples and flow meters. The microvolt signal processing device provided by the present invention is suitable for amplifying the microvolt signal output by the sensor, so that the measured signal accuracy is higher and has extremely high use value.

[0070] Specifically, Figure 1 As shown, the first chopper, the signal amplifying circuit and the switched capacitor filtering circuit are integrated together in the same chip, so that the integration of the microvolt signal processing device is improved, the occupied area of ​​the microvolt signal processing device is reduced, and the use is more convenient.

[0071] Preferably, the first chopper modulates the microvolt level signal according to the following formula:

[0072] V1(t)=V in (t)·m1(t);

[0073]

[0074] ω=2πf c ;

[0075] Where V1(t) represents the modulated microvolt signal, V in (t) represents a microvolt signal, m1(t) represents the Fourier series expansion of the control signal of the first chopper, n represents a positive integer, t represents time, ω represents the angular frequency of the first chopper,

[0076] f c represents the preset chopping frequency, and E represents the maximum amplitude of the control signal of the first chopper.

[0077] Specifically, the control signal of the first chopper is a square wave signal with a duty cycle of 50%. The given PWM (Pulsewidth modulation) signal is as follows: Figure 2 As shown, a periodic signal with an amplitude of 0 to E.

[0078] According to the definition of Fourier series, the periodic PWM signal is an odd harmonic function, and its spectral components only appear on the fundamental wave and odd harmonics. The Fourier series expansion of the control signal of the first chopper is:

[0079]

[0080]

[0081] ω=2πfc .

[0082] The microvolt differential signal is modulated to obtain a modulated microvolt signal V1(t), which is specifically:

[0083] V1(t)=V in (t)·m1(t).

[0084] Preferably, if Figure 1 As shown, the signal amplifying circuit includes a primary amplifying circuit, a second chopper and a secondary amplifying circuit;

[0085] A first-stage amplifier circuit is used to receive the modulated microvolt level signal and amplify the modulated microvolt level signal to obtain a first signal;

[0086] A second chopper is used to receive the first signal and modulate the first signal to a preset chopping frequency to obtain a second signal;

[0087] The secondary amplifier circuit is used to receive the second signal and amplify the second signal to obtain an amplified and demodulated microvolt signal.

[0088] Specifically, Figure 1 As shown, the signal amplification circuit includes a first-stage amplification circuit, a second chopper and a second-stage amplification circuit. The input microvolt signal is modulated to a preset chopping frequency after being modulated by the first chopper. The first-stage amplification circuit receives the modulated microvolt signal and amplifies the modulated microvolt signal to obtain a first signal; the second chopper is used to receive the first signal and modulate the first signal to a preset chopping frequency to obtain a second signal; the second-stage amplification circuit is used to receive the second signal and amplify the second signal to obtain an amplified and demodulated microvolt signal.

[0089] Preferably, the signal amplification circuit amplifies and demodulates the modulated microvolt level signal according to the following formula:

[0090] V out (t)=A1·[V1(t)+Vos]·m2(t)·A2;

[0091]

[0092]

[0093] Among them, V out (t) represents the microvolt signal after amplification and demodulation, Vos represents the noise signal, m2(t) represents the Fourier series expansion of the control signal of the second chopper, A1 represents the gain of the first-stage amplifier circuit, A2 represents the gain of the second-stage amplifier circuit, and k represents a positive integer.

[0094] Specifically, the control signal of the second chopper is a square wave signal with a duty cycle of 50%. The given PWM (Pulsewidth modulation) signal is as follows: Figure 2 As shown, a periodic signal with an amplitude of 0 to E.

[0095] According to the definition of Fourier series, the periodic PWM signal is an odd harmonic function, and its spectral components only appear on the fundamental wave and odd harmonics. The Fourier series expansion of the control signal of the second chopper is:

[0096]

[0097]

[0098] Specifically, the first-stage amplifier circuit amplifies the modulated microvolt signal by the following formula to obtain the first signal:

[0099] The first signal=A1·[V1(t)+Vos].

[0100] It can be understood that the present invention unifies the offset and noise of the signal amplifier circuit into a noise signal Vos. In the first-stage amplifier circuit, the noise signal Vos is added to the amplified gain A1. It can be understood that for the convenience of calculation, the noise signals generated by the first-stage amplifier circuit and the second-stage amplifier circuit are all placed in the first-stage amplifier circuit for calculation, that is, Vos is the total offset and noise generated by the first-stage amplifier circuit and the second-stage amplifier circuit.

[0101] Specifically, the second chopper modulates the first signal by the following formula to obtain the second signal:

[0102] Second signal = A1 · [V1 (t) + Vos] · m2 (t);

[0103]

[0104]

[0105] It can be understood that, in the second chopper, the differential signal is demodulated from the preset chopping frequency, and the noise signal is modulated to the preset chopping frequency.

[0106] Specifically, the secondary amplifier circuit amplifies the second signal by the following formula to obtain an amplified and demodulated microvolt signal:

[0107] V out (t)=A1·[V1(t)+Vos]·m2(t)·A2.

[0108] It can be understood that the differential signal and the noise signal are amplified again by a gain A2 in the secondary amplification circuit.

[0109] It can be understood that by simplifying the amplified and demodulated microvolt signal, we get:

[0110]

[0111] Specifically, the amplified and demodulated microvolt signal is input into the switched capacitor filter circuit. The switched capacitor filter circuit is a low-pass filter that can filter out high-frequency noise signals and obtain a processed microvolt signal through a low-frequency differential signal:

[0112]

[0113] Among them, V out (t)' is the processed microvolt signal. It can be understood that when n is an odd number, At this time, the processed microvolt signal is the differential signal V relative to the initial input in (t)Gain A1·A2.

[0114] Preferably, Figure 3 As shown, the first-stage amplifier circuit includes a first MOS tube and a second MOS tube, both of which are PMOS tubes;

[0115] The source electrodes of the first MOS tube and the second MOS tube are both connected to the power port;

[0116] The gate of the first MOS tube is connected to the first

[0117] The OUTP port of the chopper, the gate of the second MOS tube is connected to the OUTN port of the first chopper;

[0118] The drain of the first MOS tube is connected to the INP port of the second chopper, and the drain of the second MOS tube is connected to the INN port of the second chopper.

[0119] Preferably, the secondary amplifier circuit includes a third MOS tube and a fourth MOS tube, both of which are NMOS tubes;

[0120] The gates of the third MOS tube and the fourth MOS tube are both connected to a bias voltage;

[0121] The source of the third MOS tube is connected to the OUTP port of the second chopper, and the source of the fourth MOS tube is connected to the OUTN port of the second chopper;

[0122] The drain of the third MOS tube is connected to the negative input terminal of the switch capacitor filter circuit, and the drain of the fourth MOS tube is connected to the positive input terminal of the switch capacitor filter circuit.

[0123] Specifically, Figure 3As shown, the differential signals VIN+ and VIN- are input to the first chopper through the INP and INN ports of the first chopper, modulated in the first chopper, and output through the OUTP and OUTN ports of the first chopper after the modulation is completed. The differential signal VIN+ is input to the gate of the first MOS tube MP1 and output through the drain of the first MOS tube MP1; the differential signal VIN- is input to the gate of the second MOS tube MP2 and output through the drain of the second MOS tube. Then the differential signal output by the drain of the first MOS tube MP1 is input to the INP port of the second chopper and output by the OUTP port of the second chopper; the differential signal output by the drain of the second MOS tube is input to the INN port of the second chopper and output by the OUTN port of the second chopper. The differential signal output by the OUTP port of the second chopper is input to the drain of the third MOS tube and output through the source of the third MOS tube. The differential signal output by the OUTN port of the second chopper is input to the drain of the fourth MOS tube and output through the source of the fourth MOS tube.

[0124] Preferably, Figure 4 As shown, the switch capacitor filter circuit includes a first resistor circuit, a second resistor circuit, a first capacitor and a second capacitor;

[0125] One end of the first resistor circuit serves as a negative input end of the switched capacitor filter circuit, and the other end is connected to one end of the first capacitor and serves as a negative output end of the switched capacitor filter circuit; the other end of the first capacitor is grounded;

[0126] One end of the second resistor circuit serves as the positive input end of the switched capacitor filter circuit, and the other end is connected to one end of the second capacitor and serves as the positive output end of the switched capacitor filter circuit; the other end of the second capacitor is grounded.

[0127] Preferably, the first resistance circuit includes a fifth MOS transistor, a sixth MOS transistor and a third capacitor;

[0128] The second resistance circuit includes a seventh MOS tube, an eighth MOS tube and a fourth capacitor: the fifth MOS tube, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube are all NMOS tubes;

[0129] The source of the fifth MOS tube serves as the negative input terminal of the switch capacitor filter circuit, and the drain of the seventh MOS tube serves as the positive input terminal of the switch capacitor filter circuit;

[0130] The fifth MOS tube and the seventh MOS tube are co-gated and used to receive a preset clock frequency; the drain of the fifth MOS tube is connected to one end of the third capacitor and the source of the sixth MOS tube; the other end of the third capacitor is grounded; the source of the seventh MOS tube is connected to one end of the fourth capacitor and the drain of the eighth MOS tube; the other end of the fourth capacitor is grounded;

[0131] The sixth MOS tube and the eighth MOS tube are co-gated and used to receive a preset clock frequency; the drain of the sixth MOS tube serves as the negative output terminal of the switch capacitor filter circuit; the source of the eighth MOS tube serves as the positive output terminal of the switch capacitor filter circuit.

[0132] Specifically, Figure 4 As shown, the equivalent resistance R of the first resistance circuit and the second resistance circuit is R=1 / fs=1 / fsb, fs and fsb represent preset clock frequencies, the first resistance circuit and the second resistance circuit control the resistance size by changing the preset clock frequency, and combine the first capacitor and the second capacitor to form a low-pass filter, the cutoff frequency of the low-pass filter is 1 / (2πRC), C is the size of the first capacitor and the second capacitor, and the first capacitor and the second capacitor have the same capacitance.

[0133] Preferably, Figure 1 As shown, the microvolt level signal processing device further includes a two-phase non-overlapping clock generator, and the two-phase non-overlapping clock generator includes a first clock generator, a second clock generator and a third clock generator;

[0134] The first clock generator is connected to the first chopper for providing a preset chopping frequency; the first clock generator is connected to the second chopper for providing a preset chopping frequency;

[0135] The CLK port of the third clock generator is connected to the gates of the fifth MOS tube and the seventh MOS tube, and the CLKb port of the third clock generator is connected to the gates of the sixth MOS tube and the eighth MOS tube, for providing a preset clock frequency.

[0136] Preferably, Figure 5 As shown, the CLK port of the first clock generator is connected to the CLK port of the first chopper, and the CLKb port of the first clock generator is connected to the CLKb port of the first chopper;

[0137] The VDD port of the first chopper is connected to the power supply port, and the GND port of the first chopper is grounded.

[0138] Similarly, the CLK port of the second clock generator is connected to the CLK port of the second chopper, and the CLKb port of the second clock generator is connected to the CLKb port of the second chopper;

[0139] The VDD port of the second chopper is connected to the power supply port, and the GND port of the second chopper is grounded.

[0140] Compared with the prior art, the microvolt signal processing device provided in this embodiment uses a MOS tube to replace a large resistor, thereby reducing the occupied area of ​​the low-pass filter. The first chopper, the signal amplification circuit and the switch capacitor filter circuit are integrated together in the same chip, so that the reading circuit area is lightweight and the integration is higher. At the same time, by integrating the second chopper between the primary amplification circuit and the secondary amplification circuit, the problem of modulation and demodulation limiting the bandwidth and gain of the amplifier is avoided, and the accuracy and stability of signal acquisition are improved.

[0141] The technical effects of the present invention are demonstrated below through simulation results of specific embodiments.

[0142] The embodiment of the present invention uses SMIC's 0.13um process library and is simulated on the IC618 design platform. During the test, a weak signal of 10uv and 10kHz is used for testing. The main test indicators include time domain analysis, frequency domain analysis (gain and phase margin), input equivalent noise of chopping on and off, common mode rejection ratio (CMRR) and power supply rejection ratio (PSRR).

[0143] 1. Time domain analysis

[0144] The time domain analysis uses the PSS periodic steady-state analysis, and the results are as follows Figure 6 As shown in the figure, before adding the switched capacitor filter circuit, the chopper modulates the noise to high frequency, which brings a lot of high-frequency ripples. By setting a suitable cutoff frequency through the switched capacitor filter circuit, the high-frequency ripples can be effectively filtered out.

[0145] 2. Frequency domain analysis

[0146] The frequency domain analysis uses the joint simulation of PSS+PAC, and the results are as follows Figure 7 The frequency domain characteristics obtained by simulation are the switch gain and phase margin, and the obtained open-loop gain is 54.7dB@1kHz, the bandwidth is 62.2kHz, and the phase margin is 54.1°.

[0147] 3. Input equivalent noise

[0148] When facing weak low-frequency signals, the most serious challenge is how to reduce the low-frequency 1 / f noise. The input equivalent noise analysis uses the joint simulation of PSS+PNOISE to obtain the simulation results as follows: Figure 8 As shown. Figure 8 In the figure, there are the input equivalent noises when the chopping is turned off and on, which are 3.683uv / √Hz and 95.412nv / √Hz respectively. It can be clearly seen that the low-frequency noise is greatly suppressed.

[0149] 4. Common mode rejection ratio

[0150] Common mode rejection ratio (CMRR) refers to the degree of attenuation of the system for common mode signals in the case of differential signals. It is usually expressed in decibels (dB), which is the ratio of the amplifier's differential mode gain to the gain from the input common mode to the output differential mode, and is expressed by the following formula:

[0151]

[0152] The simulation of CMRR is realized by PSS+PAC, and the results are as follows Fig. 9 As shown, it can be seen that this design has a great suppressive effect on low-frequency CMRR, CMRR = 184dB@1kHz.

[0153] 5. Power Supply Rejection Ratio

[0154] Power supply noise is also a very troublesome problem in weak signal detection. The suppression performance of power supply noise can be measured by the power supply rejection ratio PSRR. The power supply rejection ratio is a parameter that measures the circuit's ability to suppress noise on the power line. It is defined as the amplifier's differential mode gain divided by the gain from the power supply voltage change to the output, and is expressed as follows:

[0155]

[0156] The simulation of PSRR is realized by PSS+PAC, and the results are as follows Fig.10 As shown, it can be seen that this design has a great suppressive effect on the low-frequency PSRR, PSRR = -162dB@1kHz.

[0157] Those skilled in the art will appreciate that all or part of the processes of the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, wherein the computer-readable storage medium is a disk, an optical disk, a read-only storage memory, or a random access memory, etc.

[0158] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A microvolt level signal processing device, characterized in that: The microvolt level signal processing device comprises: A first chopper is used to receive a microvolt level signal and modulate the microvolt level signal to a preset chopping frequency; A signal amplifying circuit, used for receiving a modulated microvolt signal, and amplifying and demodulating the modulated microvolt signal; The switched capacitor filter circuit is used to receive the amplified and demodulated microvolt level signal and filter out the noise signal from the amplified and demodulated microvolt level signal to obtain a processed microvolt level signal; The first chopper, the signal amplifying circuit and the switched capacitor filtering circuit are integrated into the same chip.

2. The microvolt level signal processing device according to claim 1, characterized in that: The signal amplifying circuit comprises a primary amplifying circuit, a second chopper and a secondary amplifying circuit; A first-stage amplifier circuit is used to receive the modulated microvolt level signal and amplify the modulated microvolt level signal to obtain a first signal; A second chopper is used to receive the first signal and modulate the first signal to a preset chopping frequency to obtain a second signal; The secondary amplifier circuit is used to receive the second signal and amplify the second signal to obtain an amplified and demodulated microvolt signal.

3. The microvolt level signal processing device according to claim 2, characterized in that: The first-stage amplifier circuit includes a first MOS tube and a second MOS tube, both of which are PMOS tubes; The source electrodes of the first MOS tube and the second MOS tube are both connected to the power port; The gate of the first MOS tube is connected to the OUTP port of the first chopper, and the gate of the second MOS tube is connected to the OUTN port of the first chopper; The drain of the first MOS tube is connected to the INP port of the second chopper, and the drain of the second MOS tube is connected to the INN port of the second chopper.

4. The microvolt level signal processing device according to claim 3, characterized in that: The secondary amplifier circuit includes a third MOS tube and a fourth MOS tube, both of which are NMOS tubes; The gates of the third MOS tube and the fourth MOS tube are both connected to a bias voltage; The source of the third MOS tube is connected to the OUTP port of the second chopper, and the source of the fourth MOS tube is connected to the OUTN port of the second chopper; The drain of the third MOS tube is connected to the negative input terminal of the switch capacitor filter circuit, and the drain of the fourth MOS tube is connected to the positive input terminal of the switch capacitor filter circuit.

5. The microvolt level signal processing device according to claim 1, characterized in that: The switched capacitor filter circuit comprises a first resistor circuit, a second resistor circuit, a first capacitor and a second capacitor; One end of the first resistor circuit serves as a negative input end of the switched capacitor filter circuit, and the other end is connected to one end of the first capacitor and serves as a negative output end of the switched capacitor filter circuit; the other end of the first capacitor is grounded; One end of the second resistor circuit serves as the positive input end of the switched capacitor filter circuit, and the other end is connected to one end of the second capacitor and serves as the positive output end of the switched capacitor filter circuit; the other end of the second capacitor is grounded.

6. The microvolt level signal processing device according to claim 5, characterized in that: The first resistance circuit includes a fifth MOS transistor, a sixth MOS transistor and a third capacitor; The second resistance circuit includes a seventh MOS tube, an eighth MOS tube and a fourth capacitor: the fifth MOS tube, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube are all NMOS tubes; The source of the fifth MOS tube serves as the negative input terminal of the switch capacitor filter circuit, and the drain of the seventh MOS tube serves as the positive input terminal of the switch capacitor filter circuit; The fifth MOS tube and the seventh MOS tube are co-gated and used to receive a preset clock frequency; the drain of the fifth MOS tube is connected to one end of the third capacitor and the source of the sixth MOS tube; the other end of the third capacitor is grounded; the source of the seventh MOS tube is connected to one end of the fourth capacitor and the drain of the eighth MOS tube; the other end of the fourth capacitor is grounded; The sixth MOS tube and the eighth MOS tube are co-gated and used to receive a preset clock frequency; the drain of the sixth MOS tube serves as the negative output terminal of the switch capacitor filter circuit, and the source of the eighth MOS tube serves as the positive output terminal of the switch capacitor filter circuit.

7. The microvolt level signal processing device according to claim 6, characterized in that: The microvolt level signal processing device further comprises a two-phase non-overlapping clock generator, the two-phase non-overlapping clock generator comprises a first clock generator, a second clock generator and a third clock generator; The first clock generator is connected to the first chopper and is used to provide a preset chopping frequency; The first clock generator is connected to the second chopper and is used to provide a preset chopping frequency; The CLK port of the third clock generator is connected to the gates of the fifth MOS transistor and the seventh MOS transistor, and the CLKb port of the third clock generator is connected to the gates of the sixth MOS transistor and the eighth MOS transistor, for providing a preset clock frequency.

8. The microvolt level signal processing device according to claim 7, characterized in that: The CLK port of the first clock generator is connected to the CLK port of the first chopper, and the CLKb port of the first clock generator is connected to the CLKb port of the first chopper; The VDD port of the first chopper is connected to the power supply port, and the GND port of the first chopper is grounded.

9. The microvolt level signal processing device according to claim 8, characterized in that: The first chopper modulates the microvolt level signal according to the following formula: V1(t)=V in (t)·m1(t); Where V1(t) represents the modulated microvolt signal, V in (t) represents the microvolt signal, m1(t) represents the Fourier series expansion of the control signal of the first chopper, n represents a positive integer, t represents time, ω represents the angular frequency of the first chopper, and f c represents the preset chopping frequency, and E represents the maximum amplitude of the control signal of the first chopper.

10. The microvolt level signal processing device according to claim 9, characterized in that: The signal amplifier circuit amplifies and demodulates the modulated microvolt signal according to the following formula: In out (t)=A1·[V1(t)+Vos]·m2(t)·A2; Among them, V out (t) represents the microvolt signal after amplification and demodulation, V os represents the noise signal, m2(t) represents the Fourier series expansion of the control signal of the second chopper, A1 represents the gain of the first-stage amplifier circuit, A2 represents the gain of the second-stage amplifier circuit, and k represents a positive integer.

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